1 /* DO NOT EDIT! -*- buffer-read-only: t -*- vi:set ro: */
2 /* Instruction opcode table for bpf.
4 THIS FILE IS MACHINE GENERATED WITH CGEN.
6 Copyright (C) 1996-2023 Free Software Foundation, Inc.
8 This file is part of the GNU Binutils and/or GDB, the GNU debugger.
10 This file is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3, or (at your option)
15 It is distributed in the hope that it will be useful, but WITHOUT
16 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
17 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
18 License for more details.
20 You should have received a copy of the GNU General Public License along
21 with this program; if not, write to the Free Software Foundation, Inc.,
22 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.
32 #include "libiberty.h"
37 /* The hash functions are recorded here to help keep assembler code out of
38 the disassembler and vice versa. */
40 static int asm_hash_insn_p (const CGEN_INSN
*);
41 static unsigned int asm_hash_insn (const char *);
42 static int dis_hash_insn_p (const CGEN_INSN
*);
43 static unsigned int dis_hash_insn (const char *, CGEN_INSN_INT
);
45 /* Instruction formats. */
47 #define F(f) & bpf_cgen_ifld_table[BPF_##f]
48 static const CGEN_IFMT ifmt_empty ATTRIBUTE_UNUSED
= {
52 static const CGEN_IFMT ifmt_addile ATTRIBUTE_UNUSED
= {
53 64, 64, 0xfffff0ff, { { F (F_IMM32
) }, { F (F_OFFSET16
) }, { F (F_SRCLE
) }, { F (F_OP_CODE
) }, { F (F_DSTLE
) }, { F (F_OP_SRC
) }, { F (F_OP_CLASS
) }, { 0 } }
56 static const CGEN_IFMT ifmt_addrle ATTRIBUTE_UNUSED
= {
57 64, 64, 0xffffffffffff00ff, { { F (F_IMM32
) }, { F (F_OFFSET16
) }, { F (F_SRCLE
) }, { F (F_OP_CODE
) }, { F (F_DSTLE
) }, { F (F_OP_SRC
) }, { F (F_OP_CLASS
) }, { 0 } }
60 static const CGEN_IFMT ifmt_negle ATTRIBUTE_UNUSED
= {
61 64, 64, 0xfffffffffffff0ff, { { F (F_IMM32
) }, { F (F_OFFSET16
) }, { F (F_SRCLE
) }, { F (F_OP_CODE
) }, { F (F_DSTLE
) }, { F (F_OP_SRC
) }, { F (F_OP_CLASS
) }, { 0 } }
64 static const CGEN_IFMT ifmt_addibe ATTRIBUTE_UNUSED
= {
65 64, 64, 0xffff0fff, { { F (F_IMM32
) }, { F (F_OFFSET16
) }, { F (F_DSTBE
) }, { F (F_OP_CODE
) }, { F (F_SRCBE
) }, { F (F_OP_SRC
) }, { F (F_OP_CLASS
) }, { 0 } }
68 static const CGEN_IFMT ifmt_addrbe ATTRIBUTE_UNUSED
= {
69 64, 64, 0xffffffffffff00ff, { { F (F_IMM32
) }, { F (F_OFFSET16
) }, { F (F_DSTBE
) }, { F (F_OP_CODE
) }, { F (F_SRCBE
) }, { F (F_OP_SRC
) }, { F (F_OP_CLASS
) }, { 0 } }
72 static const CGEN_IFMT ifmt_negbe ATTRIBUTE_UNUSED
= {
73 64, 64, 0xffffffffffff0fff, { { F (F_IMM32
) }, { F (F_OFFSET16
) }, { F (F_DSTBE
) }, { F (F_OP_CODE
) }, { F (F_SRCBE
) }, { F (F_OP_SRC
) }, { F (F_OP_CLASS
) }, { 0 } }
76 static const CGEN_IFMT ifmt_endlele ATTRIBUTE_UNUSED
= {
77 64, 64, 0xfffff0ff, { { F (F_IMM32
) }, { F (F_OFFSET16
) }, { F (F_SRCLE
) }, { F (F_OP_CODE
) }, { F (F_DSTLE
) }, { F (F_OP_SRC
) }, { F (F_OP_CLASS
) }, { 0 } }
80 static const CGEN_IFMT ifmt_endlebe ATTRIBUTE_UNUSED
= {
81 64, 64, 0xffff0fff, { { F (F_IMM32
) }, { F (F_OFFSET16
) }, { F (F_DSTBE
) }, { F (F_OP_CODE
) }, { F (F_SRCBE
) }, { F (F_OP_SRC
) }, { F (F_OP_CLASS
) }, { 0 } }
84 static const CGEN_IFMT ifmt_lddwle ATTRIBUTE_UNUSED
= {
85 64, 128, 0xfffff0ff, { { F (F_IMM64
) }, { F (F_OFFSET16
) }, { F (F_SRCLE
) }, { F (F_OP_MODE
) }, { F (F_OP_SIZE
) }, { F (F_DSTLE
) }, { F (F_OP_CLASS
) }, { 0 } }
88 static const CGEN_IFMT ifmt_lddwbe ATTRIBUTE_UNUSED
= {
89 64, 128, 0xffff0fff, { { F (F_IMM64
) }, { F (F_OFFSET16
) }, { F (F_DSTBE
) }, { F (F_OP_MODE
) }, { F (F_OP_SIZE
) }, { F (F_SRCBE
) }, { F (F_OP_CLASS
) }, { 0 } }
92 static const CGEN_IFMT ifmt_ldabsw ATTRIBUTE_UNUSED
= {
93 64, 64, 0xffffffff, { { F (F_IMM32
) }, { F (F_OFFSET16
) }, { F (F_REGS
) }, { F (F_OP_MODE
) }, { F (F_OP_SIZE
) }, { F (F_OP_CLASS
) }, { 0 } }
96 static const CGEN_IFMT ifmt_ldindwle ATTRIBUTE_UNUSED
= {
97 64, 64, 0xffff0fff, { { F (F_IMM32
) }, { F (F_OFFSET16
) }, { F (F_SRCLE
) }, { F (F_OP_MODE
) }, { F (F_OP_SIZE
) }, { F (F_DSTLE
) }, { F (F_OP_CLASS
) }, { 0 } }
100 static const CGEN_IFMT ifmt_ldindwbe ATTRIBUTE_UNUSED
= {
101 64, 64, 0xfffff0ff, { { F (F_IMM32
) }, { F (F_OFFSET16
) }, { F (F_DSTBE
) }, { F (F_OP_MODE
) }, { F (F_OP_SIZE
) }, { F (F_SRCBE
) }, { F (F_OP_CLASS
) }, { 0 } }
104 static const CGEN_IFMT ifmt_ldxwle ATTRIBUTE_UNUSED
= {
105 64, 64, 0xffffffff000000ff, { { F (F_IMM32
) }, { F (F_OFFSET16
) }, { F (F_SRCLE
) }, { F (F_OP_MODE
) }, { F (F_OP_SIZE
) }, { F (F_DSTLE
) }, { F (F_OP_CLASS
) }, { 0 } }
108 static const CGEN_IFMT ifmt_ldxwbe ATTRIBUTE_UNUSED
= {
109 64, 64, 0xffffffff000000ff, { { F (F_IMM32
) }, { F (F_OFFSET16
) }, { F (F_DSTBE
) }, { F (F_OP_MODE
) }, { F (F_OP_SIZE
) }, { F (F_SRCBE
) }, { F (F_OP_CLASS
) }, { 0 } }
112 static const CGEN_IFMT ifmt_stble ATTRIBUTE_UNUSED
= {
113 64, 64, 0xf0ff, { { F (F_IMM32
) }, { F (F_OFFSET16
) }, { F (F_SRCLE
) }, { F (F_OP_MODE
) }, { F (F_OP_SIZE
) }, { F (F_DSTLE
) }, { F (F_OP_CLASS
) }, { 0 } }
116 static const CGEN_IFMT ifmt_stbbe ATTRIBUTE_UNUSED
= {
117 64, 64, 0xfff, { { F (F_IMM32
) }, { F (F_OFFSET16
) }, { F (F_DSTBE
) }, { F (F_OP_MODE
) }, { F (F_OP_SIZE
) }, { F (F_SRCBE
) }, { F (F_OP_CLASS
) }, { 0 } }
120 static const CGEN_IFMT ifmt_jeqile ATTRIBUTE_UNUSED
= {
121 64, 64, 0xf0ff, { { F (F_IMM32
) }, { F (F_OFFSET16
) }, { F (F_SRCLE
) }, { F (F_OP_CODE
) }, { F (F_DSTLE
) }, { F (F_OP_SRC
) }, { F (F_OP_CLASS
) }, { 0 } }
124 static const CGEN_IFMT ifmt_jeqrle ATTRIBUTE_UNUSED
= {
125 64, 64, 0xffffffff000000ff, { { F (F_IMM32
) }, { F (F_OFFSET16
) }, { F (F_SRCLE
) }, { F (F_OP_CODE
) }, { F (F_DSTLE
) }, { F (F_OP_SRC
) }, { F (F_OP_CLASS
) }, { 0 } }
128 static const CGEN_IFMT ifmt_jeqibe ATTRIBUTE_UNUSED
= {
129 64, 64, 0xfff, { { F (F_IMM32
) }, { F (F_OFFSET16
) }, { F (F_DSTBE
) }, { F (F_OP_CODE
) }, { F (F_SRCBE
) }, { F (F_OP_SRC
) }, { F (F_OP_CLASS
) }, { 0 } }
132 static const CGEN_IFMT ifmt_jeqrbe ATTRIBUTE_UNUSED
= {
133 64, 64, 0xffffffff000000ff, { { F (F_IMM32
) }, { F (F_OFFSET16
) }, { F (F_DSTBE
) }, { F (F_OP_CODE
) }, { F (F_SRCBE
) }, { F (F_OP_SRC
) }, { F (F_OP_CLASS
) }, { 0 } }
136 static const CGEN_IFMT ifmt_callle ATTRIBUTE_UNUSED
= {
137 64, 64, 0xffff0fff, { { F (F_IMM32
) }, { F (F_OFFSET16
) }, { F (F_SRCLE
) }, { F (F_OP_CODE
) }, { F (F_DSTLE
) }, { F (F_OP_SRC
) }, { F (F_OP_CLASS
) }, { 0 } }
140 static const CGEN_IFMT ifmt_callbe ATTRIBUTE_UNUSED
= {
141 64, 64, 0xfffff0ff, { { F (F_IMM32
) }, { F (F_OFFSET16
) }, { F (F_DSTBE
) }, { F (F_OP_CODE
) }, { F (F_SRCBE
) }, { F (F_OP_SRC
) }, { F (F_OP_CLASS
) }, { 0 } }
144 static const CGEN_IFMT ifmt_ja ATTRIBUTE_UNUSED
= {
145 64, 64, 0xffffffff0000ffff, { { F (F_IMM32
) }, { F (F_OFFSET16
) }, { F (F_REGS
) }, { F (F_OP_CODE
) }, { F (F_OP_SRC
) }, { F (F_OP_CLASS
) }, { 0 } }
148 static const CGEN_IFMT ifmt_exit ATTRIBUTE_UNUSED
= {
149 64, 64, 0xffffffffffffffff, { { F (F_IMM32
) }, { F (F_OFFSET16
) }, { F (F_REGS
) }, { F (F_OP_CODE
) }, { F (F_OP_SRC
) }, { F (F_OP_CLASS
) }, { 0 } }
154 #define A(a) (1 << CGEN_INSN_##a)
155 #define OPERAND(op) BPF_OPERAND_##op
156 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
157 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
159 /* The instruction table. */
161 static const CGEN_OPCODE bpf_cgen_insn_opcode_table
[MAX_INSNS
] =
163 /* Special null first entry.
164 A `num' value of zero is thus invalid.
165 Also, the special `invalid' insn resides here. */
166 { { 0, 0, 0, 0 }, {{0}}, 0, {0}},
167 /* add $dstle,$imm32 */
170 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), 0 } },
171 & ifmt_addile
, { 0x7 }
173 /* add $dstle,$srcle */
176 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), 0 } },
177 & ifmt_addrle
, { 0xf }
179 /* add32 $dstle,$imm32 */
182 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), 0 } },
183 & ifmt_addile
, { 0x4 }
185 /* add32 $dstle,$srcle */
188 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), 0 } },
189 & ifmt_addrle
, { 0xc }
191 /* sub $dstle,$imm32 */
194 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), 0 } },
195 & ifmt_addile
, { 0x17 }
197 /* sub $dstle,$srcle */
200 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), 0 } },
201 & ifmt_addrle
, { 0x1f }
203 /* sub32 $dstle,$imm32 */
206 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), 0 } },
207 & ifmt_addile
, { 0x14 }
209 /* sub32 $dstle,$srcle */
212 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), 0 } },
213 & ifmt_addrle
, { 0x1c }
215 /* mul $dstle,$imm32 */
218 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), 0 } },
219 & ifmt_addile
, { 0x27 }
221 /* mul $dstle,$srcle */
224 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), 0 } },
225 & ifmt_addrle
, { 0x2f }
227 /* mul32 $dstle,$imm32 */
230 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), 0 } },
231 & ifmt_addile
, { 0x24 }
233 /* mul32 $dstle,$srcle */
236 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), 0 } },
237 & ifmt_addrle
, { 0x2c }
239 /* div $dstle,$imm32 */
242 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), 0 } },
243 & ifmt_addile
, { 0x37 }
245 /* div $dstle,$srcle */
248 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), 0 } },
249 & ifmt_addrle
, { 0x3f }
251 /* div32 $dstle,$imm32 */
254 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), 0 } },
255 & ifmt_addile
, { 0x34 }
257 /* div32 $dstle,$srcle */
260 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), 0 } },
261 & ifmt_addrle
, { 0x3c }
263 /* or $dstle,$imm32 */
266 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), 0 } },
267 & ifmt_addile
, { 0x47 }
269 /* or $dstle,$srcle */
272 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), 0 } },
273 & ifmt_addrle
, { 0x4f }
275 /* or32 $dstle,$imm32 */
278 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), 0 } },
279 & ifmt_addile
, { 0x44 }
281 /* or32 $dstle,$srcle */
284 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), 0 } },
285 & ifmt_addrle
, { 0x4c }
287 /* and $dstle,$imm32 */
290 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), 0 } },
291 & ifmt_addile
, { 0x57 }
293 /* and $dstle,$srcle */
296 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), 0 } },
297 & ifmt_addrle
, { 0x5f }
299 /* and32 $dstle,$imm32 */
302 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), 0 } },
303 & ifmt_addile
, { 0x54 }
305 /* and32 $dstle,$srcle */
308 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), 0 } },
309 & ifmt_addrle
, { 0x5c }
311 /* lsh $dstle,$imm32 */
314 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), 0 } },
315 & ifmt_addile
, { 0x67 }
317 /* lsh $dstle,$srcle */
320 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), 0 } },
321 & ifmt_addrle
, { 0x6f }
323 /* lsh32 $dstle,$imm32 */
326 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), 0 } },
327 & ifmt_addile
, { 0x64 }
329 /* lsh32 $dstle,$srcle */
332 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), 0 } },
333 & ifmt_addrle
, { 0x6c }
335 /* rsh $dstle,$imm32 */
338 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), 0 } },
339 & ifmt_addile
, { 0x77 }
341 /* rsh $dstle,$srcle */
344 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), 0 } },
345 & ifmt_addrle
, { 0x7f }
347 /* rsh32 $dstle,$imm32 */
350 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), 0 } },
351 & ifmt_addile
, { 0x74 }
353 /* rsh32 $dstle,$srcle */
356 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), 0 } },
357 & ifmt_addrle
, { 0x7c }
359 /* mod $dstle,$imm32 */
362 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), 0 } },
363 & ifmt_addile
, { 0x97 }
365 /* mod $dstle,$srcle */
368 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), 0 } },
369 & ifmt_addrle
, { 0x9f }
371 /* mod32 $dstle,$imm32 */
374 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), 0 } },
375 & ifmt_addile
, { 0x94 }
377 /* mod32 $dstle,$srcle */
380 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), 0 } },
381 & ifmt_addrle
, { 0x9c }
383 /* xor $dstle,$imm32 */
386 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), 0 } },
387 & ifmt_addile
, { 0xa7 }
389 /* xor $dstle,$srcle */
392 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), 0 } },
393 & ifmt_addrle
, { 0xaf }
395 /* xor32 $dstle,$imm32 */
398 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), 0 } },
399 & ifmt_addile
, { 0xa4 }
401 /* xor32 $dstle,$srcle */
404 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), 0 } },
405 & ifmt_addrle
, { 0xac }
407 /* arsh $dstle,$imm32 */
410 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), 0 } },
411 & ifmt_addile
, { 0xc7 }
413 /* arsh $dstle,$srcle */
416 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), 0 } },
417 & ifmt_addrle
, { 0xcf }
419 /* arsh32 $dstle,$imm32 */
422 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), 0 } },
423 & ifmt_addile
, { 0xc4 }
425 /* arsh32 $dstle,$srcle */
428 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), 0 } },
429 & ifmt_addrle
, { 0xcc }
431 /* sdiv $dstle,$imm32 */
434 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), 0 } },
435 & ifmt_addile
, { 0xe7 }
437 /* sdiv $dstle,$srcle */
440 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), 0 } },
441 & ifmt_addrle
, { 0xef }
443 /* sdiv32 $dstle,$imm32 */
446 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), 0 } },
447 & ifmt_addile
, { 0xe4 }
449 /* sdiv32 $dstle,$srcle */
452 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), 0 } },
453 & ifmt_addrle
, { 0xec }
455 /* smod $dstle,$imm32 */
458 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), 0 } },
459 & ifmt_addile
, { 0xf7 }
461 /* smod $dstle,$srcle */
464 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), 0 } },
465 & ifmt_addrle
, { 0xff }
467 /* smod32 $dstle,$imm32 */
470 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), 0 } },
471 & ifmt_addile
, { 0xf4 }
473 /* smod32 $dstle,$srcle */
476 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), 0 } },
477 & ifmt_addrle
, { 0xfc }
482 { { MNEM
, ' ', OP (DSTLE
), 0 } },
483 & ifmt_negle
, { 0x87 }
488 { { MNEM
, ' ', OP (DSTLE
), 0 } },
489 & ifmt_negle
, { 0x84 }
491 /* mov $dstle,$imm32 */
494 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), 0 } },
495 & ifmt_addile
, { 0xb7 }
497 /* mov $dstle,$srcle */
500 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), 0 } },
501 & ifmt_addrle
, { 0xbf }
503 /* mov32 $dstle,$imm32 */
506 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), 0 } },
507 & ifmt_addile
, { 0xb4 }
509 /* mov32 $dstle,$srcle */
512 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), 0 } },
513 & ifmt_addrle
, { 0xbc }
515 /* add $dstbe,$imm32 */
518 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), 0 } },
519 & ifmt_addibe
, { 0x7 }
521 /* add $dstbe,$srcbe */
524 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), 0 } },
525 & ifmt_addrbe
, { 0xf }
527 /* add32 $dstbe,$imm32 */
530 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), 0 } },
531 & ifmt_addibe
, { 0x4 }
533 /* add32 $dstbe,$srcbe */
536 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), 0 } },
537 & ifmt_addrbe
, { 0xc }
539 /* sub $dstbe,$imm32 */
542 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), 0 } },
543 & ifmt_addibe
, { 0x17 }
545 /* sub $dstbe,$srcbe */
548 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), 0 } },
549 & ifmt_addrbe
, { 0x1f }
551 /* sub32 $dstbe,$imm32 */
554 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), 0 } },
555 & ifmt_addibe
, { 0x14 }
557 /* sub32 $dstbe,$srcbe */
560 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), 0 } },
561 & ifmt_addrbe
, { 0x1c }
563 /* mul $dstbe,$imm32 */
566 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), 0 } },
567 & ifmt_addibe
, { 0x27 }
569 /* mul $dstbe,$srcbe */
572 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), 0 } },
573 & ifmt_addrbe
, { 0x2f }
575 /* mul32 $dstbe,$imm32 */
578 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), 0 } },
579 & ifmt_addibe
, { 0x24 }
581 /* mul32 $dstbe,$srcbe */
584 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), 0 } },
585 & ifmt_addrbe
, { 0x2c }
587 /* div $dstbe,$imm32 */
590 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), 0 } },
591 & ifmt_addibe
, { 0x37 }
593 /* div $dstbe,$srcbe */
596 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), 0 } },
597 & ifmt_addrbe
, { 0x3f }
599 /* div32 $dstbe,$imm32 */
602 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), 0 } },
603 & ifmt_addibe
, { 0x34 }
605 /* div32 $dstbe,$srcbe */
608 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), 0 } },
609 & ifmt_addrbe
, { 0x3c }
611 /* or $dstbe,$imm32 */
614 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), 0 } },
615 & ifmt_addibe
, { 0x47 }
617 /* or $dstbe,$srcbe */
620 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), 0 } },
621 & ifmt_addrbe
, { 0x4f }
623 /* or32 $dstbe,$imm32 */
626 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), 0 } },
627 & ifmt_addibe
, { 0x44 }
629 /* or32 $dstbe,$srcbe */
632 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), 0 } },
633 & ifmt_addrbe
, { 0x4c }
635 /* and $dstbe,$imm32 */
638 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), 0 } },
639 & ifmt_addibe
, { 0x57 }
641 /* and $dstbe,$srcbe */
644 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), 0 } },
645 & ifmt_addrbe
, { 0x5f }
647 /* and32 $dstbe,$imm32 */
650 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), 0 } },
651 & ifmt_addibe
, { 0x54 }
653 /* and32 $dstbe,$srcbe */
656 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), 0 } },
657 & ifmt_addrbe
, { 0x5c }
659 /* lsh $dstbe,$imm32 */
662 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), 0 } },
663 & ifmt_addibe
, { 0x67 }
665 /* lsh $dstbe,$srcbe */
668 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), 0 } },
669 & ifmt_addrbe
, { 0x6f }
671 /* lsh32 $dstbe,$imm32 */
674 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), 0 } },
675 & ifmt_addibe
, { 0x64 }
677 /* lsh32 $dstbe,$srcbe */
680 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), 0 } },
681 & ifmt_addrbe
, { 0x6c }
683 /* rsh $dstbe,$imm32 */
686 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), 0 } },
687 & ifmt_addibe
, { 0x77 }
689 /* rsh $dstbe,$srcbe */
692 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), 0 } },
693 & ifmt_addrbe
, { 0x7f }
695 /* rsh32 $dstbe,$imm32 */
698 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), 0 } },
699 & ifmt_addibe
, { 0x74 }
701 /* rsh32 $dstbe,$srcbe */
704 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), 0 } },
705 & ifmt_addrbe
, { 0x7c }
707 /* mod $dstbe,$imm32 */
710 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), 0 } },
711 & ifmt_addibe
, { 0x97 }
713 /* mod $dstbe,$srcbe */
716 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), 0 } },
717 & ifmt_addrbe
, { 0x9f }
719 /* mod32 $dstbe,$imm32 */
722 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), 0 } },
723 & ifmt_addibe
, { 0x94 }
725 /* mod32 $dstbe,$srcbe */
728 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), 0 } },
729 & ifmt_addrbe
, { 0x9c }
731 /* xor $dstbe,$imm32 */
734 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), 0 } },
735 & ifmt_addibe
, { 0xa7 }
737 /* xor $dstbe,$srcbe */
740 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), 0 } },
741 & ifmt_addrbe
, { 0xaf }
743 /* xor32 $dstbe,$imm32 */
746 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), 0 } },
747 & ifmt_addibe
, { 0xa4 }
749 /* xor32 $dstbe,$srcbe */
752 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), 0 } },
753 & ifmt_addrbe
, { 0xac }
755 /* arsh $dstbe,$imm32 */
758 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), 0 } },
759 & ifmt_addibe
, { 0xc7 }
761 /* arsh $dstbe,$srcbe */
764 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), 0 } },
765 & ifmt_addrbe
, { 0xcf }
767 /* arsh32 $dstbe,$imm32 */
770 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), 0 } },
771 & ifmt_addibe
, { 0xc4 }
773 /* arsh32 $dstbe,$srcbe */
776 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), 0 } },
777 & ifmt_addrbe
, { 0xcc }
779 /* sdiv $dstbe,$imm32 */
782 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), 0 } },
783 & ifmt_addibe
, { 0xe7 }
785 /* sdiv $dstbe,$srcbe */
788 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), 0 } },
789 & ifmt_addrbe
, { 0xef }
791 /* sdiv32 $dstbe,$imm32 */
794 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), 0 } },
795 & ifmt_addibe
, { 0xe4 }
797 /* sdiv32 $dstbe,$srcbe */
800 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), 0 } },
801 & ifmt_addrbe
, { 0xec }
803 /* smod $dstbe,$imm32 */
806 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), 0 } },
807 & ifmt_addibe
, { 0xf7 }
809 /* smod $dstbe,$srcbe */
812 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), 0 } },
813 & ifmt_addrbe
, { 0xff }
815 /* smod32 $dstbe,$imm32 */
818 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), 0 } },
819 & ifmt_addibe
, { 0xf4 }
821 /* smod32 $dstbe,$srcbe */
824 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), 0 } },
825 & ifmt_addrbe
, { 0xfc }
830 { { MNEM
, ' ', OP (DSTBE
), 0 } },
831 & ifmt_negbe
, { 0x87 }
836 { { MNEM
, ' ', OP (DSTBE
), 0 } },
837 & ifmt_negbe
, { 0x84 }
839 /* mov $dstbe,$imm32 */
842 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), 0 } },
843 & ifmt_addibe
, { 0xb7 }
845 /* mov $dstbe,$srcbe */
848 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), 0 } },
849 & ifmt_addrbe
, { 0xbf }
851 /* mov32 $dstbe,$imm32 */
854 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), 0 } },
855 & ifmt_addibe
, { 0xb4 }
857 /* mov32 $dstbe,$srcbe */
860 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), 0 } },
861 & ifmt_addrbe
, { 0xbc }
863 /* endle $dstle,$endsize */
866 { { MNEM
, ' ', OP (DSTLE
), ',', OP (ENDSIZE
), 0 } },
867 & ifmt_endlele
, { 0xd4 }
869 /* endbe $dstle,$endsize */
872 { { MNEM
, ' ', OP (DSTLE
), ',', OP (ENDSIZE
), 0 } },
873 & ifmt_endlele
, { 0xdc }
875 /* endle $dstbe,$endsize */
878 { { MNEM
, ' ', OP (DSTBE
), ',', OP (ENDSIZE
), 0 } },
879 & ifmt_endlebe
, { 0xd4 }
881 /* endbe $dstbe,$endsize */
884 { { MNEM
, ' ', OP (DSTBE
), ',', OP (ENDSIZE
), 0 } },
885 & ifmt_endlebe
, { 0xdc }
887 /* lddw $dstle,$imm64 */
890 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM64
), 0 } },
891 & ifmt_lddwle
, { 0x18 }
893 /* lddw $dstbe,$imm64 */
896 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM64
), 0 } },
897 & ifmt_lddwbe
, { 0x18 }
902 { { MNEM
, ' ', OP (IMM32
), 0 } },
903 & ifmt_ldabsw
, { 0x20 }
908 { { MNEM
, ' ', OP (IMM32
), 0 } },
909 & ifmt_ldabsw
, { 0x28 }
914 { { MNEM
, ' ', OP (IMM32
), 0 } },
915 & ifmt_ldabsw
, { 0x30 }
920 { { MNEM
, ' ', OP (IMM32
), 0 } },
921 & ifmt_ldabsw
, { 0x38 }
923 /* ldindw $srcle,$imm32 */
926 { { MNEM
, ' ', OP (SRCLE
), ',', OP (IMM32
), 0 } },
927 & ifmt_ldindwle
, { 0x40 }
929 /* ldindh $srcle,$imm32 */
932 { { MNEM
, ' ', OP (SRCLE
), ',', OP (IMM32
), 0 } },
933 & ifmt_ldindwle
, { 0x48 }
935 /* ldindb $srcle,$imm32 */
938 { { MNEM
, ' ', OP (SRCLE
), ',', OP (IMM32
), 0 } },
939 & ifmt_ldindwle
, { 0x50 }
941 /* ldinddw $srcle,$imm32 */
944 { { MNEM
, ' ', OP (SRCLE
), ',', OP (IMM32
), 0 } },
945 & ifmt_ldindwle
, { 0x58 }
947 /* ldindw $srcbe,$imm32 */
950 { { MNEM
, ' ', OP (SRCBE
), ',', OP (IMM32
), 0 } },
951 & ifmt_ldindwbe
, { 0x40 }
953 /* ldindh $srcbe,$imm32 */
956 { { MNEM
, ' ', OP (SRCBE
), ',', OP (IMM32
), 0 } },
957 & ifmt_ldindwbe
, { 0x48 }
959 /* ldindb $srcbe,$imm32 */
962 { { MNEM
, ' ', OP (SRCBE
), ',', OP (IMM32
), 0 } },
963 & ifmt_ldindwbe
, { 0x50 }
965 /* ldinddw $srcbe,$imm32 */
968 { { MNEM
, ' ', OP (SRCBE
), ',', OP (IMM32
), 0 } },
969 & ifmt_ldindwbe
, { 0x58 }
971 /* ldxw $dstle,[$srcle+$offset16] */
974 { { MNEM
, ' ', OP (DSTLE
), ',', '[', OP (SRCLE
), '+', OP (OFFSET16
), ']', 0 } },
975 & ifmt_ldxwle
, { 0x61 }
977 /* ldxh $dstle,[$srcle+$offset16] */
980 { { MNEM
, ' ', OP (DSTLE
), ',', '[', OP (SRCLE
), '+', OP (OFFSET16
), ']', 0 } },
981 & ifmt_ldxwle
, { 0x69 }
983 /* ldxb $dstle,[$srcle+$offset16] */
986 { { MNEM
, ' ', OP (DSTLE
), ',', '[', OP (SRCLE
), '+', OP (OFFSET16
), ']', 0 } },
987 & ifmt_ldxwle
, { 0x71 }
989 /* ldxdw $dstle,[$srcle+$offset16] */
992 { { MNEM
, ' ', OP (DSTLE
), ',', '[', OP (SRCLE
), '+', OP (OFFSET16
), ']', 0 } },
993 & ifmt_ldxwle
, { 0x79 }
995 /* stxw [$dstle+$offset16],$srcle */
998 { { MNEM
, ' ', '[', OP (DSTLE
), '+', OP (OFFSET16
), ']', ',', OP (SRCLE
), 0 } },
999 & ifmt_ldxwle
, { 0x63 }
1001 /* stxh [$dstle+$offset16],$srcle */
1004 { { MNEM
, ' ', '[', OP (DSTLE
), '+', OP (OFFSET16
), ']', ',', OP (SRCLE
), 0 } },
1005 & ifmt_ldxwle
, { 0x6b }
1007 /* stxb [$dstle+$offset16],$srcle */
1010 { { MNEM
, ' ', '[', OP (DSTLE
), '+', OP (OFFSET16
), ']', ',', OP (SRCLE
), 0 } },
1011 & ifmt_ldxwle
, { 0x73 }
1013 /* stxdw [$dstle+$offset16],$srcle */
1016 { { MNEM
, ' ', '[', OP (DSTLE
), '+', OP (OFFSET16
), ']', ',', OP (SRCLE
), 0 } },
1017 & ifmt_ldxwle
, { 0x7b }
1019 /* ldxw $dstbe,[$srcbe+$offset16] */
1022 { { MNEM
, ' ', OP (DSTBE
), ',', '[', OP (SRCBE
), '+', OP (OFFSET16
), ']', 0 } },
1023 & ifmt_ldxwbe
, { 0x61 }
1025 /* ldxh $dstbe,[$srcbe+$offset16] */
1028 { { MNEM
, ' ', OP (DSTBE
), ',', '[', OP (SRCBE
), '+', OP (OFFSET16
), ']', 0 } },
1029 & ifmt_ldxwbe
, { 0x69 }
1031 /* ldxb $dstbe,[$srcbe+$offset16] */
1034 { { MNEM
, ' ', OP (DSTBE
), ',', '[', OP (SRCBE
), '+', OP (OFFSET16
), ']', 0 } },
1035 & ifmt_ldxwbe
, { 0x71 }
1037 /* ldxdw $dstbe,[$srcbe+$offset16] */
1040 { { MNEM
, ' ', OP (DSTBE
), ',', '[', OP (SRCBE
), '+', OP (OFFSET16
), ']', 0 } },
1041 & ifmt_ldxwbe
, { 0x79 }
1043 /* stxw [$dstbe+$offset16],$srcbe */
1046 { { MNEM
, ' ', '[', OP (DSTBE
), '+', OP (OFFSET16
), ']', ',', OP (SRCBE
), 0 } },
1047 & ifmt_ldxwbe
, { 0x63 }
1049 /* stxh [$dstbe+$offset16],$srcbe */
1052 { { MNEM
, ' ', '[', OP (DSTBE
), '+', OP (OFFSET16
), ']', ',', OP (SRCBE
), 0 } },
1053 & ifmt_ldxwbe
, { 0x6b }
1055 /* stxb [$dstbe+$offset16],$srcbe */
1058 { { MNEM
, ' ', '[', OP (DSTBE
), '+', OP (OFFSET16
), ']', ',', OP (SRCBE
), 0 } },
1059 & ifmt_ldxwbe
, { 0x73 }
1061 /* stxdw [$dstbe+$offset16],$srcbe */
1064 { { MNEM
, ' ', '[', OP (DSTBE
), '+', OP (OFFSET16
), ']', ',', OP (SRCBE
), 0 } },
1065 & ifmt_ldxwbe
, { 0x7b }
1067 /* stb [$dstle+$offset16],$imm32 */
1070 { { MNEM
, ' ', '[', OP (DSTLE
), '+', OP (OFFSET16
), ']', ',', OP (IMM32
), 0 } },
1071 & ifmt_stble
, { 0x72 }
1073 /* sth [$dstle+$offset16],$imm32 */
1076 { { MNEM
, ' ', '[', OP (DSTLE
), '+', OP (OFFSET16
), ']', ',', OP (IMM32
), 0 } },
1077 & ifmt_stble
, { 0x6a }
1079 /* stw [$dstle+$offset16],$imm32 */
1082 { { MNEM
, ' ', '[', OP (DSTLE
), '+', OP (OFFSET16
), ']', ',', OP (IMM32
), 0 } },
1083 & ifmt_stble
, { 0x62 }
1085 /* stdw [$dstle+$offset16],$imm32 */
1088 { { MNEM
, ' ', '[', OP (DSTLE
), '+', OP (OFFSET16
), ']', ',', OP (IMM32
), 0 } },
1089 & ifmt_stble
, { 0x7a }
1091 /* stb [$dstbe+$offset16],$imm32 */
1094 { { MNEM
, ' ', '[', OP (DSTBE
), '+', OP (OFFSET16
), ']', ',', OP (IMM32
), 0 } },
1095 & ifmt_stbbe
, { 0x72 }
1097 /* sth [$dstbe+$offset16],$imm32 */
1100 { { MNEM
, ' ', '[', OP (DSTBE
), '+', OP (OFFSET16
), ']', ',', OP (IMM32
), 0 } },
1101 & ifmt_stbbe
, { 0x6a }
1103 /* stw [$dstbe+$offset16],$imm32 */
1106 { { MNEM
, ' ', '[', OP (DSTBE
), '+', OP (OFFSET16
), ']', ',', OP (IMM32
), 0 } },
1107 & ifmt_stbbe
, { 0x62 }
1109 /* stdw [$dstbe+$offset16],$imm32 */
1112 { { MNEM
, ' ', '[', OP (DSTBE
), '+', OP (OFFSET16
), ']', ',', OP (IMM32
), 0 } },
1113 & ifmt_stbbe
, { 0x7a }
1115 /* jeq $dstle,$imm32,$disp16 */
1118 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1119 & ifmt_jeqile
, { 0x15 }
1121 /* jeq $dstle,$srcle,$disp16 */
1124 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), ',', OP (DISP16
), 0 } },
1125 & ifmt_jeqrle
, { 0x1d }
1127 /* jeq32 $dstle,$imm32,$disp16 */
1130 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1131 & ifmt_jeqile
, { 0x16 }
1133 /* jeq32 $dstle,$srcle,$disp16 */
1136 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), ',', OP (DISP16
), 0 } },
1137 & ifmt_jeqrle
, { 0x1e }
1139 /* jgt $dstle,$imm32,$disp16 */
1142 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1143 & ifmt_jeqile
, { 0x25 }
1145 /* jgt $dstle,$srcle,$disp16 */
1148 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), ',', OP (DISP16
), 0 } },
1149 & ifmt_jeqrle
, { 0x2d }
1151 /* jgt32 $dstle,$imm32,$disp16 */
1154 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1155 & ifmt_jeqile
, { 0x26 }
1157 /* jgt32 $dstle,$srcle,$disp16 */
1160 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), ',', OP (DISP16
), 0 } },
1161 & ifmt_jeqrle
, { 0x2e }
1163 /* jge $dstle,$imm32,$disp16 */
1166 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1167 & ifmt_jeqile
, { 0x35 }
1169 /* jge $dstle,$srcle,$disp16 */
1172 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), ',', OP (DISP16
), 0 } },
1173 & ifmt_jeqrle
, { 0x3d }
1175 /* jge32 $dstle,$imm32,$disp16 */
1178 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1179 & ifmt_jeqile
, { 0x36 }
1181 /* jge32 $dstle,$srcle,$disp16 */
1184 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), ',', OP (DISP16
), 0 } },
1185 & ifmt_jeqrle
, { 0x3e }
1187 /* jlt $dstle,$imm32,$disp16 */
1190 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1191 & ifmt_jeqile
, { 0xa5 }
1193 /* jlt $dstle,$srcle,$disp16 */
1196 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), ',', OP (DISP16
), 0 } },
1197 & ifmt_jeqrle
, { 0xad }
1199 /* jlt32 $dstle,$imm32,$disp16 */
1202 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1203 & ifmt_jeqile
, { 0xa6 }
1205 /* jlt32 $dstle,$srcle,$disp16 */
1208 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), ',', OP (DISP16
), 0 } },
1209 & ifmt_jeqrle
, { 0xae }
1211 /* jle $dstle,$imm32,$disp16 */
1214 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1215 & ifmt_jeqile
, { 0xb5 }
1217 /* jle $dstle,$srcle,$disp16 */
1220 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), ',', OP (DISP16
), 0 } },
1221 & ifmt_jeqrle
, { 0xbd }
1223 /* jle32 $dstle,$imm32,$disp16 */
1226 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1227 & ifmt_jeqile
, { 0xb6 }
1229 /* jle32 $dstle,$srcle,$disp16 */
1232 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), ',', OP (DISP16
), 0 } },
1233 & ifmt_jeqrle
, { 0xbe }
1235 /* jset $dstle,$imm32,$disp16 */
1238 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1239 & ifmt_jeqile
, { 0x45 }
1241 /* jset $dstle,$srcle,$disp16 */
1244 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), ',', OP (DISP16
), 0 } },
1245 & ifmt_jeqrle
, { 0x4d }
1247 /* jset32 $dstle,$imm32,$disp16 */
1250 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1251 & ifmt_jeqile
, { 0x46 }
1253 /* jset32 $dstle,$srcle,$disp16 */
1256 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), ',', OP (DISP16
), 0 } },
1257 & ifmt_jeqrle
, { 0x4e }
1259 /* jne $dstle,$imm32,$disp16 */
1262 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1263 & ifmt_jeqile
, { 0x55 }
1265 /* jne $dstle,$srcle,$disp16 */
1268 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), ',', OP (DISP16
), 0 } },
1269 & ifmt_jeqrle
, { 0x5d }
1271 /* jne32 $dstle,$imm32,$disp16 */
1274 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1275 & ifmt_jeqile
, { 0x56 }
1277 /* jne32 $dstle,$srcle,$disp16 */
1280 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), ',', OP (DISP16
), 0 } },
1281 & ifmt_jeqrle
, { 0x5e }
1283 /* jsgt $dstle,$imm32,$disp16 */
1286 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1287 & ifmt_jeqile
, { 0x65 }
1289 /* jsgt $dstle,$srcle,$disp16 */
1292 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), ',', OP (DISP16
), 0 } },
1293 & ifmt_jeqrle
, { 0x6d }
1295 /* jsgt32 $dstle,$imm32,$disp16 */
1298 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1299 & ifmt_jeqile
, { 0x66 }
1301 /* jsgt32 $dstle,$srcle,$disp16 */
1304 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), ',', OP (DISP16
), 0 } },
1305 & ifmt_jeqrle
, { 0x6e }
1307 /* jsge $dstle,$imm32,$disp16 */
1310 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1311 & ifmt_jeqile
, { 0x75 }
1313 /* jsge $dstle,$srcle,$disp16 */
1316 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), ',', OP (DISP16
), 0 } },
1317 & ifmt_jeqrle
, { 0x7d }
1319 /* jsge32 $dstle,$imm32,$disp16 */
1322 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1323 & ifmt_jeqile
, { 0x76 }
1325 /* jsge32 $dstle,$srcle,$disp16 */
1328 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), ',', OP (DISP16
), 0 } },
1329 & ifmt_jeqrle
, { 0x7e }
1331 /* jslt $dstle,$imm32,$disp16 */
1334 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1335 & ifmt_jeqile
, { 0xc5 }
1337 /* jslt $dstle,$srcle,$disp16 */
1340 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), ',', OP (DISP16
), 0 } },
1341 & ifmt_jeqrle
, { 0xcd }
1343 /* jslt32 $dstle,$imm32,$disp16 */
1346 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1347 & ifmt_jeqile
, { 0xc6 }
1349 /* jslt32 $dstle,$srcle,$disp16 */
1352 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), ',', OP (DISP16
), 0 } },
1353 & ifmt_jeqrle
, { 0xce }
1355 /* jsle $dstle,$imm32,$disp16 */
1358 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1359 & ifmt_jeqile
, { 0xd5 }
1361 /* jsle $dstle,$srcle,$disp16 */
1364 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), ',', OP (DISP16
), 0 } },
1365 & ifmt_jeqrle
, { 0xdd }
1367 /* jsle32 $dstle,$imm32,$disp16 */
1370 { { MNEM
, ' ', OP (DSTLE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1371 & ifmt_jeqile
, { 0xd6 }
1373 /* jsle32 $dstle,$srcle,$disp16 */
1376 { { MNEM
, ' ', OP (DSTLE
), ',', OP (SRCLE
), ',', OP (DISP16
), 0 } },
1377 & ifmt_jeqrle
, { 0xde }
1379 /* jeq $dstbe,$imm32,$disp16 */
1382 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1383 & ifmt_jeqibe
, { 0x15 }
1385 /* jeq $dstbe,$srcbe,$disp16 */
1388 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), ',', OP (DISP16
), 0 } },
1389 & ifmt_jeqrbe
, { 0x1d }
1391 /* jeq32 $dstbe,$imm32,$disp16 */
1394 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1395 & ifmt_jeqibe
, { 0x16 }
1397 /* jeq32 $dstbe,$srcbe,$disp16 */
1400 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), ',', OP (DISP16
), 0 } },
1401 & ifmt_jeqrbe
, { 0x1e }
1403 /* jgt $dstbe,$imm32,$disp16 */
1406 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1407 & ifmt_jeqibe
, { 0x25 }
1409 /* jgt $dstbe,$srcbe,$disp16 */
1412 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), ',', OP (DISP16
), 0 } },
1413 & ifmt_jeqrbe
, { 0x2d }
1415 /* jgt32 $dstbe,$imm32,$disp16 */
1418 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1419 & ifmt_jeqibe
, { 0x26 }
1421 /* jgt32 $dstbe,$srcbe,$disp16 */
1424 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), ',', OP (DISP16
), 0 } },
1425 & ifmt_jeqrbe
, { 0x2e }
1427 /* jge $dstbe,$imm32,$disp16 */
1430 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1431 & ifmt_jeqibe
, { 0x35 }
1433 /* jge $dstbe,$srcbe,$disp16 */
1436 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), ',', OP (DISP16
), 0 } },
1437 & ifmt_jeqrbe
, { 0x3d }
1439 /* jge32 $dstbe,$imm32,$disp16 */
1442 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1443 & ifmt_jeqibe
, { 0x36 }
1445 /* jge32 $dstbe,$srcbe,$disp16 */
1448 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), ',', OP (DISP16
), 0 } },
1449 & ifmt_jeqrbe
, { 0x3e }
1451 /* jlt $dstbe,$imm32,$disp16 */
1454 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1455 & ifmt_jeqibe
, { 0xa5 }
1457 /* jlt $dstbe,$srcbe,$disp16 */
1460 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), ',', OP (DISP16
), 0 } },
1461 & ifmt_jeqrbe
, { 0xad }
1463 /* jlt32 $dstbe,$imm32,$disp16 */
1466 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1467 & ifmt_jeqibe
, { 0xa6 }
1469 /* jlt32 $dstbe,$srcbe,$disp16 */
1472 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), ',', OP (DISP16
), 0 } },
1473 & ifmt_jeqrbe
, { 0xae }
1475 /* jle $dstbe,$imm32,$disp16 */
1478 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1479 & ifmt_jeqibe
, { 0xb5 }
1481 /* jle $dstbe,$srcbe,$disp16 */
1484 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), ',', OP (DISP16
), 0 } },
1485 & ifmt_jeqrbe
, { 0xbd }
1487 /* jle32 $dstbe,$imm32,$disp16 */
1490 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1491 & ifmt_jeqibe
, { 0xb6 }
1493 /* jle32 $dstbe,$srcbe,$disp16 */
1496 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), ',', OP (DISP16
), 0 } },
1497 & ifmt_jeqrbe
, { 0xbe }
1499 /* jset $dstbe,$imm32,$disp16 */
1502 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1503 & ifmt_jeqibe
, { 0x45 }
1505 /* jset $dstbe,$srcbe,$disp16 */
1508 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), ',', OP (DISP16
), 0 } },
1509 & ifmt_jeqrbe
, { 0x4d }
1511 /* jset32 $dstbe,$imm32,$disp16 */
1514 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1515 & ifmt_jeqibe
, { 0x46 }
1517 /* jset32 $dstbe,$srcbe,$disp16 */
1520 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), ',', OP (DISP16
), 0 } },
1521 & ifmt_jeqrbe
, { 0x4e }
1523 /* jne $dstbe,$imm32,$disp16 */
1526 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1527 & ifmt_jeqibe
, { 0x55 }
1529 /* jne $dstbe,$srcbe,$disp16 */
1532 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), ',', OP (DISP16
), 0 } },
1533 & ifmt_jeqrbe
, { 0x5d }
1535 /* jne32 $dstbe,$imm32,$disp16 */
1538 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1539 & ifmt_jeqibe
, { 0x56 }
1541 /* jne32 $dstbe,$srcbe,$disp16 */
1544 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), ',', OP (DISP16
), 0 } },
1545 & ifmt_jeqrbe
, { 0x5e }
1547 /* jsgt $dstbe,$imm32,$disp16 */
1550 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1551 & ifmt_jeqibe
, { 0x65 }
1553 /* jsgt $dstbe,$srcbe,$disp16 */
1556 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), ',', OP (DISP16
), 0 } },
1557 & ifmt_jeqrbe
, { 0x6d }
1559 /* jsgt32 $dstbe,$imm32,$disp16 */
1562 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1563 & ifmt_jeqibe
, { 0x66 }
1565 /* jsgt32 $dstbe,$srcbe,$disp16 */
1568 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), ',', OP (DISP16
), 0 } },
1569 & ifmt_jeqrbe
, { 0x6e }
1571 /* jsge $dstbe,$imm32,$disp16 */
1574 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1575 & ifmt_jeqibe
, { 0x75 }
1577 /* jsge $dstbe,$srcbe,$disp16 */
1580 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), ',', OP (DISP16
), 0 } },
1581 & ifmt_jeqrbe
, { 0x7d }
1583 /* jsge32 $dstbe,$imm32,$disp16 */
1586 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1587 & ifmt_jeqibe
, { 0x76 }
1589 /* jsge32 $dstbe,$srcbe,$disp16 */
1592 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), ',', OP (DISP16
), 0 } },
1593 & ifmt_jeqrbe
, { 0x7e }
1595 /* jslt $dstbe,$imm32,$disp16 */
1598 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1599 & ifmt_jeqibe
, { 0xc5 }
1601 /* jslt $dstbe,$srcbe,$disp16 */
1604 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), ',', OP (DISP16
), 0 } },
1605 & ifmt_jeqrbe
, { 0xcd }
1607 /* jslt32 $dstbe,$imm32,$disp16 */
1610 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1611 & ifmt_jeqibe
, { 0xc6 }
1613 /* jslt32 $dstbe,$srcbe,$disp16 */
1616 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), ',', OP (DISP16
), 0 } },
1617 & ifmt_jeqrbe
, { 0xce }
1619 /* jsle $dstbe,$imm32,$disp16 */
1622 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1623 & ifmt_jeqibe
, { 0xd5 }
1625 /* jsle $dstbe,$srcbe,$disp16 */
1628 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), ',', OP (DISP16
), 0 } },
1629 & ifmt_jeqrbe
, { 0xdd }
1631 /* jsle32 $dstbe,$imm32,$disp16 */
1634 { { MNEM
, ' ', OP (DSTBE
), ',', OP (IMM32
), ',', OP (DISP16
), 0 } },
1635 & ifmt_jeqibe
, { 0xd6 }
1637 /* jsle32 $dstbe,$srcbe,$disp16 */
1640 { { MNEM
, ' ', OP (DSTBE
), ',', OP (SRCBE
), ',', OP (DISP16
), 0 } },
1641 & ifmt_jeqrbe
, { 0xde }
1646 { { MNEM
, ' ', OP (DISP32
), 0 } },
1647 & ifmt_callle
, { 0x85 }
1652 { { MNEM
, ' ', OP (DISP32
), 0 } },
1653 & ifmt_callbe
, { 0x85 }
1658 { { MNEM
, ' ', OP (DSTLE
), 0 } },
1659 & ifmt_negle
, { 0x8d }
1664 { { MNEM
, ' ', OP (DSTBE
), 0 } },
1665 & ifmt_negbe
, { 0x8d }
1670 { { MNEM
, ' ', OP (DISP16
), 0 } },
1677 & ifmt_exit
, { 0x95 }
1679 /* xadddw [$dstle+$offset16],$srcle */
1682 { { MNEM
, ' ', '[', OP (DSTLE
), '+', OP (OFFSET16
), ']', ',', OP (SRCLE
), 0 } },
1683 & ifmt_ldxwle
, { 0xdb }
1685 /* xaddw [$dstle+$offset16],$srcle */
1688 { { MNEM
, ' ', '[', OP (DSTLE
), '+', OP (OFFSET16
), ']', ',', OP (SRCLE
), 0 } },
1689 & ifmt_ldxwle
, { 0xc3 }
1691 /* xadddw [$dstbe+$offset16],$srcbe */
1694 { { MNEM
, ' ', '[', OP (DSTBE
), '+', OP (OFFSET16
), ']', ',', OP (SRCBE
), 0 } },
1695 & ifmt_ldxwbe
, { 0xdb }
1697 /* xaddw [$dstbe+$offset16],$srcbe */
1700 { { MNEM
, ' ', '[', OP (DSTBE
), '+', OP (OFFSET16
), ']', ',', OP (SRCBE
), 0 } },
1701 & ifmt_ldxwbe
, { 0xc3 }
1707 & ifmt_exit
, { 0x8c }
1716 /* Formats for ALIAS macro-insns. */
1718 #define F(f) & bpf_cgen_ifld_table[BPF_##f]
1721 /* Each non-simple macro entry points to an array of expansion possibilities. */
1723 #define A(a) (1 << CGEN_INSN_##a)
1724 #define OPERAND(op) BPF_OPERAND_##op
1725 #define MNEM CGEN_SYNTAX_MNEMONIC /* syntax value for mnemonic */
1726 #define OP(field) CGEN_SYNTAX_MAKE_FIELD (OPERAND (field))
1728 /* The macro instruction table. */
1730 static const CGEN_IBASE bpf_cgen_macro_insn_table
[] =
1734 /* The macro instruction opcode table. */
1736 static const CGEN_OPCODE bpf_cgen_macro_insn_opcode_table
[] =
1745 #ifndef CGEN_ASM_HASH_P
1746 #define CGEN_ASM_HASH_P(insn) 1
1749 #ifndef CGEN_DIS_HASH_P
1750 #define CGEN_DIS_HASH_P(insn) 1
1753 /* Return non-zero if INSN is to be added to the hash table.
1754 Targets are free to override CGEN_{ASM,DIS}_HASH_P in the .opc file. */
1757 asm_hash_insn_p (const CGEN_INSN
*insn ATTRIBUTE_UNUSED
)
1759 return CGEN_ASM_HASH_P (insn
);
1763 dis_hash_insn_p (const CGEN_INSN
*insn
)
1765 /* If building the hash table and the NO-DIS attribute is present,
1767 if (CGEN_INSN_ATTR_VALUE (insn
, CGEN_INSN_NO_DIS
))
1769 return CGEN_DIS_HASH_P (insn
);
1772 #ifndef CGEN_ASM_HASH
1773 #define CGEN_ASM_HASH_SIZE 127
1774 #ifdef CGEN_MNEMONIC_OPERANDS
1775 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE)
1777 #define CGEN_ASM_HASH(mnem) (*(unsigned char *) (mnem) % CGEN_ASM_HASH_SIZE) /*FIXME*/
1781 /* It doesn't make much sense to provide a default here,
1782 but while this is under development we do.
1783 BUFFER is a pointer to the bytes of the insn, target order.
1784 VALUE is the first base_insn_bitsize bits as an int in host order. */
1786 #ifndef CGEN_DIS_HASH
1787 #define CGEN_DIS_HASH_SIZE 256
1788 #define CGEN_DIS_HASH(buf, value) (*(unsigned char *) (buf))
1791 /* The result is the hash value of the insn.
1792 Targets are free to override CGEN_{ASM,DIS}_HASH in the .opc file. */
1795 asm_hash_insn (const char *mnem
)
1797 return CGEN_ASM_HASH (mnem
);
1800 /* BUF is a pointer to the bytes of the insn, target order.
1801 VALUE is the first base_insn_bitsize bits as an int in host order. */
1804 dis_hash_insn (const char *buf ATTRIBUTE_UNUSED
,
1805 CGEN_INSN_INT value ATTRIBUTE_UNUSED
)
1807 return CGEN_DIS_HASH (buf
, value
);
1810 /* Set the recorded length of the insn in the CGEN_FIELDS struct. */
1813 set_fields_bitsize (CGEN_FIELDS
*fields
, int size
)
1815 CGEN_FIELDS_BITSIZE (fields
) = size
;
1818 /* Function to call before using the operand instance table.
1819 This plugs the opcode entries and macro instructions into the cpu table. */
1822 bpf_cgen_init_opcode_table (CGEN_CPU_DESC cd
)
1825 int num_macros
= (sizeof (bpf_cgen_macro_insn_table
) /
1826 sizeof (bpf_cgen_macro_insn_table
[0]));
1827 const CGEN_IBASE
*ib
= & bpf_cgen_macro_insn_table
[0];
1828 const CGEN_OPCODE
*oc
= & bpf_cgen_macro_insn_opcode_table
[0];
1829 CGEN_INSN
*insns
= xmalloc (num_macros
* sizeof (CGEN_INSN
));
1831 /* This test has been added to avoid a warning generated
1832 if memset is called with a third argument of value zero. */
1833 if (num_macros
>= 1)
1834 memset (insns
, 0, num_macros
* sizeof (CGEN_INSN
));
1835 for (i
= 0; i
< num_macros
; ++i
)
1837 insns
[i
].base
= &ib
[i
];
1838 insns
[i
].opcode
= &oc
[i
];
1839 bpf_cgen_build_insn_regex (& insns
[i
]);
1841 cd
->macro_insn_table
.init_entries
= insns
;
1842 cd
->macro_insn_table
.entry_size
= sizeof (CGEN_IBASE
);
1843 cd
->macro_insn_table
.num_init_entries
= num_macros
;
1845 oc
= & bpf_cgen_insn_opcode_table
[0];
1846 insns
= (CGEN_INSN
*) cd
->insn_table
.init_entries
;
1847 for (i
= 0; i
< MAX_INSNS
; ++i
)
1849 insns
[i
].opcode
= &oc
[i
];
1850 bpf_cgen_build_insn_regex (& insns
[i
]);
1853 cd
->sizeof_fields
= sizeof (CGEN_FIELDS
);
1854 cd
->set_fields_bitsize
= set_fields_bitsize
;
1856 cd
->asm_hash_p
= asm_hash_insn_p
;
1857 cd
->asm_hash
= asm_hash_insn
;
1858 cd
->asm_hash_size
= CGEN_ASM_HASH_SIZE
;
1860 cd
->dis_hash_p
= dis_hash_insn_p
;
1861 cd
->dis_hash
= dis_hash_insn
;
1862 cd
->dis_hash_size
= CGEN_DIS_HASH_SIZE
;