ld x86_64 tests: Accept x86-64-v3 as a needed ISA
[binutils-gdb.git] / gdb / amd64-linux-nat.c
blobf7f9a483def830727b04fcf7e55c5e57a480af9d
1 /* Native-dependent code for GNU/Linux x86-64.
3 Copyright (C) 2001-2023 Free Software Foundation, Inc.
4 Contributed by Jiri Smid, SuSE Labs.
6 This file is part of GDB.
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3 of the License, or
11 (at your option) any later version.
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #include "defs.h"
22 #include "inferior.h"
23 #include "regcache.h"
24 #include "elf/common.h"
25 #include <sys/uio.h>
26 #include "nat/gdb_ptrace.h"
27 #include <asm/prctl.h>
28 #include <sys/reg.h>
29 #include "gregset.h"
30 #include "gdb_proc_service.h"
32 #include "amd64-nat.h"
33 #include "amd64-tdep.h"
34 #include "amd64-linux-tdep.h"
35 #include "i386-linux-tdep.h"
36 #include "gdbsupport/x86-xstate.h"
38 #include "x86-linux-nat.h"
39 #include "nat/linux-ptrace.h"
40 #include "nat/amd64-linux-siginfo.h"
42 /* This definition comes from prctl.h. Kernels older than 2.5.64
43 do not have it. */
44 #ifndef PTRACE_ARCH_PRCTL
45 #define PTRACE_ARCH_PRCTL 30
46 #endif
48 struct amd64_linux_nat_target final : public x86_linux_nat_target
50 /* Add our register access methods. */
51 void fetch_registers (struct regcache *, int) override;
52 void store_registers (struct regcache *, int) override;
54 bool low_siginfo_fixup (siginfo_t *ptrace, gdb_byte *inf, int direction)
55 override;
58 static amd64_linux_nat_target the_amd64_linux_nat_target;
60 /* Mapping between the general-purpose registers in GNU/Linux x86-64
61 `struct user' format and GDB's register cache layout for GNU/Linux
62 i386.
64 Note that most GNU/Linux x86-64 registers are 64-bit, while the
65 GNU/Linux i386 registers are all 32-bit, but since we're
66 little-endian we get away with that. */
68 /* From <sys/reg.h> on GNU/Linux i386. */
69 static int amd64_linux_gregset32_reg_offset[] =
71 RAX * 8, RCX * 8, /* %eax, %ecx */
72 RDX * 8, RBX * 8, /* %edx, %ebx */
73 RSP * 8, RBP * 8, /* %esp, %ebp */
74 RSI * 8, RDI * 8, /* %esi, %edi */
75 RIP * 8, EFLAGS * 8, /* %eip, %eflags */
76 CS * 8, SS * 8, /* %cs, %ss */
77 DS * 8, ES * 8, /* %ds, %es */
78 FS * 8, GS * 8, /* %fs, %gs */
79 -1, -1, -1, -1, -1, -1, -1, -1,
80 -1, -1, -1, -1, -1, -1, -1, -1,
81 -1, -1, -1, -1, -1, -1, -1, -1, -1,
82 -1, -1, -1, -1, -1, -1, -1, -1,
83 -1, -1, -1, -1, /* MPX registers BND0 ... BND3. */
84 -1, -1, /* MPX registers BNDCFGU, BNDSTATUS. */
85 -1, -1, -1, -1, -1, -1, -1, -1, /* k0 ... k7 (AVX512) */
86 -1, -1, -1, -1, -1, -1, -1, -1, /* zmm0 ... zmm7 (AVX512) */
87 -1, /* PKEYS register PKRU */
88 ORIG_RAX * 8 /* "orig_eax" */
92 /* Transfering the general-purpose registers between GDB, inferiors
93 and core files. */
95 /* See amd64_collect_native_gregset. This linux specific version handles
96 issues with negative EAX values not being restored correctly upon syscall
97 return when debugging 32-bit targets. It has no effect on 64-bit
98 targets. */
100 static void
101 amd64_linux_collect_native_gregset (const struct regcache *regcache,
102 void *gregs, int regnum)
104 amd64_collect_native_gregset (regcache, gregs, regnum);
106 struct gdbarch *gdbarch = regcache->arch ();
107 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
109 /* Sign extend EAX value to avoid potential syscall restart
110 problems.
112 On Linux, when a syscall is interrupted by a signal, the
113 (kernel function implementing the) syscall may return
114 -ERESTARTSYS when a signal occurs. Doing so indicates that
115 the syscall is restartable. Then, depending on settings
116 associated with the signal handler, and after the signal
117 handler is called, the kernel can then either return -EINTR
118 or it can cause the syscall to be restarted. We are
119 concerned with the latter case here.
121 On (32-bit) i386, the status (-ERESTARTSYS) is placed in the
122 EAX register. When debugging a 32-bit process from a 64-bit
123 (amd64) GDB, the debugger fetches 64-bit registers even
124 though the process being debugged is only 32-bit. The
125 register cache is only 32 bits wide though; GDB discards the
126 high 32 bits when placing 64-bit values in the 32-bit
127 regcache. Normally, this is not a problem since the 32-bit
128 process should only care about the lower 32-bit portions of
129 these registers. That said, it can happen that the 64-bit
130 value being restored will be different from the 64-bit value
131 that was originally retrieved from the kernel. The one place
132 (that we know of) where it does matter is in the kernel's
133 syscall restart code. The kernel's code for restarting a
134 syscall after a signal expects to see a negative value
135 (specifically -ERESTARTSYS) in the 64-bit RAX register in
136 order to correctly cause a syscall to be restarted.
138 The call to amd64_collect_native_gregset, above, is setting
139 the high 32 bits of RAX (and other registers too) to 0. For
140 syscall restart, we need to sign extend EAX so that RAX will
141 appear as a negative value when EAX is set to -ERESTARTSYS.
142 This in turn will cause the signal handling code in the
143 kernel to recognize -ERESTARTSYS which will in turn cause the
144 syscall to be restarted.
146 The test case gdb.base/interrupt.exp tests for this problem.
147 Without this sign extension code in place, it'll show
148 a number of failures when testing against unix/-m32. */
150 if (regnum == -1 || regnum == I386_EAX_REGNUM)
152 void *ptr = ((gdb_byte *) gregs
153 + amd64_linux_gregset32_reg_offset[I386_EAX_REGNUM]);
155 *(int64_t *) ptr = *(int32_t *) ptr;
160 /* Fill GDB's register cache with the general-purpose register values
161 in *GREGSETP. */
163 void
164 supply_gregset (struct regcache *regcache, const elf_gregset_t *gregsetp)
166 amd64_supply_native_gregset (regcache, gregsetp, -1);
169 /* Fill register REGNUM (if it is a general-purpose register) in
170 *GREGSETP with the value in GDB's register cache. If REGNUM is -1,
171 do this for all registers. */
173 void
174 fill_gregset (const struct regcache *regcache,
175 elf_gregset_t *gregsetp, int regnum)
177 amd64_linux_collect_native_gregset (regcache, gregsetp, regnum);
180 /* Transfering floating-point registers between GDB, inferiors and cores. */
182 /* Fill GDB's register cache with the floating-point and SSE register
183 values in *FPREGSETP. */
185 void
186 supply_fpregset (struct regcache *regcache, const elf_fpregset_t *fpregsetp)
188 amd64_supply_fxsave (regcache, -1, fpregsetp);
191 /* Fill register REGNUM (if it is a floating-point or SSE register) in
192 *FPREGSETP with the value in GDB's register cache. If REGNUM is
193 -1, do this for all registers. */
195 void
196 fill_fpregset (const struct regcache *regcache,
197 elf_fpregset_t *fpregsetp, int regnum)
199 amd64_collect_fxsave (regcache, regnum, fpregsetp);
203 /* Transferring arbitrary registers between GDB and inferior. */
205 /* Fetch register REGNUM from the child process. If REGNUM is -1, do
206 this for all registers (including the floating point and SSE
207 registers). */
209 void
210 amd64_linux_nat_target::fetch_registers (struct regcache *regcache, int regnum)
212 struct gdbarch *gdbarch = regcache->arch ();
213 const i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
214 int tid;
216 /* GNU/Linux LWP ID's are process ID's. */
217 tid = regcache->ptid ().lwp ();
218 if (tid == 0)
219 tid = regcache->ptid ().pid (); /* Not a threaded program. */
221 if (regnum == -1 || amd64_native_gregset_supplies_p (gdbarch, regnum))
223 elf_gregset_t regs;
225 if (ptrace (PTRACE_GETREGS, tid, 0, (long) &regs) < 0)
226 perror_with_name (_("Couldn't get registers"));
228 amd64_supply_native_gregset (regcache, &regs, -1);
229 if (regnum != -1)
230 return;
233 if (regnum == -1 || !amd64_native_gregset_supplies_p (gdbarch, regnum))
235 elf_fpregset_t fpregs;
237 if (have_ptrace_getregset == TRIBOOL_TRUE)
239 char xstateregs[tdep->xsave_layout.sizeof_xsave];
240 struct iovec iov;
242 /* Pre-4.14 kernels have a bug (fixed by commit 0852b374173b
243 "x86/fpu: Add FPU state copying quirk to handle XRSTOR failure on
244 Intel Skylake CPUs") that sometimes causes the mxcsr location in
245 xstateregs not to be copied by PTRACE_GETREGSET. Make sure that
246 the location is at least initialized with a defined value. */
247 memset (xstateregs, 0, sizeof (xstateregs));
248 iov.iov_base = xstateregs;
249 iov.iov_len = sizeof (xstateregs);
250 if (ptrace (PTRACE_GETREGSET, tid,
251 (unsigned int) NT_X86_XSTATE, (long) &iov) < 0)
252 perror_with_name (_("Couldn't get extended state status"));
254 amd64_supply_xsave (regcache, -1, xstateregs);
256 else
258 if (ptrace (PTRACE_GETFPREGS, tid, 0, (long) &fpregs) < 0)
259 perror_with_name (_("Couldn't get floating point status"));
261 amd64_supply_fxsave (regcache, -1, &fpregs);
266 /* Store register REGNUM back into the child process. If REGNUM is
267 -1, do this for all registers (including the floating-point and SSE
268 registers). */
270 void
271 amd64_linux_nat_target::store_registers (struct regcache *regcache, int regnum)
273 struct gdbarch *gdbarch = regcache->arch ();
274 const i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
275 int tid;
277 /* GNU/Linux LWP ID's are process ID's. */
278 tid = regcache->ptid ().lwp ();
279 if (tid == 0)
280 tid = regcache->ptid ().pid (); /* Not a threaded program. */
282 if (regnum == -1 || amd64_native_gregset_supplies_p (gdbarch, regnum))
284 elf_gregset_t regs;
286 if (ptrace (PTRACE_GETREGS, tid, 0, (long) &regs) < 0)
287 perror_with_name (_("Couldn't get registers"));
289 amd64_linux_collect_native_gregset (regcache, &regs, regnum);
291 if (ptrace (PTRACE_SETREGS, tid, 0, (long) &regs) < 0)
292 perror_with_name (_("Couldn't write registers"));
294 if (regnum != -1)
295 return;
298 if (regnum == -1 || !amd64_native_gregset_supplies_p (gdbarch, regnum))
300 elf_fpregset_t fpregs;
302 if (have_ptrace_getregset == TRIBOOL_TRUE)
304 char xstateregs[tdep->xsave_layout.sizeof_xsave];
305 struct iovec iov;
307 iov.iov_base = xstateregs;
308 iov.iov_len = sizeof (xstateregs);
309 if (ptrace (PTRACE_GETREGSET, tid,
310 (unsigned int) NT_X86_XSTATE, (long) &iov) < 0)
311 perror_with_name (_("Couldn't get extended state status"));
313 amd64_collect_xsave (regcache, regnum, xstateregs, 0);
315 if (ptrace (PTRACE_SETREGSET, tid,
316 (unsigned int) NT_X86_XSTATE, (long) &iov) < 0)
317 perror_with_name (_("Couldn't write extended state status"));
319 else
321 if (ptrace (PTRACE_GETFPREGS, tid, 0, (long) &fpregs) < 0)
322 perror_with_name (_("Couldn't get floating point status"));
324 amd64_collect_fxsave (regcache, regnum, &fpregs);
326 if (ptrace (PTRACE_SETFPREGS, tid, 0, (long) &fpregs) < 0)
327 perror_with_name (_("Couldn't write floating point status"));
333 /* This function is called by libthread_db as part of its handling of
334 a request for a thread's local storage address. */
336 ps_err_e
337 ps_get_thread_area (struct ps_prochandle *ph,
338 lwpid_t lwpid, int idx, void **base)
340 if (gdbarch_bfd_arch_info (ph->thread->inf->arch ())->bits_per_word == 32)
342 unsigned int base_addr;
343 ps_err_e result;
345 result = x86_linux_get_thread_area (lwpid, (void *) (long) idx,
346 &base_addr);
347 if (result == PS_OK)
349 /* Extend the value to 64 bits. Here it's assumed that
350 a "long" and a "void *" are the same. */
351 (*base) = (void *) (long) base_addr;
353 return result;
355 else
358 /* FIXME: ezannoni-2003-07-09 see comment above about include
359 file order. We could be getting bogus values for these two. */
360 gdb_assert (FS < ELF_NGREG);
361 gdb_assert (GS < ELF_NGREG);
362 switch (idx)
364 case FS:
366 unsigned long fs;
367 errno = 0;
368 fs = ptrace (PTRACE_PEEKUSER, lwpid,
369 offsetof (struct user_regs_struct, fs_base), 0);
370 if (errno == 0)
372 *base = (void *) fs;
373 return PS_OK;
377 break;
379 case GS:
381 unsigned long gs;
382 errno = 0;
383 gs = ptrace (PTRACE_PEEKUSER, lwpid,
384 offsetof (struct user_regs_struct, gs_base), 0);
385 if (errno == 0)
387 *base = (void *) gs;
388 return PS_OK;
391 break;
393 default: /* Should not happen. */
394 return PS_BADADDR;
397 return PS_ERR; /* ptrace failed. */
401 /* Convert a ptrace/host siginfo object, into/from the siginfo in the
402 layout of the inferiors' architecture. Returns true if any
403 conversion was done; false otherwise. If DIRECTION is 1, then copy
404 from INF to PTRACE. If DIRECTION is 0, copy from PTRACE to
405 INF. */
407 bool
408 amd64_linux_nat_target::low_siginfo_fixup (siginfo_t *ptrace,
409 gdb_byte *inf,
410 int direction)
412 struct gdbarch *gdbarch = get_frame_arch (get_current_frame ());
414 /* Is the inferior 32-bit? If so, then do fixup the siginfo
415 object. */
416 if (gdbarch_bfd_arch_info (gdbarch)->bits_per_word == 32)
417 return amd64_linux_siginfo_fixup_common (ptrace, inf, direction,
418 FIXUP_32);
419 /* No fixup for native x32 GDB. */
420 else if (gdbarch_addr_bit (gdbarch) == 32 && sizeof (void *) == 8)
421 return amd64_linux_siginfo_fixup_common (ptrace, inf, direction,
422 FIXUP_X32);
423 else
424 return false;
427 void _initialize_amd64_linux_nat ();
428 void
429 _initialize_amd64_linux_nat ()
431 amd64_native_gregset32_reg_offset = amd64_linux_gregset32_reg_offset;
432 amd64_native_gregset32_num_regs = I386_LINUX_NUM_REGS;
433 amd64_native_gregset64_reg_offset = amd64_linux_gregset_reg_offset;
434 amd64_native_gregset64_num_regs = AMD64_LINUX_NUM_REGS;
436 gdb_assert (ARRAY_SIZE (amd64_linux_gregset32_reg_offset)
437 == amd64_native_gregset32_num_regs);
439 linux_target = &the_amd64_linux_nat_target;
441 /* Add the target. */
442 add_inf_child_target (linux_target);