Fix gas's 'macro count' test for various targets
[binutils-gdb.git] / gdbserver / i387-fp.cc
blob62cafd872041fe6a8a668334acc652fa03d92d89
1 /* i387-specific utility functions, for the remote server for GDB.
2 Copyright (C) 2000-2024 Free Software Foundation, Inc.
4 This file is part of GDB.
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program. If not, see <http://www.gnu.org/licenses/>. */
19 #include "i387-fp.h"
20 #include "gdbsupport/x86-xstate.h"
21 #include "nat/x86-xstate.h"
23 /* Default to SSE. */
24 static unsigned long long x86_xcr0 = X86_XSTATE_SSE_MASK;
26 static const int num_mpx_bnd_registers = 4;
27 static const int num_mpx_cfg_registers = 2;
28 static const int num_avx512_k_registers = 8;
29 static const int num_pkeys_registers = 1;
31 static x86_xsave_layout xsave_layout;
33 /* Note: These functions preserve the reserved bits in control registers.
34 However, gdbserver promptly throws away that information. */
36 /* These structs should have the proper sizes and alignment on both
37 i386 and x86-64 machines. */
39 struct i387_fsave
41 /* All these are only sixteen bits, plus padding, except for fop (which
42 is only eleven bits), and fooff / fioff (which are 32 bits each). */
43 unsigned short fctrl;
44 unsigned short pad1;
45 unsigned short fstat;
46 unsigned short pad2;
47 unsigned short ftag;
48 unsigned short pad3;
49 unsigned int fioff;
50 unsigned short fiseg;
51 unsigned short fop;
52 unsigned int fooff;
53 unsigned short foseg;
54 unsigned short pad4;
56 /* Space for eight 80-bit FP values. */
57 unsigned char st_space[80];
60 struct i387_fxsave
62 /* All these are only sixteen bits, plus padding, except for fop (which
63 is only eleven bits), and fooff / fioff (which are 32 bits each). */
64 unsigned short fctrl;
65 unsigned short fstat;
66 unsigned short ftag;
67 unsigned short fop;
68 unsigned int fioff;
69 unsigned short fiseg;
70 unsigned short pad1;
71 unsigned int fooff;
72 unsigned short foseg;
73 unsigned short pad12;
75 unsigned int mxcsr;
76 unsigned int pad3;
78 /* Space for eight 80-bit FP values in 128-bit spaces. */
79 unsigned char st_space[128];
81 /* Space for eight 128-bit XMM values, or 16 on x86-64. */
82 unsigned char xmm_space[256];
85 static_assert (sizeof(i387_fxsave) == 416);
87 struct i387_xsave : public i387_fxsave
89 unsigned char reserved1[48];
91 /* The extended control register 0 (the XFEATURE_ENABLED_MASK
92 register). */
93 unsigned long long xcr0;
95 unsigned char reserved2[40];
97 /* The XSTATE_BV bit vector. */
98 unsigned long long xstate_bv;
100 /* The XCOMP_BV bit vector. */
101 unsigned long long xcomp_bv;
103 unsigned char reserved3[48];
105 /* Byte 576. End of registers with fixed position in XSAVE.
106 The position of other XSAVE registers will be calculated
107 from the appropriate CPUID calls. */
109 private:
110 /* Base address of XSAVE data as an unsigned char *. Used to derive
111 pointers to XSAVE state components in the extended state
112 area. */
113 unsigned char *xsave ()
114 { return reinterpret_cast<unsigned char *> (this); }
116 public:
117 /* Memory address of eight upper 128-bit YMM values, or 16 on x86-64. */
118 unsigned char *ymmh_space ()
119 { return xsave () + xsave_layout.avx_offset; }
121 /* Memory address of 4 bound registers values of 128 bits. */
122 unsigned char *bndregs_space ()
123 { return xsave () + xsave_layout.bndregs_offset; }
125 /* Memory address of 2 MPX configuration registers of 64 bits
126 plus reserved space. */
127 unsigned char *bndcfg_space ()
128 { return xsave () + xsave_layout.bndcfg_offset; }
130 /* Memory address of 8 OpMask register values of 64 bits. */
131 unsigned char *k_space ()
132 { return xsave () + xsave_layout.k_offset; }
134 /* Memory address of 16 256-bit zmm0-15. */
135 unsigned char *zmmh_space ()
136 { return xsave () + xsave_layout.zmm_h_offset; }
138 /* Memory address of 16 512-bit zmm16-31 values. */
139 unsigned char *zmm16_space ()
140 { return xsave () + xsave_layout.zmm_offset; }
142 /* Memory address of 1 32-bit PKRU register. The HW XSTATE size for this
143 feature is actually 64 bits, but WRPKRU/RDPKRU instructions ignore upper
144 32 bits. */
145 unsigned char *pkru_space ()
146 { return xsave () + xsave_layout.pkru_offset; }
149 static_assert (sizeof(i387_xsave) == 576);
151 void
152 i387_cache_to_fsave (struct regcache *regcache, void *buf)
154 struct i387_fsave *fp = (struct i387_fsave *) buf;
155 int i;
156 int st0_regnum = find_regno (regcache->tdesc, "st0");
157 unsigned long val2;
159 for (i = 0; i < 8; i++)
160 collect_register (regcache, i + st0_regnum,
161 ((char *) &fp->st_space[0]) + i * 10);
163 fp->fioff = regcache_raw_get_unsigned_by_name (regcache, "fioff");
164 fp->fooff = regcache_raw_get_unsigned_by_name (regcache, "fooff");
166 /* This one's 11 bits... */
167 val2 = regcache_raw_get_unsigned_by_name (regcache, "fop");
168 fp->fop = (val2 & 0x7FF) | (fp->fop & 0xF800);
170 /* Some registers are 16-bit. */
171 fp->fctrl = regcache_raw_get_unsigned_by_name (regcache, "fctrl");
172 fp->fstat = regcache_raw_get_unsigned_by_name (regcache, "fstat");
173 fp->ftag = regcache_raw_get_unsigned_by_name (regcache, "ftag");
174 fp->fiseg = regcache_raw_get_unsigned_by_name (regcache, "fiseg");
175 fp->foseg = regcache_raw_get_unsigned_by_name (regcache, "foseg");
178 void
179 i387_fsave_to_cache (struct regcache *regcache, const void *buf)
181 struct i387_fsave *fp = (struct i387_fsave *) buf;
182 int i;
183 int st0_regnum = find_regno (regcache->tdesc, "st0");
184 unsigned long val;
186 for (i = 0; i < 8; i++)
187 supply_register (regcache, i + st0_regnum,
188 ((char *) &fp->st_space[0]) + i * 10);
190 supply_register_by_name (regcache, "fioff", &fp->fioff);
191 supply_register_by_name (regcache, "fooff", &fp->fooff);
193 /* Some registers are 16-bit. */
194 val = fp->fctrl & 0xFFFF;
195 supply_register_by_name (regcache, "fctrl", &val);
197 val = fp->fstat & 0xFFFF;
198 supply_register_by_name (regcache, "fstat", &val);
200 val = fp->ftag & 0xFFFF;
201 supply_register_by_name (regcache, "ftag", &val);
203 val = fp->fiseg & 0xFFFF;
204 supply_register_by_name (regcache, "fiseg", &val);
206 val = fp->foseg & 0xFFFF;
207 supply_register_by_name (regcache, "foseg", &val);
209 /* fop has only 11 valid bits. */
210 val = (fp->fop) & 0x7FF;
211 supply_register_by_name (regcache, "fop", &val);
214 void
215 i387_cache_to_fxsave (struct regcache *regcache, void *buf)
217 struct i387_fxsave *fp = (struct i387_fxsave *) buf;
218 int i;
219 int st0_regnum = find_regno (regcache->tdesc, "st0");
220 int xmm0_regnum = find_regno (regcache->tdesc, "xmm0");
221 unsigned long val, val2;
222 /* Amd64 has 16 xmm regs; I386 has 8 xmm regs. */
223 int num_xmm_registers = register_size (regcache->tdesc, 0) == 8 ? 16 : 8;
225 for (i = 0; i < 8; i++)
226 collect_register (regcache, i + st0_regnum,
227 ((char *) &fp->st_space[0]) + i * 16);
228 for (i = 0; i < num_xmm_registers; i++)
229 collect_register (regcache, i + xmm0_regnum,
230 ((char *) &fp->xmm_space[0]) + i * 16);
232 fp->fioff = regcache_raw_get_unsigned_by_name (regcache, "fioff");
233 fp->fooff = regcache_raw_get_unsigned_by_name (regcache, "fooff");
234 fp->mxcsr = regcache_raw_get_unsigned_by_name (regcache, "mxcsr");
236 /* This one's 11 bits... */
237 val2 = regcache_raw_get_unsigned_by_name (regcache, "fop");
238 fp->fop = (val2 & 0x7FF) | (fp->fop & 0xF800);
240 /* Some registers are 16-bit. */
241 fp->fctrl = regcache_raw_get_unsigned_by_name (regcache, "fctrl");
242 fp->fstat = regcache_raw_get_unsigned_by_name (regcache, "fstat");
244 /* Convert to the simplifed tag form stored in fxsave data. */
245 val = regcache_raw_get_unsigned_by_name (regcache, "ftag");
246 val2 = 0;
247 for (i = 7; i >= 0; i--)
249 int tag = (val >> (i * 2)) & 3;
251 if (tag != 3)
252 val2 |= (1 << i);
254 fp->ftag = val2;
256 fp->fiseg = regcache_raw_get_unsigned_by_name (regcache, "fiseg");
257 fp->foseg = regcache_raw_get_unsigned_by_name (regcache, "foseg");
260 void
261 i387_cache_to_xsave (struct regcache *regcache, void *buf)
263 struct i387_xsave *fp = (struct i387_xsave *) buf;
264 bool amd64 = register_size (regcache->tdesc, 0) == 8;
265 int i;
266 unsigned long val, val2;
267 unsigned long long xstate_bv = 0;
268 unsigned long long clear_bv = 0;
269 char raw[64];
270 unsigned char *p;
272 /* Amd64 has 16 xmm regs; I386 has 8 xmm regs. */
273 int num_xmm_registers = amd64 ? 16 : 8;
274 /* AVX512 adds 16 extra ZMM regs in Amd64 mode, but none in I386 mode.*/
275 int num_zmm_high_registers = amd64 ? 16 : 0;
277 /* The supported bits in `xstat_bv' are 8 bytes. Clear part in
278 vector registers if its bit in xstat_bv is zero. */
279 clear_bv = (~fp->xstate_bv) & x86_xcr0;
281 /* Clear part in x87 and vector registers if its bit in xstat_bv is
282 zero. */
283 if (clear_bv)
285 if ((clear_bv & X86_XSTATE_X87))
287 for (i = 0; i < 8; i++)
288 memset (((char *) &fp->st_space[0]) + i * 16, 0, 10);
290 fp->fioff = 0;
291 fp->fooff = 0;
292 fp->fctrl = I387_FCTRL_INIT_VAL;
293 fp->fstat = 0;
294 fp->ftag = 0;
295 fp->fiseg = 0;
296 fp->foseg = 0;
297 fp->fop = 0;
300 if ((clear_bv & X86_XSTATE_SSE))
301 for (i = 0; i < num_xmm_registers; i++)
302 memset (((char *) &fp->xmm_space[0]) + i * 16, 0, 16);
304 if ((clear_bv & X86_XSTATE_AVX))
305 for (i = 0; i < num_xmm_registers; i++)
306 memset (fp->ymmh_space () + i * 16, 0, 16);
308 if ((clear_bv & X86_XSTATE_SSE) && (clear_bv & X86_XSTATE_AVX))
309 memset (((char *) &fp->mxcsr), 0, 4);
311 if ((clear_bv & X86_XSTATE_BNDREGS))
312 for (i = 0; i < num_mpx_bnd_registers; i++)
313 memset (fp->bndregs_space () + i * 16, 0, 16);
315 if ((clear_bv & X86_XSTATE_BNDCFG))
316 for (i = 0; i < num_mpx_cfg_registers; i++)
317 memset (fp->bndcfg_space () + i * 8, 0, 8);
319 if ((clear_bv & X86_XSTATE_K))
320 for (i = 0; i < num_avx512_k_registers; i++)
321 memset (fp->k_space () + i * 8, 0, 8);
323 if ((clear_bv & X86_XSTATE_ZMM_H))
324 for (i = 0; i < num_xmm_registers; i++)
325 memset (fp->zmmh_space () + i * 32, 0, 32);
327 if ((clear_bv & X86_XSTATE_ZMM))
328 for (i = 0; i < num_zmm_high_registers; i++)
329 memset (fp->zmm16_space () + i * 64, 0, 64);
331 if ((clear_bv & X86_XSTATE_PKRU))
332 for (i = 0; i < num_pkeys_registers; i++)
333 memset (fp->pkru_space () + i * 4, 0, 4);
336 /* Check if any x87 registers are changed. */
337 if ((x86_xcr0 & X86_XSTATE_X87))
339 int st0_regnum = find_regno (regcache->tdesc, "st0");
341 for (i = 0; i < 8; i++)
343 collect_register (regcache, i + st0_regnum, raw);
344 p = fp->st_space + i * 16;
345 if (memcmp (raw, p, 10))
347 xstate_bv |= X86_XSTATE_X87;
348 memcpy (p, raw, 10);
353 /* Check if any SSE registers are changed. */
354 if ((x86_xcr0 & X86_XSTATE_SSE))
356 int xmm0_regnum = find_regno (regcache->tdesc, "xmm0");
358 for (i = 0; i < num_xmm_registers; i++)
360 collect_register (regcache, i + xmm0_regnum, raw);
361 p = fp->xmm_space + i * 16;
362 if (memcmp (raw, p, 16))
364 xstate_bv |= X86_XSTATE_SSE;
365 memcpy (p, raw, 16);
370 /* Check if any AVX registers are changed. */
371 if ((x86_xcr0 & X86_XSTATE_AVX))
373 int ymm0h_regnum = find_regno (regcache->tdesc, "ymm0h");
375 for (i = 0; i < num_xmm_registers; i++)
377 collect_register (regcache, i + ymm0h_regnum, raw);
378 p = fp->ymmh_space () + i * 16;
379 if (memcmp (raw, p, 16))
381 xstate_bv |= X86_XSTATE_AVX;
382 memcpy (p, raw, 16);
387 /* Check if any bound register has changed. */
388 if ((x86_xcr0 & X86_XSTATE_BNDREGS))
390 int bnd0r_regnum = find_regno (regcache->tdesc, "bnd0raw");
392 for (i = 0; i < num_mpx_bnd_registers; i++)
394 collect_register (regcache, i + bnd0r_regnum, raw);
395 p = fp->bndregs_space () + i * 16;
396 if (memcmp (raw, p, 16))
398 xstate_bv |= X86_XSTATE_BNDREGS;
399 memcpy (p, raw, 16);
404 /* Check if any status register has changed. */
405 if ((x86_xcr0 & X86_XSTATE_BNDCFG))
407 int bndcfg_regnum = find_regno (regcache->tdesc, "bndcfgu");
409 for (i = 0; i < num_mpx_cfg_registers; i++)
411 collect_register (regcache, i + bndcfg_regnum, raw);
412 p = fp->bndcfg_space () + i * 8;
413 if (memcmp (raw, p, 8))
415 xstate_bv |= X86_XSTATE_BNDCFG;
416 memcpy (p, raw, 8);
421 /* Check if any K registers are changed. */
422 if ((x86_xcr0 & X86_XSTATE_K))
424 int k0_regnum = find_regno (regcache->tdesc, "k0");
426 for (i = 0; i < num_avx512_k_registers; i++)
428 collect_register (regcache, i + k0_regnum, raw);
429 p = fp->k_space () + i * 8;
430 if (memcmp (raw, p, 8) != 0)
432 xstate_bv |= X86_XSTATE_K;
433 memcpy (p, raw, 8);
438 /* Check if any of ZMM0H-ZMM15H registers are changed. */
439 if ((x86_xcr0 & X86_XSTATE_ZMM_H))
441 int zmm0h_regnum = find_regno (regcache->tdesc, "zmm0h");
443 for (i = 0; i < num_xmm_registers; i++)
445 collect_register (regcache, i + zmm0h_regnum, raw);
446 p = fp->zmmh_space () + i * 32;
447 if (memcmp (raw, p, 32) != 0)
449 xstate_bv |= X86_XSTATE_ZMM_H;
450 memcpy (p, raw, 32);
455 /* Check if any of ZMM16-ZMM31 registers are changed. */
456 if ((x86_xcr0 & X86_XSTATE_ZMM) && num_zmm_high_registers != 0)
458 int zmm16h_regnum = find_regno (regcache->tdesc, "zmm16h");
459 int ymm16h_regnum = find_regno (regcache->tdesc, "ymm16h");
460 int xmm16_regnum = find_regno (regcache->tdesc, "xmm16");
462 for (i = 0; i < num_zmm_high_registers; i++)
464 p = fp->zmm16_space () + i * 64;
466 /* ZMMH sub-register. */
467 collect_register (regcache, i + zmm16h_regnum, raw);
468 if (memcmp (raw, p + 32, 32) != 0)
470 xstate_bv |= X86_XSTATE_ZMM;
471 memcpy (p + 32, raw, 32);
474 /* YMMH sub-register. */
475 collect_register (regcache, i + ymm16h_regnum, raw);
476 if (memcmp (raw, p + 16, 16) != 0)
478 xstate_bv |= X86_XSTATE_ZMM;
479 memcpy (p + 16, raw, 16);
482 /* XMM sub-register. */
483 collect_register (regcache, i + xmm16_regnum, raw);
484 if (memcmp (raw, p, 16) != 0)
486 xstate_bv |= X86_XSTATE_ZMM;
487 memcpy (p, raw, 16);
492 /* Check if any PKEYS registers are changed. */
493 if ((x86_xcr0 & X86_XSTATE_PKRU))
495 int pkru_regnum = find_regno (regcache->tdesc, "pkru");
497 for (i = 0; i < num_pkeys_registers; i++)
499 collect_register (regcache, i + pkru_regnum, raw);
500 p = fp->pkru_space () + i * 4;
501 if (memcmp (raw, p, 4) != 0)
503 xstate_bv |= X86_XSTATE_PKRU;
504 memcpy (p, raw, 4);
509 if ((x86_xcr0 & X86_XSTATE_SSE) || (x86_xcr0 & X86_XSTATE_AVX))
511 collect_register_by_name (regcache, "mxcsr", raw);
512 if (memcmp (raw, &fp->mxcsr, 4) != 0)
514 if (((fp->xstate_bv | xstate_bv)
515 & (X86_XSTATE_SSE | X86_XSTATE_AVX)) == 0)
516 xstate_bv |= X86_XSTATE_SSE;
517 memcpy (&fp->mxcsr, raw, 4);
521 if (x86_xcr0 & X86_XSTATE_X87)
523 collect_register_by_name (regcache, "fioff", raw);
524 if (memcmp (raw, &fp->fioff, 4) != 0)
526 xstate_bv |= X86_XSTATE_X87;
527 memcpy (&fp->fioff, raw, 4);
530 collect_register_by_name (regcache, "fooff", raw);
531 if (memcmp (raw, &fp->fooff, 4) != 0)
533 xstate_bv |= X86_XSTATE_X87;
534 memcpy (&fp->fooff, raw, 4);
537 /* This one's 11 bits... */
538 val2 = regcache_raw_get_unsigned_by_name (regcache, "fop");
539 val2 = (val2 & 0x7FF) | (fp->fop & 0xF800);
540 if (fp->fop != val2)
542 xstate_bv |= X86_XSTATE_X87;
543 fp->fop = val2;
546 /* Some registers are 16-bit. */
547 val = regcache_raw_get_unsigned_by_name (regcache, "fctrl");
548 if (fp->fctrl != val)
550 xstate_bv |= X86_XSTATE_X87;
551 fp->fctrl = val;
554 val = regcache_raw_get_unsigned_by_name (regcache, "fstat");
555 if (fp->fstat != val)
557 xstate_bv |= X86_XSTATE_X87;
558 fp->fstat = val;
561 /* Convert to the simplifed tag form stored in fxsave data. */
562 val = regcache_raw_get_unsigned_by_name (regcache, "ftag");
563 val2 = 0;
564 for (i = 7; i >= 0; i--)
566 int tag = (val >> (i * 2)) & 3;
568 if (tag != 3)
569 val2 |= (1 << i);
571 if (fp->ftag != val2)
573 xstate_bv |= X86_XSTATE_X87;
574 fp->ftag = val2;
577 val = regcache_raw_get_unsigned_by_name (regcache, "fiseg");
578 if (fp->fiseg != val)
580 xstate_bv |= X86_XSTATE_X87;
581 fp->fiseg = val;
584 val = regcache_raw_get_unsigned_by_name (regcache, "foseg");
585 if (fp->foseg != val)
587 xstate_bv |= X86_XSTATE_X87;
588 fp->foseg = val;
592 /* Update the corresponding bits in xstate_bv if any SSE/AVX
593 registers are changed. */
594 fp->xstate_bv |= xstate_bv;
597 static int
598 i387_ftag (struct i387_fxsave *fp, int regno)
600 unsigned char *raw = &fp->st_space[regno * 16];
601 unsigned int exponent;
602 unsigned long fraction[2];
603 int integer;
605 integer = raw[7] & 0x80;
606 exponent = (((raw[9] & 0x7f) << 8) | raw[8]);
607 fraction[0] = ((raw[3] << 24) | (raw[2] << 16) | (raw[1] << 8) | raw[0]);
608 fraction[1] = (((raw[7] & 0x7f) << 24) | (raw[6] << 16)
609 | (raw[5] << 8) | raw[4]);
611 if (exponent == 0x7fff)
613 /* Special. */
614 return (2);
616 else if (exponent == 0x0000)
618 if (fraction[0] == 0x0000 && fraction[1] == 0x0000 && !integer)
620 /* Zero. */
621 return (1);
623 else
625 /* Special. */
626 return (2);
629 else
631 if (integer)
633 /* Valid. */
634 return (0);
636 else
638 /* Special. */
639 return (2);
644 void
645 i387_fxsave_to_cache (struct regcache *regcache, const void *buf)
647 struct i387_fxsave *fp = (struct i387_fxsave *) buf;
648 int i, top;
649 int st0_regnum = find_regno (regcache->tdesc, "st0");
650 int xmm0_regnum = find_regno (regcache->tdesc, "xmm0");
651 unsigned long val;
652 /* Amd64 has 16 xmm regs; I386 has 8 xmm regs. */
653 int num_xmm_registers = register_size (regcache->tdesc, 0) == 8 ? 16 : 8;
655 for (i = 0; i < 8; i++)
656 supply_register (regcache, i + st0_regnum,
657 ((char *) &fp->st_space[0]) + i * 16);
658 for (i = 0; i < num_xmm_registers; i++)
659 supply_register (regcache, i + xmm0_regnum,
660 ((char *) &fp->xmm_space[0]) + i * 16);
662 supply_register_by_name (regcache, "fioff", &fp->fioff);
663 supply_register_by_name (regcache, "fooff", &fp->fooff);
664 supply_register_by_name (regcache, "mxcsr", &fp->mxcsr);
666 /* Some registers are 16-bit. */
667 val = fp->fctrl & 0xFFFF;
668 supply_register_by_name (regcache, "fctrl", &val);
670 val = fp->fstat & 0xFFFF;
671 supply_register_by_name (regcache, "fstat", &val);
673 /* Generate the form of ftag data that GDB expects. */
674 top = (fp->fstat >> 11) & 0x7;
675 val = 0;
676 for (i = 7; i >= 0; i--)
678 int tag;
679 if (fp->ftag & (1 << i))
680 tag = i387_ftag (fp, (i + 8 - top) % 8);
681 else
682 tag = 3;
683 val |= tag << (2 * i);
685 supply_register_by_name (regcache, "ftag", &val);
687 val = fp->fiseg & 0xFFFF;
688 supply_register_by_name (regcache, "fiseg", &val);
690 val = fp->foseg & 0xFFFF;
691 supply_register_by_name (regcache, "foseg", &val);
693 val = (fp->fop) & 0x7FF;
694 supply_register_by_name (regcache, "fop", &val);
697 void
698 i387_xsave_to_cache (struct regcache *regcache, const void *buf)
700 struct i387_xsave *fp = (struct i387_xsave *) buf;
701 bool amd64 = register_size (regcache->tdesc, 0) == 8;
702 int i, top;
703 unsigned long val;
704 unsigned long long clear_bv;
705 unsigned char *p;
707 /* Amd64 has 16 xmm regs; I386 has 8 xmm regs. */
708 int num_xmm_registers = amd64 ? 16 : 8;
709 /* AVX512 adds 16 extra ZMM regs in Amd64 mode, but none in I386 mode.*/
710 int num_zmm_high_registers = amd64 ? 16 : 0;
712 /* The supported bits in `xstat_bv' are 8 bytes. Clear part in
713 vector registers if its bit in xstat_bv is zero. */
714 clear_bv = (~fp->xstate_bv) & x86_xcr0;
716 /* Check if any x87 registers are changed. */
717 if ((x86_xcr0 & X86_XSTATE_X87) != 0)
719 int st0_regnum = find_regno (regcache->tdesc, "st0");
721 if ((clear_bv & X86_XSTATE_X87) != 0)
723 for (i = 0; i < 8; i++)
724 supply_register_zeroed (regcache, i + st0_regnum);
726 else
728 p = (gdb_byte *) &fp->st_space[0];
729 for (i = 0; i < 8; i++)
730 supply_register (regcache, i + st0_regnum, p + i * 16);
734 if ((x86_xcr0 & X86_XSTATE_SSE) != 0)
736 int xmm0_regnum = find_regno (regcache->tdesc, "xmm0");
738 if ((clear_bv & X86_XSTATE_SSE))
740 for (i = 0; i < num_xmm_registers; i++)
741 supply_register_zeroed (regcache, i + xmm0_regnum);
743 else
745 p = (gdb_byte *) &fp->xmm_space[0];
746 for (i = 0; i < num_xmm_registers; i++)
747 supply_register (regcache, i + xmm0_regnum, p + i * 16);
751 if ((x86_xcr0 & X86_XSTATE_AVX) != 0)
753 int ymm0h_regnum = find_regno (regcache->tdesc, "ymm0h");
755 if ((clear_bv & X86_XSTATE_AVX) != 0)
757 for (i = 0; i < num_xmm_registers; i++)
758 supply_register_zeroed (regcache, i + ymm0h_regnum);
760 else
762 p = fp->ymmh_space ();
763 for (i = 0; i < num_xmm_registers; i++)
764 supply_register (regcache, i + ymm0h_regnum, p + i * 16);
768 if ((x86_xcr0 & X86_XSTATE_BNDREGS))
770 int bnd0r_regnum = find_regno (regcache->tdesc, "bnd0raw");
773 if ((clear_bv & X86_XSTATE_BNDREGS) != 0)
775 for (i = 0; i < num_mpx_bnd_registers; i++)
776 supply_register_zeroed (regcache, i + bnd0r_regnum);
778 else
780 p = fp->bndregs_space ();
781 for (i = 0; i < num_mpx_bnd_registers; i++)
782 supply_register (regcache, i + bnd0r_regnum, p + i * 16);
787 if ((x86_xcr0 & X86_XSTATE_BNDCFG))
789 int bndcfg_regnum = find_regno (regcache->tdesc, "bndcfgu");
791 if ((clear_bv & X86_XSTATE_BNDCFG) != 0)
793 for (i = 0; i < num_mpx_cfg_registers; i++)
794 supply_register_zeroed (regcache, i + bndcfg_regnum);
796 else
798 p = fp->bndcfg_space ();
799 for (i = 0; i < num_mpx_cfg_registers; i++)
800 supply_register (regcache, i + bndcfg_regnum, p + i * 8);
804 if ((x86_xcr0 & X86_XSTATE_K) != 0)
806 int k0_regnum = find_regno (regcache->tdesc, "k0");
808 if ((clear_bv & X86_XSTATE_K) != 0)
810 for (i = 0; i < num_avx512_k_registers; i++)
811 supply_register_zeroed (regcache, i + k0_regnum);
813 else
815 p = fp->k_space ();
816 for (i = 0; i < num_avx512_k_registers; i++)
817 supply_register (regcache, i + k0_regnum, p + i * 8);
821 if ((x86_xcr0 & X86_XSTATE_ZMM_H) != 0)
823 int zmm0h_regnum = find_regno (regcache->tdesc, "zmm0h");
825 if ((clear_bv & X86_XSTATE_ZMM_H) != 0)
827 for (i = 0; i < num_xmm_registers; i++)
828 supply_register_zeroed (regcache, i + zmm0h_regnum);
830 else
832 p = fp->zmmh_space ();
833 for (i = 0; i < num_xmm_registers; i++)
834 supply_register (regcache, i + zmm0h_regnum, p + i * 32);
838 if ((x86_xcr0 & X86_XSTATE_ZMM) != 0 && num_zmm_high_registers != 0)
840 int zmm16h_regnum = find_regno (regcache->tdesc, "zmm16h");
841 int ymm16h_regnum = find_regno (regcache->tdesc, "ymm16h");
842 int xmm16_regnum = find_regno (regcache->tdesc, "xmm16");
844 if ((clear_bv & X86_XSTATE_ZMM) != 0)
846 for (i = 0; i < num_zmm_high_registers; i++)
848 supply_register_zeroed (regcache, i + zmm16h_regnum);
849 supply_register_zeroed (regcache, i + ymm16h_regnum);
850 supply_register_zeroed (regcache, i + xmm16_regnum);
853 else
855 p = fp->zmm16_space ();
856 for (i = 0; i < num_zmm_high_registers; i++)
858 supply_register (regcache, i + zmm16h_regnum, p + 32 + i * 64);
859 supply_register (regcache, i + ymm16h_regnum, p + 16 + i * 64);
860 supply_register (regcache, i + xmm16_regnum, p + i * 64);
865 if ((x86_xcr0 & X86_XSTATE_PKRU) != 0)
867 int pkru_regnum = find_regno (regcache->tdesc, "pkru");
869 if ((clear_bv & X86_XSTATE_PKRU) != 0)
871 for (i = 0; i < num_pkeys_registers; i++)
872 supply_register_zeroed (regcache, i + pkru_regnum);
874 else
876 p = fp->pkru_space ();
877 for (i = 0; i < num_pkeys_registers; i++)
878 supply_register (regcache, i + pkru_regnum, p + i * 4);
882 if ((clear_bv & (X86_XSTATE_SSE | X86_XSTATE_AVX))
883 == (X86_XSTATE_SSE | X86_XSTATE_AVX))
885 unsigned int default_mxcsr = I387_MXCSR_INIT_VAL;
886 supply_register_by_name (regcache, "mxcsr", &default_mxcsr);
888 else
889 supply_register_by_name (regcache, "mxcsr", &fp->mxcsr);
891 if ((clear_bv & X86_XSTATE_X87) != 0)
893 supply_register_by_name_zeroed (regcache, "fioff");
894 supply_register_by_name_zeroed (regcache, "fooff");
896 val = I387_FCTRL_INIT_VAL;
897 supply_register_by_name (regcache, "fctrl", &val);
899 supply_register_by_name_zeroed (regcache, "fstat");
901 val = 0xFFFF;
902 supply_register_by_name (regcache, "ftag", &val);
904 supply_register_by_name_zeroed (regcache, "fiseg");
905 supply_register_by_name_zeroed (regcache, "foseg");
906 supply_register_by_name_zeroed (regcache, "fop");
908 else
910 supply_register_by_name (regcache, "fioff", &fp->fioff);
911 supply_register_by_name (regcache, "fooff", &fp->fooff);
913 /* Some registers are 16-bit. */
914 val = fp->fctrl & 0xFFFF;
915 supply_register_by_name (regcache, "fctrl", &val);
917 val = fp->fstat & 0xFFFF;
918 supply_register_by_name (regcache, "fstat", &val);
920 /* Generate the form of ftag data that GDB expects. */
921 top = (fp->fstat >> 11) & 0x7;
922 val = 0;
923 for (i = 7; i >= 0; i--)
925 int tag;
926 if (fp->ftag & (1 << i))
927 tag = i387_ftag (fp, (i + 8 - top) % 8);
928 else
929 tag = 3;
930 val |= tag << (2 * i);
932 supply_register_by_name (regcache, "ftag", &val);
934 val = fp->fiseg & 0xFFFF;
935 supply_register_by_name (regcache, "fiseg", &val);
937 val = fp->foseg & 0xFFFF;
938 supply_register_by_name (regcache, "foseg", &val);
940 val = (fp->fop) & 0x7FF;
941 supply_register_by_name (regcache, "fop", &val);
945 /* See i387-fp.h. */
947 void
948 i387_set_xsave_mask (uint64_t xcr0, int len)
950 x86_xcr0 = xcr0;
951 xsave_layout = x86_fetch_xsave_layout (xcr0, len);