Add support for the .gnu.sgstubs section to the linker for ARM/ELF based targets.
[binutils-gdb.git] / opcodes / i386-dis-evex-w.h
blobba3b1959675c5cac9e5dc8fe1037703badd5bd1c
1 /* EVEX_W_0F5B_P_0 */
3 { "%XEvcvtdq2ps", { XM, EXx, EXxEVexR }, 0 },
4 { "vcvtqq2ps%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
5 },
6 /* EVEX_W_0F62 */
8 { "%XEvpunpckldq", { XM, Vex, EXx }, PREFIX_DATA },
9 },
10 /* EVEX_W_0F66 */
12 { "vpcmpgtd", { MaskG, Vex, EXx }, PREFIX_DATA },
14 /* EVEX_W_0F6A */
16 { "%XEvpunpckhdq", { XM, Vex, EXx }, PREFIX_DATA },
18 /* EVEX_W_0F6B */
20 { "%XEvpackssdw", { XM, Vex, EXx }, PREFIX_DATA },
22 /* EVEX_W_0F6C */
24 { Bad_Opcode },
25 { "%XEvpunpcklqdq", { XM, Vex, EXx }, PREFIX_DATA },
27 /* EVEX_W_0F6D */
29 { Bad_Opcode },
30 { "%XEvpunpckhqdq", { XM, Vex, EXx }, PREFIX_DATA },
32 /* EVEX_W_0F6F_P_1 */
34 { "vmovdqu32", { XM, EXEvexXNoBcst }, 0 },
35 { "vmovdqu64", { XM, EXEvexXNoBcst }, 0 },
37 /* EVEX_W_0F6F_P_2 */
39 { "vmovdqa32", { XM, EXEvexXNoBcst }, 0 },
40 { "vmovdqa64", { XM, EXEvexXNoBcst }, 0 },
42 /* EVEX_W_0F6F_P_3 */
44 { "vmovdqu8", { XM, EXx }, 0 },
45 { "vmovdqu16", { XM, EXx }, 0 },
47 /* EVEX_W_0F70_P_2 */
49 { "%XEvpshufd", { XM, EXx, Ib }, 0 },
51 /* EVEX_W_0F72_R_2 */
53 { "%XEvpsrld", { Vex, EXx, Ib }, PREFIX_DATA },
55 /* EVEX_W_0F72_R_6 */
57 { "%XEvpslld", { Vex, EXx, Ib }, PREFIX_DATA },
59 /* EVEX_W_0F73_R_2 */
61 { Bad_Opcode },
62 { "%XEvpsrlq", { Vex, EXx, Ib }, PREFIX_DATA },
64 /* EVEX_W_0F73_R_6 */
66 { Bad_Opcode },
67 { "%XEvpsllq", { Vex, EXx, Ib }, PREFIX_DATA },
69 /* EVEX_W_0F76 */
71 { "vpcmpeqd", { MaskG, Vex, EXx }, PREFIX_DATA },
73 /* EVEX_W_0F78_P_0 */
75 { "vcvttps2udq", { XM, EXx, EXxEVexS }, 0 },
76 { "vcvttpd2udq%XY", { XMxmmq, EXx, EXxEVexS }, 0 },
78 /* EVEX_W_0F78_P_2 */
80 { "vcvttps2uqq", { XM, EXEvexHalfBcstXmmq, EXxEVexS }, 0 },
81 { "vcvttpd2uqq", { XM, EXx, EXxEVexS }, 0 },
83 /* EVEX_W_0F79_P_0 */
85 { "vcvtps2udq", { XM, EXx, EXxEVexR }, 0 },
86 { "vcvtpd2udq%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
88 /* EVEX_W_0F79_P_2 */
90 { "vcvtps2uqq", { XM, EXEvexHalfBcstXmmq, EXxEVexR }, 0 },
91 { "vcvtpd2uqq", { XM, EXx, EXxEVexR }, 0 },
93 /* EVEX_W_0F7A_P_1 */
95 { "vcvtudq2pd", { XM, EXEvexHalfBcstXmmq }, 0 },
96 { "vcvtuqq2pd", { XM, EXx, EXxEVexR }, 0 },
98 /* EVEX_W_0F7A_P_2 */
100 { "vcvttps2qq", { XM, EXEvexHalfBcstXmmq, EXxEVexS }, 0 },
101 { "vcvttpd2qq", { XM, EXx, EXxEVexS }, 0 },
103 /* EVEX_W_0F7A_P_3 */
105 { "vcvtudq2ps", { XM, EXx, EXxEVexR }, 0 },
106 { "vcvtuqq2ps%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
108 /* EVEX_W_0F7B_P_2 */
110 { "vcvtps2qq", { XM, EXEvexHalfBcstXmmq, EXxEVexR }, 0 },
111 { "vcvtpd2qq", { XM, EXx, EXxEVexR }, 0 },
113 /* EVEX_W_0F7E_P_1 */
115 { Bad_Opcode },
116 { VEX_LEN_TABLE (VEX_LEN_0F7E_P_1) },
118 /* EVEX_W_0F7F_P_1 */
120 { "vmovdqu32", { EXxS, XM }, 0 },
121 { "vmovdqu64", { EXxS, XM }, 0 },
123 /* EVEX_W_0F7F_P_2 */
125 { "vmovdqa32", { EXxS, XM }, 0 },
126 { "vmovdqa64", { EXxS, XM }, 0 },
128 /* EVEX_W_0F7F_P_3 */
130 { "vmovdqu8", { EXxS, XM }, 0 },
131 { "vmovdqu16", { EXxS, XM }, 0 },
133 /* EVEX_W_0FD2 */
135 { "%XEvpsrld", { XM, Vex, EXxmm }, PREFIX_DATA },
137 /* EVEX_W_0FD3 */
139 { Bad_Opcode },
140 { "%XEvpsrlq", { XM, Vex, EXxmm }, PREFIX_DATA },
142 /* EVEX_W_0FD4 */
144 { Bad_Opcode },
145 { "%XEvpaddq", { XM, Vex, EXx }, PREFIX_DATA },
147 /* EVEX_W_0FD6 */
149 { Bad_Opcode },
150 { VEX_LEN_TABLE (VEX_LEN_0FD6) },
152 /* EVEX_W_0FE6_P_1 */
154 { "%XEvcvtdq2pd", { XM, EXEvexHalfBcstXmmq }, 0 },
155 { "vcvtqq2pd", { XM, EXx, EXxEVexR }, 0 },
157 /* EVEX_W_0FE7 */
159 { "%XEvmovntdq", { EXEvexXNoBcst, XM }, PREFIX_DATA },
161 /* EVEX_W_0FF2 */
163 { "%XEvpslld", { XM, Vex, EXxmm }, PREFIX_DATA },
165 /* EVEX_W_0FF3 */
167 { Bad_Opcode },
168 { "%XEvpsllq", { XM, Vex, EXxmm }, PREFIX_DATA },
170 /* EVEX_W_0FF4 */
172 { Bad_Opcode },
173 { "%XEvpmuludq", { XM, Vex, EXx }, PREFIX_DATA },
175 /* EVEX_W_0FFA */
177 { "%XEvpsubd", { XM, Vex, EXx }, PREFIX_DATA },
179 /* EVEX_W_0FFB */
181 { Bad_Opcode },
182 { "%XEvpsubq", { XM, Vex, EXx }, PREFIX_DATA },
184 /* EVEX_W_0FFE */
186 { "%XEvpaddd", { XM, Vex, EXx }, PREFIX_DATA },
188 /* EVEX_W_0F3810_P_1 */
190 { "vpmovuswb", { EXxmmq, XM }, 0 },
192 /* EVEX_W_0F3810_P_2 */
194 { Bad_Opcode },
195 { "vpsrlvw", { XM, Vex, EXx }, 0 },
197 /* EVEX_W_0F3811_P_1 */
199 { "vpmovusdb", { EXxmmqd, XM }, 0 },
201 /* EVEX_W_0F3811_P_2 */
203 { Bad_Opcode },
204 { "vpsravw", { XM, Vex, EXx }, 0 },
206 /* EVEX_W_0F3812_P_1 */
208 { "vpmovusqb", { EXxmmdw, XM }, 0 },
210 /* EVEX_W_0F3812_P_2 */
212 { Bad_Opcode },
213 { "vpsllvw", { XM, Vex, EXx }, 0 },
215 /* EVEX_W_0F3813_P_1 */
217 { "vpmovusdw", { EXxmmq, XM }, 0 },
219 /* EVEX_W_0F3814_P_1 */
221 { "vpmovusqw", { EXxmmqd, XM }, 0 },
223 /* EVEX_W_0F3815_P_1 */
225 { "vpmovusqd", { EXxmmq, XM }, 0 },
227 /* EVEX_W_0F3819_L_n */
229 { "vbroadcastf32x2", { XM, EXq }, PREFIX_DATA },
230 { "%XEvbroadcastsd", { XM, EXq }, PREFIX_DATA },
232 /* EVEX_W_0F381A_M_0_L_n */
234 { "vbroadcastf32x4", { XM, EXxmm }, PREFIX_DATA },
235 { "vbroadcastf64x2", { XM, EXxmm }, PREFIX_DATA },
237 /* EVEX_W_0F381B_M_0_L_2 */
239 { "vbroadcastf32x8", { XM, EXymm }, PREFIX_DATA },
240 { "vbroadcastf64x4", { XM, EXymm }, PREFIX_DATA },
242 /* EVEX_W_0F381E */
244 { "%XEvpabsd", { XM, EXx }, PREFIX_DATA },
246 /* EVEX_W_0F381F */
248 { Bad_Opcode },
249 { "vpabsq", { XM, EXx }, PREFIX_DATA },
251 /* EVEX_W_0F3820_P_1 */
253 { "vpmovswb", { EXxmmq, XM }, 0 },
255 /* EVEX_W_0F3821_P_1 */
257 { "vpmovsdb", { EXxmmqd, XM }, 0 },
259 /* EVEX_W_0F3822_P_1 */
261 { "vpmovsqb", { EXxmmdw, XM }, 0 },
263 /* EVEX_W_0F3823_P_1 */
265 { "vpmovsdw", { EXxmmq, XM }, 0 },
267 /* EVEX_W_0F3824_P_1 */
269 { "vpmovsqw", { EXxmmqd, XM }, 0 },
271 /* EVEX_W_0F3825_P_1 */
273 { "vpmovsqd", { EXxmmq, XM }, 0 },
275 /* EVEX_W_0F3825_P_2 */
277 { "%XEvpmovsxdq", { XM, EXxmmq }, 0 },
279 /* EVEX_W_0F3828_P_2 */
281 { Bad_Opcode },
282 { "%XEvpmuldq", { XM, Vex, EXx }, 0 },
284 /* EVEX_W_0F3829_P_2 */
286 { Bad_Opcode },
287 { "vpcmpeqq", { MaskG, Vex, EXx }, 0 },
289 /* EVEX_W_0F382A_P_1 */
291 { Bad_Opcode },
292 { MOD_TABLE (MOD_EVEX_0F382A_P_1_W_1) },
294 /* EVEX_W_0F382A_P_2 */
296 { "%XEvmovntdqa", { XM, EXEvexXNoBcst }, 0 },
298 /* EVEX_W_0F382B */
300 { "%XEvpackusdw", { XM, Vex, EXx }, PREFIX_DATA },
302 /* EVEX_W_0F3830_P_1 */
304 { "vpmovwb", { EXxmmq, XM }, 0 },
306 /* EVEX_W_0F3831_P_1 */
308 { "vpmovdb", { EXxmmqd, XM }, 0 },
310 /* EVEX_W_0F3832_P_1 */
312 { "vpmovqb", { EXxmmdw, XM }, 0 },
314 /* EVEX_W_0F3833_P_1 */
316 { "vpmovdw", { EXxmmq, XM }, 0 },
318 /* EVEX_W_0F3834_P_1 */
320 { "vpmovqw", { EXxmmqd, XM }, 0 },
322 /* EVEX_W_0F3835_P_1 */
324 { "vpmovqd", { EXxmmq, XM }, 0 },
326 /* EVEX_W_0F3835_P_2 */
328 { "%XEvpmovzxdq", { XM, EXxmmq }, 0 },
330 /* EVEX_W_0F3837 */
332 { Bad_Opcode },
333 { "vpcmpgtq", { MaskG, Vex, EXx }, PREFIX_DATA },
335 /* EVEX_W_0F383A_P_1 */
337 { MOD_TABLE (MOD_EVEX_0F383A_P_1_W_0) },
339 /* EVEX_W_0F3859 */
341 { "vbroadcasti32x2", { XM, EXq }, PREFIX_DATA },
342 { "%XEvpbroadcastq", { XM, EXq }, PREFIX_DATA },
344 /* EVEX_W_0F385A_M_0_L_n */
346 { "vbroadcasti32x4", { XM, EXxmm }, PREFIX_DATA },
347 { "vbroadcasti64x2", { XM, EXxmm }, PREFIX_DATA },
349 /* EVEX_W_0F385B_M_0_L_2 */
351 { "vbroadcasti32x8", { XM, EXymm }, PREFIX_DATA },
352 { "vbroadcasti64x4", { XM, EXymm }, PREFIX_DATA },
354 /* EVEX_W_0F3870 */
356 { Bad_Opcode },
357 { "vpshldvw", { XM, Vex, EXx }, PREFIX_DATA },
359 /* EVEX_W_0F3872_P_2 */
361 { Bad_Opcode },
362 { "vpshrdvw", { XM, Vex, EXx }, 0 },
364 /* EVEX_W_0F387A */
366 { MOD_TABLE (MOD_EVEX_0F387A_W_0) },
368 /* EVEX_W_0F387B */
370 { MOD_TABLE (MOD_EVEX_0F387B_W_0) },
372 /* EVEX_W_0F3883 */
374 { Bad_Opcode },
375 { "vpmultishiftqb", { XM, Vex, EXx }, PREFIX_DATA },
377 /* EVEX_W_0F3A18_L_n */
379 { "vinsertf32x4", { XM, Vex, EXxmm, Ib }, PREFIX_DATA },
380 { "vinsertf64x2", { XM, Vex, EXxmm, Ib }, PREFIX_DATA },
382 /* EVEX_W_0F3A19_L_n */
384 { "vextractf32x4", { EXxmm, XM, Ib }, PREFIX_DATA },
385 { "vextractf64x2", { EXxmm, XM, Ib }, PREFIX_DATA },
387 /* EVEX_W_0F3A1A_L_2 */
389 { "vinsertf32x8", { XM, Vex, EXymm, Ib }, PREFIX_DATA },
390 { "vinsertf64x4", { XM, Vex, EXymm, Ib }, PREFIX_DATA },
392 /* EVEX_W_0F3A1B_L_2 */
394 { "vextractf32x8", { EXymm, XM, Ib }, PREFIX_DATA },
395 { "vextractf64x4", { EXymm, XM, Ib }, PREFIX_DATA },
397 /* EVEX_W_0F3A21 */
399 { VEX_LEN_TABLE (VEX_LEN_0F3A21) },
401 /* EVEX_W_0F3A23_L_n */
403 { "vshuff32x4", { XM, Vex, EXx, Ib }, PREFIX_DATA },
404 { "vshuff64x2", { XM, Vex, EXx, Ib }, PREFIX_DATA },
406 /* EVEX_W_0F3A38_L_n */
408 { "vinserti32x4", { XM, Vex, EXxmm, Ib }, PREFIX_DATA },
409 { "vinserti64x2", { XM, Vex, EXxmm, Ib }, PREFIX_DATA },
411 /* EVEX_W_0F3A39_L_n */
413 { "vextracti32x4", { EXxmm, XM, Ib }, PREFIX_DATA },
414 { "vextracti64x2", { EXxmm, XM, Ib }, PREFIX_DATA },
416 /* EVEX_W_0F3A3A_L_2 */
418 { "vinserti32x8", { XM, Vex, EXymm, Ib }, PREFIX_DATA },
419 { "vinserti64x4", { XM, Vex, EXymm, Ib }, PREFIX_DATA },
421 /* EVEX_W_0F3A3B_L_2 */
423 { "vextracti32x8", { EXymm, XM, Ib }, PREFIX_DATA },
424 { "vextracti64x4", { EXymm, XM, Ib }, PREFIX_DATA },
426 /* EVEX_W_0F3A42 */
428 { "vdbpsadbw", { XM, Vex, EXx, Ib }, 0 },
430 /* EVEX_W_0F3A43_L_n */
432 { "vshufi32x4", { XM, Vex, EXx, Ib }, PREFIX_DATA },
433 { "vshufi64x2", { XM, Vex, EXx, Ib }, PREFIX_DATA },
435 /* EVEX_W_0F3A70 */
437 { Bad_Opcode },
438 { "vpshldw", { XM, Vex, EXx, Ib }, 0 },
440 /* EVEX_W_0F3A72 */
442 { Bad_Opcode },
443 { "vpshrdw", { XM, Vex, EXx, Ib }, 0 },
445 /* EVEX_W_MAP5_5B_P_0 */
447 { "vcvtdq2ph%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
448 { "vcvtqq2ph%XZ", { XMM, EXx, EXxEVexR }, 0 },
450 /* EVEX_W_MAP5_7A_P_3 */
452 { "vcvtudq2ph%XY", { XMxmmq, EXx, EXxEVexR }, 0 },
453 { "vcvtuqq2ph%XZ", { XMM, EXx, EXxEVexR }, 0 },