Accept and ignore the R_BPF_64_NODLYD32 relocation.
[binutils-gdb.git] / gdb / microblaze-tdep.c
blob74e70405b3a8205f960bf6f6105d868e71eeb697
1 /* Target-dependent code for Xilinx MicroBlaze.
3 Copyright (C) 2009-2023 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20 #include "defs.h"
21 #include "arch-utils.h"
22 #include "dis-asm.h"
23 #include "frame.h"
24 #include "trad-frame.h"
25 #include "symtab.h"
26 #include "value.h"
27 #include "gdbcmd.h"
28 #include "breakpoint.h"
29 #include "inferior.h"
30 #include "regcache.h"
31 #include "target.h"
32 #include "frame-base.h"
33 #include "frame-unwind.h"
34 #include "dwarf2/frame.h"
35 #include "osabi.h"
36 #include "target-descriptions.h"
37 #include "opcodes/microblaze-opcm.h"
38 #include "opcodes/microblaze-dis.h"
39 #include "microblaze-tdep.h"
40 #include "remote.h"
42 #include "features/microblaze-with-stack-protect.c"
43 #include "features/microblaze.c"
45 /* Instruction macros used for analyzing the prologue. */
46 /* This set of instruction macros need to be changed whenever the
47 prologue generated by the compiler could have more instructions or
48 different type of instructions.
49 This set also needs to be verified if it is complete. */
50 #define IS_RETURN(op) (op == rtsd || op == rtid)
51 #define IS_UPDATE_SP(op, rd, ra) \
52 ((op == addik || op == addi) && rd == REG_SP && ra == REG_SP)
53 #define IS_SPILL_SP(op, rd, ra) \
54 ((op == swi || op == sw) && rd == REG_SP && ra == REG_SP)
55 #define IS_SPILL_REG(op, rd, ra) \
56 ((op == swi || op == sw) && rd != REG_SP && ra == REG_SP)
57 #define IS_ALSO_SPILL_REG(op, rd, ra, rb) \
58 ((op == swi || op == sw) && rd != REG_SP && ra == 0 && rb == REG_SP)
59 #define IS_SETUP_FP(op, ra, rb) \
60 ((op == add || op == addik || op == addk) && ra == REG_SP && rb == 0)
61 #define IS_SPILL_REG_FP(op, rd, ra, fpregnum) \
62 ((op == swi || op == sw) && rd != REG_SP && ra == fpregnum && ra != 0)
63 #define IS_SAVE_HIDDEN_PTR(op, rd, ra, rb) \
64 ((op == add || op == addik) && ra == MICROBLAZE_FIRST_ARGREG && rb == 0)
66 /* The registers of the Xilinx microblaze processor. */
68 static const char * const microblaze_register_names[] =
70 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
71 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
72 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23",
73 "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31",
74 "rpc", "rmsr", "rear", "resr", "rfsr", "rbtr",
75 "rpvr0", "rpvr1", "rpvr2", "rpvr3", "rpvr4", "rpvr5", "rpvr6",
76 "rpvr7", "rpvr8", "rpvr9", "rpvr10", "rpvr11",
77 "redr", "rpid", "rzpr", "rtlbx", "rtlbsx", "rtlblo", "rtlbhi",
78 "rslr", "rshr"
81 #define MICROBLAZE_NUM_REGS ARRAY_SIZE (microblaze_register_names)
83 static unsigned int microblaze_debug_flag = 0;
85 #define microblaze_debug(fmt, ...) \
86 debug_prefixed_printf_cond_nofunc (microblaze_debug_flag, "MICROBLAZE", \
87 fmt, ## __VA_ARGS__)
90 /* Return the name of register REGNUM. */
92 static const char *
93 microblaze_register_name (struct gdbarch *gdbarch, int regnum)
95 gdb_static_assert (ARRAY_SIZE (microblaze_register_names)
96 == MICROBLAZE_NUM_REGS);
97 return microblaze_register_names[regnum];
100 static struct type *
101 microblaze_register_type (struct gdbarch *gdbarch, int regnum)
103 if (regnum == MICROBLAZE_SP_REGNUM)
104 return builtin_type (gdbarch)->builtin_data_ptr;
106 if (regnum == MICROBLAZE_PC_REGNUM)
107 return builtin_type (gdbarch)->builtin_func_ptr;
109 return builtin_type (gdbarch)->builtin_int;
113 /* Fetch the instruction at PC. */
115 static unsigned long
116 microblaze_fetch_instruction (CORE_ADDR pc)
118 bfd_endian byte_order = gdbarch_byte_order (current_inferior ()->arch ());
119 gdb_byte buf[4];
121 /* If we can't read the instruction at PC, return zero. */
122 if (target_read_code (pc, buf, sizeof (buf)))
123 return 0;
125 return extract_unsigned_integer (buf, 4, byte_order);
128 constexpr gdb_byte microblaze_break_insn[] = MICROBLAZE_BREAKPOINT;
130 typedef BP_MANIPULATION (microblaze_break_insn) microblaze_breakpoint;
133 /* Allocate and initialize a frame cache. */
135 static struct microblaze_frame_cache *
136 microblaze_alloc_frame_cache (void)
138 struct microblaze_frame_cache *cache;
140 cache = FRAME_OBSTACK_ZALLOC (struct microblaze_frame_cache);
142 /* Base address. */
143 cache->base = 0;
144 cache->pc = 0;
146 /* Frameless until proven otherwise. */
147 cache->frameless_p = 1;
149 return cache;
152 /* The base of the current frame is actually in the stack pointer.
153 This happens when there is no frame pointer (microblaze ABI does not
154 require a frame pointer) or when we're stopped in the prologue or
155 epilogue itself. In these cases, microblaze_analyze_prologue will need
156 to update fi->frame before returning or analyzing the register
157 save instructions. */
158 #define MICROBLAZE_MY_FRAME_IN_SP 0x1
160 /* The base of the current frame is in a frame pointer register.
161 This register is noted in frame_extra_info->fp_regnum.
163 Note that the existance of an FP might also indicate that the
164 function has called alloca. */
165 #define MICROBLAZE_MY_FRAME_IN_FP 0x2
167 /* Function prologues on the Xilinx microblaze processors consist of:
169 - adjustments to the stack pointer (r1) (addi r1, r1, imm)
170 - making a copy of r1 into another register (a "frame" pointer)
171 (add r?, r1, r0)
172 - store word/multiples that use r1 or the frame pointer as the
173 base address (swi r?, r1, imm OR swi r?, fp, imm)
175 Note that microblaze really doesn't have a real frame pointer.
176 Instead, the compiler may copy the SP into a register (usually
177 r19) to act as an arg pointer. For our target-dependent purposes,
178 the frame info's "frame" member will be the beginning of the
179 frame. The SP could, in fact, point below this.
181 The prologue ends when an instruction fails to meet either of
182 these criteria. */
184 /* Analyze the prologue to determine where registers are saved,
185 the end of the prologue, etc. Return the address of the first line
186 of "real" code (i.e., the end of the prologue). */
188 static CORE_ADDR
189 microblaze_analyze_prologue (struct gdbarch *gdbarch, CORE_ADDR pc,
190 CORE_ADDR current_pc,
191 struct microblaze_frame_cache *cache)
193 const char *name;
194 CORE_ADDR func_addr, func_end, addr, stop, prologue_end_addr = 0;
195 unsigned long insn;
196 int rd, ra, rb, imm;
197 enum microblaze_instr op;
198 int save_hidden_pointer_found = 0;
199 int non_stack_instruction_found = 0;
201 /* Find the start of this function. */
202 find_pc_partial_function (pc, &name, &func_addr, &func_end);
203 if (func_addr < pc)
204 pc = func_addr;
206 if (current_pc < pc)
207 return current_pc;
209 /* Initialize info about frame. */
210 cache->framesize = 0;
211 cache->fp_regnum = MICROBLAZE_SP_REGNUM;
212 cache->frameless_p = 1;
214 /* Start decoding the prologue. We start by checking two special cases:
216 1. We're about to return
217 2. We're at the first insn of the prologue.
219 If we're about to return, our frame has already been deallocated.
220 If we are stopped at the first instruction of a prologue,
221 then our frame has not yet been set up. */
223 /* Get the first insn from memory. */
225 insn = microblaze_fetch_instruction (pc);
226 op = microblaze_decode_insn (insn, &rd, &ra, &rb, &imm);
228 if (IS_RETURN(op))
229 return pc;
231 /* Start at beginning of function and analyze until we get to the
232 current pc, or the end of the function, whichever is first. */
233 stop = (current_pc < func_end ? current_pc : func_end);
235 microblaze_debug ("Scanning prologue: name=%s, func_addr=%s, stop=%s\n",
236 name, paddress (gdbarch, func_addr),
237 paddress (gdbarch, stop));
239 for (addr = func_addr; addr < stop; addr += INST_WORD_SIZE)
241 insn = microblaze_fetch_instruction (addr);
242 op = microblaze_decode_insn (insn, &rd, &ra, &rb, &imm);
243 microblaze_debug ("%s %08lx\n", paddress (gdbarch, pc), insn);
245 /* This code is very sensitive to what functions are present in the
246 prologue. It assumes that the (addi, addik, swi, sw) can be the
247 only instructions in the prologue. */
248 if (IS_UPDATE_SP(op, rd, ra))
250 microblaze_debug ("got addi r1,r1,%d; continuing\n", imm);
251 if (cache->framesize)
252 break; /* break if framesize already computed. */
253 cache->framesize = -imm; /* stack grows towards low memory. */
254 cache->frameless_p = 0; /* Frame found. */
255 save_hidden_pointer_found = 0;
256 non_stack_instruction_found = 0;
257 continue;
259 else if (IS_SPILL_SP(op, rd, ra))
261 /* Spill stack pointer. */
262 cache->register_offsets[rd] = imm; /* SP spilled before updating. */
264 microblaze_debug ("swi r1 r1 %d, continuing\n", imm);
265 save_hidden_pointer_found = 0;
266 if (!cache->framesize)
267 non_stack_instruction_found = 0;
268 continue;
270 else if (IS_SPILL_REG(op, rd, ra))
272 /* Spill register. */
273 cache->register_offsets[rd] = imm - cache->framesize;
275 microblaze_debug ("swi %d r1 %d, continuing\n", rd, imm);
276 save_hidden_pointer_found = 0;
277 if (!cache->framesize)
278 non_stack_instruction_found = 0;
279 continue;
281 else if (IS_ALSO_SPILL_REG(op, rd, ra, rb))
283 /* Spill register. */
284 cache->register_offsets[rd] = 0 - cache->framesize;
286 microblaze_debug ("sw %d r0 r1, continuing\n", rd);
287 save_hidden_pointer_found = 0;
288 if (!cache->framesize)
289 non_stack_instruction_found = 0;
290 continue;
292 else if (IS_SETUP_FP(op, ra, rb))
294 /* We have a frame pointer. Note the register which is
295 acting as the frame pointer. */
296 cache->fp_regnum = rd;
297 microblaze_debug ("Found a frame pointer: r%d\n", cache->fp_regnum);
298 save_hidden_pointer_found = 0;
299 if (!cache->framesize)
300 non_stack_instruction_found = 0;
301 continue;
303 else if (IS_SPILL_REG_FP(op, rd, ra, cache->fp_regnum))
305 /* reg spilled after updating. */
306 cache->register_offsets[rd] = imm - cache->framesize;
308 microblaze_debug ("swi %d %d %d, continuing\n", rd, ra, imm);
309 save_hidden_pointer_found = 0;
310 if (!cache->framesize)
311 non_stack_instruction_found = 0;
312 continue;
314 else if (IS_SAVE_HIDDEN_PTR(op, rd, ra, rb))
316 /* If the first argument is a hidden pointer to the area where the
317 return structure is to be saved, then it is saved as part of the
318 prologue. */
320 microblaze_debug ("add %d %d %d, continuing\n", rd, ra, rb);
321 save_hidden_pointer_found = 1;
322 if (!cache->framesize)
323 non_stack_instruction_found = 0;
324 continue;
327 /* As a result of the modification in the next step where we continue
328 to analyze the prologue till we reach a control flow instruction,
329 we need another variable to store when exactly a non-stack
330 instruction was encountered, which is the current definition
331 of a prologue. */
332 if (!non_stack_instruction_found)
333 prologue_end_addr = addr;
334 non_stack_instruction_found = 1;
336 /* When optimizations are enabled, it is not guaranteed that prologue
337 instructions are not mixed in with other instructions from the
338 program. Some programs show this behavior at -O2. This can be
339 avoided by adding -fno-schedule-insns2 switch as of now (edk 8.1)
340 In such cases, we scan the function until we see the first control
341 instruction. */
344 unsigned ctrl_op = (unsigned)insn >> 26;
346 /* continue if not control flow (branch, return). */
347 if (ctrl_op != 0x26 && ctrl_op != 0x27 && ctrl_op != 0x2d
348 && ctrl_op != 0x2e && ctrl_op != 0x2f)
349 continue;
350 else if (ctrl_op == 0x2c)
351 continue; /* continue if imm. */
354 /* This is not a prologue insn, so stop here. */
355 microblaze_debug ("insn is not a prologue insn -- ending scan\n");
356 break;
359 microblaze_debug ("done analyzing prologue\n");
360 microblaze_debug ("prologue end = 0x%x\n", (int) addr);
362 /* If the last instruction was an add rd, r5, r0 then don't count it as
363 part of the prologue. */
364 if (save_hidden_pointer_found)
365 prologue_end_addr -= INST_WORD_SIZE;
367 return prologue_end_addr;
370 static CORE_ADDR
371 microblaze_unwind_pc (struct gdbarch *gdbarch, frame_info_ptr next_frame)
373 gdb_byte buf[4];
374 CORE_ADDR pc;
376 frame_unwind_register (next_frame, MICROBLAZE_PC_REGNUM, buf);
377 pc = extract_typed_address (buf, builtin_type (gdbarch)->builtin_func_ptr);
378 /* For sentinel frame, return address is actual PC. For other frames,
379 return address is pc+8. This is a workaround because gcc does not
380 generate correct return address in CIE. */
381 if (frame_relative_level (next_frame) >= 0)
382 pc += 8;
383 return pc;
386 /* Return PC of first real instruction of the function starting at
387 START_PC. */
389 static CORE_ADDR
390 microblaze_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR start_pc)
392 struct symtab_and_line sal;
393 CORE_ADDR func_start, func_end, ostart_pc;
394 struct microblaze_frame_cache cache;
396 /* This is the preferred method, find the end of the prologue by
397 using the debugging information. Debugging info does not always
398 give the right answer since parameters are stored on stack after this.
399 Always analyze the prologue. */
400 if (find_pc_partial_function (start_pc, NULL, &func_start, &func_end))
402 sal = find_pc_line (func_start, 0);
404 if (sal.end < func_end
405 && start_pc <= sal.end)
406 start_pc = sal.end;
409 ostart_pc = microblaze_analyze_prologue (gdbarch, func_start, 0xffffffffUL,
410 &cache);
412 if (ostart_pc > start_pc)
413 return ostart_pc;
414 return start_pc;
417 /* Normal frames. */
419 static struct microblaze_frame_cache *
420 microblaze_frame_cache (frame_info_ptr next_frame, void **this_cache)
422 struct microblaze_frame_cache *cache;
423 struct gdbarch *gdbarch = get_frame_arch (next_frame);
424 int rn;
426 if (*this_cache)
427 return (struct microblaze_frame_cache *) *this_cache;
429 cache = microblaze_alloc_frame_cache ();
430 *this_cache = cache;
431 cache->saved_regs = trad_frame_alloc_saved_regs (next_frame);
433 /* Clear offsets to saved regs in frame. */
434 for (rn = 0; rn < gdbarch_num_regs (gdbarch); rn++)
435 cache->register_offsets[rn] = -1;
437 /* Call for side effects. */
438 get_frame_func (next_frame);
440 cache->pc = get_frame_address_in_block (next_frame);
442 return cache;
445 static void
446 microblaze_frame_this_id (frame_info_ptr next_frame, void **this_cache,
447 struct frame_id *this_id)
449 struct microblaze_frame_cache *cache =
450 microblaze_frame_cache (next_frame, this_cache);
452 /* This marks the outermost frame. */
453 if (cache->base == 0)
454 return;
456 (*this_id) = frame_id_build (cache->base, cache->pc);
459 static struct value *
460 microblaze_frame_prev_register (frame_info_ptr this_frame,
461 void **this_cache, int regnum)
463 struct microblaze_frame_cache *cache =
464 microblaze_frame_cache (this_frame, this_cache);
466 if (cache->frameless_p)
468 if (regnum == MICROBLAZE_PC_REGNUM)
469 regnum = 15;
470 if (regnum == MICROBLAZE_SP_REGNUM)
471 regnum = 1;
472 return trad_frame_get_prev_register (this_frame,
473 cache->saved_regs, regnum);
475 else
476 return trad_frame_get_prev_register (this_frame, cache->saved_regs,
477 regnum);
481 static const struct frame_unwind microblaze_frame_unwind =
483 "microblaze prologue",
484 NORMAL_FRAME,
485 default_frame_unwind_stop_reason,
486 microblaze_frame_this_id,
487 microblaze_frame_prev_register,
488 NULL,
489 default_frame_sniffer
492 static CORE_ADDR
493 microblaze_frame_base_address (frame_info_ptr next_frame,
494 void **this_cache)
496 struct microblaze_frame_cache *cache =
497 microblaze_frame_cache (next_frame, this_cache);
499 return cache->base;
502 static const struct frame_base microblaze_frame_base =
504 &microblaze_frame_unwind,
505 microblaze_frame_base_address,
506 microblaze_frame_base_address,
507 microblaze_frame_base_address
510 /* Extract from an array REGBUF containing the (raw) register state, a
511 function return value of TYPE, and copy that into VALBUF. */
512 static void
513 microblaze_extract_return_value (struct type *type, struct regcache *regcache,
514 gdb_byte *valbuf)
516 gdb_byte buf[8];
518 /* Copy the return value (starting) in RETVAL_REGNUM to VALBUF. */
519 switch (type->length ())
521 case 1: /* return last byte in the register. */
522 regcache->cooked_read (MICROBLAZE_RETVAL_REGNUM, buf);
523 memcpy(valbuf, buf + MICROBLAZE_REGISTER_SIZE - 1, 1);
524 return;
525 case 2: /* return last 2 bytes in register. */
526 regcache->cooked_read (MICROBLAZE_RETVAL_REGNUM, buf);
527 memcpy(valbuf, buf + MICROBLAZE_REGISTER_SIZE - 2, 2);
528 return;
529 case 4: /* for sizes 4 or 8, copy the required length. */
530 case 8:
531 regcache->cooked_read (MICROBLAZE_RETVAL_REGNUM, buf);
532 regcache->cooked_read (MICROBLAZE_RETVAL_REGNUM + 1, buf+4);
533 memcpy (valbuf, buf, type->length ());
534 return;
535 default:
536 internal_error (_("Unsupported return value size requested"));
540 /* Store the return value in VALBUF (of type TYPE) where the caller
541 expects to see it.
543 Integers up to four bytes are stored in r3.
545 Longs are stored in r3 (most significant word) and r4 (least
546 significant word).
548 Small structures are always returned on stack. */
550 static void
551 microblaze_store_return_value (struct type *type, struct regcache *regcache,
552 const gdb_byte *valbuf)
554 int len = type->length ();
555 gdb_byte buf[8];
557 memset (buf, 0, sizeof(buf));
559 /* Integral and pointer return values. */
561 if (len > 4)
563 gdb_assert (len == 8);
564 memcpy (buf, valbuf, 8);
565 regcache->cooked_write (MICROBLAZE_RETVAL_REGNUM+1, buf + 4);
567 else
568 /* ??? Do we need to do any sign-extension here? */
569 memcpy (buf + 4 - len, valbuf, len);
571 regcache->cooked_write (MICROBLAZE_RETVAL_REGNUM, buf);
574 static enum return_value_convention
575 microblaze_return_value (struct gdbarch *gdbarch, struct value *function,
576 struct type *type, struct regcache *regcache,
577 gdb_byte *readbuf, const gdb_byte *writebuf)
579 if (readbuf)
580 microblaze_extract_return_value (type, regcache, readbuf);
581 if (writebuf)
582 microblaze_store_return_value (type, regcache, writebuf);
584 return RETURN_VALUE_REGISTER_CONVENTION;
587 static int
588 microblaze_stabs_argument_has_addr (struct gdbarch *gdbarch, struct type *type)
590 return (type->length () == 16);
594 static int dwarf2_to_reg_map[78] =
595 { 0 /* r0 */, 1 /* r1 */, 2 /* r2 */, 3 /* r3 */, /* 0- 3 */
596 4 /* r4 */, 5 /* r5 */, 6 /* r6 */, 7 /* r7 */, /* 4- 7 */
597 8 /* r8 */, 9 /* r9 */, 10 /* r10 */, 11 /* r11 */, /* 8-11 */
598 12 /* r12 */, 13 /* r13 */, 14 /* r14 */, 15 /* r15 */, /* 12-15 */
599 16 /* r16 */, 17 /* r17 */, 18 /* r18 */, 19 /* r19 */, /* 16-19 */
600 20 /* r20 */, 21 /* r21 */, 22 /* r22 */, 23 /* r23 */, /* 20-23 */
601 24 /* r24 */, 25 /* r25 */, 26 /* r26 */, 27 /* r27 */, /* 24-25 */
602 28 /* r28 */, 29 /* r29 */, 30 /* r30 */, 31 /* r31 */, /* 28-31 */
603 -1 /* $f0 */, -1 /* $f1 */, -1 /* $f2 */, -1 /* $f3 */, /* 32-35 */
604 -1 /* $f4 */, -1 /* $f5 */, -1 /* $f6 */, -1 /* $f7 */, /* 36-39 */
605 -1 /* $f8 */, -1 /* $f9 */, -1 /* $f10 */, -1 /* $f11 */, /* 40-43 */
606 -1 /* $f12 */, -1 /* $f13 */, -1 /* $f14 */, -1 /* $f15 */, /* 44-47 */
607 -1 /* $f16 */, -1 /* $f17 */, -1 /* $f18 */, -1 /* $f19 */, /* 48-51 */
608 -1 /* $f20 */, -1 /* $f21 */, -1 /* $f22 */, -1 /* $f23 */, /* 52-55 */
609 -1 /* $f24 */, -1 /* $f25 */, -1 /* $f26 */, -1 /* $f27 */, /* 56-59 */
610 -1 /* $f28 */, -1 /* $f29 */, -1 /* $f30 */, -1 /* $f31 */, /* 60-63 */
611 -1 /* hi */, -1 /* lo */, -1 /* accum*/, 33 /* rmsr */, /* 64-67 */
612 -1 /* $fcc1*/, -1 /* $fcc2*/, -1 /* $fcc3*/, -1 /* $fcc4*/, /* 68-71 */
613 -1 /* $fcc5*/, -1 /* $fcc6*/, -1 /* $fcc7*/, -1 /* $ap */, /* 72-75 */
614 -1 /* $rap */, -1 /* $frp */ /* 76-77 */
617 static int
618 microblaze_dwarf2_reg_to_regnum (struct gdbarch *gdbarch, int reg)
620 if (reg >= 0 && reg < sizeof (dwarf2_to_reg_map))
621 return dwarf2_to_reg_map[reg];
622 return -1;
625 static void
626 microblaze_register_g_packet_guesses (struct gdbarch *gdbarch)
628 register_remote_g_packet_guess (gdbarch,
629 4 * MICROBLAZE_NUM_CORE_REGS,
630 tdesc_microblaze);
632 register_remote_g_packet_guess (gdbarch,
633 4 * MICROBLAZE_NUM_REGS,
634 tdesc_microblaze_with_stack_protect);
637 static struct gdbarch *
638 microblaze_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
640 tdesc_arch_data_up tdesc_data;
641 const struct target_desc *tdesc = info.target_desc;
643 /* If there is already a candidate, use it. */
644 arches = gdbarch_list_lookup_by_info (arches, &info);
645 if (arches != NULL)
646 return arches->gdbarch;
647 if (tdesc == NULL)
648 tdesc = tdesc_microblaze;
650 /* Check any target description for validity. */
651 if (tdesc_has_registers (tdesc))
653 const struct tdesc_feature *feature;
654 int valid_p;
655 int i;
657 feature = tdesc_find_feature (tdesc,
658 "org.gnu.gdb.microblaze.core");
659 if (feature == NULL)
660 return NULL;
661 tdesc_data = tdesc_data_alloc ();
663 valid_p = 1;
664 for (i = 0; i < MICROBLAZE_NUM_CORE_REGS; i++)
665 valid_p &= tdesc_numbered_register (feature, tdesc_data.get (), i,
666 microblaze_register_names[i]);
667 feature = tdesc_find_feature (tdesc,
668 "org.gnu.gdb.microblaze.stack-protect");
669 if (feature != NULL)
671 valid_p = 1;
672 valid_p &= tdesc_numbered_register (feature, tdesc_data.get (),
673 MICROBLAZE_SLR_REGNUM,
674 "rslr");
675 valid_p &= tdesc_numbered_register (feature, tdesc_data.get (),
676 MICROBLAZE_SHR_REGNUM,
677 "rshr");
680 if (!valid_p)
681 return NULL;
684 /* Allocate space for the new architecture. */
685 gdbarch *gdbarch
686 = gdbarch_alloc (&info, gdbarch_tdep_up (new microblaze_gdbarch_tdep));
688 set_gdbarch_long_double_bit (gdbarch, 128);
690 set_gdbarch_num_regs (gdbarch, MICROBLAZE_NUM_REGS);
691 set_gdbarch_register_name (gdbarch, microblaze_register_name);
692 set_gdbarch_register_type (gdbarch, microblaze_register_type);
694 /* Register numbers of various important registers. */
695 set_gdbarch_sp_regnum (gdbarch, MICROBLAZE_SP_REGNUM);
696 set_gdbarch_pc_regnum (gdbarch, MICROBLAZE_PC_REGNUM);
698 /* Map Dwarf2 registers to GDB registers. */
699 set_gdbarch_dwarf2_reg_to_regnum (gdbarch, microblaze_dwarf2_reg_to_regnum);
701 /* Call dummy code. */
702 set_gdbarch_call_dummy_location (gdbarch, ON_STACK);
704 set_gdbarch_return_value (gdbarch, microblaze_return_value);
705 set_gdbarch_stabs_argument_has_addr
706 (gdbarch, microblaze_stabs_argument_has_addr);
708 set_gdbarch_skip_prologue (gdbarch, microblaze_skip_prologue);
710 /* Stack grows downward. */
711 set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
713 set_gdbarch_breakpoint_kind_from_pc (gdbarch,
714 microblaze_breakpoint::kind_from_pc);
715 set_gdbarch_sw_breakpoint_from_kind (gdbarch,
716 microblaze_breakpoint::bp_from_kind);
718 set_gdbarch_frame_args_skip (gdbarch, 8);
720 set_gdbarch_unwind_pc (gdbarch, microblaze_unwind_pc);
722 microblaze_register_g_packet_guesses (gdbarch);
724 frame_base_set_default (gdbarch, &microblaze_frame_base);
726 /* Hook in ABI-specific overrides, if they have been registered. */
727 gdbarch_init_osabi (info, gdbarch);
729 /* Unwind the frame. */
730 dwarf2_append_unwinders (gdbarch);
731 frame_unwind_append_unwinder (gdbarch, &microblaze_frame_unwind);
732 frame_base_append_sniffer (gdbarch, dwarf2_frame_base_sniffer);
733 if (tdesc_data != NULL)
734 tdesc_use_registers (gdbarch, tdesc, std::move (tdesc_data));
736 return gdbarch;
739 void _initialize_microblaze_tdep ();
740 void
741 _initialize_microblaze_tdep ()
743 gdbarch_register (bfd_arch_microblaze, microblaze_gdbarch_init);
745 initialize_tdesc_microblaze_with_stack_protect ();
746 initialize_tdesc_microblaze ();
747 /* Debug this files internals. */
748 add_setshow_zuinteger_cmd ("microblaze", class_maintenance,
749 &microblaze_debug_flag, _("\
750 Set microblaze debugging."), _("\
751 Show microblaze debugging."), _("\
752 When non-zero, microblaze specific debugging is enabled."),
753 NULL,
754 NULL,
755 &setdebuglist, &showdebuglist);