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[binutils-gdb.git] / gold / arm.cc
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1 // arm.cc -- arm target support for gold.
3 // Copyright (C) 2009-2022 Free Software Foundation, Inc.
4 // Written by Doug Kwan <dougkwan@google.com> based on the i386 code
5 // by Ian Lance Taylor <iant@google.com>.
6 // This file also contains borrowed and adapted code from
7 // bfd/elf32-arm.c.
9 // This file is part of gold.
11 // This program is free software; you can redistribute it and/or modify
12 // it under the terms of the GNU General Public License as published by
13 // the Free Software Foundation; either version 3 of the License, or
14 // (at your option) any later version.
16 // This program is distributed in the hope that it will be useful,
17 // but WITHOUT ANY WARRANTY; without even the implied warranty of
18 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 // GNU General Public License for more details.
21 // You should have received a copy of the GNU General Public License
22 // along with this program; if not, write to the Free Software
23 // Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston,
24 // MA 02110-1301, USA.
26 #include "gold.h"
28 #include <cstring>
29 #include <limits>
30 #include <cstdio>
31 #include <string>
32 #include <algorithm>
33 #include <map>
34 #include <utility>
35 #include <set>
37 #include "elfcpp.h"
38 #include "parameters.h"
39 #include "reloc.h"
40 #include "arm.h"
41 #include "object.h"
42 #include "symtab.h"
43 #include "layout.h"
44 #include "output.h"
45 #include "copy-relocs.h"
46 #include "target.h"
47 #include "target-reloc.h"
48 #include "target-select.h"
49 #include "tls.h"
50 #include "defstd.h"
51 #include "gc.h"
52 #include "attributes.h"
53 #include "arm-reloc-property.h"
54 #include "nacl.h"
56 namespace
59 using namespace gold;
61 template<bool big_endian>
62 class Output_data_plt_arm;
64 template<bool big_endian>
65 class Output_data_plt_arm_short;
67 template<bool big_endian>
68 class Output_data_plt_arm_long;
70 template<bool big_endian>
71 class Stub_table;
73 template<bool big_endian>
74 class Arm_input_section;
76 class Arm_exidx_cantunwind;
78 class Arm_exidx_merged_section;
80 class Arm_exidx_fixup;
82 template<bool big_endian>
83 class Arm_output_section;
85 class Arm_exidx_input_section;
87 template<bool big_endian>
88 class Arm_relobj;
90 template<bool big_endian>
91 class Arm_relocate_functions;
93 template<bool big_endian>
94 class Arm_output_data_got;
96 template<bool big_endian>
97 class Target_arm;
99 // For convenience.
100 typedef elfcpp::Elf_types<32>::Elf_Addr Arm_address;
102 // Maximum branch offsets for ARM, THUMB and THUMB2.
103 const int32_t ARM_MAX_FWD_BRANCH_OFFSET = ((((1 << 23) - 1) << 2) + 8);
104 const int32_t ARM_MAX_BWD_BRANCH_OFFSET = ((-((1 << 23) << 2)) + 8);
105 const int32_t THM_MAX_FWD_BRANCH_OFFSET = ((1 << 22) -2 + 4);
106 const int32_t THM_MAX_BWD_BRANCH_OFFSET = (-(1 << 22) + 4);
107 const int32_t THM2_MAX_FWD_BRANCH_OFFSET = (((1 << 24) - 2) + 4);
108 const int32_t THM2_MAX_BWD_BRANCH_OFFSET = (-(1 << 24) + 4);
110 // Thread Control Block size.
111 const size_t ARM_TCB_SIZE = 8;
113 // The arm target class.
115 // This is a very simple port of gold for ARM-EABI. It is intended for
116 // supporting Android only for the time being.
118 // TODOs:
119 // - Implement all static relocation types documented in arm-reloc.def.
120 // - Make PLTs more flexible for different architecture features like
121 // Thumb-2 and BE8.
122 // There are probably a lot more.
124 // Ideally we would like to avoid using global variables but this is used
125 // very in many places and sometimes in loops. If we use a function
126 // returning a static instance of Arm_reloc_property_table, it will be very
127 // slow in an threaded environment since the static instance needs to be
128 // locked. The pointer is below initialized in the
129 // Target::do_select_as_default_target() hook so that we do not spend time
130 // building the table if we are not linking ARM objects.
132 // An alternative is to process the information in arm-reloc.def in
133 // compilation time and generate a representation of it in PODs only. That
134 // way we can avoid initialization when the linker starts.
136 Arm_reloc_property_table* arm_reloc_property_table = NULL;
138 // Instruction template class. This class is similar to the insn_sequence
139 // struct in bfd/elf32-arm.c.
141 class Insn_template
143 public:
144 // Types of instruction templates.
145 enum Type
147 THUMB16_TYPE = 1,
148 // THUMB16_SPECIAL_TYPE is used by sub-classes of Stub for instruction
149 // templates with class-specific semantics. Currently this is used
150 // only by the Cortex_a8_stub class for handling condition codes in
151 // conditional branches.
152 THUMB16_SPECIAL_TYPE,
153 THUMB32_TYPE,
154 ARM_TYPE,
155 DATA_TYPE
158 // Factory methods to create instruction templates in different formats.
160 static const Insn_template
161 thumb16_insn(uint32_t data)
162 { return Insn_template(data, THUMB16_TYPE, elfcpp::R_ARM_NONE, 0); }
164 // A Thumb conditional branch, in which the proper condition is inserted
165 // when we build the stub.
166 static const Insn_template
167 thumb16_bcond_insn(uint32_t data)
168 { return Insn_template(data, THUMB16_SPECIAL_TYPE, elfcpp::R_ARM_NONE, 1); }
170 static const Insn_template
171 thumb32_insn(uint32_t data)
172 { return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_NONE, 0); }
174 static const Insn_template
175 thumb32_b_insn(uint32_t data, int reloc_addend)
177 return Insn_template(data, THUMB32_TYPE, elfcpp::R_ARM_THM_JUMP24,
178 reloc_addend);
181 static const Insn_template
182 arm_insn(uint32_t data)
183 { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_NONE, 0); }
185 static const Insn_template
186 arm_rel_insn(unsigned data, int reloc_addend)
187 { return Insn_template(data, ARM_TYPE, elfcpp::R_ARM_JUMP24, reloc_addend); }
189 static const Insn_template
190 data_word(unsigned data, unsigned int r_type, int reloc_addend)
191 { return Insn_template(data, DATA_TYPE, r_type, reloc_addend); }
193 // Accessors. This class is used for read-only objects so no modifiers
194 // are provided.
196 uint32_t
197 data() const
198 { return this->data_; }
200 // Return the instruction sequence type of this.
201 Type
202 type() const
203 { return this->type_; }
205 // Return the ARM relocation type of this.
206 unsigned int
207 r_type() const
208 { return this->r_type_; }
210 int32_t
211 reloc_addend() const
212 { return this->reloc_addend_; }
214 // Return size of instruction template in bytes.
215 size_t
216 size() const;
218 // Return byte-alignment of instruction template.
219 unsigned
220 alignment() const;
222 private:
223 // We make the constructor private to ensure that only the factory
224 // methods are used.
225 inline
226 Insn_template(unsigned data, Type type, unsigned int r_type, int reloc_addend)
227 : data_(data), type_(type), r_type_(r_type), reloc_addend_(reloc_addend)
230 // Instruction specific data. This is used to store information like
231 // some of the instruction bits.
232 uint32_t data_;
233 // Instruction template type.
234 Type type_;
235 // Relocation type if there is a relocation or R_ARM_NONE otherwise.
236 unsigned int r_type_;
237 // Relocation addend.
238 int32_t reloc_addend_;
241 // Macro for generating code to stub types. One entry per long/short
242 // branch stub
244 #define DEF_STUBS \
245 DEF_STUB(long_branch_any_any) \
246 DEF_STUB(long_branch_v4t_arm_thumb) \
247 DEF_STUB(long_branch_thumb_only) \
248 DEF_STUB(long_branch_v4t_thumb_thumb) \
249 DEF_STUB(long_branch_v4t_thumb_arm) \
250 DEF_STUB(short_branch_v4t_thumb_arm) \
251 DEF_STUB(long_branch_any_arm_pic) \
252 DEF_STUB(long_branch_any_thumb_pic) \
253 DEF_STUB(long_branch_v4t_thumb_thumb_pic) \
254 DEF_STUB(long_branch_v4t_arm_thumb_pic) \
255 DEF_STUB(long_branch_v4t_thumb_arm_pic) \
256 DEF_STUB(long_branch_thumb_only_pic) \
257 DEF_STUB(a8_veneer_b_cond) \
258 DEF_STUB(a8_veneer_b) \
259 DEF_STUB(a8_veneer_bl) \
260 DEF_STUB(a8_veneer_blx) \
261 DEF_STUB(v4_veneer_bx)
263 // Stub types.
265 #define DEF_STUB(x) arm_stub_##x,
266 typedef enum
268 arm_stub_none,
269 DEF_STUBS
271 // First reloc stub type.
272 arm_stub_reloc_first = arm_stub_long_branch_any_any,
273 // Last reloc stub type.
274 arm_stub_reloc_last = arm_stub_long_branch_thumb_only_pic,
276 // First Cortex-A8 stub type.
277 arm_stub_cortex_a8_first = arm_stub_a8_veneer_b_cond,
278 // Last Cortex-A8 stub type.
279 arm_stub_cortex_a8_last = arm_stub_a8_veneer_blx,
281 // Last stub type.
282 arm_stub_type_last = arm_stub_v4_veneer_bx
283 } Stub_type;
284 #undef DEF_STUB
286 // Stub template class. Templates are meant to be read-only objects.
287 // A stub template for a stub type contains all read-only attributes
288 // common to all stubs of the same type.
290 class Stub_template
292 public:
293 Stub_template(Stub_type, const Insn_template*, size_t);
295 ~Stub_template()
298 // Return stub type.
299 Stub_type
300 type() const
301 { return this->type_; }
303 // Return an array of instruction templates.
304 const Insn_template*
305 insns() const
306 { return this->insns_; }
308 // Return size of template in number of instructions.
309 size_t
310 insn_count() const
311 { return this->insn_count_; }
313 // Return size of template in bytes.
314 size_t
315 size() const
316 { return this->size_; }
318 // Return alignment of the stub template.
319 unsigned
320 alignment() const
321 { return this->alignment_; }
323 // Return whether entry point is in thumb mode.
324 bool
325 entry_in_thumb_mode() const
326 { return this->entry_in_thumb_mode_; }
328 // Return number of relocations in this template.
329 size_t
330 reloc_count() const
331 { return this->relocs_.size(); }
333 // Return index of the I-th instruction with relocation.
334 size_t
335 reloc_insn_index(size_t i) const
337 gold_assert(i < this->relocs_.size());
338 return this->relocs_[i].first;
341 // Return the offset of the I-th instruction with relocation from the
342 // beginning of the stub.
343 section_size_type
344 reloc_offset(size_t i) const
346 gold_assert(i < this->relocs_.size());
347 return this->relocs_[i].second;
350 private:
351 // This contains information about an instruction template with a relocation
352 // and its offset from start of stub.
353 typedef std::pair<size_t, section_size_type> Reloc;
355 // A Stub_template may not be copied. We want to share templates as much
356 // as possible.
357 Stub_template(const Stub_template&);
358 Stub_template& operator=(const Stub_template&);
360 // Stub type.
361 Stub_type type_;
362 // Points to an array of Insn_templates.
363 const Insn_template* insns_;
364 // Number of Insn_templates in insns_[].
365 size_t insn_count_;
366 // Size of templated instructions in bytes.
367 size_t size_;
368 // Alignment of templated instructions.
369 unsigned alignment_;
370 // Flag to indicate if entry is in thumb mode.
371 bool entry_in_thumb_mode_;
372 // A table of reloc instruction indices and offsets. We can find these by
373 // looking at the instruction templates but we pre-compute and then stash
374 // them here for speed.
375 std::vector<Reloc> relocs_;
379 // A class for code stubs. This is a base class for different type of
380 // stubs used in the ARM target.
383 class Stub
385 private:
386 static const section_offset_type invalid_offset =
387 static_cast<section_offset_type>(-1);
389 public:
390 Stub(const Stub_template* stub_template)
391 : stub_template_(stub_template), offset_(invalid_offset)
394 virtual
395 ~Stub()
398 // Return the stub template.
399 const Stub_template*
400 stub_template() const
401 { return this->stub_template_; }
403 // Return offset of code stub from beginning of its containing stub table.
404 section_offset_type
405 offset() const
407 gold_assert(this->offset_ != invalid_offset);
408 return this->offset_;
411 // Set offset of code stub from beginning of its containing stub table.
412 void
413 set_offset(section_offset_type offset)
414 { this->offset_ = offset; }
416 // Return the relocation target address of the i-th relocation in the
417 // stub. This must be defined in a child class.
418 Arm_address
419 reloc_target(size_t i)
420 { return this->do_reloc_target(i); }
422 // Write a stub at output VIEW. BIG_ENDIAN select how a stub is written.
423 void
424 write(unsigned char* view, section_size_type view_size, bool big_endian)
425 { this->do_write(view, view_size, big_endian); }
427 // Return the instruction for THUMB16_SPECIAL_TYPE instruction template
428 // for the i-th instruction.
429 uint16_t
430 thumb16_special(size_t i)
431 { return this->do_thumb16_special(i); }
433 protected:
434 // This must be defined in the child class.
435 virtual Arm_address
436 do_reloc_target(size_t) = 0;
438 // This may be overridden in the child class.
439 virtual void
440 do_write(unsigned char* view, section_size_type view_size, bool big_endian)
442 if (big_endian)
443 this->do_fixed_endian_write<true>(view, view_size);
444 else
445 this->do_fixed_endian_write<false>(view, view_size);
448 // This must be overridden if a child class uses the THUMB16_SPECIAL_TYPE
449 // instruction template.
450 virtual uint16_t
451 do_thumb16_special(size_t)
452 { gold_unreachable(); }
454 private:
455 // A template to implement do_write.
456 template<bool big_endian>
457 void inline
458 do_fixed_endian_write(unsigned char*, section_size_type);
460 // Its template.
461 const Stub_template* stub_template_;
462 // Offset within the section of containing this stub.
463 section_offset_type offset_;
466 // Reloc stub class. These are stubs we use to fix up relocation because
467 // of limited branch ranges.
469 class Reloc_stub : public Stub
471 public:
472 static const unsigned int invalid_index = static_cast<unsigned int>(-1);
473 // We assume we never jump to this address.
474 static const Arm_address invalid_address = static_cast<Arm_address>(-1);
476 // Return destination address.
477 Arm_address
478 destination_address() const
480 gold_assert(this->destination_address_ != this->invalid_address);
481 return this->destination_address_;
484 // Set destination address.
485 void
486 set_destination_address(Arm_address address)
488 gold_assert(address != this->invalid_address);
489 this->destination_address_ = address;
492 // Reset destination address.
493 void
494 reset_destination_address()
495 { this->destination_address_ = this->invalid_address; }
497 // Determine stub type for a branch of a relocation of R_TYPE going
498 // from BRANCH_ADDRESS to BRANCH_TARGET. If TARGET_IS_THUMB is set,
499 // the branch target is a thumb instruction. TARGET is used for look
500 // up ARM-specific linker settings.
501 static Stub_type
502 stub_type_for_reloc(unsigned int r_type, Arm_address branch_address,
503 Arm_address branch_target, bool target_is_thumb);
505 // Reloc_stub key. A key is logically a triplet of a stub type, a symbol
506 // and an addend. Since we treat global and local symbol differently, we
507 // use a Symbol object for a global symbol and a object-index pair for
508 // a local symbol.
509 class Key
511 public:
512 // If SYMBOL is not null, this is a global symbol, we ignore RELOBJ and
513 // R_SYM. Otherwise, this is a local symbol and RELOBJ must non-NULL
514 // and R_SYM must not be invalid_index.
515 Key(Stub_type stub_type, const Symbol* symbol, const Relobj* relobj,
516 unsigned int r_sym, int32_t addend)
517 : stub_type_(stub_type), addend_(addend)
519 if (symbol != NULL)
521 this->r_sym_ = Reloc_stub::invalid_index;
522 this->u_.symbol = symbol;
524 else
526 gold_assert(relobj != NULL && r_sym != invalid_index);
527 this->r_sym_ = r_sym;
528 this->u_.relobj = relobj;
532 ~Key()
535 // Accessors: Keys are meant to be read-only object so no modifiers are
536 // provided.
538 // Return stub type.
539 Stub_type
540 stub_type() const
541 { return this->stub_type_; }
543 // Return the local symbol index or invalid_index.
544 unsigned int
545 r_sym() const
546 { return this->r_sym_; }
548 // Return the symbol if there is one.
549 const Symbol*
550 symbol() const
551 { return this->r_sym_ == invalid_index ? this->u_.symbol : NULL; }
553 // Return the relobj if there is one.
554 const Relobj*
555 relobj() const
556 { return this->r_sym_ != invalid_index ? this->u_.relobj : NULL; }
558 // Whether this equals to another key k.
559 bool
560 eq(const Key& k) const
562 return ((this->stub_type_ == k.stub_type_)
563 && (this->r_sym_ == k.r_sym_)
564 && ((this->r_sym_ != Reloc_stub::invalid_index)
565 ? (this->u_.relobj == k.u_.relobj)
566 : (this->u_.symbol == k.u_.symbol))
567 && (this->addend_ == k.addend_));
570 // Return a hash value.
571 size_t
572 hash_value() const
574 return (this->stub_type_
575 ^ this->r_sym_
576 ^ gold::string_hash<char>(
577 (this->r_sym_ != Reloc_stub::invalid_index)
578 ? this->u_.relobj->name().c_str()
579 : this->u_.symbol->name())
580 ^ this->addend_);
583 // Functors for STL associative containers.
584 struct hash
586 size_t
587 operator()(const Key& k) const
588 { return k.hash_value(); }
591 struct equal_to
593 bool
594 operator()(const Key& k1, const Key& k2) const
595 { return k1.eq(k2); }
598 // Name of key. This is mainly for debugging.
599 std::string
600 name() const ATTRIBUTE_UNUSED;
602 private:
603 // Stub type.
604 Stub_type stub_type_;
605 // If this is a local symbol, this is the index in the defining object.
606 // Otherwise, it is invalid_index for a global symbol.
607 unsigned int r_sym_;
608 // If r_sym_ is an invalid index, this points to a global symbol.
609 // Otherwise, it points to a relobj. We used the unsized and target
610 // independent Symbol and Relobj classes instead of Sized_symbol<32> and
611 // Arm_relobj, in order to avoid making the stub class a template
612 // as most of the stub machinery is endianness-neutral. However, it
613 // may require a bit of casting done by users of this class.
614 union
616 const Symbol* symbol;
617 const Relobj* relobj;
618 } u_;
619 // Addend associated with a reloc.
620 int32_t addend_;
623 protected:
624 // Reloc_stubs are created via a stub factory. So these are protected.
625 Reloc_stub(const Stub_template* stub_template)
626 : Stub(stub_template), destination_address_(invalid_address)
629 ~Reloc_stub()
632 friend class Stub_factory;
634 // Return the relocation target address of the i-th relocation in the
635 // stub.
636 Arm_address
637 do_reloc_target(size_t i)
639 // All reloc stub have only one relocation.
640 gold_assert(i == 0);
641 return this->destination_address_;
644 private:
645 // Address of destination.
646 Arm_address destination_address_;
649 // Cortex-A8 stub class. We need a Cortex-A8 stub to redirect any 32-bit
650 // THUMB branch that meets the following conditions:
652 // 1. The branch straddles across a page boundary. i.e. lower 12-bit of
653 // branch address is 0xffe.
654 // 2. The branch target address is in the same page as the first word of the
655 // branch.
656 // 3. The branch follows a 32-bit instruction which is not a branch.
658 // To do the fix up, we need to store the address of the branch instruction
659 // and its target at least. We also need to store the original branch
660 // instruction bits for the condition code in a conditional branch. The
661 // condition code is used in a special instruction template. We also want
662 // to identify input sections needing Cortex-A8 workaround quickly. We store
663 // extra information about object and section index of the code section
664 // containing a branch being fixed up. The information is used to mark
665 // the code section when we finalize the Cortex-A8 stubs.
668 class Cortex_a8_stub : public Stub
670 public:
671 ~Cortex_a8_stub()
674 // Return the object of the code section containing the branch being fixed
675 // up.
676 Relobj*
677 relobj() const
678 { return this->relobj_; }
680 // Return the section index of the code section containing the branch being
681 // fixed up.
682 unsigned int
683 shndx() const
684 { return this->shndx_; }
686 // Return the source address of stub. This is the address of the original
687 // branch instruction. LSB is 1 always set to indicate that it is a THUMB
688 // instruction.
689 Arm_address
690 source_address() const
691 { return this->source_address_; }
693 // Return the destination address of the stub. This is the branch taken
694 // address of the original branch instruction. LSB is 1 if it is a THUMB
695 // instruction address.
696 Arm_address
697 destination_address() const
698 { return this->destination_address_; }
700 // Return the instruction being fixed up.
701 uint32_t
702 original_insn() const
703 { return this->original_insn_; }
705 protected:
706 // Cortex_a8_stubs are created via a stub factory. So these are protected.
707 Cortex_a8_stub(const Stub_template* stub_template, Relobj* relobj,
708 unsigned int shndx, Arm_address source_address,
709 Arm_address destination_address, uint32_t original_insn)
710 : Stub(stub_template), relobj_(relobj), shndx_(shndx),
711 source_address_(source_address | 1U),
712 destination_address_(destination_address),
713 original_insn_(original_insn)
716 friend class Stub_factory;
718 // Return the relocation target address of the i-th relocation in the
719 // stub.
720 Arm_address
721 do_reloc_target(size_t i)
723 if (this->stub_template()->type() == arm_stub_a8_veneer_b_cond)
725 // The conditional branch veneer has two relocations.
726 gold_assert(i < 2);
727 return i == 0 ? this->source_address_ + 4 : this->destination_address_;
729 else
731 // All other Cortex-A8 stubs have only one relocation.
732 gold_assert(i == 0);
733 return this->destination_address_;
737 // Return an instruction for the THUMB16_SPECIAL_TYPE instruction template.
738 uint16_t
739 do_thumb16_special(size_t);
741 private:
742 // Object of the code section containing the branch being fixed up.
743 Relobj* relobj_;
744 // Section index of the code section containing the branch begin fixed up.
745 unsigned int shndx_;
746 // Source address of original branch.
747 Arm_address source_address_;
748 // Destination address of the original branch.
749 Arm_address destination_address_;
750 // Original branch instruction. This is needed for copying the condition
751 // code from a condition branch to its stub.
752 uint32_t original_insn_;
755 // ARMv4 BX Rx branch relocation stub class.
756 class Arm_v4bx_stub : public Stub
758 public:
759 ~Arm_v4bx_stub()
762 // Return the associated register.
763 uint32_t
764 reg() const
765 { return this->reg_; }
767 protected:
768 // Arm V4BX stubs are created via a stub factory. So these are protected.
769 Arm_v4bx_stub(const Stub_template* stub_template, const uint32_t reg)
770 : Stub(stub_template), reg_(reg)
773 friend class Stub_factory;
775 // Return the relocation target address of the i-th relocation in the
776 // stub.
777 Arm_address
778 do_reloc_target(size_t)
779 { gold_unreachable(); }
781 // This may be overridden in the child class.
782 virtual void
783 do_write(unsigned char* view, section_size_type view_size, bool big_endian)
785 if (big_endian)
786 this->do_fixed_endian_v4bx_write<true>(view, view_size);
787 else
788 this->do_fixed_endian_v4bx_write<false>(view, view_size);
791 private:
792 // A template to implement do_write.
793 template<bool big_endian>
794 void inline
795 do_fixed_endian_v4bx_write(unsigned char* view, section_size_type)
797 const Insn_template* insns = this->stub_template()->insns();
798 elfcpp::Swap<32, big_endian>::writeval(view,
799 (insns[0].data()
800 + (this->reg_ << 16)));
801 view += insns[0].size();
802 elfcpp::Swap<32, big_endian>::writeval(view,
803 (insns[1].data() + this->reg_));
804 view += insns[1].size();
805 elfcpp::Swap<32, big_endian>::writeval(view,
806 (insns[2].data() + this->reg_));
809 // A register index (r0-r14), which is associated with the stub.
810 uint32_t reg_;
813 // Stub factory class.
815 class Stub_factory
817 public:
818 // Return the unique instance of this class.
819 static const Stub_factory&
820 get_instance()
822 static Stub_factory singleton;
823 return singleton;
826 // Make a relocation stub.
827 Reloc_stub*
828 make_reloc_stub(Stub_type stub_type) const
830 gold_assert(stub_type >= arm_stub_reloc_first
831 && stub_type <= arm_stub_reloc_last);
832 return new Reloc_stub(this->stub_templates_[stub_type]);
835 // Make a Cortex-A8 stub.
836 Cortex_a8_stub*
837 make_cortex_a8_stub(Stub_type stub_type, Relobj* relobj, unsigned int shndx,
838 Arm_address source, Arm_address destination,
839 uint32_t original_insn) const
841 gold_assert(stub_type >= arm_stub_cortex_a8_first
842 && stub_type <= arm_stub_cortex_a8_last);
843 return new Cortex_a8_stub(this->stub_templates_[stub_type], relobj, shndx,
844 source, destination, original_insn);
847 // Make an ARM V4BX relocation stub.
848 // This method creates a stub from the arm_stub_v4_veneer_bx template only.
849 Arm_v4bx_stub*
850 make_arm_v4bx_stub(uint32_t reg) const
852 gold_assert(reg < 0xf);
853 return new Arm_v4bx_stub(this->stub_templates_[arm_stub_v4_veneer_bx],
854 reg);
857 private:
858 // Constructor and destructor are protected since we only return a single
859 // instance created in Stub_factory::get_instance().
861 Stub_factory();
863 // A Stub_factory may not be copied since it is a singleton.
864 Stub_factory(const Stub_factory&);
865 Stub_factory& operator=(Stub_factory&);
867 // Stub templates. These are initialized in the constructor.
868 const Stub_template* stub_templates_[arm_stub_type_last+1];
871 // A class to hold stubs for the ARM target.
873 template<bool big_endian>
874 class Stub_table : public Output_data
876 public:
877 Stub_table(Arm_input_section<big_endian>* owner)
878 : Output_data(), owner_(owner), reloc_stubs_(), reloc_stubs_size_(0),
879 reloc_stubs_addralign_(1), cortex_a8_stubs_(), arm_v4bx_stubs_(0xf),
880 prev_data_size_(0), prev_addralign_(1)
883 ~Stub_table()
886 // Owner of this stub table.
887 Arm_input_section<big_endian>*
888 owner() const
889 { return this->owner_; }
891 // Whether this stub table is empty.
892 bool
893 empty() const
895 return (this->reloc_stubs_.empty()
896 && this->cortex_a8_stubs_.empty()
897 && this->arm_v4bx_stubs_.empty());
900 // Return the current data size.
901 off_t
902 current_data_size() const
903 { return this->current_data_size_for_child(); }
905 // Add a STUB using KEY. The caller is responsible for avoiding addition
906 // if a STUB with the same key has already been added.
907 void
908 add_reloc_stub(Reloc_stub* stub, const Reloc_stub::Key& key)
910 const Stub_template* stub_template = stub->stub_template();
911 gold_assert(stub_template->type() == key.stub_type());
912 this->reloc_stubs_[key] = stub;
914 // Assign stub offset early. We can do this because we never remove
915 // reloc stubs and they are in the beginning of the stub table.
916 uint64_t align = stub_template->alignment();
917 this->reloc_stubs_size_ = align_address(this->reloc_stubs_size_, align);
918 stub->set_offset(this->reloc_stubs_size_);
919 this->reloc_stubs_size_ += stub_template->size();
920 this->reloc_stubs_addralign_ =
921 std::max(this->reloc_stubs_addralign_, align);
924 // Add a Cortex-A8 STUB that fixes up a THUMB branch at ADDRESS.
925 // The caller is responsible for avoiding addition if a STUB with the same
926 // address has already been added.
927 void
928 add_cortex_a8_stub(Arm_address address, Cortex_a8_stub* stub)
930 std::pair<Arm_address, Cortex_a8_stub*> value(address, stub);
931 this->cortex_a8_stubs_.insert(value);
934 // Add an ARM V4BX relocation stub. A register index will be retrieved
935 // from the stub.
936 void
937 add_arm_v4bx_stub(Arm_v4bx_stub* stub)
939 gold_assert(stub != NULL && this->arm_v4bx_stubs_[stub->reg()] == NULL);
940 this->arm_v4bx_stubs_[stub->reg()] = stub;
943 // Remove all Cortex-A8 stubs.
944 void
945 remove_all_cortex_a8_stubs();
947 // Look up a relocation stub using KEY. Return NULL if there is none.
948 Reloc_stub*
949 find_reloc_stub(const Reloc_stub::Key& key) const
951 typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.find(key);
952 return (p != this->reloc_stubs_.end()) ? p->second : NULL;
955 // Look up an arm v4bx relocation stub using the register index.
956 // Return NULL if there is none.
957 Arm_v4bx_stub*
958 find_arm_v4bx_stub(const uint32_t reg) const
960 gold_assert(reg < 0xf);
961 return this->arm_v4bx_stubs_[reg];
964 // Relocate stubs in this stub table.
965 void
966 relocate_stubs(const Relocate_info<32, big_endian>*,
967 Target_arm<big_endian>*, Output_section*,
968 unsigned char*, Arm_address, section_size_type);
970 // Update data size and alignment at the end of a relaxation pass. Return
971 // true if either data size or alignment is different from that of the
972 // previous relaxation pass.
973 bool
974 update_data_size_and_addralign();
976 // Finalize stubs. Set the offsets of all stubs and mark input sections
977 // needing the Cortex-A8 workaround.
978 void
979 finalize_stubs();
981 // Apply Cortex-A8 workaround to an address range.
982 void
983 apply_cortex_a8_workaround_to_address_range(Target_arm<big_endian>*,
984 unsigned char*, Arm_address,
985 section_size_type);
987 protected:
988 // Write out section contents.
989 void
990 do_write(Output_file*);
992 // Return the required alignment.
993 uint64_t
994 do_addralign() const
995 { return this->prev_addralign_; }
997 // Reset address and file offset.
998 void
999 do_reset_address_and_file_offset()
1000 { this->set_current_data_size_for_child(this->prev_data_size_); }
1002 // Set final data size.
1003 void
1004 set_final_data_size()
1005 { this->set_data_size(this->current_data_size()); }
1007 private:
1008 // Relocate one stub.
1009 void
1010 relocate_stub(Stub*, const Relocate_info<32, big_endian>*,
1011 Target_arm<big_endian>*, Output_section*,
1012 unsigned char*, Arm_address, section_size_type);
1014 // Unordered map of relocation stubs.
1015 typedef
1016 Unordered_map<Reloc_stub::Key, Reloc_stub*, Reloc_stub::Key::hash,
1017 Reloc_stub::Key::equal_to>
1018 Reloc_stub_map;
1020 // List of Cortex-A8 stubs ordered by addresses of branches being
1021 // fixed up in output.
1022 typedef std::map<Arm_address, Cortex_a8_stub*> Cortex_a8_stub_list;
1023 // List of Arm V4BX relocation stubs ordered by associated registers.
1024 typedef std::vector<Arm_v4bx_stub*> Arm_v4bx_stub_list;
1026 // Owner of this stub table.
1027 Arm_input_section<big_endian>* owner_;
1028 // The relocation stubs.
1029 Reloc_stub_map reloc_stubs_;
1030 // Size of reloc stubs.
1031 off_t reloc_stubs_size_;
1032 // Maximum address alignment of reloc stubs.
1033 uint64_t reloc_stubs_addralign_;
1034 // The cortex_a8_stubs.
1035 Cortex_a8_stub_list cortex_a8_stubs_;
1036 // The Arm V4BX relocation stubs.
1037 Arm_v4bx_stub_list arm_v4bx_stubs_;
1038 // data size of this in the previous pass.
1039 off_t prev_data_size_;
1040 // address alignment of this in the previous pass.
1041 uint64_t prev_addralign_;
1044 // Arm_exidx_cantunwind class. This represents an EXIDX_CANTUNWIND entry
1045 // we add to the end of an EXIDX input section that goes into the output.
1047 class Arm_exidx_cantunwind : public Output_section_data
1049 public:
1050 Arm_exidx_cantunwind(Relobj* relobj, unsigned int shndx)
1051 : Output_section_data(8, 4, true), relobj_(relobj), shndx_(shndx)
1054 // Return the object containing the section pointed by this.
1055 Relobj*
1056 relobj() const
1057 { return this->relobj_; }
1059 // Return the section index of the section pointed by this.
1060 unsigned int
1061 shndx() const
1062 { return this->shndx_; }
1064 protected:
1065 void
1066 do_write(Output_file* of)
1068 if (parameters->target().is_big_endian())
1069 this->do_fixed_endian_write<true>(of);
1070 else
1071 this->do_fixed_endian_write<false>(of);
1074 // Write to a map file.
1075 void
1076 do_print_to_mapfile(Mapfile* mapfile) const
1077 { mapfile->print_output_data(this, _("** ARM cantunwind")); }
1079 private:
1080 // Implement do_write for a given endianness.
1081 template<bool big_endian>
1082 void inline
1083 do_fixed_endian_write(Output_file*);
1085 // The object containing the section pointed by this.
1086 Relobj* relobj_;
1087 // The section index of the section pointed by this.
1088 unsigned int shndx_;
1091 // During EXIDX coverage fix-up, we compact an EXIDX section. The
1092 // Offset map is used to map input section offset within the EXIDX section
1093 // to the output offset from the start of this EXIDX section.
1095 typedef std::map<section_offset_type, section_offset_type>
1096 Arm_exidx_section_offset_map;
1098 // Arm_exidx_merged_section class. This represents an EXIDX input section
1099 // with some of its entries merged.
1101 class Arm_exidx_merged_section : public Output_relaxed_input_section
1103 public:
1104 // Constructor for Arm_exidx_merged_section.
1105 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
1106 // SECTION_OFFSET_MAP points to a section offset map describing how
1107 // parts of the input section are mapped to output. DELETED_BYTES is
1108 // the number of bytes deleted from the EXIDX input section.
1109 Arm_exidx_merged_section(
1110 const Arm_exidx_input_section& exidx_input_section,
1111 const Arm_exidx_section_offset_map& section_offset_map,
1112 uint32_t deleted_bytes);
1114 // Build output contents.
1115 void
1116 build_contents(const unsigned char*, section_size_type);
1118 // Return the original EXIDX input section.
1119 const Arm_exidx_input_section&
1120 exidx_input_section() const
1121 { return this->exidx_input_section_; }
1123 // Return the section offset map.
1124 const Arm_exidx_section_offset_map&
1125 section_offset_map() const
1126 { return this->section_offset_map_; }
1128 protected:
1129 // Write merged section into file OF.
1130 void
1131 do_write(Output_file* of);
1133 bool
1134 do_output_offset(const Relobj*, unsigned int, section_offset_type,
1135 section_offset_type*) const;
1137 private:
1138 // Original EXIDX input section.
1139 const Arm_exidx_input_section& exidx_input_section_;
1140 // Section offset map.
1141 const Arm_exidx_section_offset_map& section_offset_map_;
1142 // Merged section contents. We need to keep build the merged section
1143 // and save it here to avoid accessing the original EXIDX section when
1144 // we cannot lock the sections' object.
1145 unsigned char* section_contents_;
1148 // A class to wrap an ordinary input section containing executable code.
1150 template<bool big_endian>
1151 class Arm_input_section : public Output_relaxed_input_section
1153 public:
1154 Arm_input_section(Relobj* relobj, unsigned int shndx)
1155 : Output_relaxed_input_section(relobj, shndx, 1),
1156 original_addralign_(1), original_size_(0), stub_table_(NULL),
1157 original_contents_(NULL)
1160 ~Arm_input_section()
1161 { delete[] this->original_contents_; }
1163 // Initialize.
1164 void
1165 init();
1167 // Whether this is a stub table owner.
1168 bool
1169 is_stub_table_owner() const
1170 { return this->stub_table_ != NULL && this->stub_table_->owner() == this; }
1172 // Return the stub table.
1173 Stub_table<big_endian>*
1174 stub_table() const
1175 { return this->stub_table_; }
1177 // Set the stub_table.
1178 void
1179 set_stub_table(Stub_table<big_endian>* stub_table)
1180 { this->stub_table_ = stub_table; }
1182 // Downcast a base pointer to an Arm_input_section pointer. This is
1183 // not type-safe but we only use Arm_input_section not the base class.
1184 static Arm_input_section<big_endian>*
1185 as_arm_input_section(Output_relaxed_input_section* poris)
1186 { return static_cast<Arm_input_section<big_endian>*>(poris); }
1188 // Return the original size of the section.
1189 uint32_t
1190 original_size() const
1191 { return this->original_size_; }
1193 protected:
1194 // Write data to output file.
1195 void
1196 do_write(Output_file*);
1198 // Return required alignment of this.
1199 uint64_t
1200 do_addralign() const
1202 if (this->is_stub_table_owner())
1203 return std::max(this->stub_table_->addralign(),
1204 static_cast<uint64_t>(this->original_addralign_));
1205 else
1206 return this->original_addralign_;
1209 // Finalize data size.
1210 void
1211 set_final_data_size();
1213 // Reset address and file offset.
1214 void
1215 do_reset_address_and_file_offset();
1217 // Output offset.
1218 bool
1219 do_output_offset(const Relobj* object, unsigned int shndx,
1220 section_offset_type offset,
1221 section_offset_type* poutput) const
1223 if ((object == this->relobj())
1224 && (shndx == this->shndx())
1225 && (offset >= 0)
1226 && (offset <=
1227 convert_types<section_offset_type, uint32_t>(this->original_size_)))
1229 *poutput = offset;
1230 return true;
1232 else
1233 return false;
1236 private:
1237 // Copying is not allowed.
1238 Arm_input_section(const Arm_input_section&);
1239 Arm_input_section& operator=(const Arm_input_section&);
1241 // Address alignment of the original input section.
1242 uint32_t original_addralign_;
1243 // Section size of the original input section.
1244 uint32_t original_size_;
1245 // Stub table.
1246 Stub_table<big_endian>* stub_table_;
1247 // Original section contents. We have to make a copy here since the file
1248 // containing the original section may not be locked when we need to access
1249 // the contents.
1250 unsigned char* original_contents_;
1253 // Arm_exidx_fixup class. This is used to define a number of methods
1254 // and keep states for fixing up EXIDX coverage.
1256 class Arm_exidx_fixup
1258 public:
1259 Arm_exidx_fixup(Output_section* exidx_output_section,
1260 bool merge_exidx_entries = true)
1261 : exidx_output_section_(exidx_output_section), last_unwind_type_(UT_NONE),
1262 last_inlined_entry_(0), last_input_section_(NULL),
1263 section_offset_map_(NULL), first_output_text_section_(NULL),
1264 merge_exidx_entries_(merge_exidx_entries)
1267 ~Arm_exidx_fixup()
1268 { delete this->section_offset_map_; }
1270 // Process an EXIDX section for entry merging. SECTION_CONTENTS points
1271 // to the EXIDX contents and SECTION_SIZE is the size of the contents. Return
1272 // number of bytes to be deleted in output. If parts of the input EXIDX
1273 // section are merged a heap allocated Arm_exidx_section_offset_map is store
1274 // in the located PSECTION_OFFSET_MAP. The caller owns the map and is
1275 // responsible for releasing it.
1276 template<bool big_endian>
1277 uint32_t
1278 process_exidx_section(const Arm_exidx_input_section* exidx_input_section,
1279 const unsigned char* section_contents,
1280 section_size_type section_size,
1281 Arm_exidx_section_offset_map** psection_offset_map);
1283 // Append an EXIDX_CANTUNWIND entry pointing at the end of the last
1284 // input section, if there is not one already.
1285 void
1286 add_exidx_cantunwind_as_needed();
1288 // Return the output section for the text section which is linked to the
1289 // first exidx input in output.
1290 Output_section*
1291 first_output_text_section() const
1292 { return this->first_output_text_section_; }
1294 private:
1295 // Copying is not allowed.
1296 Arm_exidx_fixup(const Arm_exidx_fixup&);
1297 Arm_exidx_fixup& operator=(const Arm_exidx_fixup&);
1299 // Type of EXIDX unwind entry.
1300 enum Unwind_type
1302 // No type.
1303 UT_NONE,
1304 // EXIDX_CANTUNWIND.
1305 UT_EXIDX_CANTUNWIND,
1306 // Inlined entry.
1307 UT_INLINED_ENTRY,
1308 // Normal entry.
1309 UT_NORMAL_ENTRY,
1312 // Process an EXIDX entry. We only care about the second word of the
1313 // entry. Return true if the entry can be deleted.
1314 bool
1315 process_exidx_entry(uint32_t second_word);
1317 // Update the current section offset map during EXIDX section fix-up.
1318 // If there is no map, create one. INPUT_OFFSET is the offset of a
1319 // reference point, DELETED_BYTES is the number of deleted by in the
1320 // section so far. If DELETE_ENTRY is true, the reference point and
1321 // all offsets after the previous reference point are discarded.
1322 void
1323 update_offset_map(section_offset_type input_offset,
1324 section_size_type deleted_bytes, bool delete_entry);
1326 // EXIDX output section.
1327 Output_section* exidx_output_section_;
1328 // Unwind type of the last EXIDX entry processed.
1329 Unwind_type last_unwind_type_;
1330 // Last seen inlined EXIDX entry.
1331 uint32_t last_inlined_entry_;
1332 // Last processed EXIDX input section.
1333 const Arm_exidx_input_section* last_input_section_;
1334 // Section offset map created in process_exidx_section.
1335 Arm_exidx_section_offset_map* section_offset_map_;
1336 // Output section for the text section which is linked to the first exidx
1337 // input in output.
1338 Output_section* first_output_text_section_;
1340 bool merge_exidx_entries_;
1343 // Arm output section class. This is defined mainly to add a number of
1344 // stub generation methods.
1346 template<bool big_endian>
1347 class Arm_output_section : public Output_section
1349 public:
1350 typedef std::vector<std::pair<Relobj*, unsigned int> > Text_section_list;
1352 // We need to force SHF_LINK_ORDER in a SHT_ARM_EXIDX section.
1353 Arm_output_section(const char* name, elfcpp::Elf_Word type,
1354 elfcpp::Elf_Xword flags)
1355 : Output_section(name, type,
1356 (type == elfcpp::SHT_ARM_EXIDX
1357 ? flags | elfcpp::SHF_LINK_ORDER
1358 : flags))
1360 if (type == elfcpp::SHT_ARM_EXIDX)
1361 this->set_always_keeps_input_sections();
1364 ~Arm_output_section()
1367 // Group input sections for stub generation.
1368 void
1369 group_sections(section_size_type, bool, Target_arm<big_endian>*, const Task*);
1371 // Downcast a base pointer to an Arm_output_section pointer. This is
1372 // not type-safe but we only use Arm_output_section not the base class.
1373 static Arm_output_section<big_endian>*
1374 as_arm_output_section(Output_section* os)
1375 { return static_cast<Arm_output_section<big_endian>*>(os); }
1377 // Append all input text sections in this into LIST.
1378 void
1379 append_text_sections_to_list(Text_section_list* list);
1381 // Fix EXIDX coverage of this EXIDX output section. SORTED_TEXT_SECTION
1382 // is a list of text input sections sorted in ascending order of their
1383 // output addresses.
1384 void
1385 fix_exidx_coverage(Layout* layout,
1386 const Text_section_list& sorted_text_section,
1387 Symbol_table* symtab,
1388 bool merge_exidx_entries,
1389 const Task* task);
1391 // Link an EXIDX section into its corresponding text section.
1392 void
1393 set_exidx_section_link();
1395 private:
1396 // For convenience.
1397 typedef Output_section::Input_section Input_section;
1398 typedef Output_section::Input_section_list Input_section_list;
1400 // Create a stub group.
1401 void create_stub_group(Input_section_list::const_iterator,
1402 Input_section_list::const_iterator,
1403 Input_section_list::const_iterator,
1404 Target_arm<big_endian>*,
1405 std::vector<Output_relaxed_input_section*>*,
1406 const Task* task);
1409 // Arm_exidx_input_section class. This represents an EXIDX input section.
1411 class Arm_exidx_input_section
1413 public:
1414 static const section_offset_type invalid_offset =
1415 static_cast<section_offset_type>(-1);
1417 Arm_exidx_input_section(Relobj* relobj, unsigned int shndx,
1418 unsigned int link, uint32_t size,
1419 uint32_t addralign, uint32_t text_size)
1420 : relobj_(relobj), shndx_(shndx), link_(link), size_(size),
1421 addralign_(addralign), text_size_(text_size), has_errors_(false)
1424 ~Arm_exidx_input_section()
1427 // Accessors: This is a read-only class.
1429 // Return the object containing this EXIDX input section.
1430 Relobj*
1431 relobj() const
1432 { return this->relobj_; }
1434 // Return the section index of this EXIDX input section.
1435 unsigned int
1436 shndx() const
1437 { return this->shndx_; }
1439 // Return the section index of linked text section in the same object.
1440 unsigned int
1441 link() const
1442 { return this->link_; }
1444 // Return size of the EXIDX input section.
1445 uint32_t
1446 size() const
1447 { return this->size_; }
1449 // Return address alignment of EXIDX input section.
1450 uint32_t
1451 addralign() const
1452 { return this->addralign_; }
1454 // Return size of the associated text input section.
1455 uint32_t
1456 text_size() const
1457 { return this->text_size_; }
1459 // Whether there are any errors in the EXIDX input section.
1460 bool
1461 has_errors() const
1462 { return this->has_errors_; }
1464 // Set has-errors flag.
1465 void
1466 set_has_errors()
1467 { this->has_errors_ = true; }
1469 private:
1470 // Object containing this.
1471 Relobj* relobj_;
1472 // Section index of this.
1473 unsigned int shndx_;
1474 // text section linked to this in the same object.
1475 unsigned int link_;
1476 // Size of this. For ARM 32-bit is sufficient.
1477 uint32_t size_;
1478 // Address alignment of this. For ARM 32-bit is sufficient.
1479 uint32_t addralign_;
1480 // Size of associated text section.
1481 uint32_t text_size_;
1482 // Whether this has any errors.
1483 bool has_errors_;
1486 // Arm_relobj class.
1488 template<bool big_endian>
1489 class Arm_relobj : public Sized_relobj_file<32, big_endian>
1491 public:
1492 static const Arm_address invalid_address = static_cast<Arm_address>(-1);
1494 Arm_relobj(const std::string& name, Input_file* input_file, off_t offset,
1495 const typename elfcpp::Ehdr<32, big_endian>& ehdr)
1496 : Sized_relobj_file<32, big_endian>(name, input_file, offset, ehdr),
1497 stub_tables_(), local_symbol_is_thumb_function_(),
1498 attributes_section_data_(NULL), mapping_symbols_info_(),
1499 section_has_cortex_a8_workaround_(NULL), exidx_section_map_(),
1500 output_local_symbol_count_needs_update_(false),
1501 merge_flags_and_attributes_(true)
1504 ~Arm_relobj()
1505 { delete this->attributes_section_data_; }
1507 // Return the stub table of the SHNDX-th section if there is one.
1508 Stub_table<big_endian>*
1509 stub_table(unsigned int shndx) const
1511 gold_assert(shndx < this->stub_tables_.size());
1512 return this->stub_tables_[shndx];
1515 // Set STUB_TABLE to be the stub_table of the SHNDX-th section.
1516 void
1517 set_stub_table(unsigned int shndx, Stub_table<big_endian>* stub_table)
1519 gold_assert(shndx < this->stub_tables_.size());
1520 this->stub_tables_[shndx] = stub_table;
1523 // Whether a local symbol is a THUMB function. R_SYM is the symbol table
1524 // index. This is only valid after do_count_local_symbol is called.
1525 bool
1526 local_symbol_is_thumb_function(unsigned int r_sym) const
1528 gold_assert(r_sym < this->local_symbol_is_thumb_function_.size());
1529 return this->local_symbol_is_thumb_function_[r_sym];
1532 // Scan all relocation sections for stub generation.
1533 void
1534 scan_sections_for_stubs(Target_arm<big_endian>*, const Symbol_table*,
1535 const Layout*);
1537 // Convert regular input section with index SHNDX to a relaxed section.
1538 void
1539 convert_input_section_to_relaxed_section(unsigned shndx)
1541 // The stubs have relocations and we need to process them after writing
1542 // out the stubs. So relocation now must follow section write.
1543 this->set_section_offset(shndx, -1ULL);
1544 this->set_relocs_must_follow_section_writes();
1547 // Downcast a base pointer to an Arm_relobj pointer. This is
1548 // not type-safe but we only use Arm_relobj not the base class.
1549 static Arm_relobj<big_endian>*
1550 as_arm_relobj(Relobj* relobj)
1551 { return static_cast<Arm_relobj<big_endian>*>(relobj); }
1553 // Processor-specific flags in ELF file header. This is valid only after
1554 // reading symbols.
1555 elfcpp::Elf_Word
1556 processor_specific_flags() const
1557 { return this->processor_specific_flags_; }
1559 // Attribute section data This is the contents of the .ARM.attribute section
1560 // if there is one.
1561 const Attributes_section_data*
1562 attributes_section_data() const
1563 { return this->attributes_section_data_; }
1565 // Mapping symbol location.
1566 typedef std::pair<unsigned int, Arm_address> Mapping_symbol_position;
1568 // Functor for STL container.
1569 struct Mapping_symbol_position_less
1571 bool
1572 operator()(const Mapping_symbol_position& p1,
1573 const Mapping_symbol_position& p2) const
1575 return (p1.first < p2.first
1576 || (p1.first == p2.first && p1.second < p2.second));
1580 // We only care about the first character of a mapping symbol, so
1581 // we only store that instead of the whole symbol name.
1582 typedef std::map<Mapping_symbol_position, char,
1583 Mapping_symbol_position_less> Mapping_symbols_info;
1585 // Whether a section contains any Cortex-A8 workaround.
1586 bool
1587 section_has_cortex_a8_workaround(unsigned int shndx) const
1589 return (this->section_has_cortex_a8_workaround_ != NULL
1590 && (*this->section_has_cortex_a8_workaround_)[shndx]);
1593 // Mark a section that has Cortex-A8 workaround.
1594 void
1595 mark_section_for_cortex_a8_workaround(unsigned int shndx)
1597 if (this->section_has_cortex_a8_workaround_ == NULL)
1598 this->section_has_cortex_a8_workaround_ =
1599 new std::vector<bool>(this->shnum(), false);
1600 (*this->section_has_cortex_a8_workaround_)[shndx] = true;
1603 // Return the EXIDX section of an text section with index SHNDX or NULL
1604 // if the text section has no associated EXIDX section.
1605 const Arm_exidx_input_section*
1606 exidx_input_section_by_link(unsigned int shndx) const
1608 Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx);
1609 return ((p != this->exidx_section_map_.end()
1610 && p->second->link() == shndx)
1611 ? p->second
1612 : NULL);
1615 // Return the EXIDX section with index SHNDX or NULL if there is none.
1616 const Arm_exidx_input_section*
1617 exidx_input_section_by_shndx(unsigned shndx) const
1619 Exidx_section_map::const_iterator p = this->exidx_section_map_.find(shndx);
1620 return ((p != this->exidx_section_map_.end()
1621 && p->second->shndx() == shndx)
1622 ? p->second
1623 : NULL);
1626 // Whether output local symbol count needs updating.
1627 bool
1628 output_local_symbol_count_needs_update() const
1629 { return this->output_local_symbol_count_needs_update_; }
1631 // Set output_local_symbol_count_needs_update flag to be true.
1632 void
1633 set_output_local_symbol_count_needs_update()
1634 { this->output_local_symbol_count_needs_update_ = true; }
1636 // Update output local symbol count at the end of relaxation.
1637 void
1638 update_output_local_symbol_count();
1640 // Whether we want to merge processor-specific flags and attributes.
1641 bool
1642 merge_flags_and_attributes() const
1643 { return this->merge_flags_and_attributes_; }
1645 // Export list of EXIDX section indices.
1646 void
1647 get_exidx_shndx_list(std::vector<unsigned int>* list) const
1649 list->clear();
1650 for (Exidx_section_map::const_iterator p = this->exidx_section_map_.begin();
1651 p != this->exidx_section_map_.end();
1652 ++p)
1654 if (p->second->shndx() == p->first)
1655 list->push_back(p->first);
1657 // Sort list to make result independent of implementation of map.
1658 std::sort(list->begin(), list->end());
1661 protected:
1662 // Post constructor setup.
1663 void
1664 do_setup()
1666 // Call parent's setup method.
1667 Sized_relobj_file<32, big_endian>::do_setup();
1669 // Initialize look-up tables.
1670 Stub_table_list empty_stub_table_list(this->shnum(), NULL);
1671 this->stub_tables_.swap(empty_stub_table_list);
1674 // Count the local symbols.
1675 void
1676 do_count_local_symbols(Stringpool_template<char>*,
1677 Stringpool_template<char>*);
1679 void
1680 do_relocate_sections(
1681 const Symbol_table* symtab, const Layout* layout,
1682 const unsigned char* pshdrs, Output_file* of,
1683 typename Sized_relobj_file<32, big_endian>::Views* pivews);
1685 // Read the symbol information.
1686 void
1687 do_read_symbols(Read_symbols_data* sd);
1689 // Process relocs for garbage collection.
1690 void
1691 do_gc_process_relocs(Symbol_table*, Layout*, Read_relocs_data*);
1693 private:
1695 // Whether a section needs to be scanned for relocation stubs.
1696 bool
1697 section_needs_reloc_stub_scanning(const elfcpp::Shdr<32, big_endian>&,
1698 const Relobj::Output_sections&,
1699 const Symbol_table*, const unsigned char*);
1701 // Whether a section is a scannable text section.
1702 bool
1703 section_is_scannable(const elfcpp::Shdr<32, big_endian>&, unsigned int,
1704 const Output_section*, const Symbol_table*);
1706 // Whether a section needs to be scanned for the Cortex-A8 erratum.
1707 bool
1708 section_needs_cortex_a8_stub_scanning(const elfcpp::Shdr<32, big_endian>&,
1709 unsigned int, Output_section*,
1710 const Symbol_table*);
1712 // Scan a section for the Cortex-A8 erratum.
1713 void
1714 scan_section_for_cortex_a8_erratum(const elfcpp::Shdr<32, big_endian>&,
1715 unsigned int, Output_section*,
1716 Target_arm<big_endian>*);
1718 // Find the linked text section of an EXIDX section by looking at the
1719 // first relocation of the EXIDX section. PSHDR points to the section
1720 // headers of a relocation section and PSYMS points to the local symbols.
1721 // PSHNDX points to a location storing the text section index if found.
1722 // Return whether we can find the linked section.
1723 bool
1724 find_linked_text_section(const unsigned char* pshdr,
1725 const unsigned char* psyms, unsigned int* pshndx);
1728 // Make a new Arm_exidx_input_section object for EXIDX section with
1729 // index SHNDX and section header SHDR. TEXT_SHNDX is the section
1730 // index of the linked text section.
1731 void
1732 make_exidx_input_section(unsigned int shndx,
1733 const elfcpp::Shdr<32, big_endian>& shdr,
1734 unsigned int text_shndx,
1735 const elfcpp::Shdr<32, big_endian>& text_shdr);
1737 // Return the output address of either a plain input section or a
1738 // relaxed input section. SHNDX is the section index.
1739 Arm_address
1740 simple_input_section_output_address(unsigned int, Output_section*);
1742 typedef std::vector<Stub_table<big_endian>*> Stub_table_list;
1743 typedef Unordered_map<unsigned int, const Arm_exidx_input_section*>
1744 Exidx_section_map;
1746 // List of stub tables.
1747 Stub_table_list stub_tables_;
1748 // Bit vector to tell if a local symbol is a thumb function or not.
1749 // This is only valid after do_count_local_symbol is called.
1750 std::vector<bool> local_symbol_is_thumb_function_;
1751 // processor-specific flags in ELF file header.
1752 elfcpp::Elf_Word processor_specific_flags_;
1753 // Object attributes if there is an .ARM.attributes section or NULL.
1754 Attributes_section_data* attributes_section_data_;
1755 // Mapping symbols information.
1756 Mapping_symbols_info mapping_symbols_info_;
1757 // Bitmap to indicate sections with Cortex-A8 workaround or NULL.
1758 std::vector<bool>* section_has_cortex_a8_workaround_;
1759 // Map a text section to its associated .ARM.exidx section, if there is one.
1760 Exidx_section_map exidx_section_map_;
1761 // Whether output local symbol count needs updating.
1762 bool output_local_symbol_count_needs_update_;
1763 // Whether we merge processor flags and attributes of this object to
1764 // output.
1765 bool merge_flags_and_attributes_;
1768 // Arm_dynobj class.
1770 template<bool big_endian>
1771 class Arm_dynobj : public Sized_dynobj<32, big_endian>
1773 public:
1774 Arm_dynobj(const std::string& name, Input_file* input_file, off_t offset,
1775 const elfcpp::Ehdr<32, big_endian>& ehdr)
1776 : Sized_dynobj<32, big_endian>(name, input_file, offset, ehdr),
1777 processor_specific_flags_(0), attributes_section_data_(NULL)
1780 ~Arm_dynobj()
1781 { delete this->attributes_section_data_; }
1783 // Downcast a base pointer to an Arm_relobj pointer. This is
1784 // not type-safe but we only use Arm_relobj not the base class.
1785 static Arm_dynobj<big_endian>*
1786 as_arm_dynobj(Dynobj* dynobj)
1787 { return static_cast<Arm_dynobj<big_endian>*>(dynobj); }
1789 // Processor-specific flags in ELF file header. This is valid only after
1790 // reading symbols.
1791 elfcpp::Elf_Word
1792 processor_specific_flags() const
1793 { return this->processor_specific_flags_; }
1795 // Attributes section data.
1796 const Attributes_section_data*
1797 attributes_section_data() const
1798 { return this->attributes_section_data_; }
1800 protected:
1801 // Read the symbol information.
1802 void
1803 do_read_symbols(Read_symbols_data* sd);
1805 private:
1806 // processor-specific flags in ELF file header.
1807 elfcpp::Elf_Word processor_specific_flags_;
1808 // Object attributes if there is an .ARM.attributes section or NULL.
1809 Attributes_section_data* attributes_section_data_;
1812 // Functor to read reloc addends during stub generation.
1814 template<int sh_type, bool big_endian>
1815 struct Stub_addend_reader
1817 // Return the addend for a relocation of a particular type. Depending
1818 // on whether this is a REL or RELA relocation, read the addend from a
1819 // view or from a Reloc object.
1820 elfcpp::Elf_types<32>::Elf_Swxword
1821 operator()(
1822 unsigned int /* r_type */,
1823 const unsigned char* /* view */,
1824 const typename Reloc_types<sh_type,
1825 32, big_endian>::Reloc& /* reloc */) const;
1828 // Specialized Stub_addend_reader for SHT_REL type relocation sections.
1830 template<bool big_endian>
1831 struct Stub_addend_reader<elfcpp::SHT_REL, big_endian>
1833 elfcpp::Elf_types<32>::Elf_Swxword
1834 operator()(
1835 unsigned int,
1836 const unsigned char*,
1837 const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const;
1840 // Specialized Stub_addend_reader for RELA type relocation sections.
1841 // We currently do not handle RELA type relocation sections but it is trivial
1842 // to implement the addend reader. This is provided for completeness and to
1843 // make it easier to add support for RELA relocation sections in the future.
1845 template<bool big_endian>
1846 struct Stub_addend_reader<elfcpp::SHT_RELA, big_endian>
1848 elfcpp::Elf_types<32>::Elf_Swxword
1849 operator()(
1850 unsigned int,
1851 const unsigned char*,
1852 const typename Reloc_types<elfcpp::SHT_RELA, 32,
1853 big_endian>::Reloc& reloc) const
1854 { return reloc.get_r_addend(); }
1857 // Cortex_a8_reloc class. We keep record of relocation that may need
1858 // the Cortex-A8 erratum workaround.
1860 class Cortex_a8_reloc
1862 public:
1863 Cortex_a8_reloc(Reloc_stub* reloc_stub, unsigned r_type,
1864 Arm_address destination)
1865 : reloc_stub_(reloc_stub), r_type_(r_type), destination_(destination)
1868 ~Cortex_a8_reloc()
1871 // Accessors: This is a read-only class.
1873 // Return the relocation stub associated with this relocation if there is
1874 // one.
1875 const Reloc_stub*
1876 reloc_stub() const
1877 { return this->reloc_stub_; }
1879 // Return the relocation type.
1880 unsigned int
1881 r_type() const
1882 { return this->r_type_; }
1884 // Return the destination address of the relocation. LSB stores the THUMB
1885 // bit.
1886 Arm_address
1887 destination() const
1888 { return this->destination_; }
1890 private:
1891 // Associated relocation stub if there is one, or NULL.
1892 const Reloc_stub* reloc_stub_;
1893 // Relocation type.
1894 unsigned int r_type_;
1895 // Destination address of this relocation. LSB is used to distinguish
1896 // ARM/THUMB mode.
1897 Arm_address destination_;
1900 // Arm_output_data_got class. We derive this from Output_data_got to add
1901 // extra methods to handle TLS relocations in a static link.
1903 template<bool big_endian>
1904 class Arm_output_data_got : public Output_data_got<32, big_endian>
1906 public:
1907 Arm_output_data_got(Symbol_table* symtab, Layout* layout)
1908 : Output_data_got<32, big_endian>(), symbol_table_(symtab), layout_(layout)
1911 // Add a static entry for the GOT entry at OFFSET. GSYM is a global
1912 // symbol and R_TYPE is the code of a dynamic relocation that needs to be
1913 // applied in a static link.
1914 void
1915 add_static_reloc(unsigned int got_offset, unsigned int r_type, Symbol* gsym)
1916 { this->static_relocs_.push_back(Static_reloc(got_offset, r_type, gsym)); }
1918 // Add a static reloc for the GOT entry at OFFSET. RELOBJ is an object
1919 // defining a local symbol with INDEX. R_TYPE is the code of a dynamic
1920 // relocation that needs to be applied in a static link.
1921 void
1922 add_static_reloc(unsigned int got_offset, unsigned int r_type,
1923 Sized_relobj_file<32, big_endian>* relobj,
1924 unsigned int index)
1926 this->static_relocs_.push_back(Static_reloc(got_offset, r_type, relobj,
1927 index));
1930 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
1931 // The first one is initialized to be 1, which is the module index for
1932 // the main executable and the second one 0. A reloc of the type
1933 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
1934 // be applied by gold. GSYM is a global symbol.
1935 void
1936 add_tls_gd32_with_static_reloc(unsigned int got_type, Symbol* gsym);
1938 // Same as the above but for a local symbol in OBJECT with INDEX.
1939 void
1940 add_tls_gd32_with_static_reloc(unsigned int got_type,
1941 Sized_relobj_file<32, big_endian>* object,
1942 unsigned int index);
1944 protected:
1945 // Write out the GOT table.
1946 void
1947 do_write(Output_file*);
1949 private:
1950 // This class represent dynamic relocations that need to be applied by
1951 // gold because we are using TLS relocations in a static link.
1952 class Static_reloc
1954 public:
1955 Static_reloc(unsigned int got_offset, unsigned int r_type, Symbol* gsym)
1956 : got_offset_(got_offset), r_type_(r_type), symbol_is_global_(true)
1957 { this->u_.global.symbol = gsym; }
1959 Static_reloc(unsigned int got_offset, unsigned int r_type,
1960 Sized_relobj_file<32, big_endian>* relobj, unsigned int index)
1961 : got_offset_(got_offset), r_type_(r_type), symbol_is_global_(false)
1963 this->u_.local.relobj = relobj;
1964 this->u_.local.index = index;
1967 // Return the GOT offset.
1968 unsigned int
1969 got_offset() const
1970 { return this->got_offset_; }
1972 // Relocation type.
1973 unsigned int
1974 r_type() const
1975 { return this->r_type_; }
1977 // Whether the symbol is global or not.
1978 bool
1979 symbol_is_global() const
1980 { return this->symbol_is_global_; }
1982 // For a relocation against a global symbol, the global symbol.
1983 Symbol*
1984 symbol() const
1986 gold_assert(this->symbol_is_global_);
1987 return this->u_.global.symbol;
1990 // For a relocation against a local symbol, the defining object.
1991 Sized_relobj_file<32, big_endian>*
1992 relobj() const
1994 gold_assert(!this->symbol_is_global_);
1995 return this->u_.local.relobj;
1998 // For a relocation against a local symbol, the local symbol index.
1999 unsigned int
2000 index() const
2002 gold_assert(!this->symbol_is_global_);
2003 return this->u_.local.index;
2006 private:
2007 // GOT offset of the entry to which this relocation is applied.
2008 unsigned int got_offset_;
2009 // Type of relocation.
2010 unsigned int r_type_;
2011 // Whether this relocation is against a global symbol.
2012 bool symbol_is_global_;
2013 // A global or local symbol.
2014 union
2016 struct
2018 // For a global symbol, the symbol itself.
2019 Symbol* symbol;
2020 } global;
2021 struct
2023 // For a local symbol, the object defining object.
2024 Sized_relobj_file<32, big_endian>* relobj;
2025 // For a local symbol, the symbol index.
2026 unsigned int index;
2027 } local;
2028 } u_;
2031 // Symbol table of the output object.
2032 Symbol_table* symbol_table_;
2033 // Layout of the output object.
2034 Layout* layout_;
2035 // Static relocs to be applied to the GOT.
2036 std::vector<Static_reloc> static_relocs_;
2039 // The ARM target has many relocation types with odd-sizes or noncontiguous
2040 // bits. The default handling of relocatable relocation cannot process these
2041 // relocations. So we have to extend the default code.
2043 template<bool big_endian, typename Classify_reloc>
2044 class Arm_scan_relocatable_relocs :
2045 public Default_scan_relocatable_relocs<Classify_reloc>
2047 public:
2048 // Return the strategy to use for a local symbol which is a section
2049 // symbol, given the relocation type.
2050 inline Relocatable_relocs::Reloc_strategy
2051 local_section_strategy(unsigned int r_type, Relobj*)
2053 if (Classify_reloc::sh_type == elfcpp::SHT_RELA)
2054 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_RELA;
2055 else
2057 if (r_type == elfcpp::R_ARM_TARGET1
2058 || r_type == elfcpp::R_ARM_TARGET2)
2060 const Target_arm<big_endian>* arm_target =
2061 Target_arm<big_endian>::default_target();
2062 r_type = arm_target->get_real_reloc_type(r_type);
2065 switch(r_type)
2067 // Relocations that write nothing. These exclude R_ARM_TARGET1
2068 // and R_ARM_TARGET2.
2069 case elfcpp::R_ARM_NONE:
2070 case elfcpp::R_ARM_V4BX:
2071 case elfcpp::R_ARM_TLS_GOTDESC:
2072 case elfcpp::R_ARM_TLS_CALL:
2073 case elfcpp::R_ARM_TLS_DESCSEQ:
2074 case elfcpp::R_ARM_THM_TLS_CALL:
2075 case elfcpp::R_ARM_GOTRELAX:
2076 case elfcpp::R_ARM_GNU_VTENTRY:
2077 case elfcpp::R_ARM_GNU_VTINHERIT:
2078 case elfcpp::R_ARM_THM_TLS_DESCSEQ16:
2079 case elfcpp::R_ARM_THM_TLS_DESCSEQ32:
2080 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_0;
2081 // These should have been converted to something else above.
2082 case elfcpp::R_ARM_TARGET1:
2083 case elfcpp::R_ARM_TARGET2:
2084 gold_unreachable();
2085 // Relocations that write full 32 bits and
2086 // have alignment of 1.
2087 case elfcpp::R_ARM_ABS32:
2088 case elfcpp::R_ARM_REL32:
2089 case elfcpp::R_ARM_SBREL32:
2090 case elfcpp::R_ARM_GOTOFF32:
2091 case elfcpp::R_ARM_BASE_PREL:
2092 case elfcpp::R_ARM_GOT_BREL:
2093 case elfcpp::R_ARM_BASE_ABS:
2094 case elfcpp::R_ARM_ABS32_NOI:
2095 case elfcpp::R_ARM_REL32_NOI:
2096 case elfcpp::R_ARM_PLT32_ABS:
2097 case elfcpp::R_ARM_GOT_ABS:
2098 case elfcpp::R_ARM_GOT_PREL:
2099 case elfcpp::R_ARM_TLS_GD32:
2100 case elfcpp::R_ARM_TLS_LDM32:
2101 case elfcpp::R_ARM_TLS_LDO32:
2102 case elfcpp::R_ARM_TLS_IE32:
2103 case elfcpp::R_ARM_TLS_LE32:
2104 return Relocatable_relocs::RELOC_ADJUST_FOR_SECTION_4_UNALIGNED;
2105 default:
2106 // For all other static relocations, return RELOC_SPECIAL.
2107 return Relocatable_relocs::RELOC_SPECIAL;
2113 template<bool big_endian>
2114 class Target_arm : public Sized_target<32, big_endian>
2116 public:
2117 typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian>
2118 Reloc_section;
2120 // When were are relocating a stub, we pass this as the relocation number.
2121 static const size_t fake_relnum_for_stubs = static_cast<size_t>(-1);
2123 Target_arm(const Target::Target_info* info = &arm_info)
2124 : Sized_target<32, big_endian>(info),
2125 got_(NULL), plt_(NULL), got_plt_(NULL), got_irelative_(NULL),
2126 rel_dyn_(NULL), rel_irelative_(NULL), copy_relocs_(elfcpp::R_ARM_COPY),
2127 got_mod_index_offset_(-1U), tls_base_symbol_defined_(false),
2128 stub_tables_(), stub_factory_(Stub_factory::get_instance()),
2129 should_force_pic_veneer_(false),
2130 arm_input_section_map_(), attributes_section_data_(NULL),
2131 fix_cortex_a8_(false), cortex_a8_relocs_info_(),
2132 target1_reloc_(elfcpp::R_ARM_ABS32),
2133 // This can be any reloc type but usually is R_ARM_GOT_PREL.
2134 target2_reloc_(elfcpp::R_ARM_GOT_PREL)
2137 // Whether we force PCI branch veneers.
2138 bool
2139 should_force_pic_veneer() const
2140 { return this->should_force_pic_veneer_; }
2142 // Set PIC veneer flag.
2143 void
2144 set_should_force_pic_veneer(bool value)
2145 { this->should_force_pic_veneer_ = value; }
2147 // Whether we use THUMB-2 instructions.
2148 bool
2149 using_thumb2() const
2151 Object_attribute* attr =
2152 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2153 int arch = attr->int_value();
2154 return arch == elfcpp::TAG_CPU_ARCH_V6T2 || arch >= elfcpp::TAG_CPU_ARCH_V7;
2157 // Whether we use THUMB/THUMB-2 instructions only.
2158 bool
2159 using_thumb_only() const
2161 Object_attribute* attr =
2162 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2164 if (attr->int_value() == elfcpp::TAG_CPU_ARCH_V6_M
2165 || attr->int_value() == elfcpp::TAG_CPU_ARCH_V6S_M)
2166 return true;
2167 if (attr->int_value() != elfcpp::TAG_CPU_ARCH_V7
2168 && attr->int_value() != elfcpp::TAG_CPU_ARCH_V7E_M)
2169 return false;
2170 attr = this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile);
2171 return attr->int_value() == 'M';
2174 // Whether we have an NOP instruction. If not, use mov r0, r0 instead.
2175 bool
2176 may_use_arm_nop() const
2178 Object_attribute* attr =
2179 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2180 int arch = attr->int_value();
2181 return (arch == elfcpp::TAG_CPU_ARCH_V6T2
2182 || arch == elfcpp::TAG_CPU_ARCH_V6K
2183 || arch == elfcpp::TAG_CPU_ARCH_V7
2184 || arch == elfcpp::TAG_CPU_ARCH_V7E_M);
2187 // Whether we have THUMB-2 NOP.W instruction.
2188 bool
2189 may_use_thumb2_nop() const
2191 Object_attribute* attr =
2192 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2193 int arch = attr->int_value();
2194 return (arch == elfcpp::TAG_CPU_ARCH_V6T2
2195 || arch == elfcpp::TAG_CPU_ARCH_V7
2196 || arch == elfcpp::TAG_CPU_ARCH_V7E_M);
2199 // Whether we have v4T interworking instructions available.
2200 bool
2201 may_use_v4t_interworking() const
2203 Object_attribute* attr =
2204 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2205 int arch = attr->int_value();
2206 return (arch != elfcpp::TAG_CPU_ARCH_PRE_V4
2207 && arch != elfcpp::TAG_CPU_ARCH_V4);
2210 // Whether we have v5T interworking instructions available.
2211 bool
2212 may_use_v5t_interworking() const
2214 Object_attribute* attr =
2215 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
2216 int arch = attr->int_value();
2217 if (parameters->options().fix_arm1176())
2218 return (arch == elfcpp::TAG_CPU_ARCH_V6T2
2219 || arch == elfcpp::TAG_CPU_ARCH_V7
2220 || arch == elfcpp::TAG_CPU_ARCH_V6_M
2221 || arch == elfcpp::TAG_CPU_ARCH_V6S_M
2222 || arch == elfcpp::TAG_CPU_ARCH_V7E_M);
2223 else
2224 return (arch != elfcpp::TAG_CPU_ARCH_PRE_V4
2225 && arch != elfcpp::TAG_CPU_ARCH_V4
2226 && arch != elfcpp::TAG_CPU_ARCH_V4T);
2229 // Process the relocations to determine unreferenced sections for
2230 // garbage collection.
2231 void
2232 gc_process_relocs(Symbol_table* symtab,
2233 Layout* layout,
2234 Sized_relobj_file<32, big_endian>* object,
2235 unsigned int data_shndx,
2236 unsigned int sh_type,
2237 const unsigned char* prelocs,
2238 size_t reloc_count,
2239 Output_section* output_section,
2240 bool needs_special_offset_handling,
2241 size_t local_symbol_count,
2242 const unsigned char* plocal_symbols);
2244 // Scan the relocations to look for symbol adjustments.
2245 void
2246 scan_relocs(Symbol_table* symtab,
2247 Layout* layout,
2248 Sized_relobj_file<32, big_endian>* object,
2249 unsigned int data_shndx,
2250 unsigned int sh_type,
2251 const unsigned char* prelocs,
2252 size_t reloc_count,
2253 Output_section* output_section,
2254 bool needs_special_offset_handling,
2255 size_t local_symbol_count,
2256 const unsigned char* plocal_symbols);
2258 // Finalize the sections.
2259 void
2260 do_finalize_sections(Layout*, const Input_objects*, Symbol_table*);
2262 // Return the value to use for a dynamic symbol which requires special
2263 // treatment.
2264 uint64_t
2265 do_dynsym_value(const Symbol*) const;
2267 // Return the plt address for globals. Since we have irelative plt entries,
2268 // address calculation is not as straightforward as plt_address + plt_offset.
2269 uint64_t
2270 do_plt_address_for_global(const Symbol* gsym) const
2271 { return this->plt_section()->address_for_global(gsym); }
2273 // Return the plt address for locals. Since we have irelative plt entries,
2274 // address calculation is not as straightforward as plt_address + plt_offset.
2275 uint64_t
2276 do_plt_address_for_local(const Relobj* relobj, unsigned int symndx) const
2277 { return this->plt_section()->address_for_local(relobj, symndx); }
2279 // Relocate a section.
2280 void
2281 relocate_section(const Relocate_info<32, big_endian>*,
2282 unsigned int sh_type,
2283 const unsigned char* prelocs,
2284 size_t reloc_count,
2285 Output_section* output_section,
2286 bool needs_special_offset_handling,
2287 unsigned char* view,
2288 Arm_address view_address,
2289 section_size_type view_size,
2290 const Reloc_symbol_changes*);
2292 // Scan the relocs during a relocatable link.
2293 void
2294 scan_relocatable_relocs(Symbol_table* symtab,
2295 Layout* layout,
2296 Sized_relobj_file<32, big_endian>* object,
2297 unsigned int data_shndx,
2298 unsigned int sh_type,
2299 const unsigned char* prelocs,
2300 size_t reloc_count,
2301 Output_section* output_section,
2302 bool needs_special_offset_handling,
2303 size_t local_symbol_count,
2304 const unsigned char* plocal_symbols,
2305 Relocatable_relocs*);
2307 // Scan the relocs for --emit-relocs.
2308 void
2309 emit_relocs_scan(Symbol_table* symtab,
2310 Layout* layout,
2311 Sized_relobj_file<32, big_endian>* object,
2312 unsigned int data_shndx,
2313 unsigned int sh_type,
2314 const unsigned char* prelocs,
2315 size_t reloc_count,
2316 Output_section* output_section,
2317 bool needs_special_offset_handling,
2318 size_t local_symbol_count,
2319 const unsigned char* plocal_syms,
2320 Relocatable_relocs* rr);
2322 // Emit relocations for a section.
2323 void
2324 relocate_relocs(const Relocate_info<32, big_endian>*,
2325 unsigned int sh_type,
2326 const unsigned char* prelocs,
2327 size_t reloc_count,
2328 Output_section* output_section,
2329 typename elfcpp::Elf_types<32>::Elf_Off
2330 offset_in_output_section,
2331 unsigned char* view,
2332 Arm_address view_address,
2333 section_size_type view_size,
2334 unsigned char* reloc_view,
2335 section_size_type reloc_view_size);
2337 // Perform target-specific processing in a relocatable link. This is
2338 // only used if we use the relocation strategy RELOC_SPECIAL.
2339 void
2340 relocate_special_relocatable(const Relocate_info<32, big_endian>* relinfo,
2341 unsigned int sh_type,
2342 const unsigned char* preloc_in,
2343 size_t relnum,
2344 Output_section* output_section,
2345 typename elfcpp::Elf_types<32>::Elf_Off
2346 offset_in_output_section,
2347 unsigned char* view,
2348 typename elfcpp::Elf_types<32>::Elf_Addr
2349 view_address,
2350 section_size_type view_size,
2351 unsigned char* preloc_out);
2353 // Return whether SYM is defined by the ABI.
2354 bool
2355 do_is_defined_by_abi(const Symbol* sym) const
2356 { return strcmp(sym->name(), "__tls_get_addr") == 0; }
2358 // Return whether there is a GOT section.
2359 bool
2360 has_got_section() const
2361 { return this->got_ != NULL; }
2363 // Return the size of the GOT section.
2364 section_size_type
2365 got_size() const
2367 gold_assert(this->got_ != NULL);
2368 return this->got_->data_size();
2371 // Return the number of entries in the GOT.
2372 unsigned int
2373 got_entry_count() const
2375 if (!this->has_got_section())
2376 return 0;
2377 return this->got_size() / 4;
2380 // Return the number of entries in the PLT.
2381 unsigned int
2382 plt_entry_count() const;
2384 // Return the offset of the first non-reserved PLT entry.
2385 unsigned int
2386 first_plt_entry_offset() const;
2388 // Return the size of each PLT entry.
2389 unsigned int
2390 plt_entry_size() const;
2392 // Get the section to use for IRELATIVE relocations, create it if necessary.
2393 Reloc_section*
2394 rel_irelative_section(Layout*);
2396 // Map platform-specific reloc types
2397 unsigned int
2398 get_real_reloc_type(unsigned int r_type) const;
2401 // Methods to support stub-generations.
2404 // Return the stub factory
2405 const Stub_factory&
2406 stub_factory() const
2407 { return this->stub_factory_; }
2409 // Make a new Arm_input_section object.
2410 Arm_input_section<big_endian>*
2411 new_arm_input_section(Relobj*, unsigned int);
2413 // Find the Arm_input_section object corresponding to the SHNDX-th input
2414 // section of RELOBJ.
2415 Arm_input_section<big_endian>*
2416 find_arm_input_section(Relobj* relobj, unsigned int shndx) const;
2418 // Make a new Stub_table
2419 Stub_table<big_endian>*
2420 new_stub_table(Arm_input_section<big_endian>*);
2422 // Scan a section for stub generation.
2423 void
2424 scan_section_for_stubs(const Relocate_info<32, big_endian>*, unsigned int,
2425 const unsigned char*, size_t, Output_section*,
2426 bool, const unsigned char*, Arm_address,
2427 section_size_type);
2429 // Relocate a stub.
2430 void
2431 relocate_stub(Stub*, const Relocate_info<32, big_endian>*,
2432 Output_section*, unsigned char*, Arm_address,
2433 section_size_type);
2435 // Get the default ARM target.
2436 static Target_arm<big_endian>*
2437 default_target()
2439 gold_assert(parameters->target().machine_code() == elfcpp::EM_ARM
2440 && parameters->target().is_big_endian() == big_endian);
2441 return static_cast<Target_arm<big_endian>*>(
2442 parameters->sized_target<32, big_endian>());
2445 // Whether NAME belongs to a mapping symbol.
2446 static bool
2447 is_mapping_symbol_name(const char* name)
2449 return (name
2450 && name[0] == '$'
2451 && (name[1] == 'a' || name[1] == 't' || name[1] == 'd')
2452 && (name[2] == '\0' || name[2] == '.'));
2455 // Whether we work around the Cortex-A8 erratum.
2456 bool
2457 fix_cortex_a8() const
2458 { return this->fix_cortex_a8_; }
2460 // Whether we merge exidx entries in debuginfo.
2461 bool
2462 merge_exidx_entries() const
2463 { return parameters->options().merge_exidx_entries(); }
2465 // Whether we fix R_ARM_V4BX relocation.
2466 // 0 - do not fix
2467 // 1 - replace with MOV instruction (armv4 target)
2468 // 2 - make interworking veneer (>= armv4t targets only)
2469 General_options::Fix_v4bx
2470 fix_v4bx() const
2471 { return parameters->options().fix_v4bx(); }
2473 // Scan a span of THUMB code section for Cortex-A8 erratum.
2474 void
2475 scan_span_for_cortex_a8_erratum(Arm_relobj<big_endian>*, unsigned int,
2476 section_size_type, section_size_type,
2477 const unsigned char*, Arm_address);
2479 // Apply Cortex-A8 workaround to a branch.
2480 void
2481 apply_cortex_a8_workaround(const Cortex_a8_stub*, Arm_address,
2482 unsigned char*, Arm_address);
2484 protected:
2485 // Make the PLT-generator object.
2486 Output_data_plt_arm<big_endian>*
2487 make_data_plt(Layout* layout,
2488 Arm_output_data_got<big_endian>* got,
2489 Output_data_space* got_plt,
2490 Output_data_space* got_irelative)
2491 { return this->do_make_data_plt(layout, got, got_plt, got_irelative); }
2493 // Make an ELF object.
2494 Object*
2495 do_make_elf_object(const std::string&, Input_file*, off_t,
2496 const elfcpp::Ehdr<32, big_endian>& ehdr);
2498 Object*
2499 do_make_elf_object(const std::string&, Input_file*, off_t,
2500 const elfcpp::Ehdr<32, !big_endian>&)
2501 { gold_unreachable(); }
2503 Object*
2504 do_make_elf_object(const std::string&, Input_file*, off_t,
2505 const elfcpp::Ehdr<64, false>&)
2506 { gold_unreachable(); }
2508 Object*
2509 do_make_elf_object(const std::string&, Input_file*, off_t,
2510 const elfcpp::Ehdr<64, true>&)
2511 { gold_unreachable(); }
2513 // Make an output section.
2514 Output_section*
2515 do_make_output_section(const char* name, elfcpp::Elf_Word type,
2516 elfcpp::Elf_Xword flags)
2517 { return new Arm_output_section<big_endian>(name, type, flags); }
2519 void
2520 do_adjust_elf_header(unsigned char* view, int len);
2522 // We only need to generate stubs, and hence perform relaxation if we are
2523 // not doing relocatable linking.
2524 bool
2525 do_may_relax() const
2526 { return !parameters->options().relocatable(); }
2528 bool
2529 do_relax(int, const Input_objects*, Symbol_table*, Layout*, const Task*);
2531 // Determine whether an object attribute tag takes an integer, a
2532 // string or both.
2534 do_attribute_arg_type(int tag) const;
2536 // Reorder tags during output.
2538 do_attributes_order(int num) const;
2540 // This is called when the target is selected as the default.
2541 void
2542 do_select_as_default_target()
2544 // No locking is required since there should only be one default target.
2545 // We cannot have both the big-endian and little-endian ARM targets
2546 // as the default.
2547 gold_assert(arm_reloc_property_table == NULL);
2548 arm_reloc_property_table = new Arm_reloc_property_table();
2549 if (parameters->options().user_set_target1_rel())
2551 // FIXME: This is not strictly compatible with ld, which allows both
2552 // --target1-abs and --target-rel to be given.
2553 if (parameters->options().user_set_target1_abs())
2554 gold_error(_("Cannot use both --target1-abs and --target1-rel."));
2555 else
2556 this->target1_reloc_ = elfcpp::R_ARM_REL32;
2558 // We don't need to handle --target1-abs because target1_reloc_ is set
2559 // to elfcpp::R_ARM_ABS32 in the member initializer list.
2561 if (parameters->options().user_set_target2())
2563 const char* target2 = parameters->options().target2();
2564 if (strcmp(target2, "rel") == 0)
2565 this->target2_reloc_ = elfcpp::R_ARM_REL32;
2566 else if (strcmp(target2, "abs") == 0)
2567 this->target2_reloc_ = elfcpp::R_ARM_ABS32;
2568 else if (strcmp(target2, "got-rel") == 0)
2569 this->target2_reloc_ = elfcpp::R_ARM_GOT_PREL;
2570 else
2571 gold_unreachable();
2575 // Virtual function which is set to return true by a target if
2576 // it can use relocation types to determine if a function's
2577 // pointer is taken.
2578 virtual bool
2579 do_can_check_for_function_pointers() const
2580 { return true; }
2582 // Whether a section called SECTION_NAME may have function pointers to
2583 // sections not eligible for safe ICF folding.
2584 virtual bool
2585 do_section_may_have_icf_unsafe_pointers(const char* section_name) const
2587 return (!is_prefix_of(".ARM.exidx", section_name)
2588 && !is_prefix_of(".ARM.extab", section_name)
2589 && Target::do_section_may_have_icf_unsafe_pointers(section_name));
2592 virtual void
2593 do_define_standard_symbols(Symbol_table*, Layout*);
2595 virtual Output_data_plt_arm<big_endian>*
2596 do_make_data_plt(Layout* layout,
2597 Arm_output_data_got<big_endian>* got,
2598 Output_data_space* got_plt,
2599 Output_data_space* got_irelative)
2601 gold_assert(got_plt != NULL && got_irelative != NULL);
2602 if (parameters->options().long_plt())
2603 return new Output_data_plt_arm_long<big_endian>(
2604 layout, got, got_plt, got_irelative);
2605 else
2606 return new Output_data_plt_arm_short<big_endian>(
2607 layout, got, got_plt, got_irelative);
2610 private:
2611 // The class which scans relocations.
2612 class Scan
2614 public:
2615 Scan()
2616 : issued_non_pic_error_(false)
2619 static inline int
2620 get_reference_flags(unsigned int r_type);
2622 inline void
2623 local(Symbol_table* symtab, Layout* layout, Target_arm* target,
2624 Sized_relobj_file<32, big_endian>* object,
2625 unsigned int data_shndx,
2626 Output_section* output_section,
2627 const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type,
2628 const elfcpp::Sym<32, big_endian>& lsym,
2629 bool is_discarded);
2631 inline void
2632 global(Symbol_table* symtab, Layout* layout, Target_arm* target,
2633 Sized_relobj_file<32, big_endian>* object,
2634 unsigned int data_shndx,
2635 Output_section* output_section,
2636 const elfcpp::Rel<32, big_endian>& reloc, unsigned int r_type,
2637 Symbol* gsym);
2639 inline bool
2640 local_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_arm* ,
2641 Sized_relobj_file<32, big_endian>* ,
2642 unsigned int ,
2643 Output_section* ,
2644 const elfcpp::Rel<32, big_endian>& ,
2645 unsigned int ,
2646 const elfcpp::Sym<32, big_endian>&);
2648 inline bool
2649 global_reloc_may_be_function_pointer(Symbol_table* , Layout* , Target_arm* ,
2650 Sized_relobj_file<32, big_endian>* ,
2651 unsigned int ,
2652 Output_section* ,
2653 const elfcpp::Rel<32, big_endian>& ,
2654 unsigned int , Symbol*);
2656 private:
2657 static void
2658 unsupported_reloc_local(Sized_relobj_file<32, big_endian>*,
2659 unsigned int r_type);
2661 static void
2662 unsupported_reloc_global(Sized_relobj_file<32, big_endian>*,
2663 unsigned int r_type, Symbol*);
2665 void
2666 check_non_pic(Relobj*, unsigned int r_type);
2668 // Almost identical to Symbol::needs_plt_entry except that it also
2669 // handles STT_ARM_TFUNC.
2670 static bool
2671 symbol_needs_plt_entry(const Symbol* sym)
2673 // An undefined symbol from an executable does not need a PLT entry.
2674 if (sym->is_undefined() && !parameters->options().shared())
2675 return false;
2677 if (sym->type() == elfcpp::STT_GNU_IFUNC)
2678 return true;
2680 return (!parameters->doing_static_link()
2681 && (sym->type() == elfcpp::STT_FUNC
2682 || sym->type() == elfcpp::STT_ARM_TFUNC)
2683 && (sym->is_from_dynobj()
2684 || sym->is_undefined()
2685 || sym->is_preemptible()));
2688 inline bool
2689 possible_function_pointer_reloc(unsigned int r_type);
2691 // Whether a plt entry is needed for ifunc.
2692 bool
2693 reloc_needs_plt_for_ifunc(Sized_relobj_file<32, big_endian>*,
2694 unsigned int r_type);
2696 // Whether we have issued an error about a non-PIC compilation.
2697 bool issued_non_pic_error_;
2700 // The class which implements relocation.
2701 class Relocate
2703 public:
2704 Relocate()
2707 ~Relocate()
2710 // Return whether the static relocation needs to be applied.
2711 inline bool
2712 should_apply_static_reloc(const Sized_symbol<32>* gsym,
2713 unsigned int r_type,
2714 bool is_32bit,
2715 Output_section* output_section);
2717 // Do a relocation. Return false if the caller should not issue
2718 // any warnings about this relocation.
2719 inline bool
2720 relocate(const Relocate_info<32, big_endian>*, unsigned int,
2721 Target_arm*, Output_section*, size_t, const unsigned char*,
2722 const Sized_symbol<32>*, const Symbol_value<32>*,
2723 unsigned char*, Arm_address, section_size_type);
2725 // Return whether we want to pass flag NON_PIC_REF for this
2726 // reloc. This means the relocation type accesses a symbol not via
2727 // GOT or PLT.
2728 static inline bool
2729 reloc_is_non_pic(unsigned int r_type)
2731 switch (r_type)
2733 // These relocation types reference GOT or PLT entries explicitly.
2734 case elfcpp::R_ARM_GOT_BREL:
2735 case elfcpp::R_ARM_GOT_ABS:
2736 case elfcpp::R_ARM_GOT_PREL:
2737 case elfcpp::R_ARM_GOT_BREL12:
2738 case elfcpp::R_ARM_PLT32_ABS:
2739 case elfcpp::R_ARM_TLS_GD32:
2740 case elfcpp::R_ARM_TLS_LDM32:
2741 case elfcpp::R_ARM_TLS_IE32:
2742 case elfcpp::R_ARM_TLS_IE12GP:
2744 // These relocate types may use PLT entries.
2745 case elfcpp::R_ARM_CALL:
2746 case elfcpp::R_ARM_THM_CALL:
2747 case elfcpp::R_ARM_JUMP24:
2748 case elfcpp::R_ARM_THM_JUMP24:
2749 case elfcpp::R_ARM_THM_JUMP19:
2750 case elfcpp::R_ARM_PLT32:
2751 case elfcpp::R_ARM_THM_XPC22:
2752 case elfcpp::R_ARM_PREL31:
2753 case elfcpp::R_ARM_SBREL31:
2754 return false;
2756 default:
2757 return true;
2761 private:
2762 // Do a TLS relocation.
2763 inline typename Arm_relocate_functions<big_endian>::Status
2764 relocate_tls(const Relocate_info<32, big_endian>*, Target_arm<big_endian>*,
2765 size_t, const elfcpp::Rel<32, big_endian>&, unsigned int,
2766 const Sized_symbol<32>*, const Symbol_value<32>*,
2767 unsigned char*, elfcpp::Elf_types<32>::Elf_Addr,
2768 section_size_type);
2772 // A class for inquiring about properties of a relocation,
2773 // used while scanning relocs during a relocatable link and
2774 // garbage collection.
2775 class Classify_reloc :
2776 public gold::Default_classify_reloc<elfcpp::SHT_REL, 32, big_endian>
2778 public:
2779 typedef typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc
2780 Reltype;
2782 // Return the explicit addend of the relocation (return 0 for SHT_REL).
2783 static typename elfcpp::Elf_types<32>::Elf_Swxword
2784 get_r_addend(const Reltype*)
2785 { return 0; }
2787 // Return the size of the addend of the relocation (only used for SHT_REL).
2788 static unsigned int
2789 get_size_for_reloc(unsigned int, Relobj*);
2792 // Adjust TLS relocation type based on the options and whether this
2793 // is a local symbol.
2794 static tls::Tls_optimization
2795 optimize_tls_reloc(bool is_final, int r_type);
2797 // Get the GOT section, creating it if necessary.
2798 Arm_output_data_got<big_endian>*
2799 got_section(Symbol_table*, Layout*);
2801 // Get the GOT PLT section.
2802 Output_data_space*
2803 got_plt_section() const
2805 gold_assert(this->got_plt_ != NULL);
2806 return this->got_plt_;
2809 // Create the PLT section.
2810 void
2811 make_plt_section(Symbol_table* symtab, Layout* layout);
2813 // Create a PLT entry for a global symbol.
2814 void
2815 make_plt_entry(Symbol_table*, Layout*, Symbol*);
2817 // Create a PLT entry for a local STT_GNU_IFUNC symbol.
2818 void
2819 make_local_ifunc_plt_entry(Symbol_table*, Layout*,
2820 Sized_relobj_file<32, big_endian>* relobj,
2821 unsigned int local_sym_index);
2823 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
2824 void
2825 define_tls_base_symbol(Symbol_table*, Layout*);
2827 // Create a GOT entry for the TLS module index.
2828 unsigned int
2829 got_mod_index_entry(Symbol_table* symtab, Layout* layout,
2830 Sized_relobj_file<32, big_endian>* object);
2832 // Get the PLT section.
2833 const Output_data_plt_arm<big_endian>*
2834 plt_section() const
2836 gold_assert(this->plt_ != NULL);
2837 return this->plt_;
2840 // Get the dynamic reloc section, creating it if necessary.
2841 Reloc_section*
2842 rel_dyn_section(Layout*);
2844 // Get the section to use for TLS_DESC relocations.
2845 Reloc_section*
2846 rel_tls_desc_section(Layout*) const;
2848 // Return true if the symbol may need a COPY relocation.
2849 // References from an executable object to non-function symbols
2850 // defined in a dynamic object may need a COPY relocation.
2851 bool
2852 may_need_copy_reloc(Symbol* gsym)
2854 return (gsym->type() != elfcpp::STT_ARM_TFUNC
2855 && gsym->may_need_copy_reloc());
2858 // Add a potential copy relocation.
2859 void
2860 copy_reloc(Symbol_table* symtab, Layout* layout,
2861 Sized_relobj_file<32, big_endian>* object,
2862 unsigned int shndx, Output_section* output_section,
2863 Symbol* sym, const elfcpp::Rel<32, big_endian>& reloc)
2865 unsigned int r_type = elfcpp::elf_r_type<32>(reloc.get_r_info());
2866 this->copy_relocs_.copy_reloc(symtab, layout,
2867 symtab->get_sized_symbol<32>(sym),
2868 object, shndx, output_section,
2869 r_type, reloc.get_r_offset(), 0,
2870 this->rel_dyn_section(layout));
2873 // Whether two EABI versions are compatible.
2874 static bool
2875 are_eabi_versions_compatible(elfcpp::Elf_Word v1, elfcpp::Elf_Word v2);
2877 // Merge processor-specific flags from input object and those in the ELF
2878 // header of the output.
2879 void
2880 merge_processor_specific_flags(const std::string&, elfcpp::Elf_Word);
2882 // Get the secondary compatible architecture.
2883 static int
2884 get_secondary_compatible_arch(const Attributes_section_data*);
2886 // Set the secondary compatible architecture.
2887 static void
2888 set_secondary_compatible_arch(Attributes_section_data*, int);
2890 static int
2891 tag_cpu_arch_combine(const char*, int, int*, int, int);
2893 // Helper to print AEABI enum tag value.
2894 static std::string
2895 aeabi_enum_name(unsigned int);
2897 // Return string value for TAG_CPU_name.
2898 static std::string
2899 tag_cpu_name_value(unsigned int);
2901 // Query attributes object to see if integer divide instructions may be
2902 // present in an object.
2903 static bool
2904 attributes_accept_div(int arch, int profile,
2905 const Object_attribute* div_attr);
2907 // Query attributes object to see if integer divide instructions are
2908 // forbidden to be in the object. This is not the inverse of
2909 // attributes_accept_div.
2910 static bool
2911 attributes_forbid_div(const Object_attribute* div_attr);
2913 // Merge object attributes from input object and those in the output.
2914 void
2915 merge_object_attributes(const char*, const Attributes_section_data*);
2917 // Helper to get an AEABI object attribute
2918 Object_attribute*
2919 get_aeabi_object_attribute(int tag) const
2921 Attributes_section_data* pasd = this->attributes_section_data_;
2922 gold_assert(pasd != NULL);
2923 Object_attribute* attr =
2924 pasd->get_attribute(Object_attribute::OBJ_ATTR_PROC, tag);
2925 gold_assert(attr != NULL);
2926 return attr;
2930 // Methods to support stub-generations.
2933 // Group input sections for stub generation.
2934 void
2935 group_sections(Layout*, section_size_type, bool, const Task*);
2937 // Scan a relocation for stub generation.
2938 void
2939 scan_reloc_for_stub(const Relocate_info<32, big_endian>*, unsigned int,
2940 const Sized_symbol<32>*, unsigned int,
2941 const Symbol_value<32>*,
2942 elfcpp::Elf_types<32>::Elf_Swxword, Arm_address);
2944 // Scan a relocation section for stub.
2945 template<int sh_type>
2946 void
2947 scan_reloc_section_for_stubs(
2948 const Relocate_info<32, big_endian>* relinfo,
2949 const unsigned char* prelocs,
2950 size_t reloc_count,
2951 Output_section* output_section,
2952 bool needs_special_offset_handling,
2953 const unsigned char* view,
2954 elfcpp::Elf_types<32>::Elf_Addr view_address,
2955 section_size_type);
2957 // Fix .ARM.exidx section coverage.
2958 void
2959 fix_exidx_coverage(Layout*, const Input_objects*,
2960 Arm_output_section<big_endian>*, Symbol_table*,
2961 const Task*);
2963 // Functors for STL set.
2964 struct output_section_address_less_than
2966 bool
2967 operator()(const Output_section* s1, const Output_section* s2) const
2968 { return s1->address() < s2->address(); }
2971 // Information about this specific target which we pass to the
2972 // general Target structure.
2973 static const Target::Target_info arm_info;
2975 // The types of GOT entries needed for this platform.
2976 // These values are exposed to the ABI in an incremental link.
2977 // Do not renumber existing values without changing the version
2978 // number of the .gnu_incremental_inputs section.
2979 enum Got_type
2981 GOT_TYPE_STANDARD = 0, // GOT entry for a regular symbol
2982 GOT_TYPE_TLS_NOFFSET = 1, // GOT entry for negative TLS offset
2983 GOT_TYPE_TLS_OFFSET = 2, // GOT entry for positive TLS offset
2984 GOT_TYPE_TLS_PAIR = 3, // GOT entry for TLS module/offset pair
2985 GOT_TYPE_TLS_DESC = 4 // GOT entry for TLS_DESC pair
2988 typedef typename std::vector<Stub_table<big_endian>*> Stub_table_list;
2990 // Map input section to Arm_input_section.
2991 typedef Unordered_map<Section_id,
2992 Arm_input_section<big_endian>*,
2993 Section_id_hash>
2994 Arm_input_section_map;
2996 // Map output addresses to relocs for Cortex-A8 erratum.
2997 typedef Unordered_map<Arm_address, const Cortex_a8_reloc*>
2998 Cortex_a8_relocs_info;
3000 // The GOT section.
3001 Arm_output_data_got<big_endian>* got_;
3002 // The PLT section.
3003 Output_data_plt_arm<big_endian>* plt_;
3004 // The GOT PLT section.
3005 Output_data_space* got_plt_;
3006 // The GOT section for IRELATIVE relocations.
3007 Output_data_space* got_irelative_;
3008 // The dynamic reloc section.
3009 Reloc_section* rel_dyn_;
3010 // The section to use for IRELATIVE relocs.
3011 Reloc_section* rel_irelative_;
3012 // Relocs saved to avoid a COPY reloc.
3013 Copy_relocs<elfcpp::SHT_REL, 32, big_endian> copy_relocs_;
3014 // Offset of the GOT entry for the TLS module index.
3015 unsigned int got_mod_index_offset_;
3016 // True if the _TLS_MODULE_BASE_ symbol has been defined.
3017 bool tls_base_symbol_defined_;
3018 // Vector of Stub_tables created.
3019 Stub_table_list stub_tables_;
3020 // Stub factory.
3021 const Stub_factory &stub_factory_;
3022 // Whether we force PIC branch veneers.
3023 bool should_force_pic_veneer_;
3024 // Map for locating Arm_input_sections.
3025 Arm_input_section_map arm_input_section_map_;
3026 // Attributes section data in output.
3027 Attributes_section_data* attributes_section_data_;
3028 // Whether we want to fix code for Cortex-A8 erratum.
3029 bool fix_cortex_a8_;
3030 // Map addresses to relocs for Cortex-A8 erratum.
3031 Cortex_a8_relocs_info cortex_a8_relocs_info_;
3032 // What R_ARM_TARGET1 maps to. It can be R_ARM_REL32 or R_ARM_ABS32.
3033 unsigned int target1_reloc_;
3034 // What R_ARM_TARGET2 maps to. It should be one of R_ARM_REL32, R_ARM_ABS32
3035 // and R_ARM_GOT_PREL.
3036 unsigned int target2_reloc_;
3039 template<bool big_endian>
3040 const Target::Target_info Target_arm<big_endian>::arm_info =
3042 32, // size
3043 big_endian, // is_big_endian
3044 elfcpp::EM_ARM, // machine_code
3045 false, // has_make_symbol
3046 false, // has_resolve
3047 false, // has_code_fill
3048 true, // is_default_stack_executable
3049 false, // can_icf_inline_merge_sections
3050 '\0', // wrap_char
3051 "/usr/lib/libc.so.1", // dynamic_linker
3052 0x8000, // default_text_segment_address
3053 0x1000, // abi_pagesize (overridable by -z max-page-size)
3054 0x1000, // common_pagesize (overridable by -z common-page-size)
3055 false, // isolate_execinstr
3056 0, // rosegment_gap
3057 elfcpp::SHN_UNDEF, // small_common_shndx
3058 elfcpp::SHN_UNDEF, // large_common_shndx
3059 0, // small_common_section_flags
3060 0, // large_common_section_flags
3061 ".ARM.attributes", // attributes_section
3062 "aeabi", // attributes_vendor
3063 "_start", // entry_symbol_name
3064 32, // hash_entry_size
3065 elfcpp::SHT_PROGBITS, // unwind_section_type
3068 // Arm relocate functions class
3071 template<bool big_endian>
3072 class Arm_relocate_functions : public Relocate_functions<32, big_endian>
3074 public:
3075 typedef enum
3077 STATUS_OKAY, // No error during relocation.
3078 STATUS_OVERFLOW, // Relocation overflow.
3079 STATUS_BAD_RELOC // Relocation cannot be applied.
3080 } Status;
3082 private:
3083 typedef Relocate_functions<32, big_endian> Base;
3084 typedef Arm_relocate_functions<big_endian> This;
3086 // Encoding of imm16 argument for movt and movw ARM instructions
3087 // from ARM ARM:
3089 // imm16 := imm4 | imm12
3091 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
3092 // +-------+---------------+-------+-------+-----------------------+
3093 // | | |imm4 | |imm12 |
3094 // +-------+---------------+-------+-------+-----------------------+
3096 // Extract the relocation addend from VAL based on the ARM
3097 // instruction encoding described above.
3098 static inline typename elfcpp::Swap<32, big_endian>::Valtype
3099 extract_arm_movw_movt_addend(
3100 typename elfcpp::Swap<32, big_endian>::Valtype val)
3102 // According to the Elf ABI for ARM Architecture the immediate
3103 // field is sign-extended to form the addend.
3104 return Bits<16>::sign_extend32(((val >> 4) & 0xf000) | (val & 0xfff));
3107 // Insert X into VAL based on the ARM instruction encoding described
3108 // above.
3109 static inline typename elfcpp::Swap<32, big_endian>::Valtype
3110 insert_val_arm_movw_movt(
3111 typename elfcpp::Swap<32, big_endian>::Valtype val,
3112 typename elfcpp::Swap<32, big_endian>::Valtype x)
3114 val &= 0xfff0f000;
3115 val |= x & 0x0fff;
3116 val |= (x & 0xf000) << 4;
3117 return val;
3120 // Encoding of imm16 argument for movt and movw Thumb2 instructions
3121 // from ARM ARM:
3123 // imm16 := imm4 | i | imm3 | imm8
3125 // f e d c b a 9 8 7 6 5 4 3 2 1 0 f e d c b a 9 8 7 6 5 4 3 2 1 0
3126 // +---------+-+-----------+-------++-+-----+-------+---------------+
3127 // | |i| |imm4 || |imm3 | |imm8 |
3128 // +---------+-+-----------+-------++-+-----+-------+---------------+
3130 // Extract the relocation addend from VAL based on the Thumb2
3131 // instruction encoding described above.
3132 static inline typename elfcpp::Swap<32, big_endian>::Valtype
3133 extract_thumb_movw_movt_addend(
3134 typename elfcpp::Swap<32, big_endian>::Valtype val)
3136 // According to the Elf ABI for ARM Architecture the immediate
3137 // field is sign-extended to form the addend.
3138 return Bits<16>::sign_extend32(((val >> 4) & 0xf000)
3139 | ((val >> 15) & 0x0800)
3140 | ((val >> 4) & 0x0700)
3141 | (val & 0x00ff));
3144 // Insert X into VAL based on the Thumb2 instruction encoding
3145 // described above.
3146 static inline typename elfcpp::Swap<32, big_endian>::Valtype
3147 insert_val_thumb_movw_movt(
3148 typename elfcpp::Swap<32, big_endian>::Valtype val,
3149 typename elfcpp::Swap<32, big_endian>::Valtype x)
3151 val &= 0xfbf08f00;
3152 val |= (x & 0xf000) << 4;
3153 val |= (x & 0x0800) << 15;
3154 val |= (x & 0x0700) << 4;
3155 val |= (x & 0x00ff);
3156 return val;
3159 // Calculate the smallest constant Kn for the specified residual.
3160 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3161 static uint32_t
3162 calc_grp_kn(typename elfcpp::Swap<32, big_endian>::Valtype residual)
3164 int32_t msb;
3166 if (residual == 0)
3167 return 0;
3168 // Determine the most significant bit in the residual and
3169 // align the resulting value to a 2-bit boundary.
3170 for (msb = 30; (msb >= 0) && !(residual & (3 << msb)); msb -= 2)
3172 // The desired shift is now (msb - 6), or zero, whichever
3173 // is the greater.
3174 return (((msb - 6) < 0) ? 0 : (msb - 6));
3177 // Calculate the final residual for the specified group index.
3178 // If the passed group index is less than zero, the method will return
3179 // the value of the specified residual without any change.
3180 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3181 static typename elfcpp::Swap<32, big_endian>::Valtype
3182 calc_grp_residual(typename elfcpp::Swap<32, big_endian>::Valtype residual,
3183 const int group)
3185 for (int n = 0; n <= group; n++)
3187 // Calculate which part of the value to mask.
3188 uint32_t shift = calc_grp_kn(residual);
3189 // Calculate the residual for the next time around.
3190 residual &= ~(residual & (0xff << shift));
3193 return residual;
3196 // Calculate the value of Gn for the specified group index.
3197 // We return it in the form of an encoded constant-and-rotation.
3198 // (see (AAELF 4.6.1.4 Static ARM relocations, Group Relocations, p.32)
3199 static typename elfcpp::Swap<32, big_endian>::Valtype
3200 calc_grp_gn(typename elfcpp::Swap<32, big_endian>::Valtype residual,
3201 const int group)
3203 typename elfcpp::Swap<32, big_endian>::Valtype gn = 0;
3204 uint32_t shift = 0;
3206 for (int n = 0; n <= group; n++)
3208 // Calculate which part of the value to mask.
3209 shift = calc_grp_kn(residual);
3210 // Calculate Gn in 32-bit as well as encoded constant-and-rotation form.
3211 gn = residual & (0xff << shift);
3212 // Calculate the residual for the next time around.
3213 residual &= ~gn;
3215 // Return Gn in the form of an encoded constant-and-rotation.
3216 return ((gn >> shift) | ((gn <= 0xff ? 0 : (32 - shift) / 2) << 8));
3219 public:
3220 // Handle ARM long branches.
3221 static typename This::Status
3222 arm_branch_common(unsigned int, const Relocate_info<32, big_endian>*,
3223 unsigned char*, const Sized_symbol<32>*,
3224 const Arm_relobj<big_endian>*, unsigned int,
3225 const Symbol_value<32>*, Arm_address, Arm_address, bool);
3227 // Handle THUMB long branches.
3228 static typename This::Status
3229 thumb_branch_common(unsigned int, const Relocate_info<32, big_endian>*,
3230 unsigned char*, const Sized_symbol<32>*,
3231 const Arm_relobj<big_endian>*, unsigned int,
3232 const Symbol_value<32>*, Arm_address, Arm_address, bool);
3235 // Return the branch offset of a 32-bit THUMB branch.
3236 static inline int32_t
3237 thumb32_branch_offset(uint16_t upper_insn, uint16_t lower_insn)
3239 // We use the Thumb-2 encoding (backwards compatible with Thumb-1)
3240 // involving the J1 and J2 bits.
3241 uint32_t s = (upper_insn & (1U << 10)) >> 10;
3242 uint32_t upper = upper_insn & 0x3ffU;
3243 uint32_t lower = lower_insn & 0x7ffU;
3244 uint32_t j1 = (lower_insn & (1U << 13)) >> 13;
3245 uint32_t j2 = (lower_insn & (1U << 11)) >> 11;
3246 uint32_t i1 = j1 ^ s ? 0 : 1;
3247 uint32_t i2 = j2 ^ s ? 0 : 1;
3249 return Bits<25>::sign_extend32((s << 24) | (i1 << 23) | (i2 << 22)
3250 | (upper << 12) | (lower << 1));
3253 // Insert OFFSET to a 32-bit THUMB branch and return the upper instruction.
3254 // UPPER_INSN is the original upper instruction of the branch. Caller is
3255 // responsible for overflow checking and BLX offset adjustment.
3256 static inline uint16_t
3257 thumb32_branch_upper(uint16_t upper_insn, int32_t offset)
3259 uint32_t s = offset < 0 ? 1 : 0;
3260 uint32_t bits = static_cast<uint32_t>(offset);
3261 return (upper_insn & ~0x7ffU) | ((bits >> 12) & 0x3ffU) | (s << 10);
3264 // Insert OFFSET to a 32-bit THUMB branch and return the lower instruction.
3265 // LOWER_INSN is the original lower instruction of the branch. Caller is
3266 // responsible for overflow checking and BLX offset adjustment.
3267 static inline uint16_t
3268 thumb32_branch_lower(uint16_t lower_insn, int32_t offset)
3270 uint32_t s = offset < 0 ? 1 : 0;
3271 uint32_t bits = static_cast<uint32_t>(offset);
3272 return ((lower_insn & ~0x2fffU)
3273 | ((((bits >> 23) & 1) ^ !s) << 13)
3274 | ((((bits >> 22) & 1) ^ !s) << 11)
3275 | ((bits >> 1) & 0x7ffU));
3278 // Return the branch offset of a 32-bit THUMB conditional branch.
3279 static inline int32_t
3280 thumb32_cond_branch_offset(uint16_t upper_insn, uint16_t lower_insn)
3282 uint32_t s = (upper_insn & 0x0400U) >> 10;
3283 uint32_t j1 = (lower_insn & 0x2000U) >> 13;
3284 uint32_t j2 = (lower_insn & 0x0800U) >> 11;
3285 uint32_t lower = (lower_insn & 0x07ffU);
3286 uint32_t upper = (s << 8) | (j2 << 7) | (j1 << 6) | (upper_insn & 0x003fU);
3288 return Bits<21>::sign_extend32((upper << 12) | (lower << 1));
3291 // Insert OFFSET to a 32-bit THUMB conditional branch and return the upper
3292 // instruction. UPPER_INSN is the original upper instruction of the branch.
3293 // Caller is responsible for overflow checking.
3294 static inline uint16_t
3295 thumb32_cond_branch_upper(uint16_t upper_insn, int32_t offset)
3297 uint32_t s = offset < 0 ? 1 : 0;
3298 uint32_t bits = static_cast<uint32_t>(offset);
3299 return (upper_insn & 0xfbc0U) | (s << 10) | ((bits & 0x0003f000U) >> 12);
3302 // Insert OFFSET to a 32-bit THUMB conditional branch and return the lower
3303 // instruction. LOWER_INSN is the original lower instruction of the branch.
3304 // The caller is responsible for overflow checking.
3305 static inline uint16_t
3306 thumb32_cond_branch_lower(uint16_t lower_insn, int32_t offset)
3308 uint32_t bits = static_cast<uint32_t>(offset);
3309 uint32_t j2 = (bits & 0x00080000U) >> 19;
3310 uint32_t j1 = (bits & 0x00040000U) >> 18;
3311 uint32_t lo = (bits & 0x00000ffeU) >> 1;
3313 return (lower_insn & 0xd000U) | (j1 << 13) | (j2 << 11) | lo;
3316 // R_ARM_ABS8: S + A
3317 static inline typename This::Status
3318 abs8(unsigned char* view,
3319 const Sized_relobj_file<32, big_endian>* object,
3320 const Symbol_value<32>* psymval)
3322 typedef typename elfcpp::Swap<8, big_endian>::Valtype Valtype;
3323 Valtype* wv = reinterpret_cast<Valtype*>(view);
3324 Valtype val = elfcpp::Swap<8, big_endian>::readval(wv);
3325 int32_t addend = Bits<8>::sign_extend32(val);
3326 Arm_address x = psymval->value(object, addend);
3327 val = Bits<32>::bit_select32(val, x, 0xffU);
3328 elfcpp::Swap<8, big_endian>::writeval(wv, val);
3330 // R_ARM_ABS8 permits signed or unsigned results.
3331 return (Bits<8>::has_signed_unsigned_overflow32(x)
3332 ? This::STATUS_OVERFLOW
3333 : This::STATUS_OKAY);
3336 // R_ARM_THM_ABS5: S + A
3337 static inline typename This::Status
3338 thm_abs5(unsigned char* view,
3339 const Sized_relobj_file<32, big_endian>* object,
3340 const Symbol_value<32>* psymval)
3342 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3343 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3344 Valtype* wv = reinterpret_cast<Valtype*>(view);
3345 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3346 Reltype addend = (val & 0x7e0U) >> 6;
3347 Reltype x = psymval->value(object, addend);
3348 val = Bits<32>::bit_select32(val, x << 6, 0x7e0U);
3349 elfcpp::Swap<16, big_endian>::writeval(wv, val);
3350 return (Bits<5>::has_overflow32(x)
3351 ? This::STATUS_OVERFLOW
3352 : This::STATUS_OKAY);
3355 // R_ARM_ABS12: S + A
3356 static inline typename This::Status
3357 abs12(unsigned char* view,
3358 const Sized_relobj_file<32, big_endian>* object,
3359 const Symbol_value<32>* psymval)
3361 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3362 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3363 Valtype* wv = reinterpret_cast<Valtype*>(view);
3364 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3365 Reltype addend = val & 0x0fffU;
3366 Reltype x = psymval->value(object, addend);
3367 val = Bits<32>::bit_select32(val, x, 0x0fffU);
3368 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3369 return (Bits<12>::has_overflow32(x)
3370 ? This::STATUS_OVERFLOW
3371 : This::STATUS_OKAY);
3374 // R_ARM_ABS16: S + A
3375 static inline typename This::Status
3376 abs16(unsigned char* view,
3377 const Sized_relobj_file<32, big_endian>* object,
3378 const Symbol_value<32>* psymval)
3380 typedef typename elfcpp::Swap_unaligned<16, big_endian>::Valtype Valtype;
3381 Valtype val = elfcpp::Swap_unaligned<16, big_endian>::readval(view);
3382 int32_t addend = Bits<16>::sign_extend32(val);
3383 Arm_address x = psymval->value(object, addend);
3384 val = Bits<32>::bit_select32(val, x, 0xffffU);
3385 elfcpp::Swap_unaligned<16, big_endian>::writeval(view, val);
3387 // R_ARM_ABS16 permits signed or unsigned results.
3388 return (Bits<16>::has_signed_unsigned_overflow32(x)
3389 ? This::STATUS_OVERFLOW
3390 : This::STATUS_OKAY);
3393 // R_ARM_ABS32: (S + A) | T
3394 static inline typename This::Status
3395 abs32(unsigned char* view,
3396 const Sized_relobj_file<32, big_endian>* object,
3397 const Symbol_value<32>* psymval,
3398 Arm_address thumb_bit)
3400 typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype;
3401 Valtype addend = elfcpp::Swap_unaligned<32, big_endian>::readval(view);
3402 Valtype x = psymval->value(object, addend) | thumb_bit;
3403 elfcpp::Swap_unaligned<32, big_endian>::writeval(view, x);
3404 return This::STATUS_OKAY;
3407 // R_ARM_REL32: (S + A) | T - P
3408 static inline typename This::Status
3409 rel32(unsigned char* view,
3410 const Sized_relobj_file<32, big_endian>* object,
3411 const Symbol_value<32>* psymval,
3412 Arm_address address,
3413 Arm_address thumb_bit)
3415 typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype;
3416 Valtype addend = elfcpp::Swap_unaligned<32, big_endian>::readval(view);
3417 Valtype x = (psymval->value(object, addend) | thumb_bit) - address;
3418 elfcpp::Swap_unaligned<32, big_endian>::writeval(view, x);
3419 return This::STATUS_OKAY;
3422 // R_ARM_THM_JUMP24: (S + A) | T - P
3423 static typename This::Status
3424 thm_jump19(unsigned char* view, const Arm_relobj<big_endian>* object,
3425 const Symbol_value<32>* psymval, Arm_address address,
3426 Arm_address thumb_bit);
3428 // R_ARM_THM_JUMP6: S + A - P
3429 static inline typename This::Status
3430 thm_jump6(unsigned char* view,
3431 const Sized_relobj_file<32, big_endian>* object,
3432 const Symbol_value<32>* psymval,
3433 Arm_address address)
3435 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3436 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
3437 Valtype* wv = reinterpret_cast<Valtype*>(view);
3438 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3439 // bit[9]:bit[7:3]:'0' (mask: 0x02f8)
3440 Reltype addend = (((val & 0x0200) >> 3) | ((val & 0x00f8) >> 2));
3441 Reltype x = (psymval->value(object, addend) - address);
3442 val = (val & 0xfd07) | ((x & 0x0040) << 3) | ((val & 0x003e) << 2);
3443 elfcpp::Swap<16, big_endian>::writeval(wv, val);
3444 // CZB does only forward jumps.
3445 return ((x > 0x007e)
3446 ? This::STATUS_OVERFLOW
3447 : This::STATUS_OKAY);
3450 // R_ARM_THM_JUMP8: S + A - P
3451 static inline typename This::Status
3452 thm_jump8(unsigned char* view,
3453 const Sized_relobj_file<32, big_endian>* object,
3454 const Symbol_value<32>* psymval,
3455 Arm_address address)
3457 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3458 Valtype* wv = reinterpret_cast<Valtype*>(view);
3459 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3460 int32_t addend = Bits<8>::sign_extend32((val & 0x00ff) << 1);
3461 int32_t x = (psymval->value(object, addend) - address);
3462 elfcpp::Swap<16, big_endian>::writeval(wv, ((val & 0xff00)
3463 | ((x & 0x01fe) >> 1)));
3464 // We do a 9-bit overflow check because x is right-shifted by 1 bit.
3465 return (Bits<9>::has_overflow32(x)
3466 ? This::STATUS_OVERFLOW
3467 : This::STATUS_OKAY);
3470 // R_ARM_THM_JUMP11: S + A - P
3471 static inline typename This::Status
3472 thm_jump11(unsigned char* view,
3473 const Sized_relobj_file<32, big_endian>* object,
3474 const Symbol_value<32>* psymval,
3475 Arm_address address)
3477 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3478 Valtype* wv = reinterpret_cast<Valtype*>(view);
3479 Valtype val = elfcpp::Swap<16, big_endian>::readval(wv);
3480 int32_t addend = Bits<11>::sign_extend32((val & 0x07ff) << 1);
3481 int32_t x = (psymval->value(object, addend) - address);
3482 elfcpp::Swap<16, big_endian>::writeval(wv, ((val & 0xf800)
3483 | ((x & 0x0ffe) >> 1)));
3484 // We do a 12-bit overflow check because x is right-shifted by 1 bit.
3485 return (Bits<12>::has_overflow32(x)
3486 ? This::STATUS_OVERFLOW
3487 : This::STATUS_OKAY);
3490 // R_ARM_BASE_PREL: B(S) + A - P
3491 static inline typename This::Status
3492 base_prel(unsigned char* view,
3493 Arm_address origin,
3494 Arm_address address)
3496 Base::rel32(view, origin - address);
3497 return STATUS_OKAY;
3500 // R_ARM_BASE_ABS: B(S) + A
3501 static inline typename This::Status
3502 base_abs(unsigned char* view,
3503 Arm_address origin)
3505 Base::rel32(view, origin);
3506 return STATUS_OKAY;
3509 // R_ARM_GOT_BREL: GOT(S) + A - GOT_ORG
3510 static inline typename This::Status
3511 got_brel(unsigned char* view,
3512 typename elfcpp::Swap<32, big_endian>::Valtype got_offset)
3514 Base::rel32(view, got_offset);
3515 return This::STATUS_OKAY;
3518 // R_ARM_GOT_PREL: GOT(S) + A - P
3519 static inline typename This::Status
3520 got_prel(unsigned char* view,
3521 Arm_address got_entry,
3522 Arm_address address)
3524 Base::rel32(view, got_entry - address);
3525 return This::STATUS_OKAY;
3528 // R_ARM_PREL: (S + A) | T - P
3529 static inline typename This::Status
3530 prel31(unsigned char* view,
3531 const Sized_relobj_file<32, big_endian>* object,
3532 const Symbol_value<32>* psymval,
3533 Arm_address address,
3534 Arm_address thumb_bit)
3536 typedef typename elfcpp::Swap_unaligned<32, big_endian>::Valtype Valtype;
3537 Valtype val = elfcpp::Swap_unaligned<32, big_endian>::readval(view);
3538 Valtype addend = Bits<31>::sign_extend32(val);
3539 Valtype x = (psymval->value(object, addend) | thumb_bit) - address;
3540 val = Bits<32>::bit_select32(val, x, 0x7fffffffU);
3541 elfcpp::Swap_unaligned<32, big_endian>::writeval(view, val);
3542 return (Bits<31>::has_overflow32(x)
3543 ? This::STATUS_OVERFLOW
3544 : This::STATUS_OKAY);
3547 // R_ARM_MOVW_ABS_NC: (S + A) | T (relative address base is )
3548 // R_ARM_MOVW_PREL_NC: (S + A) | T - P
3549 // R_ARM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3550 // R_ARM_MOVW_BREL: ((S + A) | T) - B(S)
3551 static inline typename This::Status
3552 movw(unsigned char* view,
3553 const Sized_relobj_file<32, big_endian>* object,
3554 const Symbol_value<32>* psymval,
3555 Arm_address relative_address_base,
3556 Arm_address thumb_bit,
3557 bool check_overflow)
3559 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3560 Valtype* wv = reinterpret_cast<Valtype*>(view);
3561 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3562 Valtype addend = This::extract_arm_movw_movt_addend(val);
3563 Valtype x = ((psymval->value(object, addend) | thumb_bit)
3564 - relative_address_base);
3565 val = This::insert_val_arm_movw_movt(val, x);
3566 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3567 return ((check_overflow && Bits<16>::has_overflow32(x))
3568 ? This::STATUS_OVERFLOW
3569 : This::STATUS_OKAY);
3572 // R_ARM_MOVT_ABS: S + A (relative address base is 0)
3573 // R_ARM_MOVT_PREL: S + A - P
3574 // R_ARM_MOVT_BREL: S + A - B(S)
3575 static inline typename This::Status
3576 movt(unsigned char* view,
3577 const Sized_relobj_file<32, big_endian>* object,
3578 const Symbol_value<32>* psymval,
3579 Arm_address relative_address_base)
3581 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3582 Valtype* wv = reinterpret_cast<Valtype*>(view);
3583 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3584 Valtype addend = This::extract_arm_movw_movt_addend(val);
3585 Valtype x = (psymval->value(object, addend) - relative_address_base) >> 16;
3586 val = This::insert_val_arm_movw_movt(val, x);
3587 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3588 // FIXME: IHI0044D says that we should check for overflow.
3589 return This::STATUS_OKAY;
3592 // R_ARM_THM_MOVW_ABS_NC: S + A | T (relative_address_base is 0)
3593 // R_ARM_THM_MOVW_PREL_NC: (S + A) | T - P
3594 // R_ARM_THM_MOVW_BREL_NC: ((S + A) | T) - B(S)
3595 // R_ARM_THM_MOVW_BREL: ((S + A) | T) - B(S)
3596 static inline typename This::Status
3597 thm_movw(unsigned char* view,
3598 const Sized_relobj_file<32, big_endian>* object,
3599 const Symbol_value<32>* psymval,
3600 Arm_address relative_address_base,
3601 Arm_address thumb_bit,
3602 bool check_overflow)
3604 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3605 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3606 Valtype* wv = reinterpret_cast<Valtype*>(view);
3607 Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3608 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3609 Reltype addend = This::extract_thumb_movw_movt_addend(val);
3610 Reltype x =
3611 (psymval->value(object, addend) | thumb_bit) - relative_address_base;
3612 val = This::insert_val_thumb_movw_movt(val, x);
3613 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3614 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3615 return ((check_overflow && Bits<16>::has_overflow32(x))
3616 ? This::STATUS_OVERFLOW
3617 : This::STATUS_OKAY);
3620 // R_ARM_THM_MOVT_ABS: S + A (relative address base is 0)
3621 // R_ARM_THM_MOVT_PREL: S + A - P
3622 // R_ARM_THM_MOVT_BREL: S + A - B(S)
3623 static inline typename This::Status
3624 thm_movt(unsigned char* view,
3625 const Sized_relobj_file<32, big_endian>* object,
3626 const Symbol_value<32>* psymval,
3627 Arm_address relative_address_base)
3629 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3630 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3631 Valtype* wv = reinterpret_cast<Valtype*>(view);
3632 Reltype val = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3633 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3634 Reltype addend = This::extract_thumb_movw_movt_addend(val);
3635 Reltype x = (psymval->value(object, addend) - relative_address_base) >> 16;
3636 val = This::insert_val_thumb_movw_movt(val, x);
3637 elfcpp::Swap<16, big_endian>::writeval(wv, val >> 16);
3638 elfcpp::Swap<16, big_endian>::writeval(wv + 1, val & 0xffff);
3639 return This::STATUS_OKAY;
3642 // R_ARM_THM_ALU_PREL_11_0: ((S + A) | T) - Pa (Thumb32)
3643 static inline typename This::Status
3644 thm_alu11(unsigned char* view,
3645 const Sized_relobj_file<32, big_endian>* object,
3646 const Symbol_value<32>* psymval,
3647 Arm_address address,
3648 Arm_address thumb_bit)
3650 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3651 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3652 Valtype* wv = reinterpret_cast<Valtype*>(view);
3653 Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3654 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3656 // f e d c b|a|9|8 7 6 5|4|3 2 1 0||f|e d c|b a 9 8|7 6 5 4 3 2 1 0
3657 // -----------------------------------------------------------------------
3658 // ADD{S} 1 1 1 1 0|i|0|1 0 0 0|S|1 1 0 1||0|imm3 |Rd |imm8
3659 // ADDW 1 1 1 1 0|i|1|0 0 0 0|0|1 1 0 1||0|imm3 |Rd |imm8
3660 // ADR[+] 1 1 1 1 0|i|1|0 0 0 0|0|1 1 1 1||0|imm3 |Rd |imm8
3661 // SUB{S} 1 1 1 1 0|i|0|1 1 0 1|S|1 1 0 1||0|imm3 |Rd |imm8
3662 // SUBW 1 1 1 1 0|i|1|0 1 0 1|0|1 1 0 1||0|imm3 |Rd |imm8
3663 // ADR[-] 1 1 1 1 0|i|1|0 1 0 1|0|1 1 1 1||0|imm3 |Rd |imm8
3665 // Determine a sign for the addend.
3666 const int sign = ((insn & 0xf8ef0000) == 0xf0ad0000
3667 || (insn & 0xf8ef0000) == 0xf0af0000) ? -1 : 1;
3668 // Thumb2 addend encoding:
3669 // imm12 := i | imm3 | imm8
3670 int32_t addend = (insn & 0xff)
3671 | ((insn & 0x00007000) >> 4)
3672 | ((insn & 0x04000000) >> 15);
3673 // Apply a sign to the added.
3674 addend *= sign;
3676 int32_t x = (psymval->value(object, addend) | thumb_bit)
3677 - (address & 0xfffffffc);
3678 Reltype val = abs(x);
3679 // Mask out the value and a distinct part of the ADD/SUB opcode
3680 // (bits 7:5 of opword).
3681 insn = (insn & 0xfb0f8f00)
3682 | (val & 0xff)
3683 | ((val & 0x700) << 4)
3684 | ((val & 0x800) << 15);
3685 // Set the opcode according to whether the value to go in the
3686 // place is negative.
3687 if (x < 0)
3688 insn |= 0x00a00000;
3690 elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16);
3691 elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff);
3692 return ((val > 0xfff) ?
3693 This::STATUS_OVERFLOW : This::STATUS_OKAY);
3696 // R_ARM_THM_PC8: S + A - Pa (Thumb)
3697 static inline typename This::Status
3698 thm_pc8(unsigned char* view,
3699 const Sized_relobj_file<32, big_endian>* object,
3700 const Symbol_value<32>* psymval,
3701 Arm_address address)
3703 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3704 typedef typename elfcpp::Swap<16, big_endian>::Valtype Reltype;
3705 Valtype* wv = reinterpret_cast<Valtype*>(view);
3706 Valtype insn = elfcpp::Swap<16, big_endian>::readval(wv);
3707 Reltype addend = ((insn & 0x00ff) << 2);
3708 int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc));
3709 Reltype val = abs(x);
3710 insn = (insn & 0xff00) | ((val & 0x03fc) >> 2);
3712 elfcpp::Swap<16, big_endian>::writeval(wv, insn);
3713 return ((val > 0x03fc)
3714 ? This::STATUS_OVERFLOW
3715 : This::STATUS_OKAY);
3718 // R_ARM_THM_PC12: S + A - Pa (Thumb32)
3719 static inline typename This::Status
3720 thm_pc12(unsigned char* view,
3721 const Sized_relobj_file<32, big_endian>* object,
3722 const Symbol_value<32>* psymval,
3723 Arm_address address)
3725 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
3726 typedef typename elfcpp::Swap<32, big_endian>::Valtype Reltype;
3727 Valtype* wv = reinterpret_cast<Valtype*>(view);
3728 Reltype insn = (elfcpp::Swap<16, big_endian>::readval(wv) << 16)
3729 | elfcpp::Swap<16, big_endian>::readval(wv + 1);
3730 // Determine a sign for the addend (positive if the U bit is 1).
3731 const int sign = (insn & 0x00800000) ? 1 : -1;
3732 int32_t addend = (insn & 0xfff);
3733 // Apply a sign to the added.
3734 addend *= sign;
3736 int32_t x = (psymval->value(object, addend) - (address & 0xfffffffc));
3737 Reltype val = abs(x);
3738 // Mask out and apply the value and the U bit.
3739 insn = (insn & 0xff7ff000) | (val & 0xfff);
3740 // Set the U bit according to whether the value to go in the
3741 // place is positive.
3742 if (x >= 0)
3743 insn |= 0x00800000;
3745 elfcpp::Swap<16, big_endian>::writeval(wv, insn >> 16);
3746 elfcpp::Swap<16, big_endian>::writeval(wv + 1, insn & 0xffff);
3747 return ((val > 0xfff) ?
3748 This::STATUS_OVERFLOW : This::STATUS_OKAY);
3751 // R_ARM_V4BX
3752 static inline typename This::Status
3753 v4bx(const Relocate_info<32, big_endian>* relinfo,
3754 unsigned char* view,
3755 const Arm_relobj<big_endian>* object,
3756 const Arm_address address,
3757 const bool is_interworking)
3760 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3761 Valtype* wv = reinterpret_cast<Valtype*>(view);
3762 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3764 // Ensure that we have a BX instruction.
3765 gold_assert((val & 0x0ffffff0) == 0x012fff10);
3766 const uint32_t reg = (val & 0xf);
3767 if (is_interworking && reg != 0xf)
3769 Stub_table<big_endian>* stub_table =
3770 object->stub_table(relinfo->data_shndx);
3771 gold_assert(stub_table != NULL);
3773 Arm_v4bx_stub* stub = stub_table->find_arm_v4bx_stub(reg);
3774 gold_assert(stub != NULL);
3776 int32_t veneer_address =
3777 stub_table->address() + stub->offset() - 8 - address;
3778 gold_assert((veneer_address <= ARM_MAX_FWD_BRANCH_OFFSET)
3779 && (veneer_address >= ARM_MAX_BWD_BRANCH_OFFSET));
3780 // Replace with a branch to veneer (B <addr>)
3781 val = (val & 0xf0000000) | 0x0a000000
3782 | ((veneer_address >> 2) & 0x00ffffff);
3784 else
3786 // Preserve Rm (lowest four bits) and the condition code
3787 // (highest four bits). Other bits encode MOV PC,Rm.
3788 val = (val & 0xf000000f) | 0x01a0f000;
3790 elfcpp::Swap<32, big_endian>::writeval(wv, val);
3791 return This::STATUS_OKAY;
3794 // R_ARM_ALU_PC_G0_NC: ((S + A) | T) - P
3795 // R_ARM_ALU_PC_G0: ((S + A) | T) - P
3796 // R_ARM_ALU_PC_G1_NC: ((S + A) | T) - P
3797 // R_ARM_ALU_PC_G1: ((S + A) | T) - P
3798 // R_ARM_ALU_PC_G2: ((S + A) | T) - P
3799 // R_ARM_ALU_SB_G0_NC: ((S + A) | T) - B(S)
3800 // R_ARM_ALU_SB_G0: ((S + A) | T) - B(S)
3801 // R_ARM_ALU_SB_G1_NC: ((S + A) | T) - B(S)
3802 // R_ARM_ALU_SB_G1: ((S + A) | T) - B(S)
3803 // R_ARM_ALU_SB_G2: ((S + A) | T) - B(S)
3804 static inline typename This::Status
3805 arm_grp_alu(unsigned char* view,
3806 const Sized_relobj_file<32, big_endian>* object,
3807 const Symbol_value<32>* psymval,
3808 const int group,
3809 Arm_address address,
3810 Arm_address thumb_bit,
3811 bool check_overflow)
3813 gold_assert(group >= 0 && group < 3);
3814 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3815 Valtype* wv = reinterpret_cast<Valtype*>(view);
3816 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3818 // ALU group relocations are allowed only for the ADD/SUB instructions.
3819 // (0x00800000 - ADD, 0x00400000 - SUB)
3820 const Valtype opcode = insn & 0x01e00000;
3821 if (opcode != 0x00800000 && opcode != 0x00400000)
3822 return This::STATUS_BAD_RELOC;
3824 // Determine a sign for the addend.
3825 const int sign = (opcode == 0x00800000) ? 1 : -1;
3826 // shifter = rotate_imm * 2
3827 const uint32_t shifter = (insn & 0xf00) >> 7;
3828 // Initial addend value.
3829 int32_t addend = insn & 0xff;
3830 // Rotate addend right by shifter.
3831 addend = (addend >> shifter) | (addend << (32 - shifter));
3832 // Apply a sign to the added.
3833 addend *= sign;
3835 int32_t x = ((psymval->value(object, addend) | thumb_bit) - address);
3836 Valtype gn = Arm_relocate_functions::calc_grp_gn(abs(x), group);
3837 // Check for overflow if required
3838 if (check_overflow
3839 && (Arm_relocate_functions::calc_grp_residual(abs(x), group) != 0))
3840 return This::STATUS_OVERFLOW;
3842 // Mask out the value and the ADD/SUB part of the opcode; take care
3843 // not to destroy the S bit.
3844 insn &= 0xff1ff000;
3845 // Set the opcode according to whether the value to go in the
3846 // place is negative.
3847 insn |= ((x < 0) ? 0x00400000 : 0x00800000);
3848 // Encode the offset (encoded Gn).
3849 insn |= gn;
3851 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3852 return This::STATUS_OKAY;
3855 // R_ARM_LDR_PC_G0: S + A - P
3856 // R_ARM_LDR_PC_G1: S + A - P
3857 // R_ARM_LDR_PC_G2: S + A - P
3858 // R_ARM_LDR_SB_G0: S + A - B(S)
3859 // R_ARM_LDR_SB_G1: S + A - B(S)
3860 // R_ARM_LDR_SB_G2: S + A - B(S)
3861 static inline typename This::Status
3862 arm_grp_ldr(unsigned char* view,
3863 const Sized_relobj_file<32, big_endian>* object,
3864 const Symbol_value<32>* psymval,
3865 const int group,
3866 Arm_address address)
3868 gold_assert(group >= 0 && group < 3);
3869 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3870 Valtype* wv = reinterpret_cast<Valtype*>(view);
3871 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3873 const int sign = (insn & 0x00800000) ? 1 : -1;
3874 int32_t addend = (insn & 0xfff) * sign;
3875 int32_t x = (psymval->value(object, addend) - address);
3876 // Calculate the relevant G(n-1) value to obtain this stage residual.
3877 Valtype residual =
3878 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3879 if (residual >= 0x1000)
3880 return This::STATUS_OVERFLOW;
3882 // Mask out the value and U bit.
3883 insn &= 0xff7ff000;
3884 // Set the U bit for non-negative values.
3885 if (x >= 0)
3886 insn |= 0x00800000;
3887 insn |= residual;
3889 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3890 return This::STATUS_OKAY;
3893 // R_ARM_LDRS_PC_G0: S + A - P
3894 // R_ARM_LDRS_PC_G1: S + A - P
3895 // R_ARM_LDRS_PC_G2: S + A - P
3896 // R_ARM_LDRS_SB_G0: S + A - B(S)
3897 // R_ARM_LDRS_SB_G1: S + A - B(S)
3898 // R_ARM_LDRS_SB_G2: S + A - B(S)
3899 static inline typename This::Status
3900 arm_grp_ldrs(unsigned char* view,
3901 const Sized_relobj_file<32, big_endian>* object,
3902 const Symbol_value<32>* psymval,
3903 const int group,
3904 Arm_address address)
3906 gold_assert(group >= 0 && group < 3);
3907 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3908 Valtype* wv = reinterpret_cast<Valtype*>(view);
3909 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3911 const int sign = (insn & 0x00800000) ? 1 : -1;
3912 int32_t addend = (((insn & 0xf00) >> 4) + (insn & 0xf)) * sign;
3913 int32_t x = (psymval->value(object, addend) - address);
3914 // Calculate the relevant G(n-1) value to obtain this stage residual.
3915 Valtype residual =
3916 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3917 if (residual >= 0x100)
3918 return This::STATUS_OVERFLOW;
3920 // Mask out the value and U bit.
3921 insn &= 0xff7ff0f0;
3922 // Set the U bit for non-negative values.
3923 if (x >= 0)
3924 insn |= 0x00800000;
3925 insn |= ((residual & 0xf0) << 4) | (residual & 0xf);
3927 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3928 return This::STATUS_OKAY;
3931 // R_ARM_LDC_PC_G0: S + A - P
3932 // R_ARM_LDC_PC_G1: S + A - P
3933 // R_ARM_LDC_PC_G2: S + A - P
3934 // R_ARM_LDC_SB_G0: S + A - B(S)
3935 // R_ARM_LDC_SB_G1: S + A - B(S)
3936 // R_ARM_LDC_SB_G2: S + A - B(S)
3937 static inline typename This::Status
3938 arm_grp_ldc(unsigned char* view,
3939 const Sized_relobj_file<32, big_endian>* object,
3940 const Symbol_value<32>* psymval,
3941 const int group,
3942 Arm_address address)
3944 gold_assert(group >= 0 && group < 3);
3945 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3946 Valtype* wv = reinterpret_cast<Valtype*>(view);
3947 Valtype insn = elfcpp::Swap<32, big_endian>::readval(wv);
3949 const int sign = (insn & 0x00800000) ? 1 : -1;
3950 int32_t addend = ((insn & 0xff) << 2) * sign;
3951 int32_t x = (psymval->value(object, addend) - address);
3952 // Calculate the relevant G(n-1) value to obtain this stage residual.
3953 Valtype residual =
3954 Arm_relocate_functions::calc_grp_residual(abs(x), group - 1);
3955 if ((residual & 0x3) != 0 || residual >= 0x400)
3956 return This::STATUS_OVERFLOW;
3958 // Mask out the value and U bit.
3959 insn &= 0xff7fff00;
3960 // Set the U bit for non-negative values.
3961 if (x >= 0)
3962 insn |= 0x00800000;
3963 insn |= (residual >> 2);
3965 elfcpp::Swap<32, big_endian>::writeval(wv, insn);
3966 return This::STATUS_OKAY;
3970 // Relocate ARM long branches. This handles relocation types
3971 // R_ARM_CALL, R_ARM_JUMP24, R_ARM_PLT32 and R_ARM_XPC25.
3972 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
3973 // undefined and we do not use PLT in this relocation. In such a case,
3974 // the branch is converted into an NOP.
3976 template<bool big_endian>
3977 typename Arm_relocate_functions<big_endian>::Status
3978 Arm_relocate_functions<big_endian>::arm_branch_common(
3979 unsigned int r_type,
3980 const Relocate_info<32, big_endian>* relinfo,
3981 unsigned char* view,
3982 const Sized_symbol<32>* gsym,
3983 const Arm_relobj<big_endian>* object,
3984 unsigned int r_sym,
3985 const Symbol_value<32>* psymval,
3986 Arm_address address,
3987 Arm_address thumb_bit,
3988 bool is_weakly_undefined_without_plt)
3990 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
3991 Valtype* wv = reinterpret_cast<Valtype*>(view);
3992 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
3994 bool insn_is_b = (((val >> 28) & 0xf) <= 0xe)
3995 && ((val & 0x0f000000UL) == 0x0a000000UL);
3996 bool insn_is_uncond_bl = (val & 0xff000000UL) == 0xeb000000UL;
3997 bool insn_is_cond_bl = (((val >> 28) & 0xf) < 0xe)
3998 && ((val & 0x0f000000UL) == 0x0b000000UL);
3999 bool insn_is_blx = (val & 0xfe000000UL) == 0xfa000000UL;
4000 bool insn_is_any_branch = (val & 0x0e000000UL) == 0x0a000000UL;
4002 // Check that the instruction is valid.
4003 if (r_type == elfcpp::R_ARM_CALL)
4005 if (!insn_is_uncond_bl && !insn_is_blx)
4006 return This::STATUS_BAD_RELOC;
4008 else if (r_type == elfcpp::R_ARM_JUMP24)
4010 if (!insn_is_b && !insn_is_cond_bl)
4011 return This::STATUS_BAD_RELOC;
4013 else if (r_type == elfcpp::R_ARM_PLT32)
4015 if (!insn_is_any_branch)
4016 return This::STATUS_BAD_RELOC;
4018 else if (r_type == elfcpp::R_ARM_XPC25)
4020 // FIXME: AAELF document IH0044C does not say much about it other
4021 // than it being obsolete.
4022 if (!insn_is_any_branch)
4023 return This::STATUS_BAD_RELOC;
4025 else
4026 gold_unreachable();
4028 // A branch to an undefined weak symbol is turned into a jump to
4029 // the next instruction unless a PLT entry will be created.
4030 // Do the same for local undefined symbols.
4031 // The jump to the next instruction is optimized as a NOP depending
4032 // on the architecture.
4033 const Target_arm<big_endian>* arm_target =
4034 Target_arm<big_endian>::default_target();
4035 if (is_weakly_undefined_without_plt)
4037 gold_assert(!parameters->options().relocatable());
4038 Valtype cond = val & 0xf0000000U;
4039 if (arm_target->may_use_arm_nop())
4040 val = cond | 0x0320f000;
4041 else
4042 val = cond | 0x01a00000; // Using pre-UAL nop: mov r0, r0.
4043 elfcpp::Swap<32, big_endian>::writeval(wv, val);
4044 return This::STATUS_OKAY;
4047 Valtype addend = Bits<26>::sign_extend32(val << 2);
4048 Valtype branch_target = psymval->value(object, addend);
4049 int32_t branch_offset = branch_target - address;
4051 // We need a stub if the branch offset is too large or if we need
4052 // to switch mode.
4053 bool may_use_blx = arm_target->may_use_v5t_interworking();
4054 Reloc_stub* stub = NULL;
4056 if (!parameters->options().relocatable()
4057 && (Bits<26>::has_overflow32(branch_offset)
4058 || ((thumb_bit != 0)
4059 && !(may_use_blx && r_type == elfcpp::R_ARM_CALL))))
4061 Valtype unadjusted_branch_target = psymval->value(object, 0);
4063 Stub_type stub_type =
4064 Reloc_stub::stub_type_for_reloc(r_type, address,
4065 unadjusted_branch_target,
4066 (thumb_bit != 0));
4067 if (stub_type != arm_stub_none)
4069 Stub_table<big_endian>* stub_table =
4070 object->stub_table(relinfo->data_shndx);
4071 gold_assert(stub_table != NULL);
4073 Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend);
4074 stub = stub_table->find_reloc_stub(stub_key);
4075 gold_assert(stub != NULL);
4076 thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0;
4077 branch_target = stub_table->address() + stub->offset() + addend;
4078 branch_offset = branch_target - address;
4079 gold_assert(!Bits<26>::has_overflow32(branch_offset));
4083 // At this point, if we still need to switch mode, the instruction
4084 // must either be a BLX or a BL that can be converted to a BLX.
4085 if (thumb_bit != 0)
4087 // Turn BL to BLX.
4088 gold_assert(may_use_blx && r_type == elfcpp::R_ARM_CALL);
4089 val = (val & 0xffffff) | 0xfa000000 | ((branch_offset & 2) << 23);
4092 val = Bits<32>::bit_select32(val, (branch_offset >> 2), 0xffffffUL);
4093 elfcpp::Swap<32, big_endian>::writeval(wv, val);
4094 return (Bits<26>::has_overflow32(branch_offset)
4095 ? This::STATUS_OVERFLOW
4096 : This::STATUS_OKAY);
4099 // Relocate THUMB long branches. This handles relocation types
4100 // R_ARM_THM_CALL, R_ARM_THM_JUMP24 and R_ARM_THM_XPC22.
4101 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
4102 // undefined and we do not use PLT in this relocation. In such a case,
4103 // the branch is converted into an NOP.
4105 template<bool big_endian>
4106 typename Arm_relocate_functions<big_endian>::Status
4107 Arm_relocate_functions<big_endian>::thumb_branch_common(
4108 unsigned int r_type,
4109 const Relocate_info<32, big_endian>* relinfo,
4110 unsigned char* view,
4111 const Sized_symbol<32>* gsym,
4112 const Arm_relobj<big_endian>* object,
4113 unsigned int r_sym,
4114 const Symbol_value<32>* psymval,
4115 Arm_address address,
4116 Arm_address thumb_bit,
4117 bool is_weakly_undefined_without_plt)
4119 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
4120 Valtype* wv = reinterpret_cast<Valtype*>(view);
4121 uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
4122 uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
4124 // FIXME: These tests are too loose and do not take THUMB/THUMB-2 difference
4125 // into account.
4126 bool is_bl_insn = (lower_insn & 0x1000U) == 0x1000U;
4127 bool is_blx_insn = (lower_insn & 0x1000U) == 0x0000U;
4129 // Check that the instruction is valid.
4130 if (r_type == elfcpp::R_ARM_THM_CALL)
4132 if (!is_bl_insn && !is_blx_insn)
4133 return This::STATUS_BAD_RELOC;
4135 else if (r_type == elfcpp::R_ARM_THM_JUMP24)
4137 // This cannot be a BLX.
4138 if (!is_bl_insn)
4139 return This::STATUS_BAD_RELOC;
4141 else if (r_type == elfcpp::R_ARM_THM_XPC22)
4143 // Check for Thumb to Thumb call.
4144 if (!is_blx_insn)
4145 return This::STATUS_BAD_RELOC;
4146 if (thumb_bit != 0)
4148 gold_warning(_("%s: Thumb BLX instruction targets "
4149 "thumb function '%s'."),
4150 object->name().c_str(),
4151 (gsym ? gsym->name() : "(local)"));
4152 // Convert BLX to BL.
4153 lower_insn |= 0x1000U;
4156 else
4157 gold_unreachable();
4159 // A branch to an undefined weak symbol is turned into a jump to
4160 // the next instruction unless a PLT entry will be created.
4161 // The jump to the next instruction is optimized as a NOP.W for
4162 // Thumb-2 enabled architectures.
4163 const Target_arm<big_endian>* arm_target =
4164 Target_arm<big_endian>::default_target();
4165 if (is_weakly_undefined_without_plt)
4167 gold_assert(!parameters->options().relocatable());
4168 if (arm_target->may_use_thumb2_nop())
4170 elfcpp::Swap<16, big_endian>::writeval(wv, 0xf3af);
4171 elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0x8000);
4173 else
4175 elfcpp::Swap<16, big_endian>::writeval(wv, 0xe000);
4176 elfcpp::Swap<16, big_endian>::writeval(wv + 1, 0xbf00);
4178 return This::STATUS_OKAY;
4181 int32_t addend = This::thumb32_branch_offset(upper_insn, lower_insn);
4182 Arm_address branch_target = psymval->value(object, addend);
4184 // For BLX, bit 1 of target address comes from bit 1 of base address.
4185 bool may_use_blx = arm_target->may_use_v5t_interworking();
4186 if (thumb_bit == 0 && may_use_blx)
4187 branch_target = Bits<32>::bit_select32(branch_target, address, 0x2);
4189 int32_t branch_offset = branch_target - address;
4191 // We need a stub if the branch offset is too large or if we need
4192 // to switch mode.
4193 bool thumb2 = arm_target->using_thumb2();
4194 if (!parameters->options().relocatable()
4195 && ((!thumb2 && Bits<23>::has_overflow32(branch_offset))
4196 || (thumb2 && Bits<25>::has_overflow32(branch_offset))
4197 || ((thumb_bit == 0)
4198 && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx)
4199 || r_type == elfcpp::R_ARM_THM_JUMP24))))
4201 Arm_address unadjusted_branch_target = psymval->value(object, 0);
4203 Stub_type stub_type =
4204 Reloc_stub::stub_type_for_reloc(r_type, address,
4205 unadjusted_branch_target,
4206 (thumb_bit != 0));
4208 if (stub_type != arm_stub_none)
4210 Stub_table<big_endian>* stub_table =
4211 object->stub_table(relinfo->data_shndx);
4212 gold_assert(stub_table != NULL);
4214 Reloc_stub::Key stub_key(stub_type, gsym, object, r_sym, addend);
4215 Reloc_stub* stub = stub_table->find_reloc_stub(stub_key);
4216 gold_assert(stub != NULL);
4217 thumb_bit = stub->stub_template()->entry_in_thumb_mode() ? 1 : 0;
4218 branch_target = stub_table->address() + stub->offset() + addend;
4219 if (thumb_bit == 0 && may_use_blx)
4220 branch_target = Bits<32>::bit_select32(branch_target, address, 0x2);
4221 branch_offset = branch_target - address;
4225 // At this point, if we still need to switch mode, the instruction
4226 // must either be a BLX or a BL that can be converted to a BLX.
4227 if (thumb_bit == 0)
4229 gold_assert(may_use_blx
4230 && (r_type == elfcpp::R_ARM_THM_CALL
4231 || r_type == elfcpp::R_ARM_THM_XPC22));
4232 // Make sure this is a BLX.
4233 lower_insn &= ~0x1000U;
4235 else
4237 // Make sure this is a BL.
4238 lower_insn |= 0x1000U;
4241 // For a BLX instruction, make sure that the relocation is rounded up
4242 // to a word boundary. This follows the semantics of the instruction
4243 // which specifies that bit 1 of the target address will come from bit
4244 // 1 of the base address.
4245 if ((lower_insn & 0x5000U) == 0x4000U)
4246 gold_assert((branch_offset & 3) == 0);
4248 // Put BRANCH_OFFSET back into the insn. Assumes two's complement.
4249 // We use the Thumb-2 encoding, which is safe even if dealing with
4250 // a Thumb-1 instruction by virtue of our overflow check above. */
4251 upper_insn = This::thumb32_branch_upper(upper_insn, branch_offset);
4252 lower_insn = This::thumb32_branch_lower(lower_insn, branch_offset);
4254 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
4255 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
4257 gold_assert(!Bits<25>::has_overflow32(branch_offset));
4259 return ((thumb2
4260 ? Bits<25>::has_overflow32(branch_offset)
4261 : Bits<23>::has_overflow32(branch_offset))
4262 ? This::STATUS_OVERFLOW
4263 : This::STATUS_OKAY);
4266 // Relocate THUMB-2 long conditional branches.
4267 // If IS_WEAK_UNDEFINED_WITH_PLT is true. The target symbol is weakly
4268 // undefined and we do not use PLT in this relocation. In such a case,
4269 // the branch is converted into an NOP.
4271 template<bool big_endian>
4272 typename Arm_relocate_functions<big_endian>::Status
4273 Arm_relocate_functions<big_endian>::thm_jump19(
4274 unsigned char* view,
4275 const Arm_relobj<big_endian>* object,
4276 const Symbol_value<32>* psymval,
4277 Arm_address address,
4278 Arm_address thumb_bit)
4280 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
4281 Valtype* wv = reinterpret_cast<Valtype*>(view);
4282 uint32_t upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
4283 uint32_t lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
4284 int32_t addend = This::thumb32_cond_branch_offset(upper_insn, lower_insn);
4286 Arm_address branch_target = psymval->value(object, addend);
4287 int32_t branch_offset = branch_target - address;
4289 // ??? Should handle interworking? GCC might someday try to
4290 // use this for tail calls.
4291 // FIXME: We do support thumb entry to PLT yet.
4292 if (thumb_bit == 0)
4294 gold_error(_("conditional branch to PLT in THUMB-2 not supported yet."));
4295 return This::STATUS_BAD_RELOC;
4298 // Put RELOCATION back into the insn.
4299 upper_insn = This::thumb32_cond_branch_upper(upper_insn, branch_offset);
4300 lower_insn = This::thumb32_cond_branch_lower(lower_insn, branch_offset);
4302 // Put the relocated value back in the object file:
4303 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
4304 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
4306 return (Bits<21>::has_overflow32(branch_offset)
4307 ? This::STATUS_OVERFLOW
4308 : This::STATUS_OKAY);
4311 // Get the GOT section, creating it if necessary.
4313 template<bool big_endian>
4314 Arm_output_data_got<big_endian>*
4315 Target_arm<big_endian>::got_section(Symbol_table* symtab, Layout* layout)
4317 if (this->got_ == NULL)
4319 gold_assert(symtab != NULL && layout != NULL);
4321 // When using -z now, we can treat .got as a relro section.
4322 // Without -z now, it is modified after program startup by lazy
4323 // PLT relocations.
4324 bool is_got_relro = parameters->options().now();
4325 Output_section_order got_order = (is_got_relro
4326 ? ORDER_RELRO_LAST
4327 : ORDER_DATA);
4329 // Unlike some targets (.e.g x86), ARM does not use separate .got and
4330 // .got.plt sections in output. The output .got section contains both
4331 // PLT and non-PLT GOT entries.
4332 this->got_ = new Arm_output_data_got<big_endian>(symtab, layout);
4334 layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
4335 (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE),
4336 this->got_, got_order, is_got_relro);
4338 // The old GNU linker creates a .got.plt section. We just
4339 // create another set of data in the .got section. Note that we
4340 // always create a PLT if we create a GOT, although the PLT
4341 // might be empty.
4342 this->got_plt_ = new Output_data_space(4, "** GOT PLT");
4343 layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
4344 (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE),
4345 this->got_plt_, got_order, is_got_relro);
4347 // The first three entries are reserved.
4348 this->got_plt_->set_current_data_size(3 * 4);
4350 // Define _GLOBAL_OFFSET_TABLE_ at the start of the PLT.
4351 symtab->define_in_output_data("_GLOBAL_OFFSET_TABLE_", NULL,
4352 Symbol_table::PREDEFINED,
4353 this->got_plt_,
4354 0, 0, elfcpp::STT_OBJECT,
4355 elfcpp::STB_LOCAL,
4356 elfcpp::STV_HIDDEN, 0,
4357 false, false);
4359 // If there are any IRELATIVE relocations, they get GOT entries
4360 // in .got.plt after the jump slot entries.
4361 this->got_irelative_ = new Output_data_space(4, "** GOT IRELATIVE PLT");
4362 layout->add_output_section_data(".got", elfcpp::SHT_PROGBITS,
4363 (elfcpp::SHF_ALLOC | elfcpp::SHF_WRITE),
4364 this->got_irelative_,
4365 got_order, is_got_relro);
4368 return this->got_;
4371 // Get the dynamic reloc section, creating it if necessary.
4373 template<bool big_endian>
4374 typename Target_arm<big_endian>::Reloc_section*
4375 Target_arm<big_endian>::rel_dyn_section(Layout* layout)
4377 if (this->rel_dyn_ == NULL)
4379 gold_assert(layout != NULL);
4380 // Create both relocation sections in the same place, so as to ensure
4381 // their relative order in the output section.
4382 this->rel_dyn_ = new Reloc_section(parameters->options().combreloc());
4383 this->rel_irelative_ = new Reloc_section(false);
4384 layout->add_output_section_data(".rel.dyn", elfcpp::SHT_REL,
4385 elfcpp::SHF_ALLOC, this->rel_dyn_,
4386 ORDER_DYNAMIC_RELOCS, false);
4387 layout->add_output_section_data(".rel.dyn", elfcpp::SHT_REL,
4388 elfcpp::SHF_ALLOC, this->rel_irelative_,
4389 ORDER_DYNAMIC_RELOCS, false);
4391 return this->rel_dyn_;
4395 // Get the section to use for IRELATIVE relocs, creating it if necessary. These
4396 // go in .rela.dyn, but only after all other dynamic relocations. They need to
4397 // follow the other dynamic relocations so that they can refer to global
4398 // variables initialized by those relocs.
4400 template<bool big_endian>
4401 typename Target_arm<big_endian>::Reloc_section*
4402 Target_arm<big_endian>::rel_irelative_section(Layout* layout)
4404 if (this->rel_irelative_ == NULL)
4406 // Delegate the creation to rel_dyn_section so as to ensure their order in
4407 // the output section.
4408 this->rel_dyn_section(layout);
4409 gold_assert(this->rel_irelative_ != NULL
4410 && (this->rel_dyn_->output_section()
4411 == this->rel_irelative_->output_section()));
4413 return this->rel_irelative_;
4417 // Insn_template methods.
4419 // Return byte size of an instruction template.
4421 size_t
4422 Insn_template::size() const
4424 switch (this->type())
4426 case THUMB16_TYPE:
4427 case THUMB16_SPECIAL_TYPE:
4428 return 2;
4429 case ARM_TYPE:
4430 case THUMB32_TYPE:
4431 case DATA_TYPE:
4432 return 4;
4433 default:
4434 gold_unreachable();
4438 // Return alignment of an instruction template.
4440 unsigned
4441 Insn_template::alignment() const
4443 switch (this->type())
4445 case THUMB16_TYPE:
4446 case THUMB16_SPECIAL_TYPE:
4447 case THUMB32_TYPE:
4448 return 2;
4449 case ARM_TYPE:
4450 case DATA_TYPE:
4451 return 4;
4452 default:
4453 gold_unreachable();
4457 // Stub_template methods.
4459 Stub_template::Stub_template(
4460 Stub_type type, const Insn_template* insns,
4461 size_t insn_count)
4462 : type_(type), insns_(insns), insn_count_(insn_count), alignment_(1),
4463 entry_in_thumb_mode_(false), relocs_()
4465 off_t offset = 0;
4467 // Compute byte size and alignment of stub template.
4468 for (size_t i = 0; i < insn_count; i++)
4470 unsigned insn_alignment = insns[i].alignment();
4471 size_t insn_size = insns[i].size();
4472 gold_assert((offset & (insn_alignment - 1)) == 0);
4473 this->alignment_ = std::max(this->alignment_, insn_alignment);
4474 switch (insns[i].type())
4476 case Insn_template::THUMB16_TYPE:
4477 case Insn_template::THUMB16_SPECIAL_TYPE:
4478 if (i == 0)
4479 this->entry_in_thumb_mode_ = true;
4480 break;
4482 case Insn_template::THUMB32_TYPE:
4483 if (insns[i].r_type() != elfcpp::R_ARM_NONE)
4484 this->relocs_.push_back(Reloc(i, offset));
4485 if (i == 0)
4486 this->entry_in_thumb_mode_ = true;
4487 break;
4489 case Insn_template::ARM_TYPE:
4490 // Handle cases where the target is encoded within the
4491 // instruction.
4492 if (insns[i].r_type() == elfcpp::R_ARM_JUMP24)
4493 this->relocs_.push_back(Reloc(i, offset));
4494 break;
4496 case Insn_template::DATA_TYPE:
4497 // Entry point cannot be data.
4498 gold_assert(i != 0);
4499 this->relocs_.push_back(Reloc(i, offset));
4500 break;
4502 default:
4503 gold_unreachable();
4505 offset += insn_size;
4507 this->size_ = offset;
4510 // Stub methods.
4512 // Template to implement do_write for a specific target endianness.
4514 template<bool big_endian>
4515 void inline
4516 Stub::do_fixed_endian_write(unsigned char* view, section_size_type view_size)
4518 const Stub_template* stub_template = this->stub_template();
4519 const Insn_template* insns = stub_template->insns();
4520 const bool enable_be8 = parameters->options().be8();
4522 unsigned char* pov = view;
4523 for (size_t i = 0; i < stub_template->insn_count(); i++)
4525 switch (insns[i].type())
4527 case Insn_template::THUMB16_TYPE:
4528 if (enable_be8)
4529 elfcpp::Swap<16, false>::writeval(pov, insns[i].data() & 0xffff);
4530 else
4531 elfcpp::Swap<16, big_endian>::writeval(pov,
4532 insns[i].data() & 0xffff);
4533 break;
4534 case Insn_template::THUMB16_SPECIAL_TYPE:
4535 if (enable_be8)
4536 elfcpp::Swap<16, false>::writeval(pov, this->thumb16_special(i));
4537 else
4538 elfcpp::Swap<16, big_endian>::writeval(pov,
4539 this->thumb16_special(i));
4540 break;
4541 case Insn_template::THUMB32_TYPE:
4543 uint32_t hi = (insns[i].data() >> 16) & 0xffff;
4544 uint32_t lo = insns[i].data() & 0xffff;
4545 if (enable_be8)
4547 elfcpp::Swap<16, false>::writeval(pov, hi);
4548 elfcpp::Swap<16, false>::writeval(pov + 2, lo);
4550 else
4552 elfcpp::Swap<16, big_endian>::writeval(pov, hi);
4553 elfcpp::Swap<16, big_endian>::writeval(pov + 2, lo);
4556 break;
4557 case Insn_template::ARM_TYPE:
4558 if (enable_be8)
4559 elfcpp::Swap<32, false>::writeval(pov, insns[i].data());
4560 else
4561 elfcpp::Swap<32, big_endian>::writeval(pov, insns[i].data());
4562 break;
4563 case Insn_template::DATA_TYPE:
4564 elfcpp::Swap<32, big_endian>::writeval(pov, insns[i].data());
4565 break;
4566 default:
4567 gold_unreachable();
4569 pov += insns[i].size();
4571 gold_assert(static_cast<section_size_type>(pov - view) == view_size);
4574 // Reloc_stub::Key methods.
4576 // Dump a Key as a string for debugging.
4578 std::string
4579 Reloc_stub::Key::name() const
4581 if (this->r_sym_ == invalid_index)
4583 // Global symbol key name
4584 // <stub-type>:<symbol name>:<addend>.
4585 const std::string sym_name = this->u_.symbol->name();
4586 // We need to print two hex number and two colons. So just add 100 bytes
4587 // to the symbol name size.
4588 size_t len = sym_name.size() + 100;
4589 char* buffer = new char[len];
4590 int c = snprintf(buffer, len, "%d:%s:%x", this->stub_type_,
4591 sym_name.c_str(), this->addend_);
4592 gold_assert(c > 0 && c < static_cast<int>(len));
4593 delete[] buffer;
4594 return std::string(buffer);
4596 else
4598 // local symbol key name
4599 // <stub-type>:<object>:<r_sym>:<addend>.
4600 const size_t len = 200;
4601 char buffer[len];
4602 int c = snprintf(buffer, len, "%d:%p:%u:%x", this->stub_type_,
4603 this->u_.relobj, this->r_sym_, this->addend_);
4604 gold_assert(c > 0 && c < static_cast<int>(len));
4605 return std::string(buffer);
4609 // Reloc_stub methods.
4611 // Determine the type of stub needed, if any, for a relocation of R_TYPE at
4612 // LOCATION to DESTINATION.
4613 // This code is based on the arm_type_of_stub function in
4614 // bfd/elf32-arm.c. We have changed the interface a little to keep the Stub
4615 // class simple.
4617 Stub_type
4618 Reloc_stub::stub_type_for_reloc(
4619 unsigned int r_type,
4620 Arm_address location,
4621 Arm_address destination,
4622 bool target_is_thumb)
4624 Stub_type stub_type = arm_stub_none;
4626 // This is a bit ugly but we want to avoid using a templated class for
4627 // big and little endianities.
4628 bool may_use_blx;
4629 bool should_force_pic_veneer = parameters->options().pic_veneer();
4630 bool thumb2;
4631 bool thumb_only;
4632 if (parameters->target().is_big_endian())
4634 const Target_arm<true>* big_endian_target =
4635 Target_arm<true>::default_target();
4636 may_use_blx = big_endian_target->may_use_v5t_interworking();
4637 should_force_pic_veneer |= big_endian_target->should_force_pic_veneer();
4638 thumb2 = big_endian_target->using_thumb2();
4639 thumb_only = big_endian_target->using_thumb_only();
4641 else
4643 const Target_arm<false>* little_endian_target =
4644 Target_arm<false>::default_target();
4645 may_use_blx = little_endian_target->may_use_v5t_interworking();
4646 should_force_pic_veneer |=
4647 little_endian_target->should_force_pic_veneer();
4648 thumb2 = little_endian_target->using_thumb2();
4649 thumb_only = little_endian_target->using_thumb_only();
4652 int64_t branch_offset;
4653 bool output_is_position_independent =
4654 parameters->options().output_is_position_independent();
4655 if (r_type == elfcpp::R_ARM_THM_CALL || r_type == elfcpp::R_ARM_THM_JUMP24)
4657 // For THUMB BLX instruction, bit 1 of target comes from bit 1 of the
4658 // base address (instruction address + 4).
4659 if ((r_type == elfcpp::R_ARM_THM_CALL) && may_use_blx && !target_is_thumb)
4660 destination = Bits<32>::bit_select32(destination, location, 0x2);
4661 branch_offset = static_cast<int64_t>(destination) - location;
4663 // Handle cases where:
4664 // - this call goes too far (different Thumb/Thumb2 max
4665 // distance)
4666 // - it's a Thumb->Arm call and blx is not available, or it's a
4667 // Thumb->Arm branch (not bl). A stub is needed in this case.
4668 if ((!thumb2
4669 && (branch_offset > THM_MAX_FWD_BRANCH_OFFSET
4670 || (branch_offset < THM_MAX_BWD_BRANCH_OFFSET)))
4671 || (thumb2
4672 && (branch_offset > THM2_MAX_FWD_BRANCH_OFFSET
4673 || (branch_offset < THM2_MAX_BWD_BRANCH_OFFSET)))
4674 || ((!target_is_thumb)
4675 && (((r_type == elfcpp::R_ARM_THM_CALL) && !may_use_blx)
4676 || (r_type == elfcpp::R_ARM_THM_JUMP24))))
4678 if (target_is_thumb)
4680 // Thumb to thumb.
4681 if (!thumb_only)
4683 stub_type = (output_is_position_independent
4684 || should_force_pic_veneer)
4685 // PIC stubs.
4686 ? ((may_use_blx
4687 && (r_type == elfcpp::R_ARM_THM_CALL))
4688 // V5T and above. Stub starts with ARM code, so
4689 // we must be able to switch mode before
4690 // reaching it, which is only possible for 'bl'
4691 // (ie R_ARM_THM_CALL relocation).
4692 ? arm_stub_long_branch_any_thumb_pic
4693 // On V4T, use Thumb code only.
4694 : arm_stub_long_branch_v4t_thumb_thumb_pic)
4696 // non-PIC stubs.
4697 : ((may_use_blx
4698 && (r_type == elfcpp::R_ARM_THM_CALL))
4699 ? arm_stub_long_branch_any_any // V5T and above.
4700 : arm_stub_long_branch_v4t_thumb_thumb); // V4T.
4702 else
4704 stub_type = (output_is_position_independent
4705 || should_force_pic_veneer)
4706 ? arm_stub_long_branch_thumb_only_pic // PIC stub.
4707 : arm_stub_long_branch_thumb_only; // non-PIC stub.
4710 else
4712 // Thumb to arm.
4714 // FIXME: We should check that the input section is from an
4715 // object that has interwork enabled.
4717 stub_type = (output_is_position_independent
4718 || should_force_pic_veneer)
4719 // PIC stubs.
4720 ? ((may_use_blx
4721 && (r_type == elfcpp::R_ARM_THM_CALL))
4722 ? arm_stub_long_branch_any_arm_pic // V5T and above.
4723 : arm_stub_long_branch_v4t_thumb_arm_pic) // V4T.
4725 // non-PIC stubs.
4726 : ((may_use_blx
4727 && (r_type == elfcpp::R_ARM_THM_CALL))
4728 ? arm_stub_long_branch_any_any // V5T and above.
4729 : arm_stub_long_branch_v4t_thumb_arm); // V4T.
4731 // Handle v4t short branches.
4732 if ((stub_type == arm_stub_long_branch_v4t_thumb_arm)
4733 && (branch_offset <= THM_MAX_FWD_BRANCH_OFFSET)
4734 && (branch_offset >= THM_MAX_BWD_BRANCH_OFFSET))
4735 stub_type = arm_stub_short_branch_v4t_thumb_arm;
4739 else if (r_type == elfcpp::R_ARM_CALL
4740 || r_type == elfcpp::R_ARM_JUMP24
4741 || r_type == elfcpp::R_ARM_PLT32)
4743 branch_offset = static_cast<int64_t>(destination) - location;
4744 if (target_is_thumb)
4746 // Arm to thumb.
4748 // FIXME: We should check that the input section is from an
4749 // object that has interwork enabled.
4751 // We have an extra 2-bytes reach because of
4752 // the mode change (bit 24 (H) of BLX encoding).
4753 if (branch_offset > (ARM_MAX_FWD_BRANCH_OFFSET + 2)
4754 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET)
4755 || ((r_type == elfcpp::R_ARM_CALL) && !may_use_blx)
4756 || (r_type == elfcpp::R_ARM_JUMP24)
4757 || (r_type == elfcpp::R_ARM_PLT32))
4759 stub_type = (output_is_position_independent
4760 || should_force_pic_veneer)
4761 // PIC stubs.
4762 ? (may_use_blx
4763 ? arm_stub_long_branch_any_thumb_pic// V5T and above.
4764 : arm_stub_long_branch_v4t_arm_thumb_pic) // V4T stub.
4766 // non-PIC stubs.
4767 : (may_use_blx
4768 ? arm_stub_long_branch_any_any // V5T and above.
4769 : arm_stub_long_branch_v4t_arm_thumb); // V4T.
4772 else
4774 // Arm to arm.
4775 if (branch_offset > ARM_MAX_FWD_BRANCH_OFFSET
4776 || (branch_offset < ARM_MAX_BWD_BRANCH_OFFSET))
4778 stub_type = (output_is_position_independent
4779 || should_force_pic_veneer)
4780 ? arm_stub_long_branch_any_arm_pic // PIC stubs.
4781 : arm_stub_long_branch_any_any; /// non-PIC.
4786 return stub_type;
4789 // Cortex_a8_stub methods.
4791 // Return the instruction for a THUMB16_SPECIAL_TYPE instruction template.
4792 // I is the position of the instruction template in the stub template.
4794 uint16_t
4795 Cortex_a8_stub::do_thumb16_special(size_t i)
4797 // The only use of this is to copy condition code from a conditional
4798 // branch being worked around to the corresponding conditional branch in
4799 // to the stub.
4800 gold_assert(this->stub_template()->type() == arm_stub_a8_veneer_b_cond
4801 && i == 0);
4802 uint16_t data = this->stub_template()->insns()[i].data();
4803 gold_assert((data & 0xff00U) == 0xd000U);
4804 data |= ((this->original_insn_ >> 22) & 0xf) << 8;
4805 return data;
4808 // Stub_factory methods.
4810 Stub_factory::Stub_factory()
4812 // The instruction template sequences are declared as static
4813 // objects and initialized first time the constructor runs.
4815 // Arm/Thumb -> Arm/Thumb long branch stub. On V5T and above, use blx
4816 // to reach the stub if necessary.
4817 static const Insn_template elf32_arm_stub_long_branch_any_any[] =
4819 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4820 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4821 // dcd R_ARM_ABS32(X)
4824 // V4T Arm -> Thumb long branch stub. Used on V4T where blx is not
4825 // available.
4826 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb[] =
4828 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4829 Insn_template::arm_insn(0xe12fff1c), // bx ip
4830 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4831 // dcd R_ARM_ABS32(X)
4834 // Thumb -> Thumb long branch stub. Used on M-profile architectures.
4835 static const Insn_template elf32_arm_stub_long_branch_thumb_only[] =
4837 Insn_template::thumb16_insn(0xb401), // push {r0}
4838 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4839 Insn_template::thumb16_insn(0x4684), // mov ip, r0
4840 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4841 Insn_template::thumb16_insn(0x4760), // bx ip
4842 Insn_template::thumb16_insn(0xbf00), // nop
4843 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4844 // dcd R_ARM_ABS32(X)
4847 // V4T Thumb -> Thumb long branch stub. Using the stack is not
4848 // allowed.
4849 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb[] =
4851 Insn_template::thumb16_insn(0x4778), // bx pc
4852 Insn_template::thumb16_insn(0x46c0), // nop
4853 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4854 Insn_template::arm_insn(0xe12fff1c), // bx ip
4855 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4856 // dcd R_ARM_ABS32(X)
4859 // V4T Thumb -> ARM long branch stub. Used on V4T where blx is not
4860 // available.
4861 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm[] =
4863 Insn_template::thumb16_insn(0x4778), // bx pc
4864 Insn_template::thumb16_insn(0x46c0), // nop
4865 Insn_template::arm_insn(0xe51ff004), // ldr pc, [pc, #-4]
4866 Insn_template::data_word(0, elfcpp::R_ARM_ABS32, 0),
4867 // dcd R_ARM_ABS32(X)
4870 // V4T Thumb -> ARM short branch stub. Shorter variant of the above
4871 // one, when the destination is close enough.
4872 static const Insn_template elf32_arm_stub_short_branch_v4t_thumb_arm[] =
4874 Insn_template::thumb16_insn(0x4778), // bx pc
4875 Insn_template::thumb16_insn(0x46c0), // nop
4876 Insn_template::arm_rel_insn(0xea000000, -8), // b (X-8)
4879 // ARM/Thumb -> ARM long branch stub, PIC. On V5T and above, use
4880 // blx to reach the stub if necessary.
4881 static const Insn_template elf32_arm_stub_long_branch_any_arm_pic[] =
4883 Insn_template::arm_insn(0xe59fc000), // ldr r12, [pc]
4884 Insn_template::arm_insn(0xe08ff00c), // add pc, pc, ip
4885 Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4),
4886 // dcd R_ARM_REL32(X-4)
4889 // ARM/Thumb -> Thumb long branch stub, PIC. On V5T and above, use
4890 // blx to reach the stub if necessary. We can not add into pc;
4891 // it is not guaranteed to mode switch (different in ARMv6 and
4892 // ARMv7).
4893 static const Insn_template elf32_arm_stub_long_branch_any_thumb_pic[] =
4895 Insn_template::arm_insn(0xe59fc004), // ldr r12, [pc, #4]
4896 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4897 Insn_template::arm_insn(0xe12fff1c), // bx ip
4898 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4899 // dcd R_ARM_REL32(X)
4902 // V4T ARM -> ARM long branch stub, PIC.
4903 static const Insn_template elf32_arm_stub_long_branch_v4t_arm_thumb_pic[] =
4905 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4906 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4907 Insn_template::arm_insn(0xe12fff1c), // bx ip
4908 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4909 // dcd R_ARM_REL32(X)
4912 // V4T Thumb -> ARM long branch stub, PIC.
4913 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_arm_pic[] =
4915 Insn_template::thumb16_insn(0x4778), // bx pc
4916 Insn_template::thumb16_insn(0x46c0), // nop
4917 Insn_template::arm_insn(0xe59fc000), // ldr ip, [pc, #0]
4918 Insn_template::arm_insn(0xe08cf00f), // add pc, ip, pc
4919 Insn_template::data_word(0, elfcpp::R_ARM_REL32, -4),
4920 // dcd R_ARM_REL32(X)
4923 // Thumb -> Thumb long branch stub, PIC. Used on M-profile
4924 // architectures.
4925 static const Insn_template elf32_arm_stub_long_branch_thumb_only_pic[] =
4927 Insn_template::thumb16_insn(0xb401), // push {r0}
4928 Insn_template::thumb16_insn(0x4802), // ldr r0, [pc, #8]
4929 Insn_template::thumb16_insn(0x46fc), // mov ip, pc
4930 Insn_template::thumb16_insn(0x4484), // add ip, r0
4931 Insn_template::thumb16_insn(0xbc01), // pop {r0}
4932 Insn_template::thumb16_insn(0x4760), // bx ip
4933 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 4),
4934 // dcd R_ARM_REL32(X)
4937 // V4T Thumb -> Thumb long branch stub, PIC. Using the stack is not
4938 // allowed.
4939 static const Insn_template elf32_arm_stub_long_branch_v4t_thumb_thumb_pic[] =
4941 Insn_template::thumb16_insn(0x4778), // bx pc
4942 Insn_template::thumb16_insn(0x46c0), // nop
4943 Insn_template::arm_insn(0xe59fc004), // ldr ip, [pc, #4]
4944 Insn_template::arm_insn(0xe08fc00c), // add ip, pc, ip
4945 Insn_template::arm_insn(0xe12fff1c), // bx ip
4946 Insn_template::data_word(0, elfcpp::R_ARM_REL32, 0),
4947 // dcd R_ARM_REL32(X)
4950 // Cortex-A8 erratum-workaround stubs.
4952 // Stub used for conditional branches (which may be beyond +/-1MB away,
4953 // so we can't use a conditional branch to reach this stub).
4955 // original code:
4957 // b<cond> X
4958 // after:
4960 static const Insn_template elf32_arm_stub_a8_veneer_b_cond[] =
4962 Insn_template::thumb16_bcond_insn(0xd001), // b<cond>.n true
4963 Insn_template::thumb32_b_insn(0xf000b800, -4), // b.w after
4964 Insn_template::thumb32_b_insn(0xf000b800, -4) // true:
4965 // b.w X
4968 // Stub used for b.w and bl.w instructions.
4970 static const Insn_template elf32_arm_stub_a8_veneer_b[] =
4972 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4975 static const Insn_template elf32_arm_stub_a8_veneer_bl[] =
4977 Insn_template::thumb32_b_insn(0xf000b800, -4) // b.w dest
4980 // Stub used for Thumb-2 blx.w instructions. We modified the original blx.w
4981 // instruction (which switches to ARM mode) to point to this stub. Jump to
4982 // the real destination using an ARM-mode branch.
4983 static const Insn_template elf32_arm_stub_a8_veneer_blx[] =
4985 Insn_template::arm_rel_insn(0xea000000, -8) // b dest
4988 // Stub used to provide an interworking for R_ARM_V4BX relocation
4989 // (bx r[n] instruction).
4990 static const Insn_template elf32_arm_stub_v4_veneer_bx[] =
4992 Insn_template::arm_insn(0xe3100001), // tst r<n>, #1
4993 Insn_template::arm_insn(0x01a0f000), // moveq pc, r<n>
4994 Insn_template::arm_insn(0xe12fff10) // bx r<n>
4997 // Fill in the stub template look-up table. Stub templates are constructed
4998 // per instance of Stub_factory for fast look-up without locking
4999 // in a thread-enabled environment.
5001 this->stub_templates_[arm_stub_none] =
5002 new Stub_template(arm_stub_none, NULL, 0);
5004 #define DEF_STUB(x) \
5005 do \
5007 size_t array_size \
5008 = sizeof(elf32_arm_stub_##x) / sizeof(elf32_arm_stub_##x[0]); \
5009 Stub_type type = arm_stub_##x; \
5010 this->stub_templates_[type] = \
5011 new Stub_template(type, elf32_arm_stub_##x, array_size); \
5013 while (0);
5015 DEF_STUBS
5016 #undef DEF_STUB
5019 // Stub_table methods.
5021 // Remove all Cortex-A8 stub.
5023 template<bool big_endian>
5024 void
5025 Stub_table<big_endian>::remove_all_cortex_a8_stubs()
5027 for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin();
5028 p != this->cortex_a8_stubs_.end();
5029 ++p)
5030 delete p->second;
5031 this->cortex_a8_stubs_.clear();
5034 // Relocate one stub. This is a helper for Stub_table::relocate_stubs().
5036 template<bool big_endian>
5037 void
5038 Stub_table<big_endian>::relocate_stub(
5039 Stub* stub,
5040 const Relocate_info<32, big_endian>* relinfo,
5041 Target_arm<big_endian>* arm_target,
5042 Output_section* output_section,
5043 unsigned char* view,
5044 Arm_address address,
5045 section_size_type view_size)
5047 const Stub_template* stub_template = stub->stub_template();
5048 if (stub_template->reloc_count() != 0)
5050 // Adjust view to cover the stub only.
5051 section_size_type offset = stub->offset();
5052 section_size_type stub_size = stub_template->size();
5053 gold_assert(offset + stub_size <= view_size);
5055 arm_target->relocate_stub(stub, relinfo, output_section, view + offset,
5056 address + offset, stub_size);
5060 // Relocate all stubs in this stub table.
5062 template<bool big_endian>
5063 void
5064 Stub_table<big_endian>::relocate_stubs(
5065 const Relocate_info<32, big_endian>* relinfo,
5066 Target_arm<big_endian>* arm_target,
5067 Output_section* output_section,
5068 unsigned char* view,
5069 Arm_address address,
5070 section_size_type view_size)
5072 // If we are passed a view bigger than the stub table's. we need to
5073 // adjust the view.
5074 gold_assert(address == this->address()
5075 && (view_size
5076 == static_cast<section_size_type>(this->data_size())));
5078 // Relocate all relocation stubs.
5079 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
5080 p != this->reloc_stubs_.end();
5081 ++p)
5082 this->relocate_stub(p->second, relinfo, arm_target, output_section, view,
5083 address, view_size);
5085 // Relocate all Cortex-A8 stubs.
5086 for (Cortex_a8_stub_list::iterator p = this->cortex_a8_stubs_.begin();
5087 p != this->cortex_a8_stubs_.end();
5088 ++p)
5089 this->relocate_stub(p->second, relinfo, arm_target, output_section, view,
5090 address, view_size);
5092 // Relocate all ARM V4BX stubs.
5093 for (Arm_v4bx_stub_list::iterator p = this->arm_v4bx_stubs_.begin();
5094 p != this->arm_v4bx_stubs_.end();
5095 ++p)
5097 if (*p != NULL)
5098 this->relocate_stub(*p, relinfo, arm_target, output_section, view,
5099 address, view_size);
5103 // Write out the stubs to file.
5105 template<bool big_endian>
5106 void
5107 Stub_table<big_endian>::do_write(Output_file* of)
5109 off_t offset = this->offset();
5110 const section_size_type oview_size =
5111 convert_to_section_size_type(this->data_size());
5112 unsigned char* const oview = of->get_output_view(offset, oview_size);
5114 // Write relocation stubs.
5115 for (typename Reloc_stub_map::const_iterator p = this->reloc_stubs_.begin();
5116 p != this->reloc_stubs_.end();
5117 ++p)
5119 Reloc_stub* stub = p->second;
5120 Arm_address address = this->address() + stub->offset();
5121 gold_assert(address
5122 == align_address(address,
5123 stub->stub_template()->alignment()));
5124 stub->write(oview + stub->offset(), stub->stub_template()->size(),
5125 big_endian);
5128 // Write Cortex-A8 stubs.
5129 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
5130 p != this->cortex_a8_stubs_.end();
5131 ++p)
5133 Cortex_a8_stub* stub = p->second;
5134 Arm_address address = this->address() + stub->offset();
5135 gold_assert(address
5136 == align_address(address,
5137 stub->stub_template()->alignment()));
5138 stub->write(oview + stub->offset(), stub->stub_template()->size(),
5139 big_endian);
5142 // Write ARM V4BX relocation stubs.
5143 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
5144 p != this->arm_v4bx_stubs_.end();
5145 ++p)
5147 if (*p == NULL)
5148 continue;
5150 Arm_address address = this->address() + (*p)->offset();
5151 gold_assert(address
5152 == align_address(address,
5153 (*p)->stub_template()->alignment()));
5154 (*p)->write(oview + (*p)->offset(), (*p)->stub_template()->size(),
5155 big_endian);
5158 of->write_output_view(this->offset(), oview_size, oview);
5161 // Update the data size and address alignment of the stub table at the end
5162 // of a relaxation pass. Return true if either the data size or the
5163 // alignment changed in this relaxation pass.
5165 template<bool big_endian>
5166 bool
5167 Stub_table<big_endian>::update_data_size_and_addralign()
5169 // Go over all stubs in table to compute data size and address alignment.
5170 off_t size = this->reloc_stubs_size_;
5171 unsigned addralign = this->reloc_stubs_addralign_;
5173 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
5174 p != this->cortex_a8_stubs_.end();
5175 ++p)
5177 const Stub_template* stub_template = p->second->stub_template();
5178 addralign = std::max(addralign, stub_template->alignment());
5179 size = (align_address(size, stub_template->alignment())
5180 + stub_template->size());
5183 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
5184 p != this->arm_v4bx_stubs_.end();
5185 ++p)
5187 if (*p == NULL)
5188 continue;
5190 const Stub_template* stub_template = (*p)->stub_template();
5191 addralign = std::max(addralign, stub_template->alignment());
5192 size = (align_address(size, stub_template->alignment())
5193 + stub_template->size());
5196 // Check if either data size or alignment changed in this pass.
5197 // Update prev_data_size_ and prev_addralign_. These will be used
5198 // as the current data size and address alignment for the next pass.
5199 bool changed = size != this->prev_data_size_;
5200 this->prev_data_size_ = size;
5202 if (addralign != this->prev_addralign_)
5203 changed = true;
5204 this->prev_addralign_ = addralign;
5206 return changed;
5209 // Finalize the stubs. This sets the offsets of the stubs within the stub
5210 // table. It also marks all input sections needing Cortex-A8 workaround.
5212 template<bool big_endian>
5213 void
5214 Stub_table<big_endian>::finalize_stubs()
5216 off_t off = this->reloc_stubs_size_;
5217 for (Cortex_a8_stub_list::const_iterator p = this->cortex_a8_stubs_.begin();
5218 p != this->cortex_a8_stubs_.end();
5219 ++p)
5221 Cortex_a8_stub* stub = p->second;
5222 const Stub_template* stub_template = stub->stub_template();
5223 uint64_t stub_addralign = stub_template->alignment();
5224 off = align_address(off, stub_addralign);
5225 stub->set_offset(off);
5226 off += stub_template->size();
5228 // Mark input section so that we can determine later if a code section
5229 // needs the Cortex-A8 workaround quickly.
5230 Arm_relobj<big_endian>* arm_relobj =
5231 Arm_relobj<big_endian>::as_arm_relobj(stub->relobj());
5232 arm_relobj->mark_section_for_cortex_a8_workaround(stub->shndx());
5235 for (Arm_v4bx_stub_list::const_iterator p = this->arm_v4bx_stubs_.begin();
5236 p != this->arm_v4bx_stubs_.end();
5237 ++p)
5239 if (*p == NULL)
5240 continue;
5242 const Stub_template* stub_template = (*p)->stub_template();
5243 uint64_t stub_addralign = stub_template->alignment();
5244 off = align_address(off, stub_addralign);
5245 (*p)->set_offset(off);
5246 off += stub_template->size();
5249 gold_assert(off <= this->prev_data_size_);
5252 // Apply Cortex-A8 workaround to an address range between VIEW_ADDRESS
5253 // and VIEW_ADDRESS + VIEW_SIZE - 1. VIEW points to the mapped address
5254 // of the address range seen by the linker.
5256 template<bool big_endian>
5257 void
5258 Stub_table<big_endian>::apply_cortex_a8_workaround_to_address_range(
5259 Target_arm<big_endian>* arm_target,
5260 unsigned char* view,
5261 Arm_address view_address,
5262 section_size_type view_size)
5264 // Cortex-A8 stubs are sorted by addresses of branches being fixed up.
5265 for (Cortex_a8_stub_list::const_iterator p =
5266 this->cortex_a8_stubs_.lower_bound(view_address);
5267 ((p != this->cortex_a8_stubs_.end())
5268 && (p->first < (view_address + view_size)));
5269 ++p)
5271 // We do not store the THUMB bit in the LSB of either the branch address
5272 // or the stub offset. There is no need to strip the LSB.
5273 Arm_address branch_address = p->first;
5274 const Cortex_a8_stub* stub = p->second;
5275 Arm_address stub_address = this->address() + stub->offset();
5277 // Offset of the branch instruction relative to this view.
5278 section_size_type offset =
5279 convert_to_section_size_type(branch_address - view_address);
5280 gold_assert((offset + 4) <= view_size);
5282 arm_target->apply_cortex_a8_workaround(stub, stub_address,
5283 view + offset, branch_address);
5287 // Arm_input_section methods.
5289 // Initialize an Arm_input_section.
5291 template<bool big_endian>
5292 void
5293 Arm_input_section<big_endian>::init()
5295 Relobj* relobj = this->relobj();
5296 unsigned int shndx = this->shndx();
5298 // We have to cache original size, alignment and contents to avoid locking
5299 // the original file.
5300 this->original_addralign_ =
5301 convert_types<uint32_t, uint64_t>(relobj->section_addralign(shndx));
5303 // This is not efficient but we expect only a small number of relaxed
5304 // input sections for stubs.
5305 section_size_type section_size;
5306 const unsigned char* section_contents =
5307 relobj->section_contents(shndx, &section_size, false);
5308 this->original_size_ =
5309 convert_types<uint32_t, uint64_t>(relobj->section_size(shndx));
5311 gold_assert(this->original_contents_ == NULL);
5312 this->original_contents_ = new unsigned char[section_size];
5313 memcpy(this->original_contents_, section_contents, section_size);
5315 // We want to make this look like the original input section after
5316 // output sections are finalized.
5317 Output_section* os = relobj->output_section(shndx);
5318 off_t offset = relobj->output_section_offset(shndx);
5319 gold_assert(os != NULL && !relobj->is_output_section_offset_invalid(shndx));
5320 this->set_address(os->address() + offset);
5321 this->set_file_offset(os->offset() + offset);
5323 this->set_current_data_size(this->original_size_);
5324 this->finalize_data_size();
5327 template<bool big_endian>
5328 void
5329 Arm_input_section<big_endian>::do_write(Output_file* of)
5331 // We have to write out the original section content.
5332 gold_assert(this->original_contents_ != NULL);
5333 of->write(this->offset(), this->original_contents_,
5334 this->original_size_);
5336 // If this owns a stub table and it is not empty, write it.
5337 if (this->is_stub_table_owner() && !this->stub_table_->empty())
5338 this->stub_table_->write(of);
5341 // Finalize data size.
5343 template<bool big_endian>
5344 void
5345 Arm_input_section<big_endian>::set_final_data_size()
5347 off_t off = convert_types<off_t, uint64_t>(this->original_size_);
5349 if (this->is_stub_table_owner())
5351 this->stub_table_->finalize_data_size();
5352 off = align_address(off, this->stub_table_->addralign());
5353 off += this->stub_table_->data_size();
5355 this->set_data_size(off);
5358 // Reset address and file offset.
5360 template<bool big_endian>
5361 void
5362 Arm_input_section<big_endian>::do_reset_address_and_file_offset()
5364 // Size of the original input section contents.
5365 off_t off = convert_types<off_t, uint64_t>(this->original_size_);
5367 // If this is a stub table owner, account for the stub table size.
5368 if (this->is_stub_table_owner())
5370 Stub_table<big_endian>* stub_table = this->stub_table_;
5372 // Reset the stub table's address and file offset. The
5373 // current data size for child will be updated after that.
5374 stub_table_->reset_address_and_file_offset();
5375 off = align_address(off, stub_table_->addralign());
5376 off += stub_table->current_data_size();
5379 this->set_current_data_size(off);
5382 // Arm_exidx_cantunwind methods.
5384 // Write this to Output file OF for a fixed endianness.
5386 template<bool big_endian>
5387 void
5388 Arm_exidx_cantunwind::do_fixed_endian_write(Output_file* of)
5390 off_t offset = this->offset();
5391 const section_size_type oview_size = 8;
5392 unsigned char* const oview = of->get_output_view(offset, oview_size);
5394 Output_section* os = this->relobj_->output_section(this->shndx_);
5395 gold_assert(os != NULL);
5397 Arm_relobj<big_endian>* arm_relobj =
5398 Arm_relobj<big_endian>::as_arm_relobj(this->relobj_);
5399 Arm_address output_offset =
5400 arm_relobj->get_output_section_offset(this->shndx_);
5401 Arm_address section_start;
5402 section_size_type section_size;
5404 // Find out the end of the text section referred by this.
5405 if (output_offset != Arm_relobj<big_endian>::invalid_address)
5407 section_start = os->address() + output_offset;
5408 const Arm_exidx_input_section* exidx_input_section =
5409 arm_relobj->exidx_input_section_by_link(this->shndx_);
5410 gold_assert(exidx_input_section != NULL);
5411 section_size =
5412 convert_to_section_size_type(exidx_input_section->text_size());
5414 else
5416 // Currently this only happens for a relaxed section.
5417 const Output_relaxed_input_section* poris =
5418 os->find_relaxed_input_section(this->relobj_, this->shndx_);
5419 gold_assert(poris != NULL);
5420 section_start = poris->address();
5421 section_size = convert_to_section_size_type(poris->data_size());
5424 // We always append this to the end of an EXIDX section.
5425 Arm_address output_address = section_start + section_size;
5427 // Write out the entry. The first word either points to the beginning
5428 // or after the end of a text section. The second word is the special
5429 // EXIDX_CANTUNWIND value.
5430 uint32_t prel31_offset = output_address - this->address();
5431 if (Bits<31>::has_overflow32(offset))
5432 gold_error(_("PREL31 overflow in EXIDX_CANTUNWIND entry"));
5433 elfcpp::Swap_unaligned<32, big_endian>::writeval(oview,
5434 prel31_offset & 0x7fffffffU);
5435 elfcpp::Swap_unaligned<32, big_endian>::writeval(oview + 4,
5436 elfcpp::EXIDX_CANTUNWIND);
5438 of->write_output_view(this->offset(), oview_size, oview);
5441 // Arm_exidx_merged_section methods.
5443 // Constructor for Arm_exidx_merged_section.
5444 // EXIDX_INPUT_SECTION points to the unmodified EXIDX input section.
5445 // SECTION_OFFSET_MAP points to a section offset map describing how
5446 // parts of the input section are mapped to output. DELETED_BYTES is
5447 // the number of bytes deleted from the EXIDX input section.
5449 Arm_exidx_merged_section::Arm_exidx_merged_section(
5450 const Arm_exidx_input_section& exidx_input_section,
5451 const Arm_exidx_section_offset_map& section_offset_map,
5452 uint32_t deleted_bytes)
5453 : Output_relaxed_input_section(exidx_input_section.relobj(),
5454 exidx_input_section.shndx(),
5455 exidx_input_section.addralign()),
5456 exidx_input_section_(exidx_input_section),
5457 section_offset_map_(section_offset_map)
5459 // If we retain or discard the whole EXIDX input section, we would
5460 // not be here.
5461 gold_assert(deleted_bytes != 0
5462 && deleted_bytes != this->exidx_input_section_.size());
5464 // Fix size here so that we do not need to implement set_final_data_size.
5465 uint32_t size = exidx_input_section.size() - deleted_bytes;
5466 this->set_data_size(size);
5467 this->fix_data_size();
5469 // Allocate buffer for section contents and build contents.
5470 this->section_contents_ = new unsigned char[size];
5473 // Build the contents of a merged EXIDX output section.
5475 void
5476 Arm_exidx_merged_section::build_contents(
5477 const unsigned char* original_contents,
5478 section_size_type original_size)
5480 // Go over spans of input offsets and write only those that are not
5481 // discarded.
5482 section_offset_type in_start = 0;
5483 section_offset_type out_start = 0;
5484 section_offset_type in_max =
5485 convert_types<section_offset_type>(original_size);
5486 section_offset_type out_max =
5487 convert_types<section_offset_type>(this->data_size());
5488 for (Arm_exidx_section_offset_map::const_iterator p =
5489 this->section_offset_map_.begin();
5490 p != this->section_offset_map_.end();
5491 ++p)
5493 section_offset_type in_end = p->first;
5494 gold_assert(in_end >= in_start);
5495 section_offset_type out_end = p->second;
5496 size_t in_chunk_size = convert_types<size_t>(in_end - in_start + 1);
5497 if (out_end != -1)
5499 size_t out_chunk_size =
5500 convert_types<size_t>(out_end - out_start + 1);
5502 gold_assert(out_chunk_size == in_chunk_size
5503 && in_end < in_max && out_end < out_max);
5505 memcpy(this->section_contents_ + out_start,
5506 original_contents + in_start,
5507 out_chunk_size);
5508 out_start += out_chunk_size;
5510 in_start += in_chunk_size;
5514 // Given an input OBJECT, an input section index SHNDX within that
5515 // object, and an OFFSET relative to the start of that input
5516 // section, return whether or not the corresponding offset within
5517 // the output section is known. If this function returns true, it
5518 // sets *POUTPUT to the output offset. The value -1 indicates that
5519 // this input offset is being discarded.
5521 bool
5522 Arm_exidx_merged_section::do_output_offset(
5523 const Relobj* relobj,
5524 unsigned int shndx,
5525 section_offset_type offset,
5526 section_offset_type* poutput) const
5528 // We only handle offsets for the original EXIDX input section.
5529 if (relobj != this->exidx_input_section_.relobj()
5530 || shndx != this->exidx_input_section_.shndx())
5531 return false;
5533 section_offset_type section_size =
5534 convert_types<section_offset_type>(this->exidx_input_section_.size());
5535 if (offset < 0 || offset >= section_size)
5536 // Input offset is out of valid range.
5537 *poutput = -1;
5538 else
5540 // We need to look up the section offset map to determine the output
5541 // offset. Find the reference point in map that is first offset
5542 // bigger than or equal to this offset.
5543 Arm_exidx_section_offset_map::const_iterator p =
5544 this->section_offset_map_.lower_bound(offset);
5546 // The section offset maps are build such that this should not happen if
5547 // input offset is in the valid range.
5548 gold_assert(p != this->section_offset_map_.end());
5550 // We need to check if this is dropped.
5551 section_offset_type ref = p->first;
5552 section_offset_type mapped_ref = p->second;
5554 if (mapped_ref != Arm_exidx_input_section::invalid_offset)
5555 // Offset is present in output.
5556 *poutput = mapped_ref + (offset - ref);
5557 else
5558 // Offset is discarded owing to EXIDX entry merging.
5559 *poutput = -1;
5562 return true;
5565 // Write this to output file OF.
5567 void
5568 Arm_exidx_merged_section::do_write(Output_file* of)
5570 off_t offset = this->offset();
5571 const section_size_type oview_size = this->data_size();
5572 unsigned char* const oview = of->get_output_view(offset, oview_size);
5574 Output_section* os = this->relobj()->output_section(this->shndx());
5575 gold_assert(os != NULL);
5577 memcpy(oview, this->section_contents_, oview_size);
5578 of->write_output_view(this->offset(), oview_size, oview);
5581 // Arm_exidx_fixup methods.
5583 // Append an EXIDX_CANTUNWIND in the current output section if the last entry
5584 // is not an EXIDX_CANTUNWIND entry already. The new EXIDX_CANTUNWIND entry
5585 // points to the end of the last seen EXIDX section.
5587 void
5588 Arm_exidx_fixup::add_exidx_cantunwind_as_needed()
5590 if (this->last_unwind_type_ != UT_EXIDX_CANTUNWIND
5591 && this->last_input_section_ != NULL)
5593 Relobj* relobj = this->last_input_section_->relobj();
5594 unsigned int text_shndx = this->last_input_section_->link();
5595 Arm_exidx_cantunwind* cantunwind =
5596 new Arm_exidx_cantunwind(relobj, text_shndx);
5597 this->exidx_output_section_->add_output_section_data(cantunwind);
5598 this->last_unwind_type_ = UT_EXIDX_CANTUNWIND;
5602 // Process an EXIDX section entry in input. Return whether this entry
5603 // can be deleted in the output. SECOND_WORD in the second word of the
5604 // EXIDX entry.
5606 bool
5607 Arm_exidx_fixup::process_exidx_entry(uint32_t second_word)
5609 bool delete_entry;
5610 if (second_word == elfcpp::EXIDX_CANTUNWIND)
5612 // Merge if previous entry is also an EXIDX_CANTUNWIND.
5613 delete_entry = this->last_unwind_type_ == UT_EXIDX_CANTUNWIND;
5614 this->last_unwind_type_ = UT_EXIDX_CANTUNWIND;
5616 else if ((second_word & 0x80000000) != 0)
5618 // Inlined unwinding data. Merge if equal to previous.
5619 delete_entry = (merge_exidx_entries_
5620 && this->last_unwind_type_ == UT_INLINED_ENTRY
5621 && this->last_inlined_entry_ == second_word);
5622 this->last_unwind_type_ = UT_INLINED_ENTRY;
5623 this->last_inlined_entry_ = second_word;
5625 else
5627 // Normal table entry. In theory we could merge these too,
5628 // but duplicate entries are likely to be much less common.
5629 delete_entry = false;
5630 this->last_unwind_type_ = UT_NORMAL_ENTRY;
5632 return delete_entry;
5635 // Update the current section offset map during EXIDX section fix-up.
5636 // If there is no map, create one. INPUT_OFFSET is the offset of a
5637 // reference point, DELETED_BYTES is the number of deleted by in the
5638 // section so far. If DELETE_ENTRY is true, the reference point and
5639 // all offsets after the previous reference point are discarded.
5641 void
5642 Arm_exidx_fixup::update_offset_map(
5643 section_offset_type input_offset,
5644 section_size_type deleted_bytes,
5645 bool delete_entry)
5647 if (this->section_offset_map_ == NULL)
5648 this->section_offset_map_ = new Arm_exidx_section_offset_map();
5649 section_offset_type output_offset;
5650 if (delete_entry)
5651 output_offset = Arm_exidx_input_section::invalid_offset;
5652 else
5653 output_offset = input_offset - deleted_bytes;
5654 (*this->section_offset_map_)[input_offset] = output_offset;
5657 // Process EXIDX_INPUT_SECTION for EXIDX entry merging. Return the number of
5658 // bytes deleted. SECTION_CONTENTS points to the contents of the EXIDX
5659 // section and SECTION_SIZE is the number of bytes pointed by SECTION_CONTENTS.
5660 // If some entries are merged, also store a pointer to a newly created
5661 // Arm_exidx_section_offset_map object in *PSECTION_OFFSET_MAP. The caller
5662 // owns the map and is responsible for releasing it after use.
5664 template<bool big_endian>
5665 uint32_t
5666 Arm_exidx_fixup::process_exidx_section(
5667 const Arm_exidx_input_section* exidx_input_section,
5668 const unsigned char* section_contents,
5669 section_size_type section_size,
5670 Arm_exidx_section_offset_map** psection_offset_map)
5672 Relobj* relobj = exidx_input_section->relobj();
5673 unsigned shndx = exidx_input_section->shndx();
5675 if ((section_size % 8) != 0)
5677 // Something is wrong with this section. Better not touch it.
5678 gold_error(_("uneven .ARM.exidx section size in %s section %u"),
5679 relobj->name().c_str(), shndx);
5680 this->last_input_section_ = exidx_input_section;
5681 this->last_unwind_type_ = UT_NONE;
5682 return 0;
5685 uint32_t deleted_bytes = 0;
5686 bool prev_delete_entry = false;
5687 gold_assert(this->section_offset_map_ == NULL);
5689 for (section_size_type i = 0; i < section_size; i += 8)
5691 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
5692 const Valtype* wv =
5693 reinterpret_cast<const Valtype*>(section_contents + i + 4);
5694 uint32_t second_word = elfcpp::Swap<32, big_endian>::readval(wv);
5696 bool delete_entry = this->process_exidx_entry(second_word);
5698 // Entry deletion causes changes in output offsets. We use a std::map
5699 // to record these. And entry (x, y) means input offset x
5700 // is mapped to output offset y. If y is invalid_offset, then x is
5701 // dropped in the output. Because of the way std::map::lower_bound
5702 // works, we record the last offset in a region w.r.t to keeping or
5703 // dropping. If there is no entry (x0, y0) for an input offset x0,
5704 // the output offset y0 of it is determined by the output offset y1 of
5705 // the smallest input offset x1 > x0 that there is an (x1, y1) entry
5706 // in the map. If y1 is not -1, then y0 = y1 + x0 - x1. Otherwise, y1
5707 // y0 is also -1.
5708 if (delete_entry != prev_delete_entry && i != 0)
5709 this->update_offset_map(i - 1, deleted_bytes, prev_delete_entry);
5711 // Update total deleted bytes for this entry.
5712 if (delete_entry)
5713 deleted_bytes += 8;
5715 prev_delete_entry = delete_entry;
5718 // If section offset map is not NULL, make an entry for the end of
5719 // section.
5720 if (this->section_offset_map_ != NULL)
5721 update_offset_map(section_size - 1, deleted_bytes, prev_delete_entry);
5723 *psection_offset_map = this->section_offset_map_;
5724 this->section_offset_map_ = NULL;
5725 this->last_input_section_ = exidx_input_section;
5727 // Set the first output text section so that we can link the EXIDX output
5728 // section to it. Ignore any EXIDX input section that is completely merged.
5729 if (this->first_output_text_section_ == NULL
5730 && deleted_bytes != section_size)
5732 unsigned int link = exidx_input_section->link();
5733 Output_section* os = relobj->output_section(link);
5734 gold_assert(os != NULL);
5735 this->first_output_text_section_ = os;
5738 return deleted_bytes;
5741 // Arm_output_section methods.
5743 // Create a stub group for input sections from BEGIN to END. OWNER
5744 // points to the input section to be the owner a new stub table.
5746 template<bool big_endian>
5747 void
5748 Arm_output_section<big_endian>::create_stub_group(
5749 Input_section_list::const_iterator begin,
5750 Input_section_list::const_iterator end,
5751 Input_section_list::const_iterator owner,
5752 Target_arm<big_endian>* target,
5753 std::vector<Output_relaxed_input_section*>* new_relaxed_sections,
5754 const Task* task)
5756 // We use a different kind of relaxed section in an EXIDX section.
5757 // The static casting from Output_relaxed_input_section to
5758 // Arm_input_section is invalid in an EXIDX section. We are okay
5759 // because we should not be calling this for an EXIDX section.
5760 gold_assert(this->type() != elfcpp::SHT_ARM_EXIDX);
5762 // Currently we convert ordinary input sections into relaxed sections only
5763 // at this point but we may want to support creating relaxed input section
5764 // very early. So we check here to see if owner is already a relaxed
5765 // section.
5767 Arm_input_section<big_endian>* arm_input_section;
5768 if (owner->is_relaxed_input_section())
5770 arm_input_section =
5771 Arm_input_section<big_endian>::as_arm_input_section(
5772 owner->relaxed_input_section());
5774 else
5776 gold_assert(owner->is_input_section());
5777 // Create a new relaxed input section. We need to lock the original
5778 // file.
5779 Task_lock_obj<Object> tl(task, owner->relobj());
5780 arm_input_section =
5781 target->new_arm_input_section(owner->relobj(), owner->shndx());
5782 new_relaxed_sections->push_back(arm_input_section);
5785 // Create a stub table.
5786 Stub_table<big_endian>* stub_table =
5787 target->new_stub_table(arm_input_section);
5789 arm_input_section->set_stub_table(stub_table);
5791 Input_section_list::const_iterator p = begin;
5792 Input_section_list::const_iterator prev_p;
5794 // Look for input sections or relaxed input sections in [begin ... end].
5797 if (p->is_input_section() || p->is_relaxed_input_section())
5799 // The stub table information for input sections live
5800 // in their objects.
5801 Arm_relobj<big_endian>* arm_relobj =
5802 Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
5803 arm_relobj->set_stub_table(p->shndx(), stub_table);
5805 prev_p = p++;
5807 while (prev_p != end);
5810 // Group input sections for stub generation. GROUP_SIZE is roughly the limit
5811 // of stub groups. We grow a stub group by adding input section until the
5812 // size is just below GROUP_SIZE. The last input section will be converted
5813 // into a stub table. If STUB_ALWAYS_AFTER_BRANCH is false, we also add
5814 // input section after the stub table, effectively double the group size.
5816 // This is similar to the group_sections() function in elf32-arm.c but is
5817 // implemented differently.
5819 template<bool big_endian>
5820 void
5821 Arm_output_section<big_endian>::group_sections(
5822 section_size_type group_size,
5823 bool stubs_always_after_branch,
5824 Target_arm<big_endian>* target,
5825 const Task* task)
5827 // States for grouping.
5828 typedef enum
5830 // No group is being built.
5831 NO_GROUP,
5832 // A group is being built but the stub table is not found yet.
5833 // We keep group a stub group until the size is just under GROUP_SIZE.
5834 // The last input section in the group will be used as the stub table.
5835 FINDING_STUB_SECTION,
5836 // A group is being built and we have already found a stub table.
5837 // We enter this state to grow a stub group by adding input section
5838 // after the stub table. This effectively doubles the group size.
5839 HAS_STUB_SECTION
5840 } State;
5842 // Any newly created relaxed sections are stored here.
5843 std::vector<Output_relaxed_input_section*> new_relaxed_sections;
5845 State state = NO_GROUP;
5846 section_size_type off = 0;
5847 section_size_type group_begin_offset = 0;
5848 section_size_type group_end_offset = 0;
5849 section_size_type stub_table_end_offset = 0;
5850 Input_section_list::const_iterator group_begin =
5851 this->input_sections().end();
5852 Input_section_list::const_iterator stub_table =
5853 this->input_sections().end();
5854 Input_section_list::const_iterator group_end = this->input_sections().end();
5855 for (Input_section_list::const_iterator p = this->input_sections().begin();
5856 p != this->input_sections().end();
5857 ++p)
5859 section_size_type section_begin_offset =
5860 align_address(off, p->addralign());
5861 section_size_type section_end_offset =
5862 section_begin_offset + p->data_size();
5864 // Check to see if we should group the previously seen sections.
5865 switch (state)
5867 case NO_GROUP:
5868 break;
5870 case FINDING_STUB_SECTION:
5871 // Adding this section makes the group larger than GROUP_SIZE.
5872 if (section_end_offset - group_begin_offset >= group_size)
5874 if (stubs_always_after_branch)
5876 gold_assert(group_end != this->input_sections().end());
5877 this->create_stub_group(group_begin, group_end, group_end,
5878 target, &new_relaxed_sections,
5879 task);
5880 state = NO_GROUP;
5882 else
5884 // But wait, there's more! Input sections up to
5885 // stub_group_size bytes after the stub table can be
5886 // handled by it too.
5887 state = HAS_STUB_SECTION;
5888 stub_table = group_end;
5889 stub_table_end_offset = group_end_offset;
5892 break;
5894 case HAS_STUB_SECTION:
5895 // Adding this section makes the post stub-section group larger
5896 // than GROUP_SIZE.
5897 if (section_end_offset - stub_table_end_offset >= group_size)
5899 gold_assert(group_end != this->input_sections().end());
5900 this->create_stub_group(group_begin, group_end, stub_table,
5901 target, &new_relaxed_sections, task);
5902 state = NO_GROUP;
5904 break;
5906 default:
5907 gold_unreachable();
5910 // If we see an input section and currently there is no group, start
5911 // a new one. Skip any empty sections. We look at the data size
5912 // instead of calling p->relobj()->section_size() to avoid locking.
5913 if ((p->is_input_section() || p->is_relaxed_input_section())
5914 && (p->data_size() != 0))
5916 if (state == NO_GROUP)
5918 state = FINDING_STUB_SECTION;
5919 group_begin = p;
5920 group_begin_offset = section_begin_offset;
5923 // Keep track of the last input section seen.
5924 group_end = p;
5925 group_end_offset = section_end_offset;
5928 off = section_end_offset;
5931 // Create a stub group for any ungrouped sections.
5932 if (state == FINDING_STUB_SECTION || state == HAS_STUB_SECTION)
5934 gold_assert(group_end != this->input_sections().end());
5935 this->create_stub_group(group_begin, group_end,
5936 (state == FINDING_STUB_SECTION
5937 ? group_end
5938 : stub_table),
5939 target, &new_relaxed_sections, task);
5942 // Convert input section into relaxed input section in a batch.
5943 if (!new_relaxed_sections.empty())
5944 this->convert_input_sections_to_relaxed_sections(new_relaxed_sections);
5946 // Update the section offsets
5947 for (size_t i = 0; i < new_relaxed_sections.size(); ++i)
5949 Arm_relobj<big_endian>* arm_relobj =
5950 Arm_relobj<big_endian>::as_arm_relobj(
5951 new_relaxed_sections[i]->relobj());
5952 unsigned int shndx = new_relaxed_sections[i]->shndx();
5953 // Tell Arm_relobj that this input section is converted.
5954 arm_relobj->convert_input_section_to_relaxed_section(shndx);
5958 // Append non empty text sections in this to LIST in ascending
5959 // order of their position in this.
5961 template<bool big_endian>
5962 void
5963 Arm_output_section<big_endian>::append_text_sections_to_list(
5964 Text_section_list* list)
5966 gold_assert((this->flags() & elfcpp::SHF_ALLOC) != 0);
5968 for (Input_section_list::const_iterator p = this->input_sections().begin();
5969 p != this->input_sections().end();
5970 ++p)
5972 // We only care about plain or relaxed input sections. We also
5973 // ignore any merged sections.
5974 if (p->is_input_section() || p->is_relaxed_input_section())
5975 list->push_back(Text_section_list::value_type(p->relobj(),
5976 p->shndx()));
5980 template<bool big_endian>
5981 void
5982 Arm_output_section<big_endian>::fix_exidx_coverage(
5983 Layout* layout,
5984 const Text_section_list& sorted_text_sections,
5985 Symbol_table* symtab,
5986 bool merge_exidx_entries,
5987 const Task* task)
5989 // We should only do this for the EXIDX output section.
5990 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX);
5992 // We don't want the relaxation loop to undo these changes, so we discard
5993 // the current saved states and take another one after the fix-up.
5994 this->discard_states();
5996 // Remove all input sections.
5997 uint64_t address = this->address();
5998 typedef std::list<Output_section::Input_section> Input_section_list;
5999 Input_section_list input_sections;
6000 this->reset_address_and_file_offset();
6001 this->get_input_sections(address, std::string(""), &input_sections);
6003 if (!this->input_sections().empty())
6004 gold_error(_("Found non-EXIDX input sections in EXIDX output section"));
6006 // Go through all the known input sections and record them.
6007 typedef Unordered_set<Section_id, Section_id_hash> Section_id_set;
6008 typedef Unordered_map<Section_id, const Output_section::Input_section*,
6009 Section_id_hash> Text_to_exidx_map;
6010 Text_to_exidx_map text_to_exidx_map;
6011 for (Input_section_list::const_iterator p = input_sections.begin();
6012 p != input_sections.end();
6013 ++p)
6015 // This should never happen. At this point, we should only see
6016 // plain EXIDX input sections.
6017 gold_assert(!p->is_relaxed_input_section());
6018 text_to_exidx_map[Section_id(p->relobj(), p->shndx())] = &(*p);
6021 Arm_exidx_fixup exidx_fixup(this, merge_exidx_entries);
6023 // Go over the sorted text sections.
6024 typedef Unordered_set<Section_id, Section_id_hash> Section_id_set;
6025 Section_id_set processed_input_sections;
6026 for (Text_section_list::const_iterator p = sorted_text_sections.begin();
6027 p != sorted_text_sections.end();
6028 ++p)
6030 Relobj* relobj = p->first;
6031 unsigned int shndx = p->second;
6033 Arm_relobj<big_endian>* arm_relobj =
6034 Arm_relobj<big_endian>::as_arm_relobj(relobj);
6035 const Arm_exidx_input_section* exidx_input_section =
6036 arm_relobj->exidx_input_section_by_link(shndx);
6038 // If this text section has no EXIDX section or if the EXIDX section
6039 // has errors, force an EXIDX_CANTUNWIND entry pointing to the end
6040 // of the last seen EXIDX section.
6041 if (exidx_input_section == NULL || exidx_input_section->has_errors())
6043 exidx_fixup.add_exidx_cantunwind_as_needed();
6044 continue;
6047 Relobj* exidx_relobj = exidx_input_section->relobj();
6048 unsigned int exidx_shndx = exidx_input_section->shndx();
6049 Section_id sid(exidx_relobj, exidx_shndx);
6050 Text_to_exidx_map::const_iterator iter = text_to_exidx_map.find(sid);
6051 if (iter == text_to_exidx_map.end())
6053 // This is odd. We have not seen this EXIDX input section before.
6054 // We cannot do fix-up. If we saw a SECTIONS clause in a script,
6055 // issue a warning instead. We assume the user knows what he
6056 // or she is doing. Otherwise, this is an error.
6057 if (layout->script_options()->saw_sections_clause())
6058 gold_warning(_("unwinding may not work because EXIDX input section"
6059 " %u of %s is not in EXIDX output section"),
6060 exidx_shndx, exidx_relobj->name().c_str());
6061 else
6062 gold_error(_("unwinding may not work because EXIDX input section"
6063 " %u of %s is not in EXIDX output section"),
6064 exidx_shndx, exidx_relobj->name().c_str());
6066 exidx_fixup.add_exidx_cantunwind_as_needed();
6067 continue;
6070 // We need to access the contents of the EXIDX section, lock the
6071 // object here.
6072 Task_lock_obj<Object> tl(task, exidx_relobj);
6073 section_size_type exidx_size;
6074 const unsigned char* exidx_contents =
6075 exidx_relobj->section_contents(exidx_shndx, &exidx_size, false);
6077 // Fix up coverage and append input section to output data list.
6078 Arm_exidx_section_offset_map* section_offset_map = NULL;
6079 uint32_t deleted_bytes =
6080 exidx_fixup.process_exidx_section<big_endian>(exidx_input_section,
6081 exidx_contents,
6082 exidx_size,
6083 &section_offset_map);
6085 if (deleted_bytes == exidx_input_section->size())
6087 // The whole EXIDX section got merged. Remove it from output.
6088 gold_assert(section_offset_map == NULL);
6089 exidx_relobj->set_output_section(exidx_shndx, NULL);
6091 // All local symbols defined in this input section will be dropped.
6092 // We need to adjust output local symbol count.
6093 arm_relobj->set_output_local_symbol_count_needs_update();
6095 else if (deleted_bytes > 0)
6097 // Some entries are merged. We need to convert this EXIDX input
6098 // section into a relaxed section.
6099 gold_assert(section_offset_map != NULL);
6101 Arm_exidx_merged_section* merged_section =
6102 new Arm_exidx_merged_section(*exidx_input_section,
6103 *section_offset_map, deleted_bytes);
6104 merged_section->build_contents(exidx_contents, exidx_size);
6106 const std::string secname = exidx_relobj->section_name(exidx_shndx);
6107 this->add_relaxed_input_section(layout, merged_section, secname);
6108 arm_relobj->convert_input_section_to_relaxed_section(exidx_shndx);
6110 // All local symbols defined in discarded portions of this input
6111 // section will be dropped. We need to adjust output local symbol
6112 // count.
6113 arm_relobj->set_output_local_symbol_count_needs_update();
6115 else
6117 // Just add back the EXIDX input section.
6118 gold_assert(section_offset_map == NULL);
6119 const Output_section::Input_section* pis = iter->second;
6120 gold_assert(pis->is_input_section());
6121 this->add_script_input_section(*pis);
6124 processed_input_sections.insert(Section_id(exidx_relobj, exidx_shndx));
6127 // Insert an EXIDX_CANTUNWIND entry at the end of output if necessary.
6128 exidx_fixup.add_exidx_cantunwind_as_needed();
6130 // Remove any known EXIDX input sections that are not processed.
6131 for (Input_section_list::const_iterator p = input_sections.begin();
6132 p != input_sections.end();
6133 ++p)
6135 if (processed_input_sections.find(Section_id(p->relobj(), p->shndx()))
6136 == processed_input_sections.end())
6138 // We discard a known EXIDX section because its linked
6139 // text section has been folded by ICF. We also discard an
6140 // EXIDX section with error, the output does not matter in this
6141 // case. We do this to avoid triggering asserts.
6142 Arm_relobj<big_endian>* arm_relobj =
6143 Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
6144 const Arm_exidx_input_section* exidx_input_section =
6145 arm_relobj->exidx_input_section_by_shndx(p->shndx());
6146 gold_assert(exidx_input_section != NULL);
6147 if (!exidx_input_section->has_errors())
6149 unsigned int text_shndx = exidx_input_section->link();
6150 gold_assert(symtab->is_section_folded(p->relobj(), text_shndx));
6153 // Remove this from link. We also need to recount the
6154 // local symbols.
6155 p->relobj()->set_output_section(p->shndx(), NULL);
6156 arm_relobj->set_output_local_symbol_count_needs_update();
6160 // Link exidx output section to the first seen output section and
6161 // set correct entry size.
6162 this->set_link_section(exidx_fixup.first_output_text_section());
6163 this->set_entsize(8);
6165 // Make changes permanent.
6166 this->save_states();
6167 this->set_section_offsets_need_adjustment();
6170 // Link EXIDX output sections to text output sections.
6172 template<bool big_endian>
6173 void
6174 Arm_output_section<big_endian>::set_exidx_section_link()
6176 gold_assert(this->type() == elfcpp::SHT_ARM_EXIDX);
6177 if (!this->input_sections().empty())
6179 Input_section_list::const_iterator p = this->input_sections().begin();
6180 Arm_relobj<big_endian>* arm_relobj =
6181 Arm_relobj<big_endian>::as_arm_relobj(p->relobj());
6182 unsigned exidx_shndx = p->shndx();
6183 const Arm_exidx_input_section* exidx_input_section =
6184 arm_relobj->exidx_input_section_by_shndx(exidx_shndx);
6185 gold_assert(exidx_input_section != NULL);
6186 unsigned int text_shndx = exidx_input_section->link();
6187 Output_section* os = arm_relobj->output_section(text_shndx);
6188 this->set_link_section(os);
6192 // Arm_relobj methods.
6194 // Determine if an input section is scannable for stub processing. SHDR is
6195 // the header of the section and SHNDX is the section index. OS is the output
6196 // section for the input section and SYMTAB is the global symbol table used to
6197 // look up ICF information.
6199 template<bool big_endian>
6200 bool
6201 Arm_relobj<big_endian>::section_is_scannable(
6202 const elfcpp::Shdr<32, big_endian>& shdr,
6203 unsigned int shndx,
6204 const Output_section* os,
6205 const Symbol_table* symtab)
6207 // Skip any empty sections, unallocated sections or sections whose
6208 // type are not SHT_PROGBITS.
6209 if (shdr.get_sh_size() == 0
6210 || (shdr.get_sh_flags() & elfcpp::SHF_ALLOC) == 0
6211 || shdr.get_sh_type() != elfcpp::SHT_PROGBITS)
6212 return false;
6214 // Skip any discarded or ICF'ed sections.
6215 if (os == NULL || symtab->is_section_folded(this, shndx))
6216 return false;
6218 // If this requires special offset handling, check to see if it is
6219 // a relaxed section. If this is not, then it is a merged section that
6220 // we cannot handle.
6221 if (this->is_output_section_offset_invalid(shndx))
6223 const Output_relaxed_input_section* poris =
6224 os->find_relaxed_input_section(this, shndx);
6225 if (poris == NULL)
6226 return false;
6229 return true;
6232 // Determine if we want to scan the SHNDX-th section for relocation stubs.
6233 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6235 template<bool big_endian>
6236 bool
6237 Arm_relobj<big_endian>::section_needs_reloc_stub_scanning(
6238 const elfcpp::Shdr<32, big_endian>& shdr,
6239 const Relobj::Output_sections& out_sections,
6240 const Symbol_table* symtab,
6241 const unsigned char* pshdrs)
6243 unsigned int sh_type = shdr.get_sh_type();
6244 if (sh_type != elfcpp::SHT_REL && sh_type != elfcpp::SHT_RELA)
6245 return false;
6247 // Ignore empty section.
6248 off_t sh_size = shdr.get_sh_size();
6249 if (sh_size == 0)
6250 return false;
6252 // Ignore reloc section with unexpected symbol table. The
6253 // error will be reported in the final link.
6254 if (this->adjust_shndx(shdr.get_sh_link()) != this->symtab_shndx())
6255 return false;
6257 unsigned int reloc_size;
6258 if (sh_type == elfcpp::SHT_REL)
6259 reloc_size = elfcpp::Elf_sizes<32>::rel_size;
6260 else
6261 reloc_size = elfcpp::Elf_sizes<32>::rela_size;
6263 // Ignore reloc section with unexpected entsize or uneven size.
6264 // The error will be reported in the final link.
6265 if (reloc_size != shdr.get_sh_entsize() || sh_size % reloc_size != 0)
6266 return false;
6268 // Ignore reloc section with bad info. This error will be
6269 // reported in the final link.
6270 unsigned int index = this->adjust_shndx(shdr.get_sh_info());
6271 if (index >= this->shnum())
6272 return false;
6274 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6275 const elfcpp::Shdr<32, big_endian> text_shdr(pshdrs + index * shdr_size);
6276 return this->section_is_scannable(text_shdr, index,
6277 out_sections[index], symtab);
6280 // Return the output address of either a plain input section or a relaxed
6281 // input section. SHNDX is the section index. We define and use this
6282 // instead of calling Output_section::output_address because that is slow
6283 // for large output.
6285 template<bool big_endian>
6286 Arm_address
6287 Arm_relobj<big_endian>::simple_input_section_output_address(
6288 unsigned int shndx,
6289 Output_section* os)
6291 if (this->is_output_section_offset_invalid(shndx))
6293 const Output_relaxed_input_section* poris =
6294 os->find_relaxed_input_section(this, shndx);
6295 // We do not handle merged sections here.
6296 gold_assert(poris != NULL);
6297 return poris->address();
6299 else
6300 return os->address() + this->get_output_section_offset(shndx);
6303 // Determine if we want to scan the SHNDX-th section for non-relocation stubs.
6304 // This is a helper for Arm_relobj::scan_sections_for_stubs() below.
6306 template<bool big_endian>
6307 bool
6308 Arm_relobj<big_endian>::section_needs_cortex_a8_stub_scanning(
6309 const elfcpp::Shdr<32, big_endian>& shdr,
6310 unsigned int shndx,
6311 Output_section* os,
6312 const Symbol_table* symtab)
6314 if (!this->section_is_scannable(shdr, shndx, os, symtab))
6315 return false;
6317 // If the section does not cross any 4K-boundaries, it does not need to
6318 // be scanned.
6319 Arm_address address = this->simple_input_section_output_address(shndx, os);
6320 if ((address & ~0xfffU) == ((address + shdr.get_sh_size() - 1) & ~0xfffU))
6321 return false;
6323 return true;
6326 // Scan a section for Cortex-A8 workaround.
6328 template<bool big_endian>
6329 void
6330 Arm_relobj<big_endian>::scan_section_for_cortex_a8_erratum(
6331 const elfcpp::Shdr<32, big_endian>& shdr,
6332 unsigned int shndx,
6333 Output_section* os,
6334 Target_arm<big_endian>* arm_target)
6336 // Look for the first mapping symbol in this section. It should be
6337 // at (shndx, 0).
6338 Mapping_symbol_position section_start(shndx, 0);
6339 typename Mapping_symbols_info::const_iterator p =
6340 this->mapping_symbols_info_.lower_bound(section_start);
6342 // There are no mapping symbols for this section. Treat it as a data-only
6343 // section.
6344 if (p == this->mapping_symbols_info_.end() || p->first.first != shndx)
6345 return;
6347 Arm_address output_address =
6348 this->simple_input_section_output_address(shndx, os);
6350 // Get the section contents.
6351 section_size_type input_view_size = 0;
6352 const unsigned char* input_view =
6353 this->section_contents(shndx, &input_view_size, false);
6355 // We need to go through the mapping symbols to determine what to
6356 // scan. There are two reasons. First, we should look at THUMB code and
6357 // THUMB code only. Second, we only want to look at the 4K-page boundary
6358 // to speed up the scanning.
6360 while (p != this->mapping_symbols_info_.end()
6361 && p->first.first == shndx)
6363 typename Mapping_symbols_info::const_iterator next =
6364 this->mapping_symbols_info_.upper_bound(p->first);
6366 // Only scan part of a section with THUMB code.
6367 if (p->second == 't')
6369 // Determine the end of this range.
6370 section_size_type span_start =
6371 convert_to_section_size_type(p->first.second);
6372 section_size_type span_end;
6373 if (next != this->mapping_symbols_info_.end()
6374 && next->first.first == shndx)
6375 span_end = convert_to_section_size_type(next->first.second);
6376 else
6377 span_end = convert_to_section_size_type(shdr.get_sh_size());
6379 if (((span_start + output_address) & ~0xfffUL)
6380 != ((span_end + output_address - 1) & ~0xfffUL))
6382 arm_target->scan_span_for_cortex_a8_erratum(this, shndx,
6383 span_start, span_end,
6384 input_view,
6385 output_address);
6389 p = next;
6393 // Scan relocations for stub generation.
6395 template<bool big_endian>
6396 void
6397 Arm_relobj<big_endian>::scan_sections_for_stubs(
6398 Target_arm<big_endian>* arm_target,
6399 const Symbol_table* symtab,
6400 const Layout* layout)
6402 unsigned int shnum = this->shnum();
6403 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6405 // Read the section headers.
6406 const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(),
6407 shnum * shdr_size,
6408 true, true);
6410 // To speed up processing, we set up hash tables for fast lookup of
6411 // input offsets to output addresses.
6412 this->initialize_input_to_output_maps();
6414 const Relobj::Output_sections& out_sections(this->output_sections());
6416 Relocate_info<32, big_endian> relinfo;
6417 relinfo.symtab = symtab;
6418 relinfo.layout = layout;
6419 relinfo.object = this;
6421 // Do relocation stubs scanning.
6422 const unsigned char* p = pshdrs + shdr_size;
6423 for (unsigned int i = 1; i < shnum; ++i, p += shdr_size)
6425 const elfcpp::Shdr<32, big_endian> shdr(p);
6426 if (this->section_needs_reloc_stub_scanning(shdr, out_sections, symtab,
6427 pshdrs))
6429 unsigned int index = this->adjust_shndx(shdr.get_sh_info());
6430 Arm_address output_offset = this->get_output_section_offset(index);
6431 Arm_address output_address;
6432 if (output_offset != invalid_address)
6433 output_address = out_sections[index]->address() + output_offset;
6434 else
6436 // Currently this only happens for a relaxed section.
6437 const Output_relaxed_input_section* poris =
6438 out_sections[index]->find_relaxed_input_section(this, index);
6439 gold_assert(poris != NULL);
6440 output_address = poris->address();
6443 // Get the relocations.
6444 const unsigned char* prelocs = this->get_view(shdr.get_sh_offset(),
6445 shdr.get_sh_size(),
6446 true, false);
6448 // Get the section contents. This does work for the case in which
6449 // we modify the contents of an input section. We need to pass the
6450 // output view under such circumstances.
6451 section_size_type input_view_size = 0;
6452 const unsigned char* input_view =
6453 this->section_contents(index, &input_view_size, false);
6455 relinfo.reloc_shndx = i;
6456 relinfo.data_shndx = index;
6457 unsigned int sh_type = shdr.get_sh_type();
6458 unsigned int reloc_size;
6459 if (sh_type == elfcpp::SHT_REL)
6460 reloc_size = elfcpp::Elf_sizes<32>::rel_size;
6461 else
6462 reloc_size = elfcpp::Elf_sizes<32>::rela_size;
6464 Output_section* os = out_sections[index];
6465 arm_target->scan_section_for_stubs(&relinfo, sh_type, prelocs,
6466 shdr.get_sh_size() / reloc_size,
6468 output_offset == invalid_address,
6469 input_view, output_address,
6470 input_view_size);
6474 // Do Cortex-A8 erratum stubs scanning. This has to be done for a section
6475 // after its relocation section, if there is one, is processed for
6476 // relocation stubs. Merging this loop with the one above would have been
6477 // complicated since we would have had to make sure that relocation stub
6478 // scanning is done first.
6479 if (arm_target->fix_cortex_a8())
6481 const unsigned char* p = pshdrs + shdr_size;
6482 for (unsigned int i = 1; i < shnum; ++i, p += shdr_size)
6484 const elfcpp::Shdr<32, big_endian> shdr(p);
6485 if (this->section_needs_cortex_a8_stub_scanning(shdr, i,
6486 out_sections[i],
6487 symtab))
6488 this->scan_section_for_cortex_a8_erratum(shdr, i, out_sections[i],
6489 arm_target);
6493 // After we've done the relocations, we release the hash tables,
6494 // since we no longer need them.
6495 this->free_input_to_output_maps();
6498 // Count the local symbols. The ARM backend needs to know if a symbol
6499 // is a THUMB function or not. For global symbols, it is easy because
6500 // the Symbol object keeps the ELF symbol type. For local symbol it is
6501 // harder because we cannot access this information. So we override the
6502 // do_count_local_symbol in parent and scan local symbols to mark
6503 // THUMB functions. This is not the most efficient way but I do not want to
6504 // slow down other ports by calling a per symbol target hook inside
6505 // Sized_relobj_file<size, big_endian>::do_count_local_symbols.
6507 template<bool big_endian>
6508 void
6509 Arm_relobj<big_endian>::do_count_local_symbols(
6510 Stringpool_template<char>* pool,
6511 Stringpool_template<char>* dynpool)
6513 // We need to fix-up the values of any local symbols whose type are
6514 // STT_ARM_TFUNC.
6516 // Ask parent to count the local symbols.
6517 Sized_relobj_file<32, big_endian>::do_count_local_symbols(pool, dynpool);
6518 const unsigned int loccount = this->local_symbol_count();
6519 if (loccount == 0)
6520 return;
6522 // Initialize the thumb function bit-vector.
6523 std::vector<bool> empty_vector(loccount, false);
6524 this->local_symbol_is_thumb_function_.swap(empty_vector);
6526 // Read the symbol table section header.
6527 const unsigned int symtab_shndx = this->symtab_shndx();
6528 elfcpp::Shdr<32, big_endian>
6529 symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
6530 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
6532 // Read the local symbols.
6533 const int sym_size =elfcpp::Elf_sizes<32>::sym_size;
6534 gold_assert(loccount == symtabshdr.get_sh_info());
6535 off_t locsize = loccount * sym_size;
6536 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
6537 locsize, true, true);
6539 // For mapping symbol processing, we need to read the symbol names.
6540 unsigned int strtab_shndx = this->adjust_shndx(symtabshdr.get_sh_link());
6541 if (strtab_shndx >= this->shnum())
6543 this->error(_("invalid symbol table name index: %u"), strtab_shndx);
6544 return;
6547 elfcpp::Shdr<32, big_endian>
6548 strtabshdr(this, this->elf_file()->section_header(strtab_shndx));
6549 if (strtabshdr.get_sh_type() != elfcpp::SHT_STRTAB)
6551 this->error(_("symbol table name section has wrong type: %u"),
6552 static_cast<unsigned int>(strtabshdr.get_sh_type()));
6553 return;
6555 const char* pnames =
6556 reinterpret_cast<const char*>(this->get_view(strtabshdr.get_sh_offset(),
6557 strtabshdr.get_sh_size(),
6558 false, false));
6560 // Loop over the local symbols and mark any local symbols pointing
6561 // to THUMB functions.
6563 // Skip the first dummy symbol.
6564 psyms += sym_size;
6565 typename Sized_relobj_file<32, big_endian>::Local_values* plocal_values =
6566 this->local_values();
6567 for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size)
6569 elfcpp::Sym<32, big_endian> sym(psyms);
6570 elfcpp::STT st_type = sym.get_st_type();
6571 Symbol_value<32>& lv((*plocal_values)[i]);
6572 Arm_address input_value = lv.input_value();
6574 // Check to see if this is a mapping symbol.
6575 const char* sym_name = pnames + sym.get_st_name();
6576 if (Target_arm<big_endian>::is_mapping_symbol_name(sym_name))
6578 bool is_ordinary;
6579 unsigned int input_shndx =
6580 this->adjust_sym_shndx(i, sym.get_st_shndx(), &is_ordinary);
6581 gold_assert(is_ordinary);
6583 // Strip of LSB in case this is a THUMB symbol.
6584 Mapping_symbol_position msp(input_shndx, input_value & ~1U);
6585 this->mapping_symbols_info_[msp] = sym_name[1];
6588 if (st_type == elfcpp::STT_ARM_TFUNC
6589 || (st_type == elfcpp::STT_FUNC && ((input_value & 1) != 0)))
6591 // This is a THUMB function. Mark this and canonicalize the
6592 // symbol value by setting LSB.
6593 this->local_symbol_is_thumb_function_[i] = true;
6594 if ((input_value & 1) == 0)
6595 lv.set_input_value(input_value | 1);
6600 // Relocate sections.
6601 template<bool big_endian>
6602 void
6603 Arm_relobj<big_endian>::do_relocate_sections(
6604 const Symbol_table* symtab,
6605 const Layout* layout,
6606 const unsigned char* pshdrs,
6607 Output_file* of,
6608 typename Sized_relobj_file<32, big_endian>::Views* pviews)
6610 // Relocate the section data.
6611 this->relocate_section_range(symtab, layout, pshdrs, of, pviews,
6612 1, this->shnum() - 1);
6614 // We do not generate stubs if doing a relocatable link.
6615 if (parameters->options().relocatable())
6616 return;
6618 // Relocate stub tables.
6619 unsigned int shnum = this->shnum();
6621 Target_arm<big_endian>* arm_target =
6622 Target_arm<big_endian>::default_target();
6624 Relocate_info<32, big_endian> relinfo;
6625 relinfo.symtab = symtab;
6626 relinfo.layout = layout;
6627 relinfo.object = this;
6629 for (unsigned int i = 1; i < shnum; ++i)
6631 Arm_input_section<big_endian>* arm_input_section =
6632 arm_target->find_arm_input_section(this, i);
6634 if (arm_input_section != NULL
6635 && arm_input_section->is_stub_table_owner()
6636 && !arm_input_section->stub_table()->empty())
6638 // We cannot discard a section if it owns a stub table.
6639 Output_section* os = this->output_section(i);
6640 gold_assert(os != NULL);
6642 relinfo.reloc_shndx = elfcpp::SHN_UNDEF;
6643 relinfo.reloc_shdr = NULL;
6644 relinfo.data_shndx = i;
6645 relinfo.data_shdr = pshdrs + i * elfcpp::Elf_sizes<32>::shdr_size;
6647 gold_assert((*pviews)[i].view != NULL);
6649 // We are passed the output section view. Adjust it to cover the
6650 // stub table only.
6651 Stub_table<big_endian>* stub_table = arm_input_section->stub_table();
6652 gold_assert((stub_table->address() >= (*pviews)[i].address)
6653 && ((stub_table->address() + stub_table->data_size())
6654 <= (*pviews)[i].address + (*pviews)[i].view_size));
6656 off_t offset = stub_table->address() - (*pviews)[i].address;
6657 unsigned char* view = (*pviews)[i].view + offset;
6658 Arm_address address = stub_table->address();
6659 section_size_type view_size = stub_table->data_size();
6661 stub_table->relocate_stubs(&relinfo, arm_target, os, view, address,
6662 view_size);
6665 // Apply Cortex A8 workaround if applicable.
6666 if (this->section_has_cortex_a8_workaround(i))
6668 unsigned char* view = (*pviews)[i].view;
6669 Arm_address view_address = (*pviews)[i].address;
6670 section_size_type view_size = (*pviews)[i].view_size;
6671 Stub_table<big_endian>* stub_table = this->stub_tables_[i];
6673 // Adjust view to cover section.
6674 Output_section* os = this->output_section(i);
6675 gold_assert(os != NULL);
6676 Arm_address section_address =
6677 this->simple_input_section_output_address(i, os);
6678 uint64_t section_size = this->section_size(i);
6680 gold_assert(section_address >= view_address
6681 && ((section_address + section_size)
6682 <= (view_address + view_size)));
6684 unsigned char* section_view = view + (section_address - view_address);
6686 // Apply the Cortex-A8 workaround to the output address range
6687 // corresponding to this input section.
6688 stub_table->apply_cortex_a8_workaround_to_address_range(
6689 arm_target,
6690 section_view,
6691 section_address,
6692 section_size);
6694 // BE8 swapping
6695 if (parameters->options().be8())
6697 section_size_type span_start, span_end;
6698 elfcpp::Shdr<32, big_endian>
6699 shdr(pshdrs + i * elfcpp::Elf_sizes<32>::shdr_size);
6700 Mapping_symbol_position section_start(i, 0);
6701 typename Mapping_symbols_info::const_iterator p =
6702 this->mapping_symbols_info_.lower_bound(section_start);
6703 unsigned char* view = (*pviews)[i].view;
6704 Arm_address view_address = (*pviews)[i].address;
6705 section_size_type view_size = (*pviews)[i].view_size;
6706 while (p != this->mapping_symbols_info_.end()
6707 && p->first.first == i)
6709 typename Mapping_symbols_info::const_iterator next =
6710 this->mapping_symbols_info_.upper_bound(p->first);
6712 // Only swap arm or thumb code.
6713 if ((p->second == 'a') || (p->second == 't'))
6715 Output_section* os = this->output_section(i);
6716 gold_assert(os != NULL);
6717 Arm_address section_address =
6718 this->simple_input_section_output_address(i, os);
6719 span_start = convert_to_section_size_type(p->first.second);
6720 if (next != this->mapping_symbols_info_.end()
6721 && next->first.first == i)
6722 span_end =
6723 convert_to_section_size_type(next->first.second);
6724 else
6725 span_end =
6726 convert_to_section_size_type(shdr.get_sh_size());
6727 unsigned char* section_view =
6728 view + (section_address - view_address);
6729 uint64_t section_size = this->section_size(i);
6731 gold_assert(section_address >= view_address
6732 && ((section_address + section_size)
6733 <= (view_address + view_size)));
6735 // Set Output view for swapping
6736 unsigned char *oview = section_view + span_start;
6737 unsigned int index = 0;
6738 if (p->second == 'a')
6740 while (index + 3 < (span_end - span_start))
6742 typedef typename elfcpp::Swap<32, big_endian>
6743 ::Valtype Valtype;
6744 Valtype* wv =
6745 reinterpret_cast<Valtype*>(oview+index);
6746 uint32_t val = elfcpp::Swap<32, false>::readval(wv);
6747 elfcpp::Swap<32, true>::writeval(wv, val);
6748 index += 4;
6751 else if (p->second == 't')
6753 while (index + 1 < (span_end - span_start))
6755 typedef typename elfcpp::Swap<16, big_endian>
6756 ::Valtype Valtype;
6757 Valtype* wv =
6758 reinterpret_cast<Valtype*>(oview+index);
6759 uint16_t val = elfcpp::Swap<16, false>::readval(wv);
6760 elfcpp::Swap<16, true>::writeval(wv, val);
6761 index += 2;
6765 p = next;
6771 // Find the linked text section of an EXIDX section by looking at the first
6772 // relocation. 4.4.1 of the EHABI specifications says that an EXIDX section
6773 // must be linked to its associated code section via the sh_link field of
6774 // its section header. However, some tools are broken and the link is not
6775 // always set. LD just drops such an EXIDX section silently, causing the
6776 // associated code not unwindabled. Here we try a little bit harder to
6777 // discover the linked code section.
6779 // PSHDR points to the section header of a relocation section of an EXIDX
6780 // section. If we can find a linked text section, return true and
6781 // store the text section index in the location PSHNDX. Otherwise
6782 // return false.
6784 template<bool big_endian>
6785 bool
6786 Arm_relobj<big_endian>::find_linked_text_section(
6787 const unsigned char* pshdr,
6788 const unsigned char* psyms,
6789 unsigned int* pshndx)
6791 elfcpp::Shdr<32, big_endian> shdr(pshdr);
6793 // If there is no relocation, we cannot find the linked text section.
6794 size_t reloc_size;
6795 if (shdr.get_sh_type() == elfcpp::SHT_REL)
6796 reloc_size = elfcpp::Elf_sizes<32>::rel_size;
6797 else
6798 reloc_size = elfcpp::Elf_sizes<32>::rela_size;
6799 size_t reloc_count = shdr.get_sh_size() / reloc_size;
6801 // Get the relocations.
6802 const unsigned char* prelocs =
6803 this->get_view(shdr.get_sh_offset(), shdr.get_sh_size(), true, false);
6805 // Find the REL31 relocation for the first word of the first EXIDX entry.
6806 for (size_t i = 0; i < reloc_count; ++i, prelocs += reloc_size)
6808 Arm_address r_offset;
6809 typename elfcpp::Elf_types<32>::Elf_WXword r_info;
6810 if (shdr.get_sh_type() == elfcpp::SHT_REL)
6812 typename elfcpp::Rel<32, big_endian> reloc(prelocs);
6813 r_info = reloc.get_r_info();
6814 r_offset = reloc.get_r_offset();
6816 else
6818 typename elfcpp::Rela<32, big_endian> reloc(prelocs);
6819 r_info = reloc.get_r_info();
6820 r_offset = reloc.get_r_offset();
6823 unsigned int r_type = elfcpp::elf_r_type<32>(r_info);
6824 if (r_type != elfcpp::R_ARM_PREL31 && r_type != elfcpp::R_ARM_SBREL31)
6825 continue;
6827 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
6828 if (r_sym == 0
6829 || r_sym >= this->local_symbol_count()
6830 || r_offset != 0)
6831 continue;
6833 // This is the relocation for the first word of the first EXIDX entry.
6834 // We expect to see a local section symbol.
6835 const int sym_size = elfcpp::Elf_sizes<32>::sym_size;
6836 elfcpp::Sym<32, big_endian> sym(psyms + r_sym * sym_size);
6837 if (sym.get_st_type() == elfcpp::STT_SECTION)
6839 bool is_ordinary;
6840 *pshndx =
6841 this->adjust_sym_shndx(r_sym, sym.get_st_shndx(), &is_ordinary);
6842 gold_assert(is_ordinary);
6843 return true;
6845 else
6846 return false;
6849 return false;
6852 // Make an EXIDX input section object for an EXIDX section whose index is
6853 // SHNDX. SHDR is the section header of the EXIDX section and TEXT_SHNDX
6854 // is the section index of the linked text section.
6856 template<bool big_endian>
6857 void
6858 Arm_relobj<big_endian>::make_exidx_input_section(
6859 unsigned int shndx,
6860 const elfcpp::Shdr<32, big_endian>& shdr,
6861 unsigned int text_shndx,
6862 const elfcpp::Shdr<32, big_endian>& text_shdr)
6864 // Create an Arm_exidx_input_section object for this EXIDX section.
6865 Arm_exidx_input_section* exidx_input_section =
6866 new Arm_exidx_input_section(this, shndx, text_shndx, shdr.get_sh_size(),
6867 shdr.get_sh_addralign(),
6868 text_shdr.get_sh_size());
6870 gold_assert(this->exidx_section_map_[shndx] == NULL);
6871 this->exidx_section_map_[shndx] = exidx_input_section;
6873 if (text_shndx == elfcpp::SHN_UNDEF || text_shndx >= this->shnum())
6875 gold_error(_("EXIDX section %s(%u) links to invalid section %u in %s"),
6876 this->section_name(shndx).c_str(), shndx, text_shndx,
6877 this->name().c_str());
6878 exidx_input_section->set_has_errors();
6880 else if (this->exidx_section_map_[text_shndx] != NULL)
6882 unsigned other_exidx_shndx =
6883 this->exidx_section_map_[text_shndx]->shndx();
6884 gold_error(_("EXIDX sections %s(%u) and %s(%u) both link to text section"
6885 "%s(%u) in %s"),
6886 this->section_name(shndx).c_str(), shndx,
6887 this->section_name(other_exidx_shndx).c_str(),
6888 other_exidx_shndx, this->section_name(text_shndx).c_str(),
6889 text_shndx, this->name().c_str());
6890 exidx_input_section->set_has_errors();
6892 else
6893 this->exidx_section_map_[text_shndx] = exidx_input_section;
6895 // Check section flags of text section.
6896 if ((text_shdr.get_sh_flags() & elfcpp::SHF_ALLOC) == 0)
6898 gold_error(_("EXIDX section %s(%u) links to non-allocated section %s(%u) "
6899 " in %s"),
6900 this->section_name(shndx).c_str(), shndx,
6901 this->section_name(text_shndx).c_str(), text_shndx,
6902 this->name().c_str());
6903 exidx_input_section->set_has_errors();
6905 else if ((text_shdr.get_sh_flags() & elfcpp::SHF_EXECINSTR) == 0)
6906 // I would like to make this an error but currently ld just ignores
6907 // this.
6908 gold_warning(_("EXIDX section %s(%u) links to non-executable section "
6909 "%s(%u) in %s"),
6910 this->section_name(shndx).c_str(), shndx,
6911 this->section_name(text_shndx).c_str(), text_shndx,
6912 this->name().c_str());
6915 // Read the symbol information.
6917 template<bool big_endian>
6918 void
6919 Arm_relobj<big_endian>::do_read_symbols(Read_symbols_data* sd)
6921 // Call parent class to read symbol information.
6922 this->base_read_symbols(sd);
6924 // If this input file is a binary file, it has no processor
6925 // specific flags and attributes section.
6926 Input_file::Format format = this->input_file()->format();
6927 if (format != Input_file::FORMAT_ELF)
6929 gold_assert(format == Input_file::FORMAT_BINARY);
6930 this->merge_flags_and_attributes_ = false;
6931 return;
6934 // Read processor-specific flags in ELF file header.
6935 const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset,
6936 elfcpp::Elf_sizes<32>::ehdr_size,
6937 true, false);
6938 elfcpp::Ehdr<32, big_endian> ehdr(pehdr);
6939 this->processor_specific_flags_ = ehdr.get_e_flags();
6941 // Go over the section headers and look for .ARM.attributes and .ARM.exidx
6942 // sections.
6943 std::vector<unsigned int> deferred_exidx_sections;
6944 const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
6945 const unsigned char* pshdrs = sd->section_headers->data();
6946 const unsigned char* ps = pshdrs + shdr_size;
6947 bool must_merge_flags_and_attributes = false;
6948 for (unsigned int i = 1; i < this->shnum(); ++i, ps += shdr_size)
6950 elfcpp::Shdr<32, big_endian> shdr(ps);
6952 // Sometimes an object has no contents except the section name string
6953 // table and an empty symbol table with the undefined symbol. We
6954 // don't want to merge processor-specific flags from such an object.
6955 if (shdr.get_sh_type() == elfcpp::SHT_SYMTAB)
6957 // Symbol table is not empty.
6958 const elfcpp::Elf_types<32>::Elf_WXword sym_size =
6959 elfcpp::Elf_sizes<32>::sym_size;
6960 if (shdr.get_sh_size() > sym_size)
6961 must_merge_flags_and_attributes = true;
6963 else if (shdr.get_sh_type() != elfcpp::SHT_STRTAB)
6964 // If this is neither an empty symbol table nor a string table,
6965 // be conservative.
6966 must_merge_flags_and_attributes = true;
6968 if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES)
6970 gold_assert(this->attributes_section_data_ == NULL);
6971 section_offset_type section_offset = shdr.get_sh_offset();
6972 section_size_type section_size =
6973 convert_to_section_size_type(shdr.get_sh_size());
6974 const unsigned char* view =
6975 this->get_view(section_offset, section_size, true, false);
6976 this->attributes_section_data_ =
6977 new Attributes_section_data(view, section_size);
6979 else if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX)
6981 unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link());
6982 if (text_shndx == elfcpp::SHN_UNDEF)
6983 deferred_exidx_sections.push_back(i);
6984 else
6986 elfcpp::Shdr<32, big_endian> text_shdr(pshdrs
6987 + text_shndx * shdr_size);
6988 this->make_exidx_input_section(i, shdr, text_shndx, text_shdr);
6990 // EHABI 4.4.1 requires that SHF_LINK_ORDER flag to be set.
6991 if ((shdr.get_sh_flags() & elfcpp::SHF_LINK_ORDER) == 0)
6992 gold_warning(_("SHF_LINK_ORDER not set in EXIDX section %s of %s"),
6993 this->section_name(i).c_str(), this->name().c_str());
6997 // This is rare.
6998 if (!must_merge_flags_and_attributes)
7000 gold_assert(deferred_exidx_sections.empty());
7001 this->merge_flags_and_attributes_ = false;
7002 return;
7005 // Some tools are broken and they do not set the link of EXIDX sections.
7006 // We look at the first relocation to figure out the linked sections.
7007 if (!deferred_exidx_sections.empty())
7009 // We need to go over the section headers again to find the mapping
7010 // from sections being relocated to their relocation sections. This is
7011 // a bit inefficient as we could do that in the loop above. However,
7012 // we do not expect any deferred EXIDX sections normally. So we do not
7013 // want to slow down the most common path.
7014 typedef Unordered_map<unsigned int, unsigned int> Reloc_map;
7015 Reloc_map reloc_map;
7016 ps = pshdrs + shdr_size;
7017 for (unsigned int i = 1; i < this->shnum(); ++i, ps += shdr_size)
7019 elfcpp::Shdr<32, big_endian> shdr(ps);
7020 elfcpp::Elf_Word sh_type = shdr.get_sh_type();
7021 if (sh_type == elfcpp::SHT_REL || sh_type == elfcpp::SHT_RELA)
7023 unsigned int info_shndx = this->adjust_shndx(shdr.get_sh_info());
7024 if (info_shndx >= this->shnum())
7025 gold_error(_("relocation section %u has invalid info %u"),
7026 i, info_shndx);
7027 Reloc_map::value_type value(info_shndx, i);
7028 std::pair<Reloc_map::iterator, bool> result =
7029 reloc_map.insert(value);
7030 if (!result.second)
7031 gold_error(_("section %u has multiple relocation sections "
7032 "%u and %u"),
7033 info_shndx, i, reloc_map[info_shndx]);
7037 // Read the symbol table section header.
7038 const unsigned int symtab_shndx = this->symtab_shndx();
7039 elfcpp::Shdr<32, big_endian>
7040 symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
7041 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
7043 // Read the local symbols.
7044 const int sym_size =elfcpp::Elf_sizes<32>::sym_size;
7045 const unsigned int loccount = this->local_symbol_count();
7046 gold_assert(loccount == symtabshdr.get_sh_info());
7047 off_t locsize = loccount * sym_size;
7048 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
7049 locsize, true, true);
7051 // Process the deferred EXIDX sections.
7052 for (unsigned int i = 0; i < deferred_exidx_sections.size(); ++i)
7054 unsigned int shndx = deferred_exidx_sections[i];
7055 elfcpp::Shdr<32, big_endian> shdr(pshdrs + shndx * shdr_size);
7056 unsigned int text_shndx = elfcpp::SHN_UNDEF;
7057 Reloc_map::const_iterator it = reloc_map.find(shndx);
7058 if (it != reloc_map.end())
7059 find_linked_text_section(pshdrs + it->second * shdr_size,
7060 psyms, &text_shndx);
7061 elfcpp::Shdr<32, big_endian> text_shdr(pshdrs
7062 + text_shndx * shdr_size);
7063 this->make_exidx_input_section(shndx, shdr, text_shndx, text_shdr);
7068 // Process relocations for garbage collection. The ARM target uses .ARM.exidx
7069 // sections for unwinding. These sections are referenced implicitly by
7070 // text sections linked in the section headers. If we ignore these implicit
7071 // references, the .ARM.exidx sections and any .ARM.extab sections they use
7072 // will be garbage-collected incorrectly. Hence we override the same function
7073 // in the base class to handle these implicit references.
7075 template<bool big_endian>
7076 void
7077 Arm_relobj<big_endian>::do_gc_process_relocs(Symbol_table* symtab,
7078 Layout* layout,
7079 Read_relocs_data* rd)
7081 // First, call base class method to process relocations in this object.
7082 Sized_relobj_file<32, big_endian>::do_gc_process_relocs(symtab, layout, rd);
7084 // If --gc-sections is not specified, there is nothing more to do.
7085 // This happens when --icf is used but --gc-sections is not.
7086 if (!parameters->options().gc_sections())
7087 return;
7089 unsigned int shnum = this->shnum();
7090 const unsigned int shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
7091 const unsigned char* pshdrs = this->get_view(this->elf_file()->shoff(),
7092 shnum * shdr_size,
7093 true, true);
7095 // Scan section headers for sections of type SHT_ARM_EXIDX. Add references
7096 // to these from the linked text sections.
7097 const unsigned char* ps = pshdrs + shdr_size;
7098 for (unsigned int i = 1; i < shnum; ++i, ps += shdr_size)
7100 elfcpp::Shdr<32, big_endian> shdr(ps);
7101 if (shdr.get_sh_type() == elfcpp::SHT_ARM_EXIDX)
7103 // Found an .ARM.exidx section, add it to the set of reachable
7104 // sections from its linked text section.
7105 unsigned int text_shndx = this->adjust_shndx(shdr.get_sh_link());
7106 symtab->gc()->add_reference(this, text_shndx, this, i);
7111 // Update output local symbol count. Owing to EXIDX entry merging, some local
7112 // symbols will be removed in output. Adjust output local symbol count
7113 // accordingly. We can only changed the static output local symbol count. It
7114 // is too late to change the dynamic symbols.
7116 template<bool big_endian>
7117 void
7118 Arm_relobj<big_endian>::update_output_local_symbol_count()
7120 // Caller should check that this needs updating. We want caller checking
7121 // because output_local_symbol_count_needs_update() is most likely inlined.
7122 gold_assert(this->output_local_symbol_count_needs_update_);
7124 gold_assert(this->symtab_shndx() != -1U);
7125 if (this->symtab_shndx() == 0)
7127 // This object has no symbols. Weird but legal.
7128 return;
7131 // Read the symbol table section header.
7132 const unsigned int symtab_shndx = this->symtab_shndx();
7133 elfcpp::Shdr<32, big_endian>
7134 symtabshdr(this, this->elf_file()->section_header(symtab_shndx));
7135 gold_assert(symtabshdr.get_sh_type() == elfcpp::SHT_SYMTAB);
7137 // Read the local symbols.
7138 const int sym_size = elfcpp::Elf_sizes<32>::sym_size;
7139 const unsigned int loccount = this->local_symbol_count();
7140 gold_assert(loccount == symtabshdr.get_sh_info());
7141 off_t locsize = loccount * sym_size;
7142 const unsigned char* psyms = this->get_view(symtabshdr.get_sh_offset(),
7143 locsize, true, true);
7145 // Loop over the local symbols.
7147 typedef typename Sized_relobj_file<32, big_endian>::Output_sections
7148 Output_sections;
7149 const Output_sections& out_sections(this->output_sections());
7150 unsigned int shnum = this->shnum();
7151 unsigned int count = 0;
7152 // Skip the first, dummy, symbol.
7153 psyms += sym_size;
7154 for (unsigned int i = 1; i < loccount; ++i, psyms += sym_size)
7156 elfcpp::Sym<32, big_endian> sym(psyms);
7158 Symbol_value<32>& lv((*this->local_values())[i]);
7160 // This local symbol was already discarded by do_count_local_symbols.
7161 if (lv.is_output_symtab_index_set() && !lv.has_output_symtab_entry())
7162 continue;
7164 bool is_ordinary;
7165 unsigned int shndx = this->adjust_sym_shndx(i, sym.get_st_shndx(),
7166 &is_ordinary);
7168 if (shndx < shnum)
7170 Output_section* os = out_sections[shndx];
7172 // This local symbol no longer has an output section. Discard it.
7173 if (os == NULL)
7175 lv.set_no_output_symtab_entry();
7176 continue;
7179 // Currently we only discard parts of EXIDX input sections.
7180 // We explicitly check for a merged EXIDX input section to avoid
7181 // calling Output_section_data::output_offset unless necessary.
7182 if ((this->get_output_section_offset(shndx) == invalid_address)
7183 && (this->exidx_input_section_by_shndx(shndx) != NULL))
7185 section_offset_type output_offset =
7186 os->output_offset(this, shndx, lv.input_value());
7187 if (output_offset == -1)
7189 // This symbol is defined in a part of an EXIDX input section
7190 // that is discarded due to entry merging.
7191 lv.set_no_output_symtab_entry();
7192 continue;
7197 ++count;
7200 this->set_output_local_symbol_count(count);
7201 this->output_local_symbol_count_needs_update_ = false;
7204 // Arm_dynobj methods.
7206 // Read the symbol information.
7208 template<bool big_endian>
7209 void
7210 Arm_dynobj<big_endian>::do_read_symbols(Read_symbols_data* sd)
7212 // Call parent class to read symbol information.
7213 this->base_read_symbols(sd);
7215 // Read processor-specific flags in ELF file header.
7216 const unsigned char* pehdr = this->get_view(elfcpp::file_header_offset,
7217 elfcpp::Elf_sizes<32>::ehdr_size,
7218 true, false);
7219 elfcpp::Ehdr<32, big_endian> ehdr(pehdr);
7220 this->processor_specific_flags_ = ehdr.get_e_flags();
7222 // Read the attributes section if there is one.
7223 // We read from the end because gas seems to put it near the end of
7224 // the section headers.
7225 const size_t shdr_size = elfcpp::Elf_sizes<32>::shdr_size;
7226 const unsigned char* ps =
7227 sd->section_headers->data() + shdr_size * (this->shnum() - 1);
7228 for (unsigned int i = this->shnum(); i > 0; --i, ps -= shdr_size)
7230 elfcpp::Shdr<32, big_endian> shdr(ps);
7231 if (shdr.get_sh_type() == elfcpp::SHT_ARM_ATTRIBUTES)
7233 section_offset_type section_offset = shdr.get_sh_offset();
7234 section_size_type section_size =
7235 convert_to_section_size_type(shdr.get_sh_size());
7236 const unsigned char* view =
7237 this->get_view(section_offset, section_size, true, false);
7238 this->attributes_section_data_ =
7239 new Attributes_section_data(view, section_size);
7240 break;
7245 // Stub_addend_reader methods.
7247 // Read the addend of a REL relocation of type R_TYPE at VIEW.
7249 template<bool big_endian>
7250 elfcpp::Elf_types<32>::Elf_Swxword
7251 Stub_addend_reader<elfcpp::SHT_REL, big_endian>::operator()(
7252 unsigned int r_type,
7253 const unsigned char* view,
7254 const typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc&) const
7256 typedef class Arm_relocate_functions<big_endian> RelocFuncs;
7258 switch (r_type)
7260 case elfcpp::R_ARM_CALL:
7261 case elfcpp::R_ARM_JUMP24:
7262 case elfcpp::R_ARM_PLT32:
7264 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
7265 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
7266 Valtype val = elfcpp::Swap<32, big_endian>::readval(wv);
7267 return Bits<26>::sign_extend32(val << 2);
7270 case elfcpp::R_ARM_THM_CALL:
7271 case elfcpp::R_ARM_THM_JUMP24:
7272 case elfcpp::R_ARM_THM_XPC22:
7274 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
7275 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
7276 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
7277 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
7278 return RelocFuncs::thumb32_branch_offset(upper_insn, lower_insn);
7281 case elfcpp::R_ARM_THM_JUMP19:
7283 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
7284 const Valtype* wv = reinterpret_cast<const Valtype*>(view);
7285 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
7286 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
7287 return RelocFuncs::thumb32_cond_branch_offset(upper_insn, lower_insn);
7290 default:
7291 gold_unreachable();
7295 // Arm_output_data_got methods.
7297 // Add a GOT pair for R_ARM_TLS_GD32. The creates a pair of GOT entries.
7298 // The first one is initialized to be 1, which is the module index for
7299 // the main executable and the second one 0. A reloc of the type
7300 // R_ARM_TLS_DTPOFF32 will be created for the second GOT entry and will
7301 // be applied by gold. GSYM is a global symbol.
7303 template<bool big_endian>
7304 void
7305 Arm_output_data_got<big_endian>::add_tls_gd32_with_static_reloc(
7306 unsigned int got_type,
7307 Symbol* gsym)
7309 if (gsym->has_got_offset(got_type))
7310 return;
7312 // We are doing a static link. Just mark it as belong to module 1,
7313 // the executable.
7314 unsigned int got_offset = this->add_constant(1);
7315 gsym->set_got_offset(got_type, got_offset);
7316 got_offset = this->add_constant(0);
7317 this->static_relocs_.push_back(Static_reloc(got_offset,
7318 elfcpp::R_ARM_TLS_DTPOFF32,
7319 gsym));
7322 // Same as the above but for a local symbol.
7324 template<bool big_endian>
7325 void
7326 Arm_output_data_got<big_endian>::add_tls_gd32_with_static_reloc(
7327 unsigned int got_type,
7328 Sized_relobj_file<32, big_endian>* object,
7329 unsigned int index)
7331 if (object->local_has_got_offset(index, got_type))
7332 return;
7334 // We are doing a static link. Just mark it as belong to module 1,
7335 // the executable.
7336 unsigned int got_offset = this->add_constant(1);
7337 object->set_local_got_offset(index, got_type, got_offset);
7338 got_offset = this->add_constant(0);
7339 this->static_relocs_.push_back(Static_reloc(got_offset,
7340 elfcpp::R_ARM_TLS_DTPOFF32,
7341 object, index));
7344 template<bool big_endian>
7345 void
7346 Arm_output_data_got<big_endian>::do_write(Output_file* of)
7348 // Call parent to write out GOT.
7349 Output_data_got<32, big_endian>::do_write(of);
7351 // We are done if there is no fix up.
7352 if (this->static_relocs_.empty())
7353 return;
7355 gold_assert(parameters->doing_static_link());
7357 const off_t offset = this->offset();
7358 const section_size_type oview_size =
7359 convert_to_section_size_type(this->data_size());
7360 unsigned char* const oview = of->get_output_view(offset, oview_size);
7362 Output_segment* tls_segment = this->layout_->tls_segment();
7363 gold_assert(tls_segment != NULL);
7365 // The thread pointer $tp points to the TCB, which is followed by the
7366 // TLS. So we need to adjust $tp relative addressing by this amount.
7367 Arm_address aligned_tcb_size =
7368 align_address(ARM_TCB_SIZE, tls_segment->maximum_alignment());
7370 for (size_t i = 0; i < this->static_relocs_.size(); ++i)
7372 Static_reloc& reloc(this->static_relocs_[i]);
7374 Arm_address value;
7375 if (!reloc.symbol_is_global())
7377 Sized_relobj_file<32, big_endian>* object = reloc.relobj();
7378 const Symbol_value<32>* psymval =
7379 reloc.relobj()->local_symbol(reloc.index());
7381 // We are doing static linking. Issue an error and skip this
7382 // relocation if the symbol is undefined or in a discarded_section.
7383 bool is_ordinary;
7384 unsigned int shndx = psymval->input_shndx(&is_ordinary);
7385 if ((shndx == elfcpp::SHN_UNDEF)
7386 || (is_ordinary
7387 && shndx != elfcpp::SHN_UNDEF
7388 && !object->is_section_included(shndx)
7389 && !this->symbol_table_->is_section_folded(object, shndx)))
7391 gold_error(_("undefined or discarded local symbol %u from "
7392 " object %s in GOT"),
7393 reloc.index(), reloc.relobj()->name().c_str());
7394 continue;
7397 value = psymval->value(object, 0);
7399 else
7401 const Symbol* gsym = reloc.symbol();
7402 gold_assert(gsym != NULL);
7403 if (gsym->is_forwarder())
7404 gsym = this->symbol_table_->resolve_forwards(gsym);
7406 // We are doing static linking. Issue an error and skip this
7407 // relocation if the symbol is undefined or in a discarded_section
7408 // unless it is a weakly_undefined symbol.
7409 if ((gsym->is_defined_in_discarded_section()
7410 || gsym->is_undefined())
7411 && !gsym->is_weak_undefined())
7413 gold_error(_("undefined or discarded symbol %s in GOT"),
7414 gsym->name());
7415 continue;
7418 if (!gsym->is_weak_undefined())
7420 const Sized_symbol<32>* sym =
7421 static_cast<const Sized_symbol<32>*>(gsym);
7422 value = sym->value();
7424 else
7425 value = 0;
7428 unsigned got_offset = reloc.got_offset();
7429 gold_assert(got_offset < oview_size);
7431 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
7432 Valtype* wv = reinterpret_cast<Valtype*>(oview + got_offset);
7433 Valtype x;
7434 switch (reloc.r_type())
7436 case elfcpp::R_ARM_TLS_DTPOFF32:
7437 x = value;
7438 break;
7439 case elfcpp::R_ARM_TLS_TPOFF32:
7440 x = value + aligned_tcb_size;
7441 break;
7442 default:
7443 gold_unreachable();
7445 elfcpp::Swap<32, big_endian>::writeval(wv, x);
7448 of->write_output_view(offset, oview_size, oview);
7451 // A class to handle the PLT data.
7452 // This is an abstract base class that handles most of the linker details
7453 // but does not know the actual contents of PLT entries. The derived
7454 // classes below fill in those details.
7456 template<bool big_endian>
7457 class Output_data_plt_arm : public Output_section_data
7459 public:
7460 // Unlike aarch64, which records symbol value in "addend" field of relocations
7461 // and could be done at the same time an IRelative reloc is created for the
7462 // symbol, arm puts the symbol value into "GOT" table, which, however, is
7463 // issued later in Output_data_plt_arm::do_write(). So we have a struct here
7464 // to keep necessary symbol information for later use in do_write. We usually
7465 // have only a very limited number of ifuncs, so the extra data required here
7466 // is also limited.
7468 struct IRelative_data
7470 IRelative_data(Sized_symbol<32>* sized_symbol)
7471 : symbol_is_global_(true)
7473 u_.global = sized_symbol;
7476 IRelative_data(Sized_relobj_file<32, big_endian>* relobj,
7477 unsigned int index)
7478 : symbol_is_global_(false)
7480 u_.local.relobj = relobj;
7481 u_.local.index = index;
7484 union
7486 Sized_symbol<32>* global;
7488 struct
7490 Sized_relobj_file<32, big_endian>* relobj;
7491 unsigned int index;
7492 } local;
7493 } u_;
7495 bool symbol_is_global_;
7498 typedef Output_data_reloc<elfcpp::SHT_REL, true, 32, big_endian>
7499 Reloc_section;
7501 Output_data_plt_arm(Layout* layout, uint64_t addralign,
7502 Arm_output_data_got<big_endian>* got,
7503 Output_data_space* got_plt,
7504 Output_data_space* got_irelative);
7506 // Add an entry to the PLT.
7507 void
7508 add_entry(Symbol_table* symtab, Layout* layout, Symbol* gsym);
7510 // Add the relocation for a plt entry.
7511 void
7512 add_relocation(Symbol_table* symtab, Layout* layout,
7513 Symbol* gsym, unsigned int got_offset);
7515 // Add an entry to the PLT for a local STT_GNU_IFUNC symbol.
7516 unsigned int
7517 add_local_ifunc_entry(Symbol_table* symtab, Layout*,
7518 Sized_relobj_file<32, big_endian>* relobj,
7519 unsigned int local_sym_index);
7521 // Return the .rel.plt section data.
7522 const Reloc_section*
7523 rel_plt() const
7524 { return this->rel_; }
7526 // Return the PLT relocation container for IRELATIVE.
7527 Reloc_section*
7528 rel_irelative(Symbol_table*, Layout*);
7530 // Return the number of PLT entries.
7531 unsigned int
7532 entry_count() const
7533 { return this->count_ + this->irelative_count_; }
7535 // Return the offset of the first non-reserved PLT entry.
7536 unsigned int
7537 first_plt_entry_offset() const
7538 { return this->do_first_plt_entry_offset(); }
7540 // Return the size of a PLT entry.
7541 unsigned int
7542 get_plt_entry_size() const
7543 { return this->do_get_plt_entry_size(); }
7545 // Return the PLT address for globals.
7546 uint32_t
7547 address_for_global(const Symbol*) const;
7549 // Return the PLT address for locals.
7550 uint32_t
7551 address_for_local(const Relobj*, unsigned int symndx) const;
7553 protected:
7554 // Fill in the first PLT entry.
7555 void
7556 fill_first_plt_entry(unsigned char* pov,
7557 Arm_address got_address,
7558 Arm_address plt_address)
7559 { this->do_fill_first_plt_entry(pov, got_address, plt_address); }
7561 void
7562 fill_plt_entry(unsigned char* pov,
7563 Arm_address got_address,
7564 Arm_address plt_address,
7565 unsigned int got_offset,
7566 unsigned int plt_offset)
7567 { do_fill_plt_entry(pov, got_address, plt_address, got_offset, plt_offset); }
7569 virtual unsigned int
7570 do_first_plt_entry_offset() const = 0;
7572 virtual unsigned int
7573 do_get_plt_entry_size() const = 0;
7575 virtual void
7576 do_fill_first_plt_entry(unsigned char* pov,
7577 Arm_address got_address,
7578 Arm_address plt_address) = 0;
7580 virtual void
7581 do_fill_plt_entry(unsigned char* pov,
7582 Arm_address got_address,
7583 Arm_address plt_address,
7584 unsigned int got_offset,
7585 unsigned int plt_offset) = 0;
7587 void
7588 do_adjust_output_section(Output_section* os);
7590 // Write to a map file.
7591 void
7592 do_print_to_mapfile(Mapfile* mapfile) const
7593 { mapfile->print_output_data(this, _("** PLT")); }
7595 private:
7596 // Set the final size.
7597 void
7598 set_final_data_size()
7600 this->set_data_size(this->first_plt_entry_offset()
7601 + ((this->count_ + this->irelative_count_)
7602 * this->get_plt_entry_size()));
7605 // Write out the PLT data.
7606 void
7607 do_write(Output_file*);
7609 // Record irelative symbol data.
7610 void insert_irelative_data(const IRelative_data& idata)
7611 { irelative_data_vec_.push_back(idata); }
7613 // The reloc section.
7614 Reloc_section* rel_;
7615 // The IRELATIVE relocs, if necessary. These must follow the
7616 // regular PLT relocations.
7617 Reloc_section* irelative_rel_;
7618 // The .got section.
7619 Arm_output_data_got<big_endian>* got_;
7620 // The .got.plt section.
7621 Output_data_space* got_plt_;
7622 // The part of the .got.plt section used for IRELATIVE relocs.
7623 Output_data_space* got_irelative_;
7624 // The number of PLT entries.
7625 unsigned int count_;
7626 // Number of PLT entries with R_ARM_IRELATIVE relocs. These
7627 // follow the regular PLT entries.
7628 unsigned int irelative_count_;
7629 // Vector for irelative data.
7630 typedef std::vector<IRelative_data> IRelative_data_vec;
7631 IRelative_data_vec irelative_data_vec_;
7634 // Create the PLT section. The ordinary .got section is an argument,
7635 // since we need to refer to the start. We also create our own .got
7636 // section just for PLT entries.
7638 template<bool big_endian>
7639 Output_data_plt_arm<big_endian>::Output_data_plt_arm(
7640 Layout* layout, uint64_t addralign,
7641 Arm_output_data_got<big_endian>* got,
7642 Output_data_space* got_plt,
7643 Output_data_space* got_irelative)
7644 : Output_section_data(addralign), irelative_rel_(NULL),
7645 got_(got), got_plt_(got_plt), got_irelative_(got_irelative),
7646 count_(0), irelative_count_(0)
7648 this->rel_ = new Reloc_section(false);
7649 layout->add_output_section_data(".rel.plt", elfcpp::SHT_REL,
7650 elfcpp::SHF_ALLOC, this->rel_,
7651 ORDER_DYNAMIC_PLT_RELOCS, false);
7654 template<bool big_endian>
7655 void
7656 Output_data_plt_arm<big_endian>::do_adjust_output_section(Output_section* os)
7658 os->set_entsize(0);
7661 // Add an entry to the PLT.
7663 template<bool big_endian>
7664 void
7665 Output_data_plt_arm<big_endian>::add_entry(Symbol_table* symtab,
7666 Layout* layout,
7667 Symbol* gsym)
7669 gold_assert(!gsym->has_plt_offset());
7671 unsigned int* entry_count;
7672 Output_section_data_build* got;
7674 // We have 2 different types of plt entry here, normal and ifunc.
7676 // For normal plt, the offset begins with first_plt_entry_offset(20), and the
7677 // 1st entry offset would be 20, the second 32, third 44 ... etc.
7679 // For ifunc plt, the offset begins with 0. So the first offset would 0,
7680 // second 12, third 24 ... etc.
7682 // IFunc plt entries *always* come after *normal* plt entries.
7684 // Notice, when computing the plt address of a certain symbol, "plt_address +
7685 // plt_offset" is no longer correct. Use target->plt_address_for_global() or
7686 // target->plt_address_for_local() instead.
7688 int begin_offset = 0;
7689 if (gsym->type() == elfcpp::STT_GNU_IFUNC
7690 && gsym->can_use_relative_reloc(false))
7692 entry_count = &this->irelative_count_;
7693 got = this->got_irelative_;
7694 // For irelative plt entries, offset is relative to the end of normal plt
7695 // entries, so it starts from 0.
7696 begin_offset = 0;
7697 // Record symbol information.
7698 this->insert_irelative_data(
7699 IRelative_data(symtab->get_sized_symbol<32>(gsym)));
7701 else
7703 entry_count = &this->count_;
7704 got = this->got_plt_;
7705 // Note that for normal plt entries, when setting the PLT offset we skip
7706 // the initial reserved PLT entry.
7707 begin_offset = this->first_plt_entry_offset();
7710 gsym->set_plt_offset(begin_offset
7711 + (*entry_count) * this->get_plt_entry_size());
7713 ++(*entry_count);
7715 section_offset_type got_offset = got->current_data_size();
7717 // Every PLT entry needs a GOT entry which points back to the PLT
7718 // entry (this will be changed by the dynamic linker, normally
7719 // lazily when the function is called).
7720 got->set_current_data_size(got_offset + 4);
7722 // Every PLT entry needs a reloc.
7723 this->add_relocation(symtab, layout, gsym, got_offset);
7725 // Note that we don't need to save the symbol. The contents of the
7726 // PLT are independent of which symbols are used. The symbols only
7727 // appear in the relocations.
7730 // Add an entry to the PLT for a local STT_GNU_IFUNC symbol. Return
7731 // the PLT offset.
7733 template<bool big_endian>
7734 unsigned int
7735 Output_data_plt_arm<big_endian>::add_local_ifunc_entry(
7736 Symbol_table* symtab,
7737 Layout* layout,
7738 Sized_relobj_file<32, big_endian>* relobj,
7739 unsigned int local_sym_index)
7741 this->insert_irelative_data(IRelative_data(relobj, local_sym_index));
7743 // Notice, when computingthe plt entry address, "plt_address + plt_offset" is
7744 // no longer correct. Use target->plt_address_for_local() instead.
7745 unsigned int plt_offset = this->irelative_count_ * this->get_plt_entry_size();
7746 ++this->irelative_count_;
7748 section_offset_type got_offset = this->got_irelative_->current_data_size();
7750 // Every PLT entry needs a GOT entry which points back to the PLT
7751 // entry.
7752 this->got_irelative_->set_current_data_size(got_offset + 4);
7755 // Every PLT entry needs a reloc.
7756 Reloc_section* rel = this->rel_irelative(symtab, layout);
7757 rel->add_symbolless_local_addend(relobj, local_sym_index,
7758 elfcpp::R_ARM_IRELATIVE,
7759 this->got_irelative_, got_offset);
7760 return plt_offset;
7764 // Add the relocation for a PLT entry.
7766 template<bool big_endian>
7767 void
7768 Output_data_plt_arm<big_endian>::add_relocation(
7769 Symbol_table* symtab, Layout* layout, Symbol* gsym, unsigned int got_offset)
7771 if (gsym->type() == elfcpp::STT_GNU_IFUNC
7772 && gsym->can_use_relative_reloc(false))
7774 Reloc_section* rel = this->rel_irelative(symtab, layout);
7775 rel->add_symbolless_global_addend(gsym, elfcpp::R_ARM_IRELATIVE,
7776 this->got_irelative_, got_offset);
7778 else
7780 gsym->set_needs_dynsym_entry();
7781 this->rel_->add_global(gsym, elfcpp::R_ARM_JUMP_SLOT, this->got_plt_,
7782 got_offset);
7787 // Create the irelative relocation data.
7789 template<bool big_endian>
7790 typename Output_data_plt_arm<big_endian>::Reloc_section*
7791 Output_data_plt_arm<big_endian>::rel_irelative(Symbol_table* symtab,
7792 Layout* layout)
7794 if (this->irelative_rel_ == NULL)
7796 // Since irelative relocations goes into 'rel.dyn', we delegate the
7797 // creation of irelative_rel_ to where rel_dyn section gets created.
7798 Target_arm<big_endian>* arm_target =
7799 Target_arm<big_endian>::default_target();
7800 this->irelative_rel_ = arm_target->rel_irelative_section(layout);
7802 // Make sure we have a place for the TLSDESC relocations, in
7803 // case we see any later on.
7804 // this->rel_tlsdesc(layout);
7805 if (parameters->doing_static_link())
7807 // A statically linked executable will only have a .rel.plt section to
7808 // hold R_ARM_IRELATIVE relocs for STT_GNU_IFUNC symbols. The library
7809 // will use these symbols to locate the IRELATIVE relocs at program
7810 // startup time.
7811 symtab->define_in_output_data("__rel_iplt_start", NULL,
7812 Symbol_table::PREDEFINED,
7813 this->irelative_rel_, 0, 0,
7814 elfcpp::STT_NOTYPE, elfcpp::STB_GLOBAL,
7815 elfcpp::STV_HIDDEN, 0, false, true);
7816 symtab->define_in_output_data("__rel_iplt_end", NULL,
7817 Symbol_table::PREDEFINED,
7818 this->irelative_rel_, 0, 0,
7819 elfcpp::STT_NOTYPE, elfcpp::STB_GLOBAL,
7820 elfcpp::STV_HIDDEN, 0, true, true);
7823 return this->irelative_rel_;
7827 // Return the PLT address for a global symbol.
7829 template<bool big_endian>
7830 uint32_t
7831 Output_data_plt_arm<big_endian>::address_for_global(const Symbol* gsym) const
7833 uint64_t begin_offset = 0;
7834 if (gsym->type() == elfcpp::STT_GNU_IFUNC
7835 && gsym->can_use_relative_reloc(false))
7837 begin_offset = (this->first_plt_entry_offset() +
7838 this->count_ * this->get_plt_entry_size());
7840 return this->address() + begin_offset + gsym->plt_offset();
7844 // Return the PLT address for a local symbol. These are always
7845 // IRELATIVE relocs.
7847 template<bool big_endian>
7848 uint32_t
7849 Output_data_plt_arm<big_endian>::address_for_local(
7850 const Relobj* object,
7851 unsigned int r_sym) const
7853 return (this->address()
7854 + this->first_plt_entry_offset()
7855 + this->count_ * this->get_plt_entry_size()
7856 + object->local_plt_offset(r_sym));
7860 template<bool big_endian>
7861 class Output_data_plt_arm_standard : public Output_data_plt_arm<big_endian>
7863 public:
7864 Output_data_plt_arm_standard(Layout* layout,
7865 Arm_output_data_got<big_endian>* got,
7866 Output_data_space* got_plt,
7867 Output_data_space* got_irelative)
7868 : Output_data_plt_arm<big_endian>(layout, 4, got, got_plt, got_irelative)
7871 protected:
7872 // Return the offset of the first non-reserved PLT entry.
7873 virtual unsigned int
7874 do_first_plt_entry_offset() const
7875 { return sizeof(first_plt_entry); }
7877 virtual void
7878 do_fill_first_plt_entry(unsigned char* pov,
7879 Arm_address got_address,
7880 Arm_address plt_address);
7882 private:
7883 // Template for the first PLT entry.
7884 static const uint32_t first_plt_entry[5];
7887 // ARM PLTs.
7888 // FIXME: This is not very flexible. Right now this has only been tested
7889 // on armv5te. If we are to support additional architecture features like
7890 // Thumb-2 or BE8, we need to make this more flexible like GNU ld.
7892 // The first entry in the PLT.
7893 template<bool big_endian>
7894 const uint32_t Output_data_plt_arm_standard<big_endian>::first_plt_entry[5] =
7896 0xe52de004, // str lr, [sp, #-4]!
7897 0xe59fe004, // ldr lr, [pc, #4]
7898 0xe08fe00e, // add lr, pc, lr
7899 0xe5bef008, // ldr pc, [lr, #8]!
7900 0x00000000, // &GOT[0] - .
7903 template<bool big_endian>
7904 void
7905 Output_data_plt_arm_standard<big_endian>::do_fill_first_plt_entry(
7906 unsigned char* pov,
7907 Arm_address got_address,
7908 Arm_address plt_address)
7910 // Write first PLT entry. All but the last word are constants.
7911 const size_t num_first_plt_words = (sizeof(first_plt_entry)
7912 / sizeof(first_plt_entry[0]));
7913 for (size_t i = 0; i < num_first_plt_words - 1; i++)
7915 if (parameters->options().be8())
7917 elfcpp::Swap<32, false>::writeval(pov + i * 4,
7918 first_plt_entry[i]);
7920 else
7922 elfcpp::Swap<32, big_endian>::writeval(pov + i * 4,
7923 first_plt_entry[i]);
7926 // Last word in first PLT entry is &GOT[0] - .
7927 elfcpp::Swap<32, big_endian>::writeval(pov + 16,
7928 got_address - (plt_address + 16));
7931 // Subsequent entries in the PLT.
7932 // This class generates short (12-byte) entries, for displacements up to 2^28.
7934 template<bool big_endian>
7935 class Output_data_plt_arm_short : public Output_data_plt_arm_standard<big_endian>
7937 public:
7938 Output_data_plt_arm_short(Layout* layout,
7939 Arm_output_data_got<big_endian>* got,
7940 Output_data_space* got_plt,
7941 Output_data_space* got_irelative)
7942 : Output_data_plt_arm_standard<big_endian>(layout, got, got_plt, got_irelative)
7945 protected:
7946 // Return the size of a PLT entry.
7947 virtual unsigned int
7948 do_get_plt_entry_size() const
7949 { return sizeof(plt_entry); }
7951 virtual void
7952 do_fill_plt_entry(unsigned char* pov,
7953 Arm_address got_address,
7954 Arm_address plt_address,
7955 unsigned int got_offset,
7956 unsigned int plt_offset);
7958 private:
7959 // Template for subsequent PLT entries.
7960 static const uint32_t plt_entry[3];
7963 template<bool big_endian>
7964 const uint32_t Output_data_plt_arm_short<big_endian>::plt_entry[3] =
7966 0xe28fc600, // add ip, pc, #0xNN00000
7967 0xe28cca00, // add ip, ip, #0xNN000
7968 0xe5bcf000, // ldr pc, [ip, #0xNNN]!
7971 template<bool big_endian>
7972 void
7973 Output_data_plt_arm_short<big_endian>::do_fill_plt_entry(
7974 unsigned char* pov,
7975 Arm_address got_address,
7976 Arm_address plt_address,
7977 unsigned int got_offset,
7978 unsigned int plt_offset)
7980 int32_t offset = ((got_address + got_offset)
7981 - (plt_address + plt_offset + 8));
7982 if (offset < 0 || offset > 0x0fffffff)
7983 gold_error(_("PLT offset too large, try linking with --long-plt"));
7985 uint32_t plt_insn0 = plt_entry[0] | ((offset >> 20) & 0xff);
7986 uint32_t plt_insn1 = plt_entry[1] | ((offset >> 12) & 0xff);
7987 uint32_t plt_insn2 = plt_entry[2] | (offset & 0xfff);
7989 if (parameters->options().be8())
7991 elfcpp::Swap<32, false>::writeval(pov, plt_insn0);
7992 elfcpp::Swap<32, false>::writeval(pov + 4, plt_insn1);
7993 elfcpp::Swap<32, false>::writeval(pov + 8, plt_insn2);
7995 else
7997 elfcpp::Swap<32, big_endian>::writeval(pov, plt_insn0);
7998 elfcpp::Swap<32, big_endian>::writeval(pov + 4, plt_insn1);
7999 elfcpp::Swap<32, big_endian>::writeval(pov + 8, plt_insn2);
8003 // This class generates long (16-byte) entries, for arbitrary displacements.
8005 template<bool big_endian>
8006 class Output_data_plt_arm_long : public Output_data_plt_arm_standard<big_endian>
8008 public:
8009 Output_data_plt_arm_long(Layout* layout,
8010 Arm_output_data_got<big_endian>* got,
8011 Output_data_space* got_plt,
8012 Output_data_space* got_irelative)
8013 : Output_data_plt_arm_standard<big_endian>(layout, got, got_plt, got_irelative)
8016 protected:
8017 // Return the size of a PLT entry.
8018 virtual unsigned int
8019 do_get_plt_entry_size() const
8020 { return sizeof(plt_entry); }
8022 virtual void
8023 do_fill_plt_entry(unsigned char* pov,
8024 Arm_address got_address,
8025 Arm_address plt_address,
8026 unsigned int got_offset,
8027 unsigned int plt_offset);
8029 private:
8030 // Template for subsequent PLT entries.
8031 static const uint32_t plt_entry[4];
8034 template<bool big_endian>
8035 const uint32_t Output_data_plt_arm_long<big_endian>::plt_entry[4] =
8037 0xe28fc200, // add ip, pc, #0xN0000000
8038 0xe28cc600, // add ip, ip, #0xNN00000
8039 0xe28cca00, // add ip, ip, #0xNN000
8040 0xe5bcf000, // ldr pc, [ip, #0xNNN]!
8043 template<bool big_endian>
8044 void
8045 Output_data_plt_arm_long<big_endian>::do_fill_plt_entry(
8046 unsigned char* pov,
8047 Arm_address got_address,
8048 Arm_address plt_address,
8049 unsigned int got_offset,
8050 unsigned int plt_offset)
8052 int32_t offset = ((got_address + got_offset)
8053 - (plt_address + plt_offset + 8));
8055 uint32_t plt_insn0 = plt_entry[0] | (offset >> 28);
8056 uint32_t plt_insn1 = plt_entry[1] | ((offset >> 20) & 0xff);
8057 uint32_t plt_insn2 = plt_entry[2] | ((offset >> 12) & 0xff);
8058 uint32_t plt_insn3 = plt_entry[3] | (offset & 0xfff);
8060 if (parameters->options().be8())
8062 elfcpp::Swap<32, false>::writeval(pov, plt_insn0);
8063 elfcpp::Swap<32, false>::writeval(pov + 4, plt_insn1);
8064 elfcpp::Swap<32, false>::writeval(pov + 8, plt_insn2);
8065 elfcpp::Swap<32, false>::writeval(pov + 12, plt_insn3);
8067 else
8069 elfcpp::Swap<32, big_endian>::writeval(pov, plt_insn0);
8070 elfcpp::Swap<32, big_endian>::writeval(pov + 4, plt_insn1);
8071 elfcpp::Swap<32, big_endian>::writeval(pov + 8, plt_insn2);
8072 elfcpp::Swap<32, big_endian>::writeval(pov + 12, plt_insn3);
8076 // Write out the PLT. This uses the hand-coded instructions above,
8077 // and adjusts them as needed. This is all specified by the arm ELF
8078 // Processor Supplement.
8080 template<bool big_endian>
8081 void
8082 Output_data_plt_arm<big_endian>::do_write(Output_file* of)
8084 const off_t offset = this->offset();
8085 const section_size_type oview_size =
8086 convert_to_section_size_type(this->data_size());
8087 unsigned char* const oview = of->get_output_view(offset, oview_size);
8089 const off_t got_file_offset = this->got_plt_->offset();
8090 gold_assert(got_file_offset + this->got_plt_->data_size()
8091 == this->got_irelative_->offset());
8092 const section_size_type got_size =
8093 convert_to_section_size_type(this->got_plt_->data_size()
8094 + this->got_irelative_->data_size());
8095 unsigned char* const got_view = of->get_output_view(got_file_offset,
8096 got_size);
8097 unsigned char* pov = oview;
8099 Arm_address plt_address = this->address();
8100 Arm_address got_address = this->got_plt_->address();
8102 // Write first PLT entry.
8103 this->fill_first_plt_entry(pov, got_address, plt_address);
8104 pov += this->first_plt_entry_offset();
8106 unsigned char* got_pov = got_view;
8108 memset(got_pov, 0, 12);
8109 got_pov += 12;
8111 unsigned int plt_offset = this->first_plt_entry_offset();
8112 unsigned int got_offset = 12;
8113 const unsigned int count = this->count_ + this->irelative_count_;
8114 gold_assert(this->irelative_count_ == this->irelative_data_vec_.size());
8115 for (unsigned int i = 0;
8116 i < count;
8117 ++i,
8118 pov += this->get_plt_entry_size(),
8119 got_pov += 4,
8120 plt_offset += this->get_plt_entry_size(),
8121 got_offset += 4)
8123 // Set and adjust the PLT entry itself.
8124 this->fill_plt_entry(pov, got_address, plt_address,
8125 got_offset, plt_offset);
8127 Arm_address value;
8128 if (i < this->count_)
8130 // For non-irelative got entries, the value is the beginning of plt.
8131 value = plt_address;
8133 else
8135 // For irelative got entries, the value is the (global/local) symbol
8136 // address.
8137 const IRelative_data& idata =
8138 this->irelative_data_vec_[i - this->count_];
8139 if (idata.symbol_is_global_)
8141 // Set the entry in the GOT for irelative symbols. The content is
8142 // the address of the ifunc, not the address of plt start.
8143 const Sized_symbol<32>* sized_symbol = idata.u_.global;
8144 gold_assert(sized_symbol->type() == elfcpp::STT_GNU_IFUNC);
8145 value = sized_symbol->value();
8147 else
8149 value = idata.u_.local.relobj->local_symbol_value(
8150 idata.u_.local.index, 0);
8153 elfcpp::Swap<32, big_endian>::writeval(got_pov, value);
8156 gold_assert(static_cast<section_size_type>(pov - oview) == oview_size);
8157 gold_assert(static_cast<section_size_type>(got_pov - got_view) == got_size);
8159 of->write_output_view(offset, oview_size, oview);
8160 of->write_output_view(got_file_offset, got_size, got_view);
8164 // Create a PLT entry for a global symbol.
8166 template<bool big_endian>
8167 void
8168 Target_arm<big_endian>::make_plt_entry(Symbol_table* symtab, Layout* layout,
8169 Symbol* gsym)
8171 if (gsym->has_plt_offset())
8172 return;
8174 if (this->plt_ == NULL)
8175 this->make_plt_section(symtab, layout);
8177 this->plt_->add_entry(symtab, layout, gsym);
8181 // Create the PLT section.
8182 template<bool big_endian>
8183 void
8184 Target_arm<big_endian>::make_plt_section(
8185 Symbol_table* symtab, Layout* layout)
8187 if (this->plt_ == NULL)
8189 // Create the GOT section first.
8190 this->got_section(symtab, layout);
8192 // GOT for irelatives is create along with got.plt.
8193 gold_assert(this->got_ != NULL
8194 && this->got_plt_ != NULL
8195 && this->got_irelative_ != NULL);
8196 this->plt_ = this->make_data_plt(layout, this->got_, this->got_plt_,
8197 this->got_irelative_);
8199 layout->add_output_section_data(".plt", elfcpp::SHT_PROGBITS,
8200 (elfcpp::SHF_ALLOC
8201 | elfcpp::SHF_EXECINSTR),
8202 this->plt_, ORDER_PLT, false);
8203 symtab->define_in_output_data("$a", NULL,
8204 Symbol_table::PREDEFINED,
8205 this->plt_,
8206 0, 0, elfcpp::STT_NOTYPE,
8207 elfcpp::STB_LOCAL,
8208 elfcpp::STV_DEFAULT, 0,
8209 false, false);
8214 // Make a PLT entry for a local STT_GNU_IFUNC symbol.
8216 template<bool big_endian>
8217 void
8218 Target_arm<big_endian>::make_local_ifunc_plt_entry(
8219 Symbol_table* symtab, Layout* layout,
8220 Sized_relobj_file<32, big_endian>* relobj,
8221 unsigned int local_sym_index)
8223 if (relobj->local_has_plt_offset(local_sym_index))
8224 return;
8225 if (this->plt_ == NULL)
8226 this->make_plt_section(symtab, layout);
8227 unsigned int plt_offset = this->plt_->add_local_ifunc_entry(symtab, layout,
8228 relobj,
8229 local_sym_index);
8230 relobj->set_local_plt_offset(local_sym_index, plt_offset);
8234 // Return the number of entries in the PLT.
8236 template<bool big_endian>
8237 unsigned int
8238 Target_arm<big_endian>::plt_entry_count() const
8240 if (this->plt_ == NULL)
8241 return 0;
8242 return this->plt_->entry_count();
8245 // Return the offset of the first non-reserved PLT entry.
8247 template<bool big_endian>
8248 unsigned int
8249 Target_arm<big_endian>::first_plt_entry_offset() const
8251 return this->plt_->first_plt_entry_offset();
8254 // Return the size of each PLT entry.
8256 template<bool big_endian>
8257 unsigned int
8258 Target_arm<big_endian>::plt_entry_size() const
8260 return this->plt_->get_plt_entry_size();
8263 // Get the section to use for TLS_DESC relocations.
8265 template<bool big_endian>
8266 typename Target_arm<big_endian>::Reloc_section*
8267 Target_arm<big_endian>::rel_tls_desc_section(Layout* layout) const
8269 return this->plt_section()->rel_tls_desc(layout);
8272 // Define the _TLS_MODULE_BASE_ symbol in the TLS segment.
8274 template<bool big_endian>
8275 void
8276 Target_arm<big_endian>::define_tls_base_symbol(
8277 Symbol_table* symtab,
8278 Layout* layout)
8280 if (this->tls_base_symbol_defined_)
8281 return;
8283 Output_segment* tls_segment = layout->tls_segment();
8284 if (tls_segment != NULL)
8286 bool is_exec = parameters->options().output_is_executable();
8287 symtab->define_in_output_segment("_TLS_MODULE_BASE_", NULL,
8288 Symbol_table::PREDEFINED,
8289 tls_segment, 0, 0,
8290 elfcpp::STT_TLS,
8291 elfcpp::STB_LOCAL,
8292 elfcpp::STV_HIDDEN, 0,
8293 (is_exec
8294 ? Symbol::SEGMENT_END
8295 : Symbol::SEGMENT_START),
8296 true);
8298 this->tls_base_symbol_defined_ = true;
8301 // Create a GOT entry for the TLS module index.
8303 template<bool big_endian>
8304 unsigned int
8305 Target_arm<big_endian>::got_mod_index_entry(
8306 Symbol_table* symtab,
8307 Layout* layout,
8308 Sized_relobj_file<32, big_endian>* object)
8310 if (this->got_mod_index_offset_ == -1U)
8312 gold_assert(symtab != NULL && layout != NULL && object != NULL);
8313 Arm_output_data_got<big_endian>* got = this->got_section(symtab, layout);
8314 unsigned int got_offset;
8315 if (!parameters->doing_static_link())
8317 got_offset = got->add_constant(0);
8318 Reloc_section* rel_dyn = this->rel_dyn_section(layout);
8319 rel_dyn->add_local(object, 0, elfcpp::R_ARM_TLS_DTPMOD32, got,
8320 got_offset);
8322 else
8324 // We are doing a static link. Just mark it as belong to module 1,
8325 // the executable.
8326 got_offset = got->add_constant(1);
8329 got->add_constant(0);
8330 this->got_mod_index_offset_ = got_offset;
8332 return this->got_mod_index_offset_;
8335 // Optimize the TLS relocation type based on what we know about the
8336 // symbol. IS_FINAL is true if the final address of this symbol is
8337 // known at link time.
8339 template<bool big_endian>
8340 tls::Tls_optimization
8341 Target_arm<big_endian>::optimize_tls_reloc(bool, int)
8343 // FIXME: Currently we do not do any TLS optimization.
8344 return tls::TLSOPT_NONE;
8347 // Get the Reference_flags for a particular relocation.
8349 template<bool big_endian>
8351 Target_arm<big_endian>::Scan::get_reference_flags(unsigned int r_type)
8353 switch (r_type)
8355 case elfcpp::R_ARM_NONE:
8356 case elfcpp::R_ARM_V4BX:
8357 case elfcpp::R_ARM_GNU_VTENTRY:
8358 case elfcpp::R_ARM_GNU_VTINHERIT:
8359 // No symbol reference.
8360 return 0;
8362 case elfcpp::R_ARM_ABS32:
8363 case elfcpp::R_ARM_ABS16:
8364 case elfcpp::R_ARM_ABS12:
8365 case elfcpp::R_ARM_THM_ABS5:
8366 case elfcpp::R_ARM_ABS8:
8367 case elfcpp::R_ARM_BASE_ABS:
8368 case elfcpp::R_ARM_MOVW_ABS_NC:
8369 case elfcpp::R_ARM_MOVT_ABS:
8370 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
8371 case elfcpp::R_ARM_THM_MOVT_ABS:
8372 case elfcpp::R_ARM_ABS32_NOI:
8373 return Symbol::ABSOLUTE_REF;
8375 case elfcpp::R_ARM_REL32:
8376 case elfcpp::R_ARM_LDR_PC_G0:
8377 case elfcpp::R_ARM_SBREL32:
8378 case elfcpp::R_ARM_THM_PC8:
8379 case elfcpp::R_ARM_BASE_PREL:
8380 case elfcpp::R_ARM_MOVW_PREL_NC:
8381 case elfcpp::R_ARM_MOVT_PREL:
8382 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
8383 case elfcpp::R_ARM_THM_MOVT_PREL:
8384 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
8385 case elfcpp::R_ARM_THM_PC12:
8386 case elfcpp::R_ARM_REL32_NOI:
8387 case elfcpp::R_ARM_ALU_PC_G0_NC:
8388 case elfcpp::R_ARM_ALU_PC_G0:
8389 case elfcpp::R_ARM_ALU_PC_G1_NC:
8390 case elfcpp::R_ARM_ALU_PC_G1:
8391 case elfcpp::R_ARM_ALU_PC_G2:
8392 case elfcpp::R_ARM_LDR_PC_G1:
8393 case elfcpp::R_ARM_LDR_PC_G2:
8394 case elfcpp::R_ARM_LDRS_PC_G0:
8395 case elfcpp::R_ARM_LDRS_PC_G1:
8396 case elfcpp::R_ARM_LDRS_PC_G2:
8397 case elfcpp::R_ARM_LDC_PC_G0:
8398 case elfcpp::R_ARM_LDC_PC_G1:
8399 case elfcpp::R_ARM_LDC_PC_G2:
8400 case elfcpp::R_ARM_ALU_SB_G0_NC:
8401 case elfcpp::R_ARM_ALU_SB_G0:
8402 case elfcpp::R_ARM_ALU_SB_G1_NC:
8403 case elfcpp::R_ARM_ALU_SB_G1:
8404 case elfcpp::R_ARM_ALU_SB_G2:
8405 case elfcpp::R_ARM_LDR_SB_G0:
8406 case elfcpp::R_ARM_LDR_SB_G1:
8407 case elfcpp::R_ARM_LDR_SB_G2:
8408 case elfcpp::R_ARM_LDRS_SB_G0:
8409 case elfcpp::R_ARM_LDRS_SB_G1:
8410 case elfcpp::R_ARM_LDRS_SB_G2:
8411 case elfcpp::R_ARM_LDC_SB_G0:
8412 case elfcpp::R_ARM_LDC_SB_G1:
8413 case elfcpp::R_ARM_LDC_SB_G2:
8414 case elfcpp::R_ARM_MOVW_BREL_NC:
8415 case elfcpp::R_ARM_MOVT_BREL:
8416 case elfcpp::R_ARM_MOVW_BREL:
8417 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
8418 case elfcpp::R_ARM_THM_MOVT_BREL:
8419 case elfcpp::R_ARM_THM_MOVW_BREL:
8420 case elfcpp::R_ARM_GOTOFF32:
8421 case elfcpp::R_ARM_GOTOFF12:
8422 case elfcpp::R_ARM_SBREL31:
8423 return Symbol::RELATIVE_REF;
8425 case elfcpp::R_ARM_PLT32:
8426 case elfcpp::R_ARM_CALL:
8427 case elfcpp::R_ARM_JUMP24:
8428 case elfcpp::R_ARM_THM_CALL:
8429 case elfcpp::R_ARM_THM_JUMP24:
8430 case elfcpp::R_ARM_THM_JUMP19:
8431 case elfcpp::R_ARM_THM_JUMP6:
8432 case elfcpp::R_ARM_THM_JUMP11:
8433 case elfcpp::R_ARM_THM_JUMP8:
8434 // R_ARM_PREL31 is not used to relocate call/jump instructions but
8435 // in unwind tables. It may point to functions via PLTs.
8436 // So we treat it like call/jump relocations above.
8437 case elfcpp::R_ARM_PREL31:
8438 return Symbol::FUNCTION_CALL | Symbol::RELATIVE_REF;
8440 case elfcpp::R_ARM_GOT_BREL:
8441 case elfcpp::R_ARM_GOT_ABS:
8442 case elfcpp::R_ARM_GOT_PREL:
8443 // Absolute in GOT.
8444 return Symbol::ABSOLUTE_REF;
8446 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
8447 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
8448 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
8449 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
8450 case elfcpp::R_ARM_TLS_LE32: // Local-exec
8451 return Symbol::TLS_REF;
8453 case elfcpp::R_ARM_TARGET1:
8454 case elfcpp::R_ARM_TARGET2:
8455 case elfcpp::R_ARM_COPY:
8456 case elfcpp::R_ARM_GLOB_DAT:
8457 case elfcpp::R_ARM_JUMP_SLOT:
8458 case elfcpp::R_ARM_RELATIVE:
8459 case elfcpp::R_ARM_PC24:
8460 case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
8461 case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
8462 case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
8463 default:
8464 // Not expected. We will give an error later.
8465 return 0;
8469 // Report an unsupported relocation against a local symbol.
8471 template<bool big_endian>
8472 void
8473 Target_arm<big_endian>::Scan::unsupported_reloc_local(
8474 Sized_relobj_file<32, big_endian>* object,
8475 unsigned int r_type)
8477 gold_error(_("%s: unsupported reloc %u against local symbol"),
8478 object->name().c_str(), r_type);
8481 // We are about to emit a dynamic relocation of type R_TYPE. If the
8482 // dynamic linker does not support it, issue an error. The GNU linker
8483 // only issues a non-PIC error for an allocated read-only section.
8484 // Here we know the section is allocated, but we don't know that it is
8485 // read-only. But we check for all the relocation types which the
8486 // glibc dynamic linker supports, so it seems appropriate to issue an
8487 // error even if the section is not read-only.
8489 template<bool big_endian>
8490 void
8491 Target_arm<big_endian>::Scan::check_non_pic(Relobj* object,
8492 unsigned int r_type)
8494 switch (r_type)
8496 // These are the relocation types supported by glibc for ARM.
8497 case elfcpp::R_ARM_RELATIVE:
8498 case elfcpp::R_ARM_COPY:
8499 case elfcpp::R_ARM_GLOB_DAT:
8500 case elfcpp::R_ARM_JUMP_SLOT:
8501 case elfcpp::R_ARM_ABS32:
8502 case elfcpp::R_ARM_ABS32_NOI:
8503 case elfcpp::R_ARM_IRELATIVE:
8504 case elfcpp::R_ARM_PC24:
8505 // FIXME: The following 3 types are not supported by Android's dynamic
8506 // linker.
8507 case elfcpp::R_ARM_TLS_DTPMOD32:
8508 case elfcpp::R_ARM_TLS_DTPOFF32:
8509 case elfcpp::R_ARM_TLS_TPOFF32:
8510 return;
8512 default:
8514 // This prevents us from issuing more than one error per reloc
8515 // section. But we can still wind up issuing more than one
8516 // error per object file.
8517 if (this->issued_non_pic_error_)
8518 return;
8519 const Arm_reloc_property* reloc_property =
8520 arm_reloc_property_table->get_reloc_property(r_type);
8521 gold_assert(reloc_property != NULL);
8522 object->error(_("requires unsupported dynamic reloc %s; "
8523 "recompile with -fPIC"),
8524 reloc_property->name().c_str());
8525 this->issued_non_pic_error_ = true;
8526 return;
8529 case elfcpp::R_ARM_NONE:
8530 gold_unreachable();
8535 // Return whether we need to make a PLT entry for a relocation of the
8536 // given type against a STT_GNU_IFUNC symbol.
8538 template<bool big_endian>
8539 bool
8540 Target_arm<big_endian>::Scan::reloc_needs_plt_for_ifunc(
8541 Sized_relobj_file<32, big_endian>* object,
8542 unsigned int r_type)
8544 int flags = Scan::get_reference_flags(r_type);
8545 if (flags & Symbol::TLS_REF)
8547 gold_error(_("%s: unsupported TLS reloc %u for IFUNC symbol"),
8548 object->name().c_str(), r_type);
8549 return false;
8551 return flags != 0;
8555 // Scan a relocation for a local symbol.
8556 // FIXME: This only handles a subset of relocation types used by Android
8557 // on ARM v5te devices.
8559 template<bool big_endian>
8560 inline void
8561 Target_arm<big_endian>::Scan::local(Symbol_table* symtab,
8562 Layout* layout,
8563 Target_arm* target,
8564 Sized_relobj_file<32, big_endian>* object,
8565 unsigned int data_shndx,
8566 Output_section* output_section,
8567 const elfcpp::Rel<32, big_endian>& reloc,
8568 unsigned int r_type,
8569 const elfcpp::Sym<32, big_endian>& lsym,
8570 bool is_discarded)
8572 if (is_discarded)
8573 return;
8575 r_type = target->get_real_reloc_type(r_type);
8577 // A local STT_GNU_IFUNC symbol may require a PLT entry.
8578 bool is_ifunc = lsym.get_st_type() == elfcpp::STT_GNU_IFUNC;
8579 if (is_ifunc && this->reloc_needs_plt_for_ifunc(object, r_type))
8581 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8582 target->make_local_ifunc_plt_entry(symtab, layout, object, r_sym);
8585 switch (r_type)
8587 case elfcpp::R_ARM_NONE:
8588 case elfcpp::R_ARM_V4BX:
8589 case elfcpp::R_ARM_GNU_VTENTRY:
8590 case elfcpp::R_ARM_GNU_VTINHERIT:
8591 break;
8593 case elfcpp::R_ARM_ABS32:
8594 case elfcpp::R_ARM_ABS32_NOI:
8595 // If building a shared library (or a position-independent
8596 // executable), we need to create a dynamic relocation for
8597 // this location. The relocation applied at link time will
8598 // apply the link-time value, so we flag the location with
8599 // an R_ARM_RELATIVE relocation so the dynamic loader can
8600 // relocate it easily.
8601 if (parameters->options().output_is_position_independent())
8603 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8604 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8605 // If we are to add more other reloc types than R_ARM_ABS32,
8606 // we need to add check_non_pic(object, r_type) here.
8607 rel_dyn->add_local_relative(object, r_sym, elfcpp::R_ARM_RELATIVE,
8608 output_section, data_shndx,
8609 reloc.get_r_offset(), is_ifunc);
8611 break;
8613 case elfcpp::R_ARM_ABS16:
8614 case elfcpp::R_ARM_ABS12:
8615 case elfcpp::R_ARM_THM_ABS5:
8616 case elfcpp::R_ARM_ABS8:
8617 case elfcpp::R_ARM_BASE_ABS:
8618 case elfcpp::R_ARM_MOVW_ABS_NC:
8619 case elfcpp::R_ARM_MOVT_ABS:
8620 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
8621 case elfcpp::R_ARM_THM_MOVT_ABS:
8622 // If building a shared library (or a position-independent
8623 // executable), we need to create a dynamic relocation for
8624 // this location. Because the addend needs to remain in the
8625 // data section, we need to be careful not to apply this
8626 // relocation statically.
8627 if (parameters->options().output_is_position_independent())
8629 check_non_pic(object, r_type);
8630 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8631 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8632 if (lsym.get_st_type() != elfcpp::STT_SECTION)
8633 rel_dyn->add_local(object, r_sym, r_type, output_section,
8634 data_shndx, reloc.get_r_offset());
8635 else
8637 gold_assert(lsym.get_st_value() == 0);
8638 unsigned int shndx = lsym.get_st_shndx();
8639 bool is_ordinary;
8640 shndx = object->adjust_sym_shndx(r_sym, shndx,
8641 &is_ordinary);
8642 if (!is_ordinary)
8643 object->error(_("section symbol %u has bad shndx %u"),
8644 r_sym, shndx);
8645 else
8646 rel_dyn->add_local_section(object, shndx,
8647 r_type, output_section,
8648 data_shndx, reloc.get_r_offset());
8651 break;
8653 case elfcpp::R_ARM_REL32:
8654 case elfcpp::R_ARM_LDR_PC_G0:
8655 case elfcpp::R_ARM_SBREL32:
8656 case elfcpp::R_ARM_THM_CALL:
8657 case elfcpp::R_ARM_THM_PC8:
8658 case elfcpp::R_ARM_BASE_PREL:
8659 case elfcpp::R_ARM_PLT32:
8660 case elfcpp::R_ARM_CALL:
8661 case elfcpp::R_ARM_JUMP24:
8662 case elfcpp::R_ARM_THM_JUMP24:
8663 case elfcpp::R_ARM_SBREL31:
8664 case elfcpp::R_ARM_PREL31:
8665 case elfcpp::R_ARM_MOVW_PREL_NC:
8666 case elfcpp::R_ARM_MOVT_PREL:
8667 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
8668 case elfcpp::R_ARM_THM_MOVT_PREL:
8669 case elfcpp::R_ARM_THM_JUMP19:
8670 case elfcpp::R_ARM_THM_JUMP6:
8671 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
8672 case elfcpp::R_ARM_THM_PC12:
8673 case elfcpp::R_ARM_REL32_NOI:
8674 case elfcpp::R_ARM_ALU_PC_G0_NC:
8675 case elfcpp::R_ARM_ALU_PC_G0:
8676 case elfcpp::R_ARM_ALU_PC_G1_NC:
8677 case elfcpp::R_ARM_ALU_PC_G1:
8678 case elfcpp::R_ARM_ALU_PC_G2:
8679 case elfcpp::R_ARM_LDR_PC_G1:
8680 case elfcpp::R_ARM_LDR_PC_G2:
8681 case elfcpp::R_ARM_LDRS_PC_G0:
8682 case elfcpp::R_ARM_LDRS_PC_G1:
8683 case elfcpp::R_ARM_LDRS_PC_G2:
8684 case elfcpp::R_ARM_LDC_PC_G0:
8685 case elfcpp::R_ARM_LDC_PC_G1:
8686 case elfcpp::R_ARM_LDC_PC_G2:
8687 case elfcpp::R_ARM_ALU_SB_G0_NC:
8688 case elfcpp::R_ARM_ALU_SB_G0:
8689 case elfcpp::R_ARM_ALU_SB_G1_NC:
8690 case elfcpp::R_ARM_ALU_SB_G1:
8691 case elfcpp::R_ARM_ALU_SB_G2:
8692 case elfcpp::R_ARM_LDR_SB_G0:
8693 case elfcpp::R_ARM_LDR_SB_G1:
8694 case elfcpp::R_ARM_LDR_SB_G2:
8695 case elfcpp::R_ARM_LDRS_SB_G0:
8696 case elfcpp::R_ARM_LDRS_SB_G1:
8697 case elfcpp::R_ARM_LDRS_SB_G2:
8698 case elfcpp::R_ARM_LDC_SB_G0:
8699 case elfcpp::R_ARM_LDC_SB_G1:
8700 case elfcpp::R_ARM_LDC_SB_G2:
8701 case elfcpp::R_ARM_MOVW_BREL_NC:
8702 case elfcpp::R_ARM_MOVT_BREL:
8703 case elfcpp::R_ARM_MOVW_BREL:
8704 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
8705 case elfcpp::R_ARM_THM_MOVT_BREL:
8706 case elfcpp::R_ARM_THM_MOVW_BREL:
8707 case elfcpp::R_ARM_THM_JUMP11:
8708 case elfcpp::R_ARM_THM_JUMP8:
8709 // We don't need to do anything for a relative addressing relocation
8710 // against a local symbol if it does not reference the GOT.
8711 break;
8713 case elfcpp::R_ARM_GOTOFF32:
8714 case elfcpp::R_ARM_GOTOFF12:
8715 // We need a GOT section:
8716 target->got_section(symtab, layout);
8717 break;
8719 case elfcpp::R_ARM_GOT_BREL:
8720 case elfcpp::R_ARM_GOT_PREL:
8722 // The symbol requires a GOT entry.
8723 Arm_output_data_got<big_endian>* got =
8724 target->got_section(symtab, layout);
8725 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8726 if (got->add_local(object, r_sym, GOT_TYPE_STANDARD))
8728 // If we are generating a shared object, we need to add a
8729 // dynamic RELATIVE relocation for this symbol's GOT entry.
8730 if (parameters->options().output_is_position_independent())
8732 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8733 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8734 rel_dyn->add_local_relative(
8735 object, r_sym, elfcpp::R_ARM_RELATIVE, got,
8736 object->local_got_offset(r_sym, GOT_TYPE_STANDARD));
8740 break;
8742 case elfcpp::R_ARM_TARGET1:
8743 case elfcpp::R_ARM_TARGET2:
8744 // This should have been mapped to another type already.
8745 // Fall through.
8746 case elfcpp::R_ARM_COPY:
8747 case elfcpp::R_ARM_GLOB_DAT:
8748 case elfcpp::R_ARM_JUMP_SLOT:
8749 case elfcpp::R_ARM_RELATIVE:
8750 // These are relocations which should only be seen by the
8751 // dynamic linker, and should never be seen here.
8752 gold_error(_("%s: unexpected reloc %u in object file"),
8753 object->name().c_str(), r_type);
8754 break;
8757 // These are initial TLS relocs, which are expected when
8758 // linking.
8759 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
8760 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
8761 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
8762 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
8763 case elfcpp::R_ARM_TLS_LE32: // Local-exec
8765 bool output_is_shared = parameters->options().shared();
8766 const tls::Tls_optimization optimized_type
8767 = Target_arm<big_endian>::optimize_tls_reloc(!output_is_shared,
8768 r_type);
8769 switch (r_type)
8771 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
8772 if (optimized_type == tls::TLSOPT_NONE)
8774 // Create a pair of GOT entries for the module index and
8775 // dtv-relative offset.
8776 Arm_output_data_got<big_endian>* got
8777 = target->got_section(symtab, layout);
8778 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8779 unsigned int shndx = lsym.get_st_shndx();
8780 bool is_ordinary;
8781 shndx = object->adjust_sym_shndx(r_sym, shndx, &is_ordinary);
8782 if (!is_ordinary)
8784 object->error(_("local symbol %u has bad shndx %u"),
8785 r_sym, shndx);
8786 break;
8789 if (!parameters->doing_static_link())
8790 got->add_local_pair_with_rel(object, r_sym, shndx,
8791 GOT_TYPE_TLS_PAIR,
8792 target->rel_dyn_section(layout),
8793 elfcpp::R_ARM_TLS_DTPMOD32);
8794 else
8795 got->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR,
8796 object, r_sym);
8798 else
8799 // FIXME: TLS optimization not supported yet.
8800 gold_unreachable();
8801 break;
8803 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
8804 if (optimized_type == tls::TLSOPT_NONE)
8806 // Create a GOT entry for the module index.
8807 target->got_mod_index_entry(symtab, layout, object);
8809 else
8810 // FIXME: TLS optimization not supported yet.
8811 gold_unreachable();
8812 break;
8814 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
8815 break;
8817 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
8818 layout->set_has_static_tls();
8819 if (optimized_type == tls::TLSOPT_NONE)
8821 // Create a GOT entry for the tp-relative offset.
8822 Arm_output_data_got<big_endian>* got
8823 = target->got_section(symtab, layout);
8824 unsigned int r_sym =
8825 elfcpp::elf_r_sym<32>(reloc.get_r_info());
8826 if (!parameters->doing_static_link())
8827 got->add_local_with_rel(object, r_sym, GOT_TYPE_TLS_OFFSET,
8828 target->rel_dyn_section(layout),
8829 elfcpp::R_ARM_TLS_TPOFF32);
8830 else if (!object->local_has_got_offset(r_sym,
8831 GOT_TYPE_TLS_OFFSET))
8833 got->add_local(object, r_sym, GOT_TYPE_TLS_OFFSET);
8834 unsigned int got_offset =
8835 object->local_got_offset(r_sym, GOT_TYPE_TLS_OFFSET);
8836 got->add_static_reloc(got_offset,
8837 elfcpp::R_ARM_TLS_TPOFF32, object,
8838 r_sym);
8841 else
8842 // FIXME: TLS optimization not supported yet.
8843 gold_unreachable();
8844 break;
8846 case elfcpp::R_ARM_TLS_LE32: // Local-exec
8847 layout->set_has_static_tls();
8848 if (output_is_shared)
8850 // We need to create a dynamic relocation.
8851 gold_assert(lsym.get_st_type() != elfcpp::STT_SECTION);
8852 unsigned int r_sym = elfcpp::elf_r_sym<32>(reloc.get_r_info());
8853 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
8854 rel_dyn->add_local(object, r_sym, elfcpp::R_ARM_TLS_TPOFF32,
8855 output_section, data_shndx,
8856 reloc.get_r_offset());
8858 break;
8860 default:
8861 gold_unreachable();
8864 break;
8866 case elfcpp::R_ARM_PC24:
8867 case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
8868 case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
8869 case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
8870 default:
8871 unsupported_reloc_local(object, r_type);
8872 break;
8876 // Report an unsupported relocation against a global symbol.
8878 template<bool big_endian>
8879 void
8880 Target_arm<big_endian>::Scan::unsupported_reloc_global(
8881 Sized_relobj_file<32, big_endian>* object,
8882 unsigned int r_type,
8883 Symbol* gsym)
8885 gold_error(_("%s: unsupported reloc %u against global symbol %s"),
8886 object->name().c_str(), r_type, gsym->demangled_name().c_str());
8889 template<bool big_endian>
8890 inline bool
8891 Target_arm<big_endian>::Scan::possible_function_pointer_reloc(
8892 unsigned int r_type)
8894 switch (r_type)
8896 case elfcpp::R_ARM_PC24:
8897 case elfcpp::R_ARM_THM_CALL:
8898 case elfcpp::R_ARM_PLT32:
8899 case elfcpp::R_ARM_CALL:
8900 case elfcpp::R_ARM_JUMP24:
8901 case elfcpp::R_ARM_THM_JUMP24:
8902 case elfcpp::R_ARM_SBREL31:
8903 case elfcpp::R_ARM_PREL31:
8904 case elfcpp::R_ARM_THM_JUMP19:
8905 case elfcpp::R_ARM_THM_JUMP6:
8906 case elfcpp::R_ARM_THM_JUMP11:
8907 case elfcpp::R_ARM_THM_JUMP8:
8908 // All the relocations above are branches except SBREL31 and PREL31.
8909 return false;
8911 default:
8912 // Be conservative and assume this is a function pointer.
8913 return true;
8917 template<bool big_endian>
8918 inline bool
8919 Target_arm<big_endian>::Scan::local_reloc_may_be_function_pointer(
8920 Symbol_table*,
8921 Layout*,
8922 Target_arm<big_endian>* target,
8923 Sized_relobj_file<32, big_endian>*,
8924 unsigned int,
8925 Output_section*,
8926 const elfcpp::Rel<32, big_endian>&,
8927 unsigned int r_type,
8928 const elfcpp::Sym<32, big_endian>&)
8930 r_type = target->get_real_reloc_type(r_type);
8931 return possible_function_pointer_reloc(r_type);
8934 template<bool big_endian>
8935 inline bool
8936 Target_arm<big_endian>::Scan::global_reloc_may_be_function_pointer(
8937 Symbol_table*,
8938 Layout*,
8939 Target_arm<big_endian>* target,
8940 Sized_relobj_file<32, big_endian>*,
8941 unsigned int,
8942 Output_section*,
8943 const elfcpp::Rel<32, big_endian>&,
8944 unsigned int r_type,
8945 Symbol* gsym)
8947 // GOT is not a function.
8948 if (strcmp(gsym->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8949 return false;
8951 r_type = target->get_real_reloc_type(r_type);
8952 return possible_function_pointer_reloc(r_type);
8955 // Scan a relocation for a global symbol.
8957 template<bool big_endian>
8958 inline void
8959 Target_arm<big_endian>::Scan::global(Symbol_table* symtab,
8960 Layout* layout,
8961 Target_arm* target,
8962 Sized_relobj_file<32, big_endian>* object,
8963 unsigned int data_shndx,
8964 Output_section* output_section,
8965 const elfcpp::Rel<32, big_endian>& reloc,
8966 unsigned int r_type,
8967 Symbol* gsym)
8969 // A reference to _GLOBAL_OFFSET_TABLE_ implies that we need a got
8970 // section. We check here to avoid creating a dynamic reloc against
8971 // _GLOBAL_OFFSET_TABLE_.
8972 if (!target->has_got_section()
8973 && strcmp(gsym->name(), "_GLOBAL_OFFSET_TABLE_") == 0)
8974 target->got_section(symtab, layout);
8976 // A STT_GNU_IFUNC symbol may require a PLT entry.
8977 if (gsym->type() == elfcpp::STT_GNU_IFUNC
8978 && this->reloc_needs_plt_for_ifunc(object, r_type))
8979 target->make_plt_entry(symtab, layout, gsym);
8981 r_type = target->get_real_reloc_type(r_type);
8982 switch (r_type)
8984 case elfcpp::R_ARM_NONE:
8985 case elfcpp::R_ARM_V4BX:
8986 case elfcpp::R_ARM_GNU_VTENTRY:
8987 case elfcpp::R_ARM_GNU_VTINHERIT:
8988 break;
8990 case elfcpp::R_ARM_ABS32:
8991 case elfcpp::R_ARM_ABS16:
8992 case elfcpp::R_ARM_ABS12:
8993 case elfcpp::R_ARM_THM_ABS5:
8994 case elfcpp::R_ARM_ABS8:
8995 case elfcpp::R_ARM_BASE_ABS:
8996 case elfcpp::R_ARM_MOVW_ABS_NC:
8997 case elfcpp::R_ARM_MOVT_ABS:
8998 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
8999 case elfcpp::R_ARM_THM_MOVT_ABS:
9000 case elfcpp::R_ARM_ABS32_NOI:
9001 // Absolute addressing relocations.
9003 // Make a PLT entry if necessary.
9004 if (this->symbol_needs_plt_entry(gsym))
9006 target->make_plt_entry(symtab, layout, gsym);
9007 // Since this is not a PC-relative relocation, we may be
9008 // taking the address of a function. In that case we need to
9009 // set the entry in the dynamic symbol table to the address of
9010 // the PLT entry.
9011 if (gsym->is_from_dynobj() && !parameters->options().shared())
9012 gsym->set_needs_dynsym_value();
9014 // Make a dynamic relocation if necessary.
9015 if (gsym->needs_dynamic_reloc(Scan::get_reference_flags(r_type)))
9017 if (!parameters->options().output_is_position_independent()
9018 && gsym->may_need_copy_reloc())
9020 target->copy_reloc(symtab, layout, object,
9021 data_shndx, output_section, gsym, reloc);
9023 else if ((r_type == elfcpp::R_ARM_ABS32
9024 || r_type == elfcpp::R_ARM_ABS32_NOI)
9025 && gsym->type() == elfcpp::STT_GNU_IFUNC
9026 && gsym->can_use_relative_reloc(false)
9027 && !gsym->is_from_dynobj()
9028 && !gsym->is_undefined()
9029 && !gsym->is_preemptible())
9031 // Use an IRELATIVE reloc for a locally defined STT_GNU_IFUNC
9032 // symbol. This makes a function address in a PIE executable
9033 // match the address in a shared library that it links against.
9034 Reloc_section* rel_irelative =
9035 target->rel_irelative_section(layout);
9036 unsigned int r_type = elfcpp::R_ARM_IRELATIVE;
9037 rel_irelative->add_symbolless_global_addend(
9038 gsym, r_type, output_section, object,
9039 data_shndx, reloc.get_r_offset());
9041 else if ((r_type == elfcpp::R_ARM_ABS32
9042 || r_type == elfcpp::R_ARM_ABS32_NOI)
9043 && gsym->can_use_relative_reloc(false))
9045 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
9046 rel_dyn->add_global_relative(gsym, elfcpp::R_ARM_RELATIVE,
9047 output_section, object,
9048 data_shndx, reloc.get_r_offset());
9050 else
9052 check_non_pic(object, r_type);
9053 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
9054 rel_dyn->add_global(gsym, r_type, output_section, object,
9055 data_shndx, reloc.get_r_offset());
9059 break;
9061 case elfcpp::R_ARM_GOTOFF32:
9062 case elfcpp::R_ARM_GOTOFF12:
9063 // We need a GOT section.
9064 target->got_section(symtab, layout);
9065 break;
9067 case elfcpp::R_ARM_REL32:
9068 case elfcpp::R_ARM_LDR_PC_G0:
9069 case elfcpp::R_ARM_SBREL32:
9070 case elfcpp::R_ARM_THM_PC8:
9071 case elfcpp::R_ARM_BASE_PREL:
9072 case elfcpp::R_ARM_MOVW_PREL_NC:
9073 case elfcpp::R_ARM_MOVT_PREL:
9074 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
9075 case elfcpp::R_ARM_THM_MOVT_PREL:
9076 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
9077 case elfcpp::R_ARM_THM_PC12:
9078 case elfcpp::R_ARM_REL32_NOI:
9079 case elfcpp::R_ARM_ALU_PC_G0_NC:
9080 case elfcpp::R_ARM_ALU_PC_G0:
9081 case elfcpp::R_ARM_ALU_PC_G1_NC:
9082 case elfcpp::R_ARM_ALU_PC_G1:
9083 case elfcpp::R_ARM_ALU_PC_G2:
9084 case elfcpp::R_ARM_LDR_PC_G1:
9085 case elfcpp::R_ARM_LDR_PC_G2:
9086 case elfcpp::R_ARM_LDRS_PC_G0:
9087 case elfcpp::R_ARM_LDRS_PC_G1:
9088 case elfcpp::R_ARM_LDRS_PC_G2:
9089 case elfcpp::R_ARM_LDC_PC_G0:
9090 case elfcpp::R_ARM_LDC_PC_G1:
9091 case elfcpp::R_ARM_LDC_PC_G2:
9092 case elfcpp::R_ARM_ALU_SB_G0_NC:
9093 case elfcpp::R_ARM_ALU_SB_G0:
9094 case elfcpp::R_ARM_ALU_SB_G1_NC:
9095 case elfcpp::R_ARM_ALU_SB_G1:
9096 case elfcpp::R_ARM_ALU_SB_G2:
9097 case elfcpp::R_ARM_LDR_SB_G0:
9098 case elfcpp::R_ARM_LDR_SB_G1:
9099 case elfcpp::R_ARM_LDR_SB_G2:
9100 case elfcpp::R_ARM_LDRS_SB_G0:
9101 case elfcpp::R_ARM_LDRS_SB_G1:
9102 case elfcpp::R_ARM_LDRS_SB_G2:
9103 case elfcpp::R_ARM_LDC_SB_G0:
9104 case elfcpp::R_ARM_LDC_SB_G1:
9105 case elfcpp::R_ARM_LDC_SB_G2:
9106 case elfcpp::R_ARM_MOVW_BREL_NC:
9107 case elfcpp::R_ARM_MOVT_BREL:
9108 case elfcpp::R_ARM_MOVW_BREL:
9109 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
9110 case elfcpp::R_ARM_THM_MOVT_BREL:
9111 case elfcpp::R_ARM_THM_MOVW_BREL:
9112 // Relative addressing relocations.
9114 // Make a dynamic relocation if necessary.
9115 if (gsym->needs_dynamic_reloc(Scan::get_reference_flags(r_type)))
9117 if (parameters->options().output_is_executable()
9118 && target->may_need_copy_reloc(gsym))
9120 target->copy_reloc(symtab, layout, object,
9121 data_shndx, output_section, gsym, reloc);
9123 else
9125 check_non_pic(object, r_type);
9126 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
9127 rel_dyn->add_global(gsym, r_type, output_section, object,
9128 data_shndx, reloc.get_r_offset());
9132 break;
9134 case elfcpp::R_ARM_THM_CALL:
9135 case elfcpp::R_ARM_PLT32:
9136 case elfcpp::R_ARM_CALL:
9137 case elfcpp::R_ARM_JUMP24:
9138 case elfcpp::R_ARM_THM_JUMP24:
9139 case elfcpp::R_ARM_SBREL31:
9140 case elfcpp::R_ARM_PREL31:
9141 case elfcpp::R_ARM_THM_JUMP19:
9142 case elfcpp::R_ARM_THM_JUMP6:
9143 case elfcpp::R_ARM_THM_JUMP11:
9144 case elfcpp::R_ARM_THM_JUMP8:
9145 // All the relocation above are branches except for the PREL31 ones.
9146 // A PREL31 relocation can point to a personality function in a shared
9147 // library. In that case we want to use a PLT because we want to
9148 // call the personality routine and the dynamic linkers we care about
9149 // do not support dynamic PREL31 relocations. An REL31 relocation may
9150 // point to a function whose unwinding behaviour is being described but
9151 // we will not mistakenly generate a PLT for that because we should use
9152 // a local section symbol.
9154 // If the symbol is fully resolved, this is just a relative
9155 // local reloc. Otherwise we need a PLT entry.
9156 if (gsym->final_value_is_known())
9157 break;
9158 // If building a shared library, we can also skip the PLT entry
9159 // if the symbol is defined in the output file and is protected
9160 // or hidden.
9161 if (gsym->is_defined()
9162 && !gsym->is_from_dynobj()
9163 && !gsym->is_preemptible())
9164 break;
9165 target->make_plt_entry(symtab, layout, gsym);
9166 break;
9168 case elfcpp::R_ARM_GOT_BREL:
9169 case elfcpp::R_ARM_GOT_ABS:
9170 case elfcpp::R_ARM_GOT_PREL:
9172 // The symbol requires a GOT entry.
9173 Arm_output_data_got<big_endian>* got =
9174 target->got_section(symtab, layout);
9175 if (gsym->final_value_is_known())
9177 // For a STT_GNU_IFUNC symbol we want the PLT address.
9178 if (gsym->type() == elfcpp::STT_GNU_IFUNC)
9179 got->add_global_plt(gsym, GOT_TYPE_STANDARD);
9180 else
9181 got->add_global(gsym, GOT_TYPE_STANDARD);
9183 else
9185 // If this symbol is not fully resolved, we need to add a
9186 // GOT entry with a dynamic relocation.
9187 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
9188 if (gsym->is_from_dynobj()
9189 || gsym->is_undefined()
9190 || gsym->is_preemptible()
9191 || (gsym->visibility() == elfcpp::STV_PROTECTED
9192 && parameters->options().shared())
9193 || (gsym->type() == elfcpp::STT_GNU_IFUNC
9194 && parameters->options().output_is_position_independent()))
9195 got->add_global_with_rel(gsym, GOT_TYPE_STANDARD,
9196 rel_dyn, elfcpp::R_ARM_GLOB_DAT);
9197 else
9199 // For a STT_GNU_IFUNC symbol we want to write the PLT
9200 // offset into the GOT, so that function pointer
9201 // comparisons work correctly.
9202 bool is_new;
9203 if (gsym->type() != elfcpp::STT_GNU_IFUNC)
9204 is_new = got->add_global(gsym, GOT_TYPE_STANDARD);
9205 else
9207 is_new = got->add_global_plt(gsym, GOT_TYPE_STANDARD);
9208 // Tell the dynamic linker to use the PLT address
9209 // when resolving relocations.
9210 if (gsym->is_from_dynobj()
9211 && !parameters->options().shared())
9212 gsym->set_needs_dynsym_value();
9214 if (is_new)
9215 rel_dyn->add_global_relative(
9216 gsym, elfcpp::R_ARM_RELATIVE, got,
9217 gsym->got_offset(GOT_TYPE_STANDARD));
9221 break;
9223 case elfcpp::R_ARM_TARGET1:
9224 case elfcpp::R_ARM_TARGET2:
9225 // These should have been mapped to other types already.
9226 // Fall through.
9227 case elfcpp::R_ARM_COPY:
9228 case elfcpp::R_ARM_GLOB_DAT:
9229 case elfcpp::R_ARM_JUMP_SLOT:
9230 case elfcpp::R_ARM_RELATIVE:
9231 // These are relocations which should only be seen by the
9232 // dynamic linker, and should never be seen here.
9233 gold_error(_("%s: unexpected reloc %u in object file"),
9234 object->name().c_str(), r_type);
9235 break;
9237 // These are initial tls relocs, which are expected when
9238 // linking.
9239 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
9240 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
9241 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
9242 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
9243 case elfcpp::R_ARM_TLS_LE32: // Local-exec
9245 const bool is_final = gsym->final_value_is_known();
9246 const tls::Tls_optimization optimized_type
9247 = Target_arm<big_endian>::optimize_tls_reloc(is_final, r_type);
9248 switch (r_type)
9250 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
9251 if (optimized_type == tls::TLSOPT_NONE)
9253 // Create a pair of GOT entries for the module index and
9254 // dtv-relative offset.
9255 Arm_output_data_got<big_endian>* got
9256 = target->got_section(symtab, layout);
9257 if (!parameters->doing_static_link())
9258 got->add_global_pair_with_rel(gsym, GOT_TYPE_TLS_PAIR,
9259 target->rel_dyn_section(layout),
9260 elfcpp::R_ARM_TLS_DTPMOD32,
9261 elfcpp::R_ARM_TLS_DTPOFF32);
9262 else
9263 got->add_tls_gd32_with_static_reloc(GOT_TYPE_TLS_PAIR, gsym);
9265 else
9266 // FIXME: TLS optimization not supported yet.
9267 gold_unreachable();
9268 break;
9270 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
9271 if (optimized_type == tls::TLSOPT_NONE)
9273 // Create a GOT entry for the module index.
9274 target->got_mod_index_entry(symtab, layout, object);
9276 else
9277 // FIXME: TLS optimization not supported yet.
9278 gold_unreachable();
9279 break;
9281 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
9282 break;
9284 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
9285 layout->set_has_static_tls();
9286 if (optimized_type == tls::TLSOPT_NONE)
9288 // Create a GOT entry for the tp-relative offset.
9289 Arm_output_data_got<big_endian>* got
9290 = target->got_section(symtab, layout);
9291 if (!parameters->doing_static_link())
9292 got->add_global_with_rel(gsym, GOT_TYPE_TLS_OFFSET,
9293 target->rel_dyn_section(layout),
9294 elfcpp::R_ARM_TLS_TPOFF32);
9295 else if (!gsym->has_got_offset(GOT_TYPE_TLS_OFFSET))
9297 got->add_global(gsym, GOT_TYPE_TLS_OFFSET);
9298 unsigned int got_offset =
9299 gsym->got_offset(GOT_TYPE_TLS_OFFSET);
9300 got->add_static_reloc(got_offset,
9301 elfcpp::R_ARM_TLS_TPOFF32, gsym);
9304 else
9305 // FIXME: TLS optimization not supported yet.
9306 gold_unreachable();
9307 break;
9309 case elfcpp::R_ARM_TLS_LE32: // Local-exec
9310 layout->set_has_static_tls();
9311 if (parameters->options().shared())
9313 // We need to create a dynamic relocation.
9314 Reloc_section* rel_dyn = target->rel_dyn_section(layout);
9315 rel_dyn->add_global(gsym, elfcpp::R_ARM_TLS_TPOFF32,
9316 output_section, object,
9317 data_shndx, reloc.get_r_offset());
9319 break;
9321 default:
9322 gold_unreachable();
9325 break;
9327 case elfcpp::R_ARM_PC24:
9328 case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
9329 case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
9330 case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
9331 default:
9332 unsupported_reloc_global(object, r_type, gsym);
9333 break;
9337 // Process relocations for gc.
9339 template<bool big_endian>
9340 void
9341 Target_arm<big_endian>::gc_process_relocs(
9342 Symbol_table* symtab,
9343 Layout* layout,
9344 Sized_relobj_file<32, big_endian>* object,
9345 unsigned int data_shndx,
9346 unsigned int,
9347 const unsigned char* prelocs,
9348 size_t reloc_count,
9349 Output_section* output_section,
9350 bool needs_special_offset_handling,
9351 size_t local_symbol_count,
9352 const unsigned char* plocal_symbols)
9354 typedef Target_arm<big_endian> Arm;
9355 typedef typename Target_arm<big_endian>::Scan Scan;
9357 gold::gc_process_relocs<32, big_endian, Arm, Scan, Classify_reloc>(
9358 symtab,
9359 layout,
9360 this,
9361 object,
9362 data_shndx,
9363 prelocs,
9364 reloc_count,
9365 output_section,
9366 needs_special_offset_handling,
9367 local_symbol_count,
9368 plocal_symbols);
9371 // Scan relocations for a section.
9373 template<bool big_endian>
9374 void
9375 Target_arm<big_endian>::scan_relocs(Symbol_table* symtab,
9376 Layout* layout,
9377 Sized_relobj_file<32, big_endian>* object,
9378 unsigned int data_shndx,
9379 unsigned int sh_type,
9380 const unsigned char* prelocs,
9381 size_t reloc_count,
9382 Output_section* output_section,
9383 bool needs_special_offset_handling,
9384 size_t local_symbol_count,
9385 const unsigned char* plocal_symbols)
9387 if (sh_type == elfcpp::SHT_RELA)
9389 gold_error(_("%s: unsupported RELA reloc section"),
9390 object->name().c_str());
9391 return;
9394 gold::scan_relocs<32, big_endian, Target_arm, Scan, Classify_reloc>(
9395 symtab,
9396 layout,
9397 this,
9398 object,
9399 data_shndx,
9400 prelocs,
9401 reloc_count,
9402 output_section,
9403 needs_special_offset_handling,
9404 local_symbol_count,
9405 plocal_symbols);
9408 // Finalize the sections.
9410 template<bool big_endian>
9411 void
9412 Target_arm<big_endian>::do_finalize_sections(
9413 Layout* layout,
9414 const Input_objects* input_objects,
9415 Symbol_table*)
9417 bool merged_any_attributes = false;
9418 // Merge processor-specific flags.
9419 for (Input_objects::Relobj_iterator p = input_objects->relobj_begin();
9420 p != input_objects->relobj_end();
9421 ++p)
9423 Arm_relobj<big_endian>* arm_relobj =
9424 Arm_relobj<big_endian>::as_arm_relobj(*p);
9425 if (arm_relobj->merge_flags_and_attributes())
9427 this->merge_processor_specific_flags(
9428 arm_relobj->name(),
9429 arm_relobj->processor_specific_flags());
9430 this->merge_object_attributes(arm_relobj->name().c_str(),
9431 arm_relobj->attributes_section_data());
9432 merged_any_attributes = true;
9436 for (Input_objects::Dynobj_iterator p = input_objects->dynobj_begin();
9437 p != input_objects->dynobj_end();
9438 ++p)
9440 Arm_dynobj<big_endian>* arm_dynobj =
9441 Arm_dynobj<big_endian>::as_arm_dynobj(*p);
9442 this->merge_processor_specific_flags(
9443 arm_dynobj->name(),
9444 arm_dynobj->processor_specific_flags());
9445 this->merge_object_attributes(arm_dynobj->name().c_str(),
9446 arm_dynobj->attributes_section_data());
9447 merged_any_attributes = true;
9450 // Create an empty uninitialized attribute section if we still don't have it
9451 // at this moment. This happens if there is no attributes sections in all
9452 // inputs.
9453 if (this->attributes_section_data_ == NULL)
9454 this->attributes_section_data_ = new Attributes_section_data(NULL, 0);
9456 const Object_attribute* cpu_arch_attr =
9457 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch);
9458 // Check if we need to use Cortex-A8 workaround.
9459 if (parameters->options().user_set_fix_cortex_a8())
9460 this->fix_cortex_a8_ = parameters->options().fix_cortex_a8();
9461 else
9463 // If neither --fix-cortex-a8 nor --no-fix-cortex-a8 is used, turn on
9464 // Cortex-A8 erratum workaround for ARMv7-A or ARMv7 with unknown
9465 // profile.
9466 const Object_attribute* cpu_arch_profile_attr =
9467 this->get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile);
9468 this->fix_cortex_a8_ =
9469 (cpu_arch_attr->int_value() == elfcpp::TAG_CPU_ARCH_V7
9470 && (cpu_arch_profile_attr->int_value() == 'A'
9471 || cpu_arch_profile_attr->int_value() == 0));
9474 // Check if we can use V4BX interworking.
9475 // The V4BX interworking stub contains BX instruction,
9476 // which is not specified for some profiles.
9477 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING
9478 && !this->may_use_v4t_interworking())
9479 gold_error(_("unable to provide V4BX reloc interworking fix up; "
9480 "the target profile does not support BX instruction"));
9482 // Fill in some more dynamic tags.
9483 const Reloc_section* rel_plt = (this->plt_ == NULL
9484 ? NULL
9485 : this->plt_->rel_plt());
9486 layout->add_target_dynamic_tags(true, this->got_plt_, rel_plt,
9487 this->rel_dyn_, true, false);
9489 // Emit any relocs we saved in an attempt to avoid generating COPY
9490 // relocs.
9491 if (this->copy_relocs_.any_saved_relocs())
9492 this->copy_relocs_.emit(this->rel_dyn_section(layout));
9494 // Handle the .ARM.exidx section.
9495 Output_section* exidx_section = layout->find_output_section(".ARM.exidx");
9497 if (!parameters->options().relocatable())
9499 if (exidx_section != NULL
9500 && exidx_section->type() == elfcpp::SHT_ARM_EXIDX)
9502 // For the ARM target, we need to add a PT_ARM_EXIDX segment for
9503 // the .ARM.exidx section.
9504 if (!layout->script_options()->saw_phdrs_clause())
9506 gold_assert(layout->find_output_segment(elfcpp::PT_ARM_EXIDX, 0,
9508 == NULL);
9509 Output_segment* exidx_segment =
9510 layout->make_output_segment(elfcpp::PT_ARM_EXIDX, elfcpp::PF_R);
9511 exidx_segment->add_output_section_to_nonload(exidx_section,
9512 elfcpp::PF_R);
9517 // Create an .ARM.attributes section if we have merged any attributes
9518 // from inputs.
9519 if (merged_any_attributes)
9521 Output_attributes_section_data* attributes_section =
9522 new Output_attributes_section_data(*this->attributes_section_data_);
9523 layout->add_output_section_data(".ARM.attributes",
9524 elfcpp::SHT_ARM_ATTRIBUTES, 0,
9525 attributes_section, ORDER_INVALID,
9526 false);
9529 // Fix up links in section EXIDX headers.
9530 for (Layout::Section_list::const_iterator p = layout->section_list().begin();
9531 p != layout->section_list().end();
9532 ++p)
9533 if ((*p)->type() == elfcpp::SHT_ARM_EXIDX)
9535 Arm_output_section<big_endian>* os =
9536 Arm_output_section<big_endian>::as_arm_output_section(*p);
9537 os->set_exidx_section_link();
9541 // Return whether a direct absolute static relocation needs to be applied.
9542 // In cases where Scan::local() or Scan::global() has created
9543 // a dynamic relocation other than R_ARM_RELATIVE, the addend
9544 // of the relocation is carried in the data, and we must not
9545 // apply the static relocation.
9547 template<bool big_endian>
9548 inline bool
9549 Target_arm<big_endian>::Relocate::should_apply_static_reloc(
9550 const Sized_symbol<32>* gsym,
9551 unsigned int r_type,
9552 bool is_32bit,
9553 Output_section* output_section)
9555 // If the output section is not allocated, then we didn't call
9556 // scan_relocs, we didn't create a dynamic reloc, and we must apply
9557 // the reloc here.
9558 if ((output_section->flags() & elfcpp::SHF_ALLOC) == 0)
9559 return true;
9561 int ref_flags = Scan::get_reference_flags(r_type);
9563 // For local symbols, we will have created a non-RELATIVE dynamic
9564 // relocation only if (a) the output is position independent,
9565 // (b) the relocation is absolute (not pc- or segment-relative), and
9566 // (c) the relocation is not 32 bits wide.
9567 if (gsym == NULL)
9568 return !(parameters->options().output_is_position_independent()
9569 && (ref_flags & Symbol::ABSOLUTE_REF)
9570 && !is_32bit);
9572 // For global symbols, we use the same helper routines used in the
9573 // scan pass. If we did not create a dynamic relocation, or if we
9574 // created a RELATIVE dynamic relocation, we should apply the static
9575 // relocation.
9576 bool has_dyn = gsym->needs_dynamic_reloc(ref_flags);
9577 bool is_rel = (ref_flags & Symbol::ABSOLUTE_REF)
9578 && gsym->can_use_relative_reloc(ref_flags
9579 & Symbol::FUNCTION_CALL);
9580 return !has_dyn || is_rel;
9583 // Perform a relocation.
9585 template<bool big_endian>
9586 inline bool
9587 Target_arm<big_endian>::Relocate::relocate(
9588 const Relocate_info<32, big_endian>* relinfo,
9589 unsigned int,
9590 Target_arm* target,
9591 Output_section* output_section,
9592 size_t relnum,
9593 const unsigned char* preloc,
9594 const Sized_symbol<32>* gsym,
9595 const Symbol_value<32>* psymval,
9596 unsigned char* view,
9597 Arm_address address,
9598 section_size_type view_size)
9600 if (view == NULL)
9601 return true;
9603 typedef Arm_relocate_functions<big_endian> Arm_relocate_functions;
9605 const elfcpp::Rel<32, big_endian> rel(preloc);
9606 unsigned int r_type = elfcpp::elf_r_type<32>(rel.get_r_info());
9607 r_type = target->get_real_reloc_type(r_type);
9608 const Arm_reloc_property* reloc_property =
9609 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
9610 if (reloc_property == NULL)
9612 std::string reloc_name =
9613 arm_reloc_property_table->reloc_name_in_error_message(r_type);
9614 gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
9615 _("cannot relocate %s in object file"),
9616 reloc_name.c_str());
9617 return true;
9620 const Arm_relobj<big_endian>* object =
9621 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
9623 // If the final branch target of a relocation is THUMB instruction, this
9624 // is 1. Otherwise it is 0.
9625 Arm_address thumb_bit = 0;
9626 Symbol_value<32> symval;
9627 bool is_weakly_undefined_without_plt = false;
9628 bool have_got_offset = false;
9629 unsigned int got_offset = 0;
9631 // If the relocation uses the GOT entry of a symbol instead of the symbol
9632 // itself, we don't care about whether the symbol is defined or what kind
9633 // of symbol it is.
9634 if (reloc_property->uses_got_entry())
9636 // Get the GOT offset.
9637 // The GOT pointer points to the end of the GOT section.
9638 // We need to subtract the size of the GOT section to get
9639 // the actual offset to use in the relocation.
9640 // TODO: We should move GOT offset computing code in TLS relocations
9641 // to here.
9642 switch (r_type)
9644 case elfcpp::R_ARM_GOT_BREL:
9645 case elfcpp::R_ARM_GOT_PREL:
9646 if (gsym != NULL)
9648 gold_assert(gsym->has_got_offset(GOT_TYPE_STANDARD));
9649 got_offset = (gsym->got_offset(GOT_TYPE_STANDARD)
9650 - target->got_size());
9652 else
9654 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
9655 gold_assert(object->local_has_got_offset(r_sym,
9656 GOT_TYPE_STANDARD));
9657 got_offset = (object->local_got_offset(r_sym, GOT_TYPE_STANDARD)
9658 - target->got_size());
9660 have_got_offset = true;
9661 break;
9663 default:
9664 break;
9667 else if (relnum != Target_arm<big_endian>::fake_relnum_for_stubs)
9669 if (gsym != NULL)
9671 // This is a global symbol. Determine if we use PLT and if the
9672 // final target is THUMB.
9673 if (gsym->use_plt_offset(Scan::get_reference_flags(r_type)))
9675 // This uses a PLT, change the symbol value.
9676 symval.set_output_value(target->plt_address_for_global(gsym));
9677 psymval = &symval;
9679 else if (gsym->is_weak_undefined())
9681 // This is a weakly undefined symbol and we do not use PLT
9682 // for this relocation. A branch targeting this symbol will
9683 // be converted into an NOP.
9684 is_weakly_undefined_without_plt = true;
9686 else if (gsym->is_undefined() && reloc_property->uses_symbol())
9688 // This relocation uses the symbol value but the symbol is
9689 // undefined. Exit early and have the caller reporting an
9690 // error.
9691 return true;
9693 else
9695 // Set thumb bit if symbol:
9696 // -Has type STT_ARM_TFUNC or
9697 // -Has type STT_FUNC, is defined and with LSB in value set.
9698 thumb_bit =
9699 (((gsym->type() == elfcpp::STT_ARM_TFUNC)
9700 || (gsym->type() == elfcpp::STT_FUNC
9701 && !gsym->is_undefined()
9702 && ((psymval->value(object, 0) & 1) != 0)))
9704 : 0);
9707 else
9709 // This is a local symbol. Determine if the final target is THUMB.
9710 // We saved this information when all the local symbols were read.
9711 elfcpp::Elf_types<32>::Elf_WXword r_info = rel.get_r_info();
9712 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
9713 thumb_bit = object->local_symbol_is_thumb_function(r_sym) ? 1 : 0;
9715 if (psymval->is_ifunc_symbol() && object->local_has_plt_offset(r_sym))
9717 symval.set_output_value(
9718 target->plt_address_for_local(object, r_sym));
9719 psymval = &symval;
9723 else
9725 // This is a fake relocation synthesized for a stub. It does not have
9726 // a real symbol. We just look at the LSB of the symbol value to
9727 // determine if the target is THUMB or not.
9728 thumb_bit = ((psymval->value(object, 0) & 1) != 0);
9731 // Strip LSB if this points to a THUMB target.
9732 if (thumb_bit != 0
9733 && reloc_property->uses_thumb_bit()
9734 && ((psymval->value(object, 0) & 1) != 0))
9736 Arm_address stripped_value =
9737 psymval->value(object, 0) & ~static_cast<Arm_address>(1);
9738 symval.set_output_value(stripped_value);
9739 psymval = &symval;
9742 // To look up relocation stubs, we need to pass the symbol table index of
9743 // a local symbol.
9744 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
9746 // Get the addressing origin of the output segment defining the
9747 // symbol gsym if needed (AAELF 4.6.1.2 Relocation types).
9748 Arm_address sym_origin = 0;
9749 if (reloc_property->uses_symbol_base())
9751 if (r_type == elfcpp::R_ARM_BASE_ABS && gsym == NULL)
9752 // R_ARM_BASE_ABS with the NULL symbol will give the
9753 // absolute address of the GOT origin (GOT_ORG) (see ARM IHI
9754 // 0044C (AAELF): 4.6.1.8 Proxy generating relocations).
9755 sym_origin = target->got_plt_section()->address();
9756 else if (gsym == NULL)
9757 sym_origin = 0;
9758 else if (gsym->source() == Symbol::IN_OUTPUT_SEGMENT)
9759 sym_origin = gsym->output_segment()->vaddr();
9760 else if (gsym->source() == Symbol::IN_OUTPUT_DATA)
9761 sym_origin = gsym->output_data()->address();
9763 // TODO: Assumes the segment base to be zero for the global symbols
9764 // till the proper support for the segment-base-relative addressing
9765 // will be implemented. This is consistent with GNU ld.
9768 // For relative addressing relocation, find out the relative address base.
9769 Arm_address relative_address_base = 0;
9770 switch(reloc_property->relative_address_base())
9772 case Arm_reloc_property::RAB_NONE:
9773 // Relocations with relative address bases RAB_TLS and RAB_tp are
9774 // handled by relocate_tls. So we do not need to do anything here.
9775 case Arm_reloc_property::RAB_TLS:
9776 case Arm_reloc_property::RAB_tp:
9777 break;
9778 case Arm_reloc_property::RAB_B_S:
9779 relative_address_base = sym_origin;
9780 break;
9781 case Arm_reloc_property::RAB_GOT_ORG:
9782 relative_address_base = target->got_plt_section()->address();
9783 break;
9784 case Arm_reloc_property::RAB_P:
9785 relative_address_base = address;
9786 break;
9787 case Arm_reloc_property::RAB_Pa:
9788 relative_address_base = address & 0xfffffffcU;
9789 break;
9790 default:
9791 gold_unreachable();
9794 typename Arm_relocate_functions::Status reloc_status =
9795 Arm_relocate_functions::STATUS_OKAY;
9796 bool check_overflow = reloc_property->checks_overflow();
9797 switch (r_type)
9799 case elfcpp::R_ARM_NONE:
9800 break;
9802 case elfcpp::R_ARM_ABS8:
9803 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9804 reloc_status = Arm_relocate_functions::abs8(view, object, psymval);
9805 break;
9807 case elfcpp::R_ARM_ABS12:
9808 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9809 reloc_status = Arm_relocate_functions::abs12(view, object, psymval);
9810 break;
9812 case elfcpp::R_ARM_ABS16:
9813 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9814 reloc_status = Arm_relocate_functions::abs16(view, object, psymval);
9815 break;
9817 case elfcpp::R_ARM_ABS32:
9818 if (should_apply_static_reloc(gsym, r_type, true, output_section))
9819 reloc_status = Arm_relocate_functions::abs32(view, object, psymval,
9820 thumb_bit);
9821 break;
9823 case elfcpp::R_ARM_ABS32_NOI:
9824 if (should_apply_static_reloc(gsym, r_type, true, output_section))
9825 // No thumb bit for this relocation: (S + A)
9826 reloc_status = Arm_relocate_functions::abs32(view, object, psymval,
9828 break;
9830 case elfcpp::R_ARM_MOVW_ABS_NC:
9831 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9832 reloc_status = Arm_relocate_functions::movw(view, object, psymval,
9833 0, thumb_bit,
9834 check_overflow);
9835 break;
9837 case elfcpp::R_ARM_MOVT_ABS:
9838 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9839 reloc_status = Arm_relocate_functions::movt(view, object, psymval, 0);
9840 break;
9842 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
9843 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9844 reloc_status = Arm_relocate_functions::thm_movw(view, object, psymval,
9845 0, thumb_bit, false);
9846 break;
9848 case elfcpp::R_ARM_THM_MOVT_ABS:
9849 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9850 reloc_status = Arm_relocate_functions::thm_movt(view, object,
9851 psymval, 0);
9852 break;
9854 case elfcpp::R_ARM_MOVW_PREL_NC:
9855 case elfcpp::R_ARM_MOVW_BREL_NC:
9856 case elfcpp::R_ARM_MOVW_BREL:
9857 reloc_status =
9858 Arm_relocate_functions::movw(view, object, psymval,
9859 relative_address_base, thumb_bit,
9860 check_overflow);
9861 break;
9863 case elfcpp::R_ARM_MOVT_PREL:
9864 case elfcpp::R_ARM_MOVT_BREL:
9865 reloc_status =
9866 Arm_relocate_functions::movt(view, object, psymval,
9867 relative_address_base);
9868 break;
9870 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
9871 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
9872 case elfcpp::R_ARM_THM_MOVW_BREL:
9873 reloc_status =
9874 Arm_relocate_functions::thm_movw(view, object, psymval,
9875 relative_address_base,
9876 thumb_bit, check_overflow);
9877 break;
9879 case elfcpp::R_ARM_THM_MOVT_PREL:
9880 case elfcpp::R_ARM_THM_MOVT_BREL:
9881 reloc_status =
9882 Arm_relocate_functions::thm_movt(view, object, psymval,
9883 relative_address_base);
9884 break;
9886 case elfcpp::R_ARM_REL32:
9887 reloc_status = Arm_relocate_functions::rel32(view, object, psymval,
9888 address, thumb_bit);
9889 break;
9891 case elfcpp::R_ARM_THM_ABS5:
9892 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9893 reloc_status = Arm_relocate_functions::thm_abs5(view, object, psymval);
9894 break;
9896 // Thumb long branches.
9897 case elfcpp::R_ARM_THM_CALL:
9898 case elfcpp::R_ARM_THM_XPC22:
9899 case elfcpp::R_ARM_THM_JUMP24:
9900 reloc_status =
9901 Arm_relocate_functions::thumb_branch_common(
9902 r_type, relinfo, view, gsym, object, r_sym, psymval, address,
9903 thumb_bit, is_weakly_undefined_without_plt);
9904 break;
9906 case elfcpp::R_ARM_GOTOFF32:
9908 Arm_address got_origin;
9909 got_origin = target->got_plt_section()->address();
9910 reloc_status = Arm_relocate_functions::rel32(view, object, psymval,
9911 got_origin, thumb_bit);
9913 break;
9915 case elfcpp::R_ARM_BASE_PREL:
9916 gold_assert(gsym != NULL);
9917 reloc_status =
9918 Arm_relocate_functions::base_prel(view, sym_origin, address);
9919 break;
9921 case elfcpp::R_ARM_BASE_ABS:
9922 if (should_apply_static_reloc(gsym, r_type, false, output_section))
9923 reloc_status = Arm_relocate_functions::base_abs(view, sym_origin);
9924 break;
9926 case elfcpp::R_ARM_GOT_BREL:
9927 gold_assert(have_got_offset);
9928 reloc_status = Arm_relocate_functions::got_brel(view, got_offset);
9929 break;
9931 case elfcpp::R_ARM_GOT_PREL:
9932 gold_assert(have_got_offset);
9933 // Get the address origin for GOT PLT, which is allocated right
9934 // after the GOT section, to calculate an absolute address of
9935 // the symbol GOT entry (got_origin + got_offset).
9936 Arm_address got_origin;
9937 got_origin = target->got_plt_section()->address();
9938 reloc_status = Arm_relocate_functions::got_prel(view,
9939 got_origin + got_offset,
9940 address);
9941 break;
9943 case elfcpp::R_ARM_PLT32:
9944 case elfcpp::R_ARM_CALL:
9945 case elfcpp::R_ARM_JUMP24:
9946 case elfcpp::R_ARM_XPC25:
9947 gold_assert(gsym == NULL
9948 || gsym->has_plt_offset()
9949 || gsym->final_value_is_known()
9950 || (gsym->is_defined()
9951 && !gsym->is_from_dynobj()
9952 && !gsym->is_preemptible()));
9953 reloc_status =
9954 Arm_relocate_functions::arm_branch_common(
9955 r_type, relinfo, view, gsym, object, r_sym, psymval, address,
9956 thumb_bit, is_weakly_undefined_without_plt);
9957 break;
9959 case elfcpp::R_ARM_THM_JUMP19:
9960 reloc_status =
9961 Arm_relocate_functions::thm_jump19(view, object, psymval, address,
9962 thumb_bit);
9963 break;
9965 case elfcpp::R_ARM_THM_JUMP6:
9966 reloc_status =
9967 Arm_relocate_functions::thm_jump6(view, object, psymval, address);
9968 break;
9970 case elfcpp::R_ARM_THM_JUMP8:
9971 reloc_status =
9972 Arm_relocate_functions::thm_jump8(view, object, psymval, address);
9973 break;
9975 case elfcpp::R_ARM_THM_JUMP11:
9976 reloc_status =
9977 Arm_relocate_functions::thm_jump11(view, object, psymval, address);
9978 break;
9980 case elfcpp::R_ARM_PREL31:
9981 reloc_status = Arm_relocate_functions::prel31(view, object, psymval,
9982 address, thumb_bit);
9983 break;
9985 case elfcpp::R_ARM_V4BX:
9986 if (target->fix_v4bx() > General_options::FIX_V4BX_NONE)
9988 const bool is_v4bx_interworking =
9989 (target->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING);
9990 reloc_status =
9991 Arm_relocate_functions::v4bx(relinfo, view, object, address,
9992 is_v4bx_interworking);
9994 break;
9996 case elfcpp::R_ARM_THM_PC8:
9997 reloc_status =
9998 Arm_relocate_functions::thm_pc8(view, object, psymval, address);
9999 break;
10001 case elfcpp::R_ARM_THM_PC12:
10002 reloc_status =
10003 Arm_relocate_functions::thm_pc12(view, object, psymval, address);
10004 break;
10006 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
10007 reloc_status =
10008 Arm_relocate_functions::thm_alu11(view, object, psymval, address,
10009 thumb_bit);
10010 break;
10012 case elfcpp::R_ARM_ALU_PC_G0_NC:
10013 case elfcpp::R_ARM_ALU_PC_G0:
10014 case elfcpp::R_ARM_ALU_PC_G1_NC:
10015 case elfcpp::R_ARM_ALU_PC_G1:
10016 case elfcpp::R_ARM_ALU_PC_G2:
10017 case elfcpp::R_ARM_ALU_SB_G0_NC:
10018 case elfcpp::R_ARM_ALU_SB_G0:
10019 case elfcpp::R_ARM_ALU_SB_G1_NC:
10020 case elfcpp::R_ARM_ALU_SB_G1:
10021 case elfcpp::R_ARM_ALU_SB_G2:
10022 reloc_status =
10023 Arm_relocate_functions::arm_grp_alu(view, object, psymval,
10024 reloc_property->group_index(),
10025 relative_address_base,
10026 thumb_bit, check_overflow);
10027 break;
10029 case elfcpp::R_ARM_LDR_PC_G0:
10030 case elfcpp::R_ARM_LDR_PC_G1:
10031 case elfcpp::R_ARM_LDR_PC_G2:
10032 case elfcpp::R_ARM_LDR_SB_G0:
10033 case elfcpp::R_ARM_LDR_SB_G1:
10034 case elfcpp::R_ARM_LDR_SB_G2:
10035 reloc_status =
10036 Arm_relocate_functions::arm_grp_ldr(view, object, psymval,
10037 reloc_property->group_index(),
10038 relative_address_base);
10039 break;
10041 case elfcpp::R_ARM_LDRS_PC_G0:
10042 case elfcpp::R_ARM_LDRS_PC_G1:
10043 case elfcpp::R_ARM_LDRS_PC_G2:
10044 case elfcpp::R_ARM_LDRS_SB_G0:
10045 case elfcpp::R_ARM_LDRS_SB_G1:
10046 case elfcpp::R_ARM_LDRS_SB_G2:
10047 reloc_status =
10048 Arm_relocate_functions::arm_grp_ldrs(view, object, psymval,
10049 reloc_property->group_index(),
10050 relative_address_base);
10051 break;
10053 case elfcpp::R_ARM_LDC_PC_G0:
10054 case elfcpp::R_ARM_LDC_PC_G1:
10055 case elfcpp::R_ARM_LDC_PC_G2:
10056 case elfcpp::R_ARM_LDC_SB_G0:
10057 case elfcpp::R_ARM_LDC_SB_G1:
10058 case elfcpp::R_ARM_LDC_SB_G2:
10059 reloc_status =
10060 Arm_relocate_functions::arm_grp_ldc(view, object, psymval,
10061 reloc_property->group_index(),
10062 relative_address_base);
10063 break;
10065 // These are initial tls relocs, which are expected when
10066 // linking.
10067 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
10068 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
10069 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
10070 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
10071 case elfcpp::R_ARM_TLS_LE32: // Local-exec
10072 reloc_status =
10073 this->relocate_tls(relinfo, target, relnum, rel, r_type, gsym, psymval,
10074 view, address, view_size);
10075 break;
10077 // The known and unknown unsupported and/or deprecated relocations.
10078 case elfcpp::R_ARM_PC24:
10079 case elfcpp::R_ARM_LDR_SBREL_11_0_NC:
10080 case elfcpp::R_ARM_ALU_SBREL_19_12_NC:
10081 case elfcpp::R_ARM_ALU_SBREL_27_20_CK:
10082 default:
10083 // Just silently leave the method. We should get an appropriate error
10084 // message in the scan methods.
10085 break;
10088 // Report any errors.
10089 switch (reloc_status)
10091 case Arm_relocate_functions::STATUS_OKAY:
10092 break;
10093 case Arm_relocate_functions::STATUS_OVERFLOW:
10094 gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
10095 _("relocation overflow in %s"),
10096 reloc_property->name().c_str());
10097 break;
10098 case Arm_relocate_functions::STATUS_BAD_RELOC:
10099 gold_error_at_location(
10100 relinfo,
10101 relnum,
10102 rel.get_r_offset(),
10103 _("unexpected opcode while processing relocation %s"),
10104 reloc_property->name().c_str());
10105 break;
10106 default:
10107 gold_unreachable();
10110 return true;
10113 // Perform a TLS relocation.
10115 template<bool big_endian>
10116 inline typename Arm_relocate_functions<big_endian>::Status
10117 Target_arm<big_endian>::Relocate::relocate_tls(
10118 const Relocate_info<32, big_endian>* relinfo,
10119 Target_arm<big_endian>* target,
10120 size_t relnum,
10121 const elfcpp::Rel<32, big_endian>& rel,
10122 unsigned int r_type,
10123 const Sized_symbol<32>* gsym,
10124 const Symbol_value<32>* psymval,
10125 unsigned char* view,
10126 elfcpp::Elf_types<32>::Elf_Addr address,
10127 section_size_type /*view_size*/ )
10129 typedef Arm_relocate_functions<big_endian> ArmRelocFuncs;
10130 typedef Relocate_functions<32, big_endian> RelocFuncs;
10131 Output_segment* tls_segment = relinfo->layout->tls_segment();
10133 const Sized_relobj_file<32, big_endian>* object = relinfo->object;
10135 elfcpp::Elf_types<32>::Elf_Addr value = psymval->value(object, 0);
10137 const bool is_final = (gsym == NULL
10138 ? !parameters->options().shared()
10139 : gsym->final_value_is_known());
10140 const tls::Tls_optimization optimized_type
10141 = Target_arm<big_endian>::optimize_tls_reloc(is_final, r_type);
10142 switch (r_type)
10144 case elfcpp::R_ARM_TLS_GD32: // Global-dynamic
10146 unsigned int got_type = GOT_TYPE_TLS_PAIR;
10147 unsigned int got_offset;
10148 if (gsym != NULL)
10150 gold_assert(gsym->has_got_offset(got_type));
10151 got_offset = gsym->got_offset(got_type) - target->got_size();
10153 else
10155 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
10156 gold_assert(object->local_has_got_offset(r_sym, got_type));
10157 got_offset = (object->local_got_offset(r_sym, got_type)
10158 - target->got_size());
10160 if (optimized_type == tls::TLSOPT_NONE)
10162 Arm_address got_entry =
10163 target->got_plt_section()->address() + got_offset;
10165 // Relocate the field with the PC relative offset of the pair of
10166 // GOT entries.
10167 RelocFuncs::pcrel32_unaligned(view, got_entry, address);
10168 return ArmRelocFuncs::STATUS_OKAY;
10171 break;
10173 case elfcpp::R_ARM_TLS_LDM32: // Local-dynamic
10174 if (optimized_type == tls::TLSOPT_NONE)
10176 // Relocate the field with the offset of the GOT entry for
10177 // the module index.
10178 unsigned int got_offset;
10179 got_offset = (target->got_mod_index_entry(NULL, NULL, NULL)
10180 - target->got_size());
10181 Arm_address got_entry =
10182 target->got_plt_section()->address() + got_offset;
10184 // Relocate the field with the PC relative offset of the pair of
10185 // GOT entries.
10186 RelocFuncs::pcrel32_unaligned(view, got_entry, address);
10187 return ArmRelocFuncs::STATUS_OKAY;
10189 break;
10191 case elfcpp::R_ARM_TLS_LDO32: // Alternate local-dynamic
10192 RelocFuncs::rel32_unaligned(view, value);
10193 return ArmRelocFuncs::STATUS_OKAY;
10195 case elfcpp::R_ARM_TLS_IE32: // Initial-exec
10196 if (optimized_type == tls::TLSOPT_NONE)
10198 // Relocate the field with the offset of the GOT entry for
10199 // the tp-relative offset of the symbol.
10200 unsigned int got_type = GOT_TYPE_TLS_OFFSET;
10201 unsigned int got_offset;
10202 if (gsym != NULL)
10204 gold_assert(gsym->has_got_offset(got_type));
10205 got_offset = gsym->got_offset(got_type);
10207 else
10209 unsigned int r_sym = elfcpp::elf_r_sym<32>(rel.get_r_info());
10210 gold_assert(object->local_has_got_offset(r_sym, got_type));
10211 got_offset = object->local_got_offset(r_sym, got_type);
10214 // All GOT offsets are relative to the end of the GOT.
10215 got_offset -= target->got_size();
10217 Arm_address got_entry =
10218 target->got_plt_section()->address() + got_offset;
10220 // Relocate the field with the PC relative offset of the GOT entry.
10221 RelocFuncs::pcrel32_unaligned(view, got_entry, address);
10222 return ArmRelocFuncs::STATUS_OKAY;
10224 break;
10226 case elfcpp::R_ARM_TLS_LE32: // Local-exec
10227 // If we're creating a shared library, a dynamic relocation will
10228 // have been created for this location, so do not apply it now.
10229 if (!parameters->options().shared())
10231 gold_assert(tls_segment != NULL);
10233 // $tp points to the TCB, which is followed by the TLS, so we
10234 // need to add TCB size to the offset.
10235 Arm_address aligned_tcb_size =
10236 align_address(ARM_TCB_SIZE, tls_segment->maximum_alignment());
10237 RelocFuncs::rel32_unaligned(view, value + aligned_tcb_size);
10240 return ArmRelocFuncs::STATUS_OKAY;
10242 default:
10243 gold_unreachable();
10246 gold_error_at_location(relinfo, relnum, rel.get_r_offset(),
10247 _("unsupported reloc %u"),
10248 r_type);
10249 return ArmRelocFuncs::STATUS_BAD_RELOC;
10252 // Relocate section data.
10254 template<bool big_endian>
10255 void
10256 Target_arm<big_endian>::relocate_section(
10257 const Relocate_info<32, big_endian>* relinfo,
10258 unsigned int sh_type,
10259 const unsigned char* prelocs,
10260 size_t reloc_count,
10261 Output_section* output_section,
10262 bool needs_special_offset_handling,
10263 unsigned char* view,
10264 Arm_address address,
10265 section_size_type view_size,
10266 const Reloc_symbol_changes* reloc_symbol_changes)
10268 typedef typename Target_arm<big_endian>::Relocate Arm_relocate;
10269 gold_assert(sh_type == elfcpp::SHT_REL);
10271 // See if we are relocating a relaxed input section. If so, the view
10272 // covers the whole output section and we need to adjust accordingly.
10273 if (needs_special_offset_handling)
10275 const Output_relaxed_input_section* poris =
10276 output_section->find_relaxed_input_section(relinfo->object,
10277 relinfo->data_shndx);
10278 if (poris != NULL)
10280 Arm_address section_address = poris->address();
10281 section_size_type section_size = poris->data_size();
10283 gold_assert((section_address >= address)
10284 && ((section_address + section_size)
10285 <= (address + view_size)));
10287 off_t offset = section_address - address;
10288 view += offset;
10289 address += offset;
10290 view_size = section_size;
10294 gold::relocate_section<32, big_endian, Target_arm, Arm_relocate,
10295 gold::Default_comdat_behavior, Classify_reloc>(
10296 relinfo,
10297 this,
10298 prelocs,
10299 reloc_count,
10300 output_section,
10301 needs_special_offset_handling,
10302 view,
10303 address,
10304 view_size,
10305 reloc_symbol_changes);
10308 // Return the size of a relocation while scanning during a relocatable
10309 // link.
10311 template<bool big_endian>
10312 unsigned int
10313 Target_arm<big_endian>::Classify_reloc::get_size_for_reloc(
10314 unsigned int r_type,
10315 Relobj* object)
10317 Target_arm<big_endian>* arm_target =
10318 Target_arm<big_endian>::default_target();
10319 r_type = arm_target->get_real_reloc_type(r_type);
10320 const Arm_reloc_property* arp =
10321 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
10322 if (arp != NULL)
10323 return arp->size();
10324 else
10326 std::string reloc_name =
10327 arm_reloc_property_table->reloc_name_in_error_message(r_type);
10328 gold_error(_("%s: unexpected %s in object file"),
10329 object->name().c_str(), reloc_name.c_str());
10330 return 0;
10334 // Scan the relocs during a relocatable link.
10336 template<bool big_endian>
10337 void
10338 Target_arm<big_endian>::scan_relocatable_relocs(
10339 Symbol_table* symtab,
10340 Layout* layout,
10341 Sized_relobj_file<32, big_endian>* object,
10342 unsigned int data_shndx,
10343 unsigned int sh_type,
10344 const unsigned char* prelocs,
10345 size_t reloc_count,
10346 Output_section* output_section,
10347 bool needs_special_offset_handling,
10348 size_t local_symbol_count,
10349 const unsigned char* plocal_symbols,
10350 Relocatable_relocs* rr)
10352 typedef Arm_scan_relocatable_relocs<big_endian, Classify_reloc>
10353 Scan_relocatable_relocs;
10355 gold_assert(sh_type == elfcpp::SHT_REL);
10357 gold::scan_relocatable_relocs<32, big_endian, Scan_relocatable_relocs>(
10358 symtab,
10359 layout,
10360 object,
10361 data_shndx,
10362 prelocs,
10363 reloc_count,
10364 output_section,
10365 needs_special_offset_handling,
10366 local_symbol_count,
10367 plocal_symbols,
10368 rr);
10371 // Scan the relocs for --emit-relocs.
10373 template<bool big_endian>
10374 void
10375 Target_arm<big_endian>::emit_relocs_scan(Symbol_table* symtab,
10376 Layout* layout,
10377 Sized_relobj_file<32, big_endian>* object,
10378 unsigned int data_shndx,
10379 unsigned int sh_type,
10380 const unsigned char* prelocs,
10381 size_t reloc_count,
10382 Output_section* output_section,
10383 bool needs_special_offset_handling,
10384 size_t local_symbol_count,
10385 const unsigned char* plocal_syms,
10386 Relocatable_relocs* rr)
10388 typedef gold::Default_classify_reloc<elfcpp::SHT_REL, 32, big_endian>
10389 Classify_reloc;
10390 typedef gold::Default_emit_relocs_strategy<Classify_reloc>
10391 Emit_relocs_strategy;
10393 gold_assert(sh_type == elfcpp::SHT_REL);
10395 gold::scan_relocatable_relocs<32, big_endian, Emit_relocs_strategy>(
10396 symtab,
10397 layout,
10398 object,
10399 data_shndx,
10400 prelocs,
10401 reloc_count,
10402 output_section,
10403 needs_special_offset_handling,
10404 local_symbol_count,
10405 plocal_syms,
10406 rr);
10409 // Emit relocations for a section.
10411 template<bool big_endian>
10412 void
10413 Target_arm<big_endian>::relocate_relocs(
10414 const Relocate_info<32, big_endian>* relinfo,
10415 unsigned int sh_type,
10416 const unsigned char* prelocs,
10417 size_t reloc_count,
10418 Output_section* output_section,
10419 typename elfcpp::Elf_types<32>::Elf_Off offset_in_output_section,
10420 unsigned char* view,
10421 Arm_address view_address,
10422 section_size_type view_size,
10423 unsigned char* reloc_view,
10424 section_size_type reloc_view_size)
10426 gold_assert(sh_type == elfcpp::SHT_REL);
10428 gold::relocate_relocs<32, big_endian, Classify_reloc>(
10429 relinfo,
10430 prelocs,
10431 reloc_count,
10432 output_section,
10433 offset_in_output_section,
10434 view,
10435 view_address,
10436 view_size,
10437 reloc_view,
10438 reloc_view_size);
10441 // Perform target-specific processing in a relocatable link. This is
10442 // only used if we use the relocation strategy RELOC_SPECIAL.
10444 template<bool big_endian>
10445 void
10446 Target_arm<big_endian>::relocate_special_relocatable(
10447 const Relocate_info<32, big_endian>* relinfo,
10448 unsigned int sh_type,
10449 const unsigned char* preloc_in,
10450 size_t relnum,
10451 Output_section* output_section,
10452 typename elfcpp::Elf_types<32>::Elf_Off offset_in_output_section,
10453 unsigned char* view,
10454 elfcpp::Elf_types<32>::Elf_Addr view_address,
10455 section_size_type,
10456 unsigned char* preloc_out)
10458 // We can only handle REL type relocation sections.
10459 gold_assert(sh_type == elfcpp::SHT_REL);
10461 typedef typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc Reltype;
10462 typedef typename Reloc_types<elfcpp::SHT_REL, 32, big_endian>::Reloc_write
10463 Reltype_write;
10464 const Arm_address invalid_address = static_cast<Arm_address>(0) - 1;
10466 const Arm_relobj<big_endian>* object =
10467 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
10468 const unsigned int local_count = object->local_symbol_count();
10470 Reltype reloc(preloc_in);
10471 Reltype_write reloc_write(preloc_out);
10473 elfcpp::Elf_types<32>::Elf_WXword r_info = reloc.get_r_info();
10474 const unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
10475 const unsigned int r_type = elfcpp::elf_r_type<32>(r_info);
10477 const Arm_reloc_property* arp =
10478 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
10479 gold_assert(arp != NULL);
10481 // Get the new symbol index.
10482 // We only use RELOC_SPECIAL strategy in local relocations.
10483 gold_assert(r_sym < local_count);
10485 // We are adjusting a section symbol. We need to find
10486 // the symbol table index of the section symbol for
10487 // the output section corresponding to input section
10488 // in which this symbol is defined.
10489 bool is_ordinary;
10490 unsigned int shndx = object->local_symbol_input_shndx(r_sym, &is_ordinary);
10491 gold_assert(is_ordinary);
10492 Output_section* os = object->output_section(shndx);
10493 gold_assert(os != NULL);
10494 gold_assert(os->needs_symtab_index());
10495 unsigned int new_symndx = os->symtab_index();
10497 // Get the new offset--the location in the output section where
10498 // this relocation should be applied.
10500 Arm_address offset = reloc.get_r_offset();
10501 Arm_address new_offset;
10502 if (offset_in_output_section != invalid_address)
10503 new_offset = offset + offset_in_output_section;
10504 else
10506 section_offset_type sot_offset =
10507 convert_types<section_offset_type, Arm_address>(offset);
10508 section_offset_type new_sot_offset =
10509 output_section->output_offset(object, relinfo->data_shndx,
10510 sot_offset);
10511 gold_assert(new_sot_offset != -1);
10512 new_offset = new_sot_offset;
10515 // In an object file, r_offset is an offset within the section.
10516 // In an executable or dynamic object, generated by
10517 // --emit-relocs, r_offset is an absolute address.
10518 if (!parameters->options().relocatable())
10520 new_offset += view_address;
10521 if (offset_in_output_section != invalid_address)
10522 new_offset -= offset_in_output_section;
10525 reloc_write.put_r_offset(new_offset);
10526 reloc_write.put_r_info(elfcpp::elf_r_info<32>(new_symndx, r_type));
10528 // Handle the reloc addend.
10529 // The relocation uses a section symbol in the input file.
10530 // We are adjusting it to use a section symbol in the output
10531 // file. The input section symbol refers to some address in
10532 // the input section. We need the relocation in the output
10533 // file to refer to that same address. This adjustment to
10534 // the addend is the same calculation we use for a simple
10535 // absolute relocation for the input section symbol.
10537 const Symbol_value<32>* psymval = object->local_symbol(r_sym);
10539 // Handle THUMB bit.
10540 Symbol_value<32> symval;
10541 Arm_address thumb_bit =
10542 object->local_symbol_is_thumb_function(r_sym) ? 1 : 0;
10543 if (thumb_bit != 0
10544 && arp->uses_thumb_bit()
10545 && ((psymval->value(object, 0) & 1) != 0))
10547 Arm_address stripped_value =
10548 psymval->value(object, 0) & ~static_cast<Arm_address>(1);
10549 symval.set_output_value(stripped_value);
10550 psymval = &symval;
10553 unsigned char* paddend = view + offset;
10554 typename Arm_relocate_functions<big_endian>::Status reloc_status =
10555 Arm_relocate_functions<big_endian>::STATUS_OKAY;
10556 switch (r_type)
10558 case elfcpp::R_ARM_ABS8:
10559 reloc_status = Arm_relocate_functions<big_endian>::abs8(paddend, object,
10560 psymval);
10561 break;
10563 case elfcpp::R_ARM_ABS12:
10564 reloc_status = Arm_relocate_functions<big_endian>::abs12(paddend, object,
10565 psymval);
10566 break;
10568 case elfcpp::R_ARM_ABS16:
10569 reloc_status = Arm_relocate_functions<big_endian>::abs16(paddend, object,
10570 psymval);
10571 break;
10573 case elfcpp::R_ARM_THM_ABS5:
10574 reloc_status = Arm_relocate_functions<big_endian>::thm_abs5(paddend,
10575 object,
10576 psymval);
10577 break;
10579 case elfcpp::R_ARM_MOVW_ABS_NC:
10580 case elfcpp::R_ARM_MOVW_PREL_NC:
10581 case elfcpp::R_ARM_MOVW_BREL_NC:
10582 case elfcpp::R_ARM_MOVW_BREL:
10583 reloc_status = Arm_relocate_functions<big_endian>::movw(
10584 paddend, object, psymval, 0, thumb_bit, arp->checks_overflow());
10585 break;
10587 case elfcpp::R_ARM_THM_MOVW_ABS_NC:
10588 case elfcpp::R_ARM_THM_MOVW_PREL_NC:
10589 case elfcpp::R_ARM_THM_MOVW_BREL_NC:
10590 case elfcpp::R_ARM_THM_MOVW_BREL:
10591 reloc_status = Arm_relocate_functions<big_endian>::thm_movw(
10592 paddend, object, psymval, 0, thumb_bit, arp->checks_overflow());
10593 break;
10595 case elfcpp::R_ARM_THM_CALL:
10596 case elfcpp::R_ARM_THM_XPC22:
10597 case elfcpp::R_ARM_THM_JUMP24:
10598 reloc_status =
10599 Arm_relocate_functions<big_endian>::thumb_branch_common(
10600 r_type, relinfo, paddend, NULL, object, 0, psymval, 0, thumb_bit,
10601 false);
10602 break;
10604 case elfcpp::R_ARM_PLT32:
10605 case elfcpp::R_ARM_CALL:
10606 case elfcpp::R_ARM_JUMP24:
10607 case elfcpp::R_ARM_XPC25:
10608 reloc_status =
10609 Arm_relocate_functions<big_endian>::arm_branch_common(
10610 r_type, relinfo, paddend, NULL, object, 0, psymval, 0, thumb_bit,
10611 false);
10612 break;
10614 case elfcpp::R_ARM_THM_JUMP19:
10615 reloc_status =
10616 Arm_relocate_functions<big_endian>::thm_jump19(paddend, object,
10617 psymval, 0, thumb_bit);
10618 break;
10620 case elfcpp::R_ARM_THM_JUMP6:
10621 reloc_status =
10622 Arm_relocate_functions<big_endian>::thm_jump6(paddend, object, psymval,
10624 break;
10626 case elfcpp::R_ARM_THM_JUMP8:
10627 reloc_status =
10628 Arm_relocate_functions<big_endian>::thm_jump8(paddend, object, psymval,
10630 break;
10632 case elfcpp::R_ARM_THM_JUMP11:
10633 reloc_status =
10634 Arm_relocate_functions<big_endian>::thm_jump11(paddend, object, psymval,
10636 break;
10638 case elfcpp::R_ARM_PREL31:
10639 reloc_status =
10640 Arm_relocate_functions<big_endian>::prel31(paddend, object, psymval, 0,
10641 thumb_bit);
10642 break;
10644 case elfcpp::R_ARM_THM_PC8:
10645 reloc_status =
10646 Arm_relocate_functions<big_endian>::thm_pc8(paddend, object, psymval,
10648 break;
10650 case elfcpp::R_ARM_THM_PC12:
10651 reloc_status =
10652 Arm_relocate_functions<big_endian>::thm_pc12(paddend, object, psymval,
10654 break;
10656 case elfcpp::R_ARM_THM_ALU_PREL_11_0:
10657 reloc_status =
10658 Arm_relocate_functions<big_endian>::thm_alu11(paddend, object, psymval,
10659 0, thumb_bit);
10660 break;
10662 // These relocation truncate relocation results so we cannot handle them
10663 // in a relocatable link.
10664 case elfcpp::R_ARM_MOVT_ABS:
10665 case elfcpp::R_ARM_THM_MOVT_ABS:
10666 case elfcpp::R_ARM_MOVT_PREL:
10667 case elfcpp::R_ARM_MOVT_BREL:
10668 case elfcpp::R_ARM_THM_MOVT_PREL:
10669 case elfcpp::R_ARM_THM_MOVT_BREL:
10670 case elfcpp::R_ARM_ALU_PC_G0_NC:
10671 case elfcpp::R_ARM_ALU_PC_G0:
10672 case elfcpp::R_ARM_ALU_PC_G1_NC:
10673 case elfcpp::R_ARM_ALU_PC_G1:
10674 case elfcpp::R_ARM_ALU_PC_G2:
10675 case elfcpp::R_ARM_ALU_SB_G0_NC:
10676 case elfcpp::R_ARM_ALU_SB_G0:
10677 case elfcpp::R_ARM_ALU_SB_G1_NC:
10678 case elfcpp::R_ARM_ALU_SB_G1:
10679 case elfcpp::R_ARM_ALU_SB_G2:
10680 case elfcpp::R_ARM_LDR_PC_G0:
10681 case elfcpp::R_ARM_LDR_PC_G1:
10682 case elfcpp::R_ARM_LDR_PC_G2:
10683 case elfcpp::R_ARM_LDR_SB_G0:
10684 case elfcpp::R_ARM_LDR_SB_G1:
10685 case elfcpp::R_ARM_LDR_SB_G2:
10686 case elfcpp::R_ARM_LDRS_PC_G0:
10687 case elfcpp::R_ARM_LDRS_PC_G1:
10688 case elfcpp::R_ARM_LDRS_PC_G2:
10689 case elfcpp::R_ARM_LDRS_SB_G0:
10690 case elfcpp::R_ARM_LDRS_SB_G1:
10691 case elfcpp::R_ARM_LDRS_SB_G2:
10692 case elfcpp::R_ARM_LDC_PC_G0:
10693 case elfcpp::R_ARM_LDC_PC_G1:
10694 case elfcpp::R_ARM_LDC_PC_G2:
10695 case elfcpp::R_ARM_LDC_SB_G0:
10696 case elfcpp::R_ARM_LDC_SB_G1:
10697 case elfcpp::R_ARM_LDC_SB_G2:
10698 gold_error(_("cannot handle %s in a relocatable link"),
10699 arp->name().c_str());
10700 break;
10702 default:
10703 gold_unreachable();
10706 // Report any errors.
10707 switch (reloc_status)
10709 case Arm_relocate_functions<big_endian>::STATUS_OKAY:
10710 break;
10711 case Arm_relocate_functions<big_endian>::STATUS_OVERFLOW:
10712 gold_error_at_location(relinfo, relnum, reloc.get_r_offset(),
10713 _("relocation overflow in %s"),
10714 arp->name().c_str());
10715 break;
10716 case Arm_relocate_functions<big_endian>::STATUS_BAD_RELOC:
10717 gold_error_at_location(relinfo, relnum, reloc.get_r_offset(),
10718 _("unexpected opcode while processing relocation %s"),
10719 arp->name().c_str());
10720 break;
10721 default:
10722 gold_unreachable();
10726 // Return the value to use for a dynamic symbol which requires special
10727 // treatment. This is how we support equality comparisons of function
10728 // pointers across shared library boundaries, as described in the
10729 // processor specific ABI supplement.
10731 template<bool big_endian>
10732 uint64_t
10733 Target_arm<big_endian>::do_dynsym_value(const Symbol* gsym) const
10735 gold_assert(gsym->is_from_dynobj() && gsym->has_plt_offset());
10736 return this->plt_address_for_global(gsym);
10739 // Map platform-specific relocs to real relocs
10741 template<bool big_endian>
10742 unsigned int
10743 Target_arm<big_endian>::get_real_reloc_type(unsigned int r_type) const
10745 switch (r_type)
10747 case elfcpp::R_ARM_TARGET1:
10748 return this->target1_reloc_;
10750 case elfcpp::R_ARM_TARGET2:
10751 return this->target2_reloc_;
10753 default:
10754 return r_type;
10758 // Whether if two EABI versions V1 and V2 are compatible.
10760 template<bool big_endian>
10761 bool
10762 Target_arm<big_endian>::are_eabi_versions_compatible(
10763 elfcpp::Elf_Word v1,
10764 elfcpp::Elf_Word v2)
10766 // v4 and v5 are the same spec before and after it was released,
10767 // so allow mixing them.
10768 if ((v1 == elfcpp::EF_ARM_EABI_UNKNOWN || v2 == elfcpp::EF_ARM_EABI_UNKNOWN)
10769 || (v1 == elfcpp::EF_ARM_EABI_VER4 && v2 == elfcpp::EF_ARM_EABI_VER5)
10770 || (v1 == elfcpp::EF_ARM_EABI_VER5 && v2 == elfcpp::EF_ARM_EABI_VER4))
10771 return true;
10773 return v1 == v2;
10776 // Combine FLAGS from an input object called NAME and the processor-specific
10777 // flags in the ELF header of the output. Much of this is adapted from the
10778 // processor-specific flags merging code in elf32_arm_merge_private_bfd_data
10779 // in bfd/elf32-arm.c.
10781 template<bool big_endian>
10782 void
10783 Target_arm<big_endian>::merge_processor_specific_flags(
10784 const std::string& name,
10785 elfcpp::Elf_Word flags)
10787 if (this->are_processor_specific_flags_set())
10789 elfcpp::Elf_Word out_flags = this->processor_specific_flags();
10791 // Nothing to merge if flags equal to those in output.
10792 if (flags == out_flags)
10793 return;
10795 // Complain about various flag mismatches.
10796 elfcpp::Elf_Word version1 = elfcpp::arm_eabi_version(flags);
10797 elfcpp::Elf_Word version2 = elfcpp::arm_eabi_version(out_flags);
10798 if (!this->are_eabi_versions_compatible(version1, version2)
10799 && parameters->options().warn_mismatch())
10800 gold_error(_("Source object %s has EABI version %d but output has "
10801 "EABI version %d."),
10802 name.c_str(),
10803 (flags & elfcpp::EF_ARM_EABIMASK) >> 24,
10804 (out_flags & elfcpp::EF_ARM_EABIMASK) >> 24);
10806 else
10808 // If the input is the default architecture and had the default
10809 // flags then do not bother setting the flags for the output
10810 // architecture, instead allow future merges to do this. If no
10811 // future merges ever set these flags then they will retain their
10812 // uninitialised values, which surprise surprise, correspond
10813 // to the default values.
10814 if (flags == 0)
10815 return;
10817 // This is the first time, just copy the flags.
10818 // We only copy the EABI version for now.
10819 this->set_processor_specific_flags(flags & elfcpp::EF_ARM_EABIMASK);
10823 // Adjust ELF file header.
10824 template<bool big_endian>
10825 void
10826 Target_arm<big_endian>::do_adjust_elf_header(
10827 unsigned char* view,
10828 int len)
10830 gold_assert(len == elfcpp::Elf_sizes<32>::ehdr_size);
10832 elfcpp::Ehdr<32, big_endian> ehdr(view);
10833 elfcpp::Elf_Word flags = this->processor_specific_flags();
10834 unsigned char e_ident[elfcpp::EI_NIDENT];
10835 memcpy(e_ident, ehdr.get_e_ident(), elfcpp::EI_NIDENT);
10837 if (elfcpp::arm_eabi_version(flags)
10838 == elfcpp::EF_ARM_EABI_UNKNOWN)
10839 e_ident[elfcpp::EI_OSABI] = elfcpp::ELFOSABI_ARM;
10840 else
10841 e_ident[elfcpp::EI_OSABI] = 0;
10842 e_ident[elfcpp::EI_ABIVERSION] = 0;
10844 // Do EF_ARM_BE8 adjustment.
10845 if (parameters->options().be8() && !big_endian)
10846 gold_error("BE8 images only valid in big-endian mode.");
10847 if (parameters->options().be8())
10849 flags |= elfcpp::EF_ARM_BE8;
10850 this->set_processor_specific_flags(flags);
10853 // If we're working in EABI_VER5, set the hard/soft float ABI flags
10854 // as appropriate.
10855 if (elfcpp::arm_eabi_version(flags) == elfcpp::EF_ARM_EABI_VER5)
10857 elfcpp::Elf_Half type = ehdr.get_e_type();
10858 if (type == elfcpp::ET_EXEC || type == elfcpp::ET_DYN)
10860 Object_attribute* attr = this->get_aeabi_object_attribute(elfcpp::Tag_ABI_VFP_args);
10861 if (attr->int_value() == elfcpp::AEABI_VFP_args_vfp)
10862 flags |= elfcpp::EF_ARM_ABI_FLOAT_HARD;
10863 else
10864 flags |= elfcpp::EF_ARM_ABI_FLOAT_SOFT;
10865 this->set_processor_specific_flags(flags);
10868 elfcpp::Ehdr_write<32, big_endian> oehdr(view);
10869 oehdr.put_e_ident(e_ident);
10870 oehdr.put_e_flags(this->processor_specific_flags());
10873 // do_make_elf_object to override the same function in the base class.
10874 // We need to use a target-specific sub-class of
10875 // Sized_relobj_file<32, big_endian> to store ARM specific information.
10876 // Hence we need to have our own ELF object creation.
10878 template<bool big_endian>
10879 Object*
10880 Target_arm<big_endian>::do_make_elf_object(
10881 const std::string& name,
10882 Input_file* input_file,
10883 off_t offset, const elfcpp::Ehdr<32, big_endian>& ehdr)
10885 int et = ehdr.get_e_type();
10886 // ET_EXEC files are valid input for --just-symbols/-R,
10887 // and we treat them as relocatable objects.
10888 if (et == elfcpp::ET_REL
10889 || (et == elfcpp::ET_EXEC && input_file->just_symbols()))
10891 Arm_relobj<big_endian>* obj =
10892 new Arm_relobj<big_endian>(name, input_file, offset, ehdr);
10893 obj->setup();
10894 return obj;
10896 else if (et == elfcpp::ET_DYN)
10898 Sized_dynobj<32, big_endian>* obj =
10899 new Arm_dynobj<big_endian>(name, input_file, offset, ehdr);
10900 obj->setup();
10901 return obj;
10903 else
10905 gold_error(_("%s: unsupported ELF file type %d"),
10906 name.c_str(), et);
10907 return NULL;
10911 // Read the architecture from the Tag_also_compatible_with attribute, if any.
10912 // Returns -1 if no architecture could be read.
10913 // This is adapted from get_secondary_compatible_arch() in bfd/elf32-arm.c.
10915 template<bool big_endian>
10917 Target_arm<big_endian>::get_secondary_compatible_arch(
10918 const Attributes_section_data* pasd)
10920 const Object_attribute* known_attributes =
10921 pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC);
10923 // Note: the tag and its argument below are uleb128 values, though
10924 // currently-defined values fit in one byte for each.
10925 const std::string& sv =
10926 known_attributes[elfcpp::Tag_also_compatible_with].string_value();
10927 if (sv.size() == 2
10928 && sv.data()[0] == elfcpp::Tag_CPU_arch
10929 && (sv.data()[1] & 128) != 128)
10930 return sv.data()[1];
10932 // This tag is "safely ignorable", so don't complain if it looks funny.
10933 return -1;
10936 // Set, or unset, the architecture of the Tag_also_compatible_with attribute.
10937 // The tag is removed if ARCH is -1.
10938 // This is adapted from set_secondary_compatible_arch() in bfd/elf32-arm.c.
10940 template<bool big_endian>
10941 void
10942 Target_arm<big_endian>::set_secondary_compatible_arch(
10943 Attributes_section_data* pasd,
10944 int arch)
10946 Object_attribute* known_attributes =
10947 pasd->known_attributes(Object_attribute::OBJ_ATTR_PROC);
10949 if (arch == -1)
10951 known_attributes[elfcpp::Tag_also_compatible_with].set_string_value("");
10952 return;
10955 // Note: the tag and its argument below are uleb128 values, though
10956 // currently-defined values fit in one byte for each.
10957 char sv[3];
10958 sv[0] = elfcpp::Tag_CPU_arch;
10959 gold_assert(arch != 0);
10960 sv[1] = arch;
10961 sv[2] = '\0';
10963 known_attributes[elfcpp::Tag_also_compatible_with].set_string_value(sv);
10966 // Combine two values for Tag_CPU_arch, taking secondary compatibility tags
10967 // into account.
10968 // This is adapted from tag_cpu_arch_combine() in bfd/elf32-arm.c.
10970 template<bool big_endian>
10972 Target_arm<big_endian>::tag_cpu_arch_combine(
10973 const char* name,
10974 int oldtag,
10975 int* secondary_compat_out,
10976 int newtag,
10977 int secondary_compat)
10979 #define T(X) elfcpp::TAG_CPU_ARCH_##X
10980 static const int v6t2[] =
10982 T(V6T2), // PRE_V4.
10983 T(V6T2), // V4.
10984 T(V6T2), // V4T.
10985 T(V6T2), // V5T.
10986 T(V6T2), // V5TE.
10987 T(V6T2), // V5TEJ.
10988 T(V6T2), // V6.
10989 T(V7), // V6KZ.
10990 T(V6T2) // V6T2.
10992 static const int v6k[] =
10994 T(V6K), // PRE_V4.
10995 T(V6K), // V4.
10996 T(V6K), // V4T.
10997 T(V6K), // V5T.
10998 T(V6K), // V5TE.
10999 T(V6K), // V5TEJ.
11000 T(V6K), // V6.
11001 T(V6KZ), // V6KZ.
11002 T(V7), // V6T2.
11003 T(V6K) // V6K.
11005 static const int v7[] =
11007 T(V7), // PRE_V4.
11008 T(V7), // V4.
11009 T(V7), // V4T.
11010 T(V7), // V5T.
11011 T(V7), // V5TE.
11012 T(V7), // V5TEJ.
11013 T(V7), // V6.
11014 T(V7), // V6KZ.
11015 T(V7), // V6T2.
11016 T(V7), // V6K.
11017 T(V7) // V7.
11019 static const int v6_m[] =
11021 -1, // PRE_V4.
11022 -1, // V4.
11023 T(V6K), // V4T.
11024 T(V6K), // V5T.
11025 T(V6K), // V5TE.
11026 T(V6K), // V5TEJ.
11027 T(V6K), // V6.
11028 T(V6KZ), // V6KZ.
11029 T(V7), // V6T2.
11030 T(V6K), // V6K.
11031 T(V7), // V7.
11032 T(V6_M) // V6_M.
11034 static const int v6s_m[] =
11036 -1, // PRE_V4.
11037 -1, // V4.
11038 T(V6K), // V4T.
11039 T(V6K), // V5T.
11040 T(V6K), // V5TE.
11041 T(V6K), // V5TEJ.
11042 T(V6K), // V6.
11043 T(V6KZ), // V6KZ.
11044 T(V7), // V6T2.
11045 T(V6K), // V6K.
11046 T(V7), // V7.
11047 T(V6S_M), // V6_M.
11048 T(V6S_M) // V6S_M.
11050 static const int v7e_m[] =
11052 -1, // PRE_V4.
11053 -1, // V4.
11054 T(V7E_M), // V4T.
11055 T(V7E_M), // V5T.
11056 T(V7E_M), // V5TE.
11057 T(V7E_M), // V5TEJ.
11058 T(V7E_M), // V6.
11059 T(V7E_M), // V6KZ.
11060 T(V7E_M), // V6T2.
11061 T(V7E_M), // V6K.
11062 T(V7E_M), // V7.
11063 T(V7E_M), // V6_M.
11064 T(V7E_M), // V6S_M.
11065 T(V7E_M) // V7E_M.
11067 static const int v8[] =
11069 T(V8), // PRE_V4.
11070 T(V8), // V4.
11071 T(V8), // V4T.
11072 T(V8), // V5T.
11073 T(V8), // V5TE.
11074 T(V8), // V5TEJ.
11075 T(V8), // V6.
11076 T(V8), // V6KZ.
11077 T(V8), // V6T2.
11078 T(V8), // V6K.
11079 T(V8), // V7.
11080 T(V8), // V6_M.
11081 T(V8), // V6S_M.
11082 T(V8), // V7E_M.
11083 T(V8) // V8.
11085 static const int v4t_plus_v6_m[] =
11087 -1, // PRE_V4.
11088 -1, // V4.
11089 T(V4T), // V4T.
11090 T(V5T), // V5T.
11091 T(V5TE), // V5TE.
11092 T(V5TEJ), // V5TEJ.
11093 T(V6), // V6.
11094 T(V6KZ), // V6KZ.
11095 T(V6T2), // V6T2.
11096 T(V6K), // V6K.
11097 T(V7), // V7.
11098 T(V6_M), // V6_M.
11099 T(V6S_M), // V6S_M.
11100 T(V7E_M), // V7E_M.
11101 T(V8), // V8.
11102 T(V4T_PLUS_V6_M) // V4T plus V6_M.
11104 static const int* comb[] =
11106 v6t2,
11107 v6k,
11109 v6_m,
11110 v6s_m,
11111 v7e_m,
11113 // Pseudo-architecture.
11114 v4t_plus_v6_m
11117 // Check we've not got a higher architecture than we know about.
11119 if (oldtag > elfcpp::MAX_TAG_CPU_ARCH || newtag > elfcpp::MAX_TAG_CPU_ARCH)
11121 gold_error(_("%s: unknown CPU architecture"), name);
11122 return -1;
11125 // Override old tag if we have a Tag_also_compatible_with on the output.
11127 if ((oldtag == T(V6_M) && *secondary_compat_out == T(V4T))
11128 || (oldtag == T(V4T) && *secondary_compat_out == T(V6_M)))
11129 oldtag = T(V4T_PLUS_V6_M);
11131 // And override the new tag if we have a Tag_also_compatible_with on the
11132 // input.
11134 if ((newtag == T(V6_M) && secondary_compat == T(V4T))
11135 || (newtag == T(V4T) && secondary_compat == T(V6_M)))
11136 newtag = T(V4T_PLUS_V6_M);
11138 // Architectures before V6KZ add features monotonically.
11139 int tagh = std::max(oldtag, newtag);
11140 if (tagh <= elfcpp::TAG_CPU_ARCH_V6KZ)
11141 return tagh;
11143 int tagl = std::min(oldtag, newtag);
11144 int result = comb[tagh - T(V6T2)][tagl];
11146 // Use Tag_CPU_arch == V4T and Tag_also_compatible_with (Tag_CPU_arch V6_M)
11147 // as the canonical version.
11148 if (result == T(V4T_PLUS_V6_M))
11150 result = T(V4T);
11151 *secondary_compat_out = T(V6_M);
11153 else
11154 *secondary_compat_out = -1;
11156 if (result == -1)
11158 gold_error(_("%s: conflicting CPU architectures %d/%d"),
11159 name, oldtag, newtag);
11160 return -1;
11163 return result;
11164 #undef T
11167 // Helper to print AEABI enum tag value.
11169 template<bool big_endian>
11170 std::string
11171 Target_arm<big_endian>::aeabi_enum_name(unsigned int value)
11173 static const char* aeabi_enum_names[] =
11174 { "", "variable-size", "32-bit", "" };
11175 const size_t aeabi_enum_names_size =
11176 sizeof(aeabi_enum_names) / sizeof(aeabi_enum_names[0]);
11178 if (value < aeabi_enum_names_size)
11179 return std::string(aeabi_enum_names[value]);
11180 else
11182 char buffer[100];
11183 sprintf(buffer, "<unknown value %u>", value);
11184 return std::string(buffer);
11188 // Return the string value to store in TAG_CPU_name.
11190 template<bool big_endian>
11191 std::string
11192 Target_arm<big_endian>::tag_cpu_name_value(unsigned int value)
11194 static const char* name_table[] = {
11195 // These aren't real CPU names, but we can't guess
11196 // that from the architecture version alone.
11197 "Pre v4",
11198 "ARM v4",
11199 "ARM v4T",
11200 "ARM v5T",
11201 "ARM v5TE",
11202 "ARM v5TEJ",
11203 "ARM v6",
11204 "ARM v6KZ",
11205 "ARM v6T2",
11206 "ARM v6K",
11207 "ARM v7",
11208 "ARM v6-M",
11209 "ARM v6S-M",
11210 "ARM v7E-M",
11211 "ARM v8"
11213 const size_t name_table_size = sizeof(name_table) / sizeof(name_table[0]);
11215 if (value < name_table_size)
11216 return std::string(name_table[value]);
11217 else
11219 char buffer[100];
11220 sprintf(buffer, "<unknown CPU value %u>", value);
11221 return std::string(buffer);
11225 // Query attributes object to see if integer divide instructions may be
11226 // present in an object.
11228 template<bool big_endian>
11229 bool
11230 Target_arm<big_endian>::attributes_accept_div(int arch, int profile,
11231 const Object_attribute* div_attr)
11233 switch (div_attr->int_value())
11235 case 0:
11236 // Integer divide allowed if instruction contained in
11237 // architecture.
11238 if (arch == elfcpp::TAG_CPU_ARCH_V7 && (profile == 'R' || profile == 'M'))
11239 return true;
11240 else if (arch >= elfcpp::TAG_CPU_ARCH_V7E_M)
11241 return true;
11242 else
11243 return false;
11245 case 1:
11246 // Integer divide explicitly prohibited.
11247 return false;
11249 default:
11250 // Unrecognised case - treat as allowing divide everywhere.
11251 case 2:
11252 // Integer divide allowed in ARM state.
11253 return true;
11257 // Query attributes object to see if integer divide instructions are
11258 // forbidden to be in the object. This is not the inverse of
11259 // attributes_accept_div.
11261 template<bool big_endian>
11262 bool
11263 Target_arm<big_endian>::attributes_forbid_div(const Object_attribute* div_attr)
11265 return div_attr->int_value() == 1;
11268 // Merge object attributes from input file called NAME with those of the
11269 // output. The input object attributes are in the object pointed by PASD.
11271 template<bool big_endian>
11272 void
11273 Target_arm<big_endian>::merge_object_attributes(
11274 const char* name,
11275 const Attributes_section_data* pasd)
11277 // Return if there is no attributes section data.
11278 if (pasd == NULL)
11279 return;
11281 // If output has no object attributes, just copy.
11282 const int vendor = Object_attribute::OBJ_ATTR_PROC;
11283 if (this->attributes_section_data_ == NULL)
11285 this->attributes_section_data_ = new Attributes_section_data(*pasd);
11286 Object_attribute* out_attr =
11287 this->attributes_section_data_->known_attributes(vendor);
11289 // We do not output objects with Tag_MPextension_use_legacy - we move
11290 // the attribute's value to Tag_MPextension_use. */
11291 if (out_attr[elfcpp::Tag_MPextension_use_legacy].int_value() != 0)
11293 if (out_attr[elfcpp::Tag_MPextension_use].int_value() != 0
11294 && out_attr[elfcpp::Tag_MPextension_use_legacy].int_value()
11295 != out_attr[elfcpp::Tag_MPextension_use].int_value())
11297 gold_error(_("%s has both the current and legacy "
11298 "Tag_MPextension_use attributes"),
11299 name);
11302 out_attr[elfcpp::Tag_MPextension_use] =
11303 out_attr[elfcpp::Tag_MPextension_use_legacy];
11304 out_attr[elfcpp::Tag_MPextension_use_legacy].set_type(0);
11305 out_attr[elfcpp::Tag_MPextension_use_legacy].set_int_value(0);
11308 return;
11311 const Object_attribute* in_attr = pasd->known_attributes(vendor);
11312 Object_attribute* out_attr =
11313 this->attributes_section_data_->known_attributes(vendor);
11315 // This needs to happen before Tag_ABI_FP_number_model is merged. */
11316 if (in_attr[elfcpp::Tag_ABI_VFP_args].int_value()
11317 != out_attr[elfcpp::Tag_ABI_VFP_args].int_value())
11319 // Ignore mismatches if the object doesn't use floating point. */
11320 if (out_attr[elfcpp::Tag_ABI_FP_number_model].int_value()
11321 == elfcpp::AEABI_FP_number_model_none
11322 || (in_attr[elfcpp::Tag_ABI_FP_number_model].int_value()
11323 != elfcpp::AEABI_FP_number_model_none
11324 && out_attr[elfcpp::Tag_ABI_VFP_args].int_value()
11325 == elfcpp::AEABI_VFP_args_compatible))
11326 out_attr[elfcpp::Tag_ABI_VFP_args].set_int_value(
11327 in_attr[elfcpp::Tag_ABI_VFP_args].int_value());
11328 else if (in_attr[elfcpp::Tag_ABI_FP_number_model].int_value()
11329 != elfcpp::AEABI_FP_number_model_none
11330 && in_attr[elfcpp::Tag_ABI_VFP_args].int_value()
11331 != elfcpp::AEABI_VFP_args_compatible
11332 && parameters->options().warn_mismatch())
11333 gold_error(_("%s uses VFP register arguments, output does not"),
11334 name);
11337 for (int i = 4; i < Vendor_object_attributes::NUM_KNOWN_ATTRIBUTES; ++i)
11339 // Merge this attribute with existing attributes.
11340 switch (i)
11342 case elfcpp::Tag_CPU_raw_name:
11343 case elfcpp::Tag_CPU_name:
11344 // These are merged after Tag_CPU_arch.
11345 break;
11347 case elfcpp::Tag_ABI_optimization_goals:
11348 case elfcpp::Tag_ABI_FP_optimization_goals:
11349 // Use the first value seen.
11350 break;
11352 case elfcpp::Tag_CPU_arch:
11354 unsigned int saved_out_attr = out_attr->int_value();
11355 // Merge Tag_CPU_arch and Tag_also_compatible_with.
11356 int secondary_compat =
11357 this->get_secondary_compatible_arch(pasd);
11358 int secondary_compat_out =
11359 this->get_secondary_compatible_arch(
11360 this->attributes_section_data_);
11361 out_attr[i].set_int_value(
11362 tag_cpu_arch_combine(name, out_attr[i].int_value(),
11363 &secondary_compat_out,
11364 in_attr[i].int_value(),
11365 secondary_compat));
11366 this->set_secondary_compatible_arch(this->attributes_section_data_,
11367 secondary_compat_out);
11369 // Merge Tag_CPU_name and Tag_CPU_raw_name.
11370 if (out_attr[i].int_value() == saved_out_attr)
11371 ; // Leave the names alone.
11372 else if (out_attr[i].int_value() == in_attr[i].int_value())
11374 // The output architecture has been changed to match the
11375 // input architecture. Use the input names.
11376 out_attr[elfcpp::Tag_CPU_name].set_string_value(
11377 in_attr[elfcpp::Tag_CPU_name].string_value());
11378 out_attr[elfcpp::Tag_CPU_raw_name].set_string_value(
11379 in_attr[elfcpp::Tag_CPU_raw_name].string_value());
11381 else
11383 out_attr[elfcpp::Tag_CPU_name].set_string_value("");
11384 out_attr[elfcpp::Tag_CPU_raw_name].set_string_value("");
11387 // If we still don't have a value for Tag_CPU_name,
11388 // make one up now. Tag_CPU_raw_name remains blank.
11389 if (out_attr[elfcpp::Tag_CPU_name].string_value() == "")
11391 const std::string cpu_name =
11392 this->tag_cpu_name_value(out_attr[i].int_value());
11393 // FIXME: If we see an unknown CPU, this will be set
11394 // to "<unknown CPU n>", where n is the attribute value.
11395 // This is different from BFD, which leaves the name alone.
11396 out_attr[elfcpp::Tag_CPU_name].set_string_value(cpu_name);
11399 break;
11401 case elfcpp::Tag_ARM_ISA_use:
11402 case elfcpp::Tag_THUMB_ISA_use:
11403 case elfcpp::Tag_WMMX_arch:
11404 case elfcpp::Tag_Advanced_SIMD_arch:
11405 // ??? Do Advanced_SIMD (NEON) and WMMX conflict?
11406 case elfcpp::Tag_ABI_FP_rounding:
11407 case elfcpp::Tag_ABI_FP_exceptions:
11408 case elfcpp::Tag_ABI_FP_user_exceptions:
11409 case elfcpp::Tag_ABI_FP_number_model:
11410 case elfcpp::Tag_VFP_HP_extension:
11411 case elfcpp::Tag_CPU_unaligned_access:
11412 case elfcpp::Tag_T2EE_use:
11413 case elfcpp::Tag_Virtualization_use:
11414 case elfcpp::Tag_MPextension_use:
11415 // Use the largest value specified.
11416 if (in_attr[i].int_value() > out_attr[i].int_value())
11417 out_attr[i].set_int_value(in_attr[i].int_value());
11418 break;
11420 case elfcpp::Tag_ABI_align8_preserved:
11421 case elfcpp::Tag_ABI_PCS_RO_data:
11422 // Use the smallest value specified.
11423 if (in_attr[i].int_value() < out_attr[i].int_value())
11424 out_attr[i].set_int_value(in_attr[i].int_value());
11425 break;
11427 case elfcpp::Tag_ABI_align8_needed:
11428 if ((in_attr[i].int_value() > 0 || out_attr[i].int_value() > 0)
11429 && (in_attr[elfcpp::Tag_ABI_align8_preserved].int_value() == 0
11430 || (out_attr[elfcpp::Tag_ABI_align8_preserved].int_value()
11431 == 0)))
11433 // This error message should be enabled once all non-conforming
11434 // binaries in the toolchain have had the attributes set
11435 // properly.
11436 // gold_error(_("output 8-byte data alignment conflicts with %s"),
11437 // name);
11439 // Fall through.
11440 case elfcpp::Tag_ABI_FP_denormal:
11441 case elfcpp::Tag_ABI_PCS_GOT_use:
11443 // These tags have 0 = don't care, 1 = strong requirement,
11444 // 2 = weak requirement.
11445 static const int order_021[3] = {0, 2, 1};
11447 // Use the "greatest" from the sequence 0, 2, 1, or the largest
11448 // value if greater than 2 (for future-proofing).
11449 if ((in_attr[i].int_value() > 2
11450 && in_attr[i].int_value() > out_attr[i].int_value())
11451 || (in_attr[i].int_value() <= 2
11452 && out_attr[i].int_value() <= 2
11453 && (order_021[in_attr[i].int_value()]
11454 > order_021[out_attr[i].int_value()])))
11455 out_attr[i].set_int_value(in_attr[i].int_value());
11457 break;
11459 case elfcpp::Tag_CPU_arch_profile:
11460 if (out_attr[i].int_value() != in_attr[i].int_value())
11462 // 0 will merge with anything.
11463 // 'A' and 'S' merge to 'A'.
11464 // 'R' and 'S' merge to 'R'.
11465 // 'M' and 'A|R|S' is an error.
11466 if (out_attr[i].int_value() == 0
11467 || (out_attr[i].int_value() == 'S'
11468 && (in_attr[i].int_value() == 'A'
11469 || in_attr[i].int_value() == 'R')))
11470 out_attr[i].set_int_value(in_attr[i].int_value());
11471 else if (in_attr[i].int_value() == 0
11472 || (in_attr[i].int_value() == 'S'
11473 && (out_attr[i].int_value() == 'A'
11474 || out_attr[i].int_value() == 'R')))
11475 ; // Do nothing.
11476 else if (parameters->options().warn_mismatch())
11478 gold_error
11479 (_("conflicting architecture profiles %c/%c"),
11480 in_attr[i].int_value() ? in_attr[i].int_value() : '0',
11481 out_attr[i].int_value() ? out_attr[i].int_value() : '0');
11484 break;
11485 case elfcpp::Tag_VFP_arch:
11487 static const struct
11489 int ver;
11490 int regs;
11491 } vfp_versions[7] =
11493 {0, 0},
11494 {1, 16},
11495 {2, 16},
11496 {3, 32},
11497 {3, 16},
11498 {4, 32},
11499 {4, 16}
11502 // Values greater than 6 aren't defined, so just pick the
11503 // biggest.
11504 if (in_attr[i].int_value() > 6
11505 && in_attr[i].int_value() > out_attr[i].int_value())
11507 *out_attr = *in_attr;
11508 break;
11510 // The output uses the superset of input features
11511 // (ISA version) and registers.
11512 int ver = std::max(vfp_versions[in_attr[i].int_value()].ver,
11513 vfp_versions[out_attr[i].int_value()].ver);
11514 int regs = std::max(vfp_versions[in_attr[i].int_value()].regs,
11515 vfp_versions[out_attr[i].int_value()].regs);
11516 // This assumes all possible supersets are also a valid
11517 // options.
11518 int newval;
11519 for (newval = 6; newval > 0; newval--)
11521 if (regs == vfp_versions[newval].regs
11522 && ver == vfp_versions[newval].ver)
11523 break;
11525 out_attr[i].set_int_value(newval);
11527 break;
11528 case elfcpp::Tag_PCS_config:
11529 if (out_attr[i].int_value() == 0)
11530 out_attr[i].set_int_value(in_attr[i].int_value());
11531 else if (in_attr[i].int_value() != 0
11532 && out_attr[i].int_value() != 0
11533 && parameters->options().warn_mismatch())
11535 // It's sometimes ok to mix different configs, so this is only
11536 // a warning.
11537 gold_warning(_("%s: conflicting platform configuration"), name);
11539 break;
11540 case elfcpp::Tag_ABI_PCS_R9_use:
11541 if (in_attr[i].int_value() != out_attr[i].int_value()
11542 && out_attr[i].int_value() != elfcpp::AEABI_R9_unused
11543 && in_attr[i].int_value() != elfcpp::AEABI_R9_unused
11544 && parameters->options().warn_mismatch())
11546 gold_error(_("%s: conflicting use of R9"), name);
11548 if (out_attr[i].int_value() == elfcpp::AEABI_R9_unused)
11549 out_attr[i].set_int_value(in_attr[i].int_value());
11550 break;
11551 case elfcpp::Tag_ABI_PCS_RW_data:
11552 if (in_attr[i].int_value() == elfcpp::AEABI_PCS_RW_data_SBrel
11553 && (in_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value()
11554 != elfcpp::AEABI_R9_SB)
11555 && (out_attr[elfcpp::Tag_ABI_PCS_R9_use].int_value()
11556 != elfcpp::AEABI_R9_unused)
11557 && parameters->options().warn_mismatch())
11559 gold_error(_("%s: SB relative addressing conflicts with use "
11560 "of R9"),
11561 name);
11563 // Use the smallest value specified.
11564 if (in_attr[i].int_value() < out_attr[i].int_value())
11565 out_attr[i].set_int_value(in_attr[i].int_value());
11566 break;
11567 case elfcpp::Tag_ABI_PCS_wchar_t:
11568 if (out_attr[i].int_value()
11569 && in_attr[i].int_value()
11570 && out_attr[i].int_value() != in_attr[i].int_value()
11571 && parameters->options().warn_mismatch()
11572 && parameters->options().wchar_size_warning())
11574 gold_warning(_("%s uses %u-byte wchar_t yet the output is to "
11575 "use %u-byte wchar_t; use of wchar_t values "
11576 "across objects may fail"),
11577 name, in_attr[i].int_value(),
11578 out_attr[i].int_value());
11580 else if (in_attr[i].int_value() && !out_attr[i].int_value())
11581 out_attr[i].set_int_value(in_attr[i].int_value());
11582 break;
11583 case elfcpp::Tag_ABI_enum_size:
11584 if (in_attr[i].int_value() != elfcpp::AEABI_enum_unused)
11586 if (out_attr[i].int_value() == elfcpp::AEABI_enum_unused
11587 || out_attr[i].int_value() == elfcpp::AEABI_enum_forced_wide)
11589 // The existing object is compatible with anything.
11590 // Use whatever requirements the new object has.
11591 out_attr[i].set_int_value(in_attr[i].int_value());
11593 else if (in_attr[i].int_value() != elfcpp::AEABI_enum_forced_wide
11594 && out_attr[i].int_value() != in_attr[i].int_value()
11595 && parameters->options().warn_mismatch()
11596 && parameters->options().enum_size_warning())
11598 unsigned int in_value = in_attr[i].int_value();
11599 unsigned int out_value = out_attr[i].int_value();
11600 gold_warning(_("%s uses %s enums yet the output is to use "
11601 "%s enums; use of enum values across objects "
11602 "may fail"),
11603 name,
11604 this->aeabi_enum_name(in_value).c_str(),
11605 this->aeabi_enum_name(out_value).c_str());
11608 break;
11609 case elfcpp::Tag_ABI_VFP_args:
11610 // Already done.
11611 break;
11612 case elfcpp::Tag_ABI_WMMX_args:
11613 if (in_attr[i].int_value() != out_attr[i].int_value()
11614 && parameters->options().warn_mismatch())
11616 gold_error(_("%s uses iWMMXt register arguments, output does "
11617 "not"),
11618 name);
11620 break;
11621 case Object_attribute::Tag_compatibility:
11622 // Merged in target-independent code.
11623 break;
11624 case elfcpp::Tag_ABI_HardFP_use:
11625 // 1 (SP) and 2 (DP) conflict, so combine to 3 (SP & DP).
11626 if ((in_attr[i].int_value() == 1 && out_attr[i].int_value() == 2)
11627 || (in_attr[i].int_value() == 2 && out_attr[i].int_value() == 1))
11628 out_attr[i].set_int_value(3);
11629 else if (in_attr[i].int_value() > out_attr[i].int_value())
11630 out_attr[i].set_int_value(in_attr[i].int_value());
11631 break;
11632 case elfcpp::Tag_ABI_FP_16bit_format:
11633 if (in_attr[i].int_value() != 0 && out_attr[i].int_value() != 0)
11635 if (in_attr[i].int_value() != out_attr[i].int_value()
11636 && parameters->options().warn_mismatch())
11637 gold_error(_("fp16 format mismatch between %s and output"),
11638 name);
11640 if (in_attr[i].int_value() != 0)
11641 out_attr[i].set_int_value(in_attr[i].int_value());
11642 break;
11644 case elfcpp::Tag_DIV_use:
11646 // A value of zero on input means that the divide
11647 // instruction may be used if available in the base
11648 // architecture as specified via Tag_CPU_arch and
11649 // Tag_CPU_arch_profile. A value of 1 means that the user
11650 // did not want divide instructions. A value of 2
11651 // explicitly means that divide instructions were allowed
11652 // in ARM and Thumb state.
11653 int arch = this->
11654 get_aeabi_object_attribute(elfcpp::Tag_CPU_arch)->
11655 int_value();
11656 int profile = this->
11657 get_aeabi_object_attribute(elfcpp::Tag_CPU_arch_profile)->
11658 int_value();
11659 if (in_attr[i].int_value() == out_attr[i].int_value())
11661 // Do nothing.
11663 else if (attributes_forbid_div(&in_attr[i])
11664 && !attributes_accept_div(arch, profile, &out_attr[i]))
11665 out_attr[i].set_int_value(1);
11666 else if (attributes_forbid_div(&out_attr[i])
11667 && attributes_accept_div(arch, profile, &in_attr[i]))
11668 out_attr[i].set_int_value(in_attr[i].int_value());
11669 else if (in_attr[i].int_value() == 2)
11670 out_attr[i].set_int_value(in_attr[i].int_value());
11672 break;
11674 case elfcpp::Tag_MPextension_use_legacy:
11675 // We don't output objects with Tag_MPextension_use_legacy - we
11676 // move the value to Tag_MPextension_use.
11677 if (in_attr[i].int_value() != 0
11678 && in_attr[elfcpp::Tag_MPextension_use].int_value() != 0)
11680 if (in_attr[elfcpp::Tag_MPextension_use].int_value()
11681 != in_attr[i].int_value())
11683 gold_error(_("%s has both the current and legacy "
11684 "Tag_MPextension_use attributes"),
11685 name);
11689 if (in_attr[i].int_value()
11690 > out_attr[elfcpp::Tag_MPextension_use].int_value())
11691 out_attr[elfcpp::Tag_MPextension_use] = in_attr[i];
11693 break;
11695 case elfcpp::Tag_nodefaults:
11696 // This tag is set if it exists, but the value is unused (and is
11697 // typically zero). We don't actually need to do anything here -
11698 // the merge happens automatically when the type flags are merged
11699 // below.
11700 break;
11701 case elfcpp::Tag_also_compatible_with:
11702 // Already done in Tag_CPU_arch.
11703 break;
11704 case elfcpp::Tag_conformance:
11705 // Keep the attribute if it matches. Throw it away otherwise.
11706 // No attribute means no claim to conform.
11707 if (in_attr[i].string_value() != out_attr[i].string_value())
11708 out_attr[i].set_string_value("");
11709 break;
11711 default:
11713 const char* err_object = NULL;
11715 // The "known_obj_attributes" table does contain some undefined
11716 // attributes. Ensure that there are unused.
11717 if (out_attr[i].int_value() != 0
11718 || out_attr[i].string_value() != "")
11719 err_object = "output";
11720 else if (in_attr[i].int_value() != 0
11721 || in_attr[i].string_value() != "")
11722 err_object = name;
11724 if (err_object != NULL
11725 && parameters->options().warn_mismatch())
11727 // Attribute numbers >=64 (mod 128) can be safely ignored.
11728 if ((i & 127) < 64)
11729 gold_error(_("%s: unknown mandatory EABI object attribute "
11730 "%d"),
11731 err_object, i);
11732 else
11733 gold_warning(_("%s: unknown EABI object attribute %d"),
11734 err_object, i);
11737 // Only pass on attributes that match in both inputs.
11738 if (!in_attr[i].matches(out_attr[i]))
11740 out_attr[i].set_int_value(0);
11741 out_attr[i].set_string_value("");
11746 // If out_attr was copied from in_attr then it won't have a type yet.
11747 if (in_attr[i].type() && !out_attr[i].type())
11748 out_attr[i].set_type(in_attr[i].type());
11751 // Merge Tag_compatibility attributes and any common GNU ones.
11752 this->attributes_section_data_->merge(name, pasd);
11754 // Check for any attributes not known on ARM.
11755 typedef Vendor_object_attributes::Other_attributes Other_attributes;
11756 const Other_attributes* in_other_attributes = pasd->other_attributes(vendor);
11757 Other_attributes::const_iterator in_iter = in_other_attributes->begin();
11758 Other_attributes* out_other_attributes =
11759 this->attributes_section_data_->other_attributes(vendor);
11760 Other_attributes::iterator out_iter = out_other_attributes->begin();
11762 while (in_iter != in_other_attributes->end()
11763 || out_iter != out_other_attributes->end())
11765 const char* err_object = NULL;
11766 int err_tag = 0;
11768 // The tags for each list are in numerical order.
11769 // If the tags are equal, then merge.
11770 if (out_iter != out_other_attributes->end()
11771 && (in_iter == in_other_attributes->end()
11772 || in_iter->first > out_iter->first))
11774 // This attribute only exists in output. We can't merge, and we
11775 // don't know what the tag means, so delete it.
11776 err_object = "output";
11777 err_tag = out_iter->first;
11778 int saved_tag = out_iter->first;
11779 delete out_iter->second;
11780 out_other_attributes->erase(out_iter);
11781 out_iter = out_other_attributes->upper_bound(saved_tag);
11783 else if (in_iter != in_other_attributes->end()
11784 && (out_iter != out_other_attributes->end()
11785 || in_iter->first < out_iter->first))
11787 // This attribute only exists in input. We can't merge, and we
11788 // don't know what the tag means, so ignore it.
11789 err_object = name;
11790 err_tag = in_iter->first;
11791 ++in_iter;
11793 else // The tags are equal.
11795 // As present, all attributes in the list are unknown, and
11796 // therefore can't be merged meaningfully.
11797 err_object = "output";
11798 err_tag = out_iter->first;
11800 // Only pass on attributes that match in both inputs.
11801 if (!in_iter->second->matches(*(out_iter->second)))
11803 // No match. Delete the attribute.
11804 int saved_tag = out_iter->first;
11805 delete out_iter->second;
11806 out_other_attributes->erase(out_iter);
11807 out_iter = out_other_attributes->upper_bound(saved_tag);
11809 else
11811 // Matched. Keep the attribute and move to the next.
11812 ++out_iter;
11813 ++in_iter;
11817 if (err_object && parameters->options().warn_mismatch())
11819 // Attribute numbers >=64 (mod 128) can be safely ignored. */
11820 if ((err_tag & 127) < 64)
11822 gold_error(_("%s: unknown mandatory EABI object attribute %d"),
11823 err_object, err_tag);
11825 else
11827 gold_warning(_("%s: unknown EABI object attribute %d"),
11828 err_object, err_tag);
11834 // Stub-generation methods for Target_arm.
11836 // Make a new Arm_input_section object.
11838 template<bool big_endian>
11839 Arm_input_section<big_endian>*
11840 Target_arm<big_endian>::new_arm_input_section(
11841 Relobj* relobj,
11842 unsigned int shndx)
11844 Section_id sid(relobj, shndx);
11846 Arm_input_section<big_endian>* arm_input_section =
11847 new Arm_input_section<big_endian>(relobj, shndx);
11848 arm_input_section->init();
11850 // Register new Arm_input_section in map for look-up.
11851 std::pair<typename Arm_input_section_map::iterator, bool> ins =
11852 this->arm_input_section_map_.insert(std::make_pair(sid, arm_input_section));
11854 // Make sure that it we have not created another Arm_input_section
11855 // for this input section already.
11856 gold_assert(ins.second);
11858 return arm_input_section;
11861 // Find the Arm_input_section object corresponding to the SHNDX-th input
11862 // section of RELOBJ.
11864 template<bool big_endian>
11865 Arm_input_section<big_endian>*
11866 Target_arm<big_endian>::find_arm_input_section(
11867 Relobj* relobj,
11868 unsigned int shndx) const
11870 Section_id sid(relobj, shndx);
11871 typename Arm_input_section_map::const_iterator p =
11872 this->arm_input_section_map_.find(sid);
11873 return (p != this->arm_input_section_map_.end()) ? p->second : NULL;
11876 // Make a new stub table.
11878 template<bool big_endian>
11879 Stub_table<big_endian>*
11880 Target_arm<big_endian>::new_stub_table(Arm_input_section<big_endian>* owner)
11882 Stub_table<big_endian>* stub_table =
11883 new Stub_table<big_endian>(owner);
11884 this->stub_tables_.push_back(stub_table);
11886 stub_table->set_address(owner->address() + owner->data_size());
11887 stub_table->set_file_offset(owner->offset() + owner->data_size());
11888 stub_table->finalize_data_size();
11890 return stub_table;
11893 // Scan a relocation for stub generation.
11895 template<bool big_endian>
11896 void
11897 Target_arm<big_endian>::scan_reloc_for_stub(
11898 const Relocate_info<32, big_endian>* relinfo,
11899 unsigned int r_type,
11900 const Sized_symbol<32>* gsym,
11901 unsigned int r_sym,
11902 const Symbol_value<32>* psymval,
11903 elfcpp::Elf_types<32>::Elf_Swxword addend,
11904 Arm_address address)
11906 const Arm_relobj<big_endian>* arm_relobj =
11907 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
11909 bool target_is_thumb;
11910 Symbol_value<32> symval;
11911 if (gsym != NULL)
11913 // This is a global symbol. Determine if we use PLT and if the
11914 // final target is THUMB.
11915 if (gsym->use_plt_offset(Scan::get_reference_flags(r_type)))
11917 // This uses a PLT, change the symbol value.
11918 symval.set_output_value(this->plt_address_for_global(gsym));
11919 psymval = &symval;
11920 target_is_thumb = false;
11922 else if (gsym->is_undefined())
11923 // There is no need to generate a stub symbol is undefined.
11924 return;
11925 else
11927 target_is_thumb =
11928 ((gsym->type() == elfcpp::STT_ARM_TFUNC)
11929 || (gsym->type() == elfcpp::STT_FUNC
11930 && !gsym->is_undefined()
11931 && ((psymval->value(arm_relobj, 0) & 1) != 0)));
11934 else
11936 // This is a local symbol. Determine if the final target is THUMB.
11937 target_is_thumb = arm_relobj->local_symbol_is_thumb_function(r_sym);
11940 // Strip LSB if this points to a THUMB target.
11941 const Arm_reloc_property* reloc_property =
11942 arm_reloc_property_table->get_implemented_static_reloc_property(r_type);
11943 gold_assert(reloc_property != NULL);
11944 if (target_is_thumb
11945 && reloc_property->uses_thumb_bit()
11946 && ((psymval->value(arm_relobj, 0) & 1) != 0))
11948 Arm_address stripped_value =
11949 psymval->value(arm_relobj, 0) & ~static_cast<Arm_address>(1);
11950 symval.set_output_value(stripped_value);
11951 psymval = &symval;
11954 // Get the symbol value.
11955 Symbol_value<32>::Value value = psymval->value(arm_relobj, 0);
11957 // Owing to pipelining, the PC relative branches below actually skip
11958 // two instructions when the branch offset is 0.
11959 Arm_address destination;
11960 switch (r_type)
11962 case elfcpp::R_ARM_CALL:
11963 case elfcpp::R_ARM_JUMP24:
11964 case elfcpp::R_ARM_PLT32:
11965 // ARM branches.
11966 destination = value + addend + 8;
11967 break;
11968 case elfcpp::R_ARM_THM_CALL:
11969 case elfcpp::R_ARM_THM_XPC22:
11970 case elfcpp::R_ARM_THM_JUMP24:
11971 case elfcpp::R_ARM_THM_JUMP19:
11972 // THUMB branches.
11973 destination = value + addend + 4;
11974 break;
11975 default:
11976 gold_unreachable();
11979 Reloc_stub* stub = NULL;
11980 Stub_type stub_type =
11981 Reloc_stub::stub_type_for_reloc(r_type, address, destination,
11982 target_is_thumb);
11983 if (stub_type != arm_stub_none)
11985 // Try looking up an existing stub from a stub table.
11986 Stub_table<big_endian>* stub_table =
11987 arm_relobj->stub_table(relinfo->data_shndx);
11988 gold_assert(stub_table != NULL);
11990 // Locate stub by destination.
11991 Reloc_stub::Key stub_key(stub_type, gsym, arm_relobj, r_sym, addend);
11993 // Create a stub if there is not one already
11994 stub = stub_table->find_reloc_stub(stub_key);
11995 if (stub == NULL)
11997 // create a new stub and add it to stub table.
11998 stub = this->stub_factory().make_reloc_stub(stub_type);
11999 stub_table->add_reloc_stub(stub, stub_key);
12002 // Record the destination address.
12003 stub->set_destination_address(destination
12004 | (target_is_thumb ? 1 : 0));
12007 // For Cortex-A8, we need to record a relocation at 4K page boundary.
12008 if (this->fix_cortex_a8_
12009 && (r_type == elfcpp::R_ARM_THM_JUMP24
12010 || r_type == elfcpp::R_ARM_THM_JUMP19
12011 || r_type == elfcpp::R_ARM_THM_CALL
12012 || r_type == elfcpp::R_ARM_THM_XPC22)
12013 && (address & 0xfffU) == 0xffeU)
12015 // Found a candidate. Note we haven't checked the destination is
12016 // within 4K here: if we do so (and don't create a record) we can't
12017 // tell that a branch should have been relocated when scanning later.
12018 this->cortex_a8_relocs_info_[address] =
12019 new Cortex_a8_reloc(stub, r_type,
12020 destination | (target_is_thumb ? 1 : 0));
12024 // This function scans a relocation sections for stub generation.
12025 // The template parameter Relocate must be a class type which provides
12026 // a single function, relocate(), which implements the machine
12027 // specific part of a relocation.
12029 // BIG_ENDIAN is the endianness of the data. SH_TYPE is the section type:
12030 // SHT_REL or SHT_RELA.
12032 // PRELOCS points to the relocation data. RELOC_COUNT is the number
12033 // of relocs. OUTPUT_SECTION is the output section.
12034 // NEEDS_SPECIAL_OFFSET_HANDLING is true if input offsets need to be
12035 // mapped to output offsets.
12037 // VIEW is the section data, VIEW_ADDRESS is its memory address, and
12038 // VIEW_SIZE is the size. These refer to the input section, unless
12039 // NEEDS_SPECIAL_OFFSET_HANDLING is true, in which case they refer to
12040 // the output section.
12042 template<bool big_endian>
12043 template<int sh_type>
12044 void inline
12045 Target_arm<big_endian>::scan_reloc_section_for_stubs(
12046 const Relocate_info<32, big_endian>* relinfo,
12047 const unsigned char* prelocs,
12048 size_t reloc_count,
12049 Output_section* output_section,
12050 bool needs_special_offset_handling,
12051 const unsigned char* view,
12052 elfcpp::Elf_types<32>::Elf_Addr view_address,
12053 section_size_type)
12055 typedef typename Reloc_types<sh_type, 32, big_endian>::Reloc Reltype;
12056 const int reloc_size =
12057 Reloc_types<sh_type, 32, big_endian>::reloc_size;
12059 Arm_relobj<big_endian>* arm_object =
12060 Arm_relobj<big_endian>::as_arm_relobj(relinfo->object);
12061 unsigned int local_count = arm_object->local_symbol_count();
12063 gold::Default_comdat_behavior default_comdat_behavior;
12064 Comdat_behavior comdat_behavior = CB_UNDETERMINED;
12066 for (size_t i = 0; i < reloc_count; ++i, prelocs += reloc_size)
12068 Reltype reloc(prelocs);
12070 typename elfcpp::Elf_types<32>::Elf_WXword r_info = reloc.get_r_info();
12071 unsigned int r_sym = elfcpp::elf_r_sym<32>(r_info);
12072 unsigned int r_type = elfcpp::elf_r_type<32>(r_info);
12074 r_type = this->get_real_reloc_type(r_type);
12076 // Only a few relocation types need stubs.
12077 if ((r_type != elfcpp::R_ARM_CALL)
12078 && (r_type != elfcpp::R_ARM_JUMP24)
12079 && (r_type != elfcpp::R_ARM_PLT32)
12080 && (r_type != elfcpp::R_ARM_THM_CALL)
12081 && (r_type != elfcpp::R_ARM_THM_XPC22)
12082 && (r_type != elfcpp::R_ARM_THM_JUMP24)
12083 && (r_type != elfcpp::R_ARM_THM_JUMP19)
12084 && (r_type != elfcpp::R_ARM_V4BX))
12085 continue;
12087 section_offset_type offset =
12088 convert_to_section_size_type(reloc.get_r_offset());
12090 if (needs_special_offset_handling)
12092 offset = output_section->output_offset(relinfo->object,
12093 relinfo->data_shndx,
12094 offset);
12095 if (offset == -1)
12096 continue;
12099 // Create a v4bx stub if --fix-v4bx-interworking is used.
12100 if (r_type == elfcpp::R_ARM_V4BX)
12102 if (this->fix_v4bx() == General_options::FIX_V4BX_INTERWORKING)
12104 // Get the BX instruction.
12105 typedef typename elfcpp::Swap<32, big_endian>::Valtype Valtype;
12106 const Valtype* wv =
12107 reinterpret_cast<const Valtype*>(view + offset);
12108 elfcpp::Elf_types<32>::Elf_Swxword insn =
12109 elfcpp::Swap<32, big_endian>::readval(wv);
12110 const uint32_t reg = (insn & 0xf);
12112 if (reg < 0xf)
12114 // Try looking up an existing stub from a stub table.
12115 Stub_table<big_endian>* stub_table =
12116 arm_object->stub_table(relinfo->data_shndx);
12117 gold_assert(stub_table != NULL);
12119 if (stub_table->find_arm_v4bx_stub(reg) == NULL)
12121 // create a new stub and add it to stub table.
12122 Arm_v4bx_stub* stub =
12123 this->stub_factory().make_arm_v4bx_stub(reg);
12124 gold_assert(stub != NULL);
12125 stub_table->add_arm_v4bx_stub(stub);
12129 continue;
12132 // Get the addend.
12133 Stub_addend_reader<sh_type, big_endian> stub_addend_reader;
12134 elfcpp::Elf_types<32>::Elf_Swxword addend =
12135 stub_addend_reader(r_type, view + offset, reloc);
12137 const Sized_symbol<32>* sym;
12139 Symbol_value<32> symval;
12140 const Symbol_value<32> *psymval;
12141 bool is_defined_in_discarded_section;
12142 unsigned int shndx;
12143 const Symbol* gsym = NULL;
12144 if (r_sym < local_count)
12146 sym = NULL;
12147 psymval = arm_object->local_symbol(r_sym);
12149 // If the local symbol belongs to a section we are discarding,
12150 // and that section is a debug section, try to find the
12151 // corresponding kept section and map this symbol to its
12152 // counterpart in the kept section. The symbol must not
12153 // correspond to a section we are folding.
12154 bool is_ordinary;
12155 shndx = psymval->input_shndx(&is_ordinary);
12156 is_defined_in_discarded_section =
12157 (is_ordinary
12158 && shndx != elfcpp::SHN_UNDEF
12159 && !arm_object->is_section_included(shndx)
12160 && !relinfo->symtab->is_section_folded(arm_object, shndx));
12162 // We need to compute the would-be final value of this local
12163 // symbol.
12164 if (!is_defined_in_discarded_section)
12166 typedef Sized_relobj_file<32, big_endian> ObjType;
12167 if (psymval->is_section_symbol())
12168 symval.set_is_section_symbol();
12169 typename ObjType::Compute_final_local_value_status status =
12170 arm_object->compute_final_local_value(r_sym, psymval, &symval,
12171 relinfo->symtab);
12172 if (status == ObjType::CFLV_OK)
12174 // Currently we cannot handle a branch to a target in
12175 // a merged section. If this is the case, issue an error
12176 // and also free the merge symbol value.
12177 if (!symval.has_output_value())
12179 const std::string& section_name =
12180 arm_object->section_name(shndx);
12181 arm_object->error(_("cannot handle branch to local %u "
12182 "in a merged section %s"),
12183 r_sym, section_name.c_str());
12185 psymval = &symval;
12187 else
12189 // We cannot determine the final value.
12190 continue;
12194 else
12196 gsym = arm_object->global_symbol(r_sym);
12197 gold_assert(gsym != NULL);
12198 if (gsym->is_forwarder())
12199 gsym = relinfo->symtab->resolve_forwards(gsym);
12201 sym = static_cast<const Sized_symbol<32>*>(gsym);
12202 if (sym->has_symtab_index() && sym->symtab_index() != -1U)
12203 symval.set_output_symtab_index(sym->symtab_index());
12204 else
12205 symval.set_no_output_symtab_entry();
12207 // We need to compute the would-be final value of this global
12208 // symbol.
12209 const Symbol_table* symtab = relinfo->symtab;
12210 const Sized_symbol<32>* sized_symbol =
12211 symtab->get_sized_symbol<32>(gsym);
12212 Symbol_table::Compute_final_value_status status;
12213 Arm_address value =
12214 symtab->compute_final_value<32>(sized_symbol, &status);
12216 // Skip this if the symbol has not output section.
12217 if (status == Symbol_table::CFVS_NO_OUTPUT_SECTION)
12218 continue;
12219 symval.set_output_value(value);
12221 if (gsym->type() == elfcpp::STT_TLS)
12222 symval.set_is_tls_symbol();
12223 else if (gsym->type() == elfcpp::STT_GNU_IFUNC)
12224 symval.set_is_ifunc_symbol();
12225 psymval = &symval;
12227 is_defined_in_discarded_section =
12228 (gsym->is_defined_in_discarded_section()
12229 && gsym->is_undefined());
12230 shndx = 0;
12233 Symbol_value<32> symval2;
12234 if (is_defined_in_discarded_section)
12236 std::string name = arm_object->section_name(relinfo->data_shndx);
12238 if (comdat_behavior == CB_UNDETERMINED)
12239 comdat_behavior = default_comdat_behavior.get(name.c_str());
12241 if (comdat_behavior == CB_PRETEND)
12243 // FIXME: This case does not work for global symbols.
12244 // We have no place to store the original section index.
12245 // Fortunately this does not matter for comdat sections,
12246 // only for sections explicitly discarded by a linker
12247 // script.
12248 bool found;
12249 typename elfcpp::Elf_types<32>::Elf_Addr value =
12250 arm_object->map_to_kept_section(shndx, name, &found);
12251 if (found)
12252 symval2.set_output_value(value + psymval->input_value());
12253 else
12254 symval2.set_output_value(0);
12256 else
12258 if (comdat_behavior == CB_ERROR)
12259 issue_discarded_error(relinfo, i, offset, r_sym, gsym);
12260 symval2.set_output_value(0);
12262 symval2.set_no_output_symtab_entry();
12263 psymval = &symval2;
12266 // If symbol is a section symbol, we don't know the actual type of
12267 // destination. Give up.
12268 if (psymval->is_section_symbol())
12269 continue;
12271 this->scan_reloc_for_stub(relinfo, r_type, sym, r_sym, psymval,
12272 addend, view_address + offset);
12276 // Scan an input section for stub generation.
12278 template<bool big_endian>
12279 void
12280 Target_arm<big_endian>::scan_section_for_stubs(
12281 const Relocate_info<32, big_endian>* relinfo,
12282 unsigned int sh_type,
12283 const unsigned char* prelocs,
12284 size_t reloc_count,
12285 Output_section* output_section,
12286 bool needs_special_offset_handling,
12287 const unsigned char* view,
12288 Arm_address view_address,
12289 section_size_type view_size)
12291 if (sh_type == elfcpp::SHT_REL)
12292 this->scan_reloc_section_for_stubs<elfcpp::SHT_REL>(
12293 relinfo,
12294 prelocs,
12295 reloc_count,
12296 output_section,
12297 needs_special_offset_handling,
12298 view,
12299 view_address,
12300 view_size);
12301 else if (sh_type == elfcpp::SHT_RELA)
12302 // We do not support RELA type relocations yet. This is provided for
12303 // completeness.
12304 this->scan_reloc_section_for_stubs<elfcpp::SHT_RELA>(
12305 relinfo,
12306 prelocs,
12307 reloc_count,
12308 output_section,
12309 needs_special_offset_handling,
12310 view,
12311 view_address,
12312 view_size);
12313 else
12314 gold_unreachable();
12317 // Group input sections for stub generation.
12319 // We group input sections in an output section so that the total size,
12320 // including any padding space due to alignment is smaller than GROUP_SIZE
12321 // unless the only input section in group is bigger than GROUP_SIZE already.
12322 // Then an ARM stub table is created to follow the last input section
12323 // in group. For each group an ARM stub table is created an is placed
12324 // after the last group. If STUB_ALWAYS_AFTER_BRANCH is false, we further
12325 // extend the group after the stub table.
12327 template<bool big_endian>
12328 void
12329 Target_arm<big_endian>::group_sections(
12330 Layout* layout,
12331 section_size_type group_size,
12332 bool stubs_always_after_branch,
12333 const Task* task)
12335 // Group input sections and insert stub table
12336 Layout::Section_list section_list;
12337 layout->get_executable_sections(&section_list);
12338 for (Layout::Section_list::const_iterator p = section_list.begin();
12339 p != section_list.end();
12340 ++p)
12342 Arm_output_section<big_endian>* output_section =
12343 Arm_output_section<big_endian>::as_arm_output_section(*p);
12344 output_section->group_sections(group_size, stubs_always_after_branch,
12345 this, task);
12349 // Relaxation hook. This is where we do stub generation.
12351 template<bool big_endian>
12352 bool
12353 Target_arm<big_endian>::do_relax(
12354 int pass,
12355 const Input_objects* input_objects,
12356 Symbol_table* symtab,
12357 Layout* layout,
12358 const Task* task)
12360 // No need to generate stubs if this is a relocatable link.
12361 gold_assert(!parameters->options().relocatable());
12363 // If this is the first pass, we need to group input sections into
12364 // stub groups.
12365 bool done_exidx_fixup = false;
12366 typedef typename Stub_table_list::iterator Stub_table_iterator;
12367 if (pass == 1)
12369 // Determine the stub group size. The group size is the absolute
12370 // value of the parameter --stub-group-size. If --stub-group-size
12371 // is passed a negative value, we restrict stubs to be always after
12372 // the stubbed branches.
12373 int32_t stub_group_size_param =
12374 parameters->options().stub_group_size();
12375 bool stubs_always_after_branch = stub_group_size_param < 0;
12376 section_size_type stub_group_size = abs(stub_group_size_param);
12378 if (stub_group_size == 1)
12380 // Default value.
12381 // Thumb branch range is +-4MB has to be used as the default
12382 // maximum size (a given section can contain both ARM and Thumb
12383 // code, so the worst case has to be taken into account). If we are
12384 // fixing cortex-a8 errata, the branch range has to be even smaller,
12385 // since wide conditional branch has a range of +-1MB only.
12387 // This value is 48K less than that, which allows for 4096
12388 // 12-byte stubs. If we exceed that, then we will fail to link.
12389 // The user will have to relink with an explicit group size
12390 // option.
12391 stub_group_size = 4145152;
12394 // The Cortex-A8 erratum fix depends on stubs not being in the same 4K
12395 // page as the first half of a 32-bit branch straddling two 4K pages.
12396 // This is a crude way of enforcing that. In addition, long conditional
12397 // branches of THUMB-2 have a range of +-1M. If we are fixing cortex-A8
12398 // erratum, limit the group size to (1M - 12k) to avoid unreachable
12399 // cortex-A8 stubs from long conditional branches.
12400 if (this->fix_cortex_a8_)
12402 stubs_always_after_branch = true;
12403 const section_size_type cortex_a8_group_size = 1024 * (1024 - 12);
12404 stub_group_size = std::max(stub_group_size, cortex_a8_group_size);
12407 group_sections(layout, stub_group_size, stubs_always_after_branch, task);
12409 // Also fix .ARM.exidx section coverage.
12410 Arm_output_section<big_endian>* exidx_output_section = NULL;
12411 for (Layout::Section_list::const_iterator p =
12412 layout->section_list().begin();
12413 p != layout->section_list().end();
12414 ++p)
12415 if ((*p)->type() == elfcpp::SHT_ARM_EXIDX)
12417 if (exidx_output_section == NULL)
12418 exidx_output_section =
12419 Arm_output_section<big_endian>::as_arm_output_section(*p);
12420 else
12421 // We cannot handle this now.
12422 gold_error(_("multiple SHT_ARM_EXIDX sections %s and %s in a "
12423 "non-relocatable link"),
12424 exidx_output_section->name(),
12425 (*p)->name());
12428 if (exidx_output_section != NULL)
12430 this->fix_exidx_coverage(layout, input_objects, exidx_output_section,
12431 symtab, task);
12432 done_exidx_fixup = true;
12435 else
12437 // If this is not the first pass, addresses and file offsets have
12438 // been reset at this point, set them here.
12439 for (Stub_table_iterator sp = this->stub_tables_.begin();
12440 sp != this->stub_tables_.end();
12441 ++sp)
12443 Arm_input_section<big_endian>* owner = (*sp)->owner();
12444 off_t off = align_address(owner->original_size(),
12445 (*sp)->addralign());
12446 (*sp)->set_address_and_file_offset(owner->address() + off,
12447 owner->offset() + off);
12451 // The Cortex-A8 stubs are sensitive to layout of code sections. At the
12452 // beginning of each relaxation pass, just blow away all the stubs.
12453 // Alternatively, we could selectively remove only the stubs and reloc
12454 // information for code sections that have moved since the last pass.
12455 // That would require more book-keeping.
12456 if (this->fix_cortex_a8_)
12458 // Clear all Cortex-A8 reloc information.
12459 for (typename Cortex_a8_relocs_info::const_iterator p =
12460 this->cortex_a8_relocs_info_.begin();
12461 p != this->cortex_a8_relocs_info_.end();
12462 ++p)
12463 delete p->second;
12464 this->cortex_a8_relocs_info_.clear();
12466 // Remove all Cortex-A8 stubs.
12467 for (Stub_table_iterator sp = this->stub_tables_.begin();
12468 sp != this->stub_tables_.end();
12469 ++sp)
12470 (*sp)->remove_all_cortex_a8_stubs();
12473 // Scan relocs for relocation stubs
12474 for (Input_objects::Relobj_iterator op = input_objects->relobj_begin();
12475 op != input_objects->relobj_end();
12476 ++op)
12478 Arm_relobj<big_endian>* arm_relobj =
12479 Arm_relobj<big_endian>::as_arm_relobj(*op);
12480 // Lock the object so we can read from it. This is only called
12481 // single-threaded from Layout::finalize, so it is OK to lock.
12482 Task_lock_obj<Object> tl(task, arm_relobj);
12483 arm_relobj->scan_sections_for_stubs(this, symtab, layout);
12486 // Check all stub tables to see if any of them have their data sizes
12487 // or addresses alignments changed. These are the only things that
12488 // matter.
12489 bool any_stub_table_changed = false;
12490 Unordered_set<const Output_section*> sections_needing_adjustment;
12491 for (Stub_table_iterator sp = this->stub_tables_.begin();
12492 (sp != this->stub_tables_.end()) && !any_stub_table_changed;
12493 ++sp)
12495 if ((*sp)->update_data_size_and_addralign())
12497 // Update data size of stub table owner.
12498 Arm_input_section<big_endian>* owner = (*sp)->owner();
12499 uint64_t address = owner->address();
12500 off_t offset = owner->offset();
12501 owner->reset_address_and_file_offset();
12502 owner->set_address_and_file_offset(address, offset);
12504 sections_needing_adjustment.insert(owner->output_section());
12505 any_stub_table_changed = true;
12509 // Output_section_data::output_section() returns a const pointer but we
12510 // need to update output sections, so we record all output sections needing
12511 // update above and scan the sections here to find out what sections need
12512 // to be updated.
12513 for (Layout::Section_list::const_iterator p = layout->section_list().begin();
12514 p != layout->section_list().end();
12515 ++p)
12517 if (sections_needing_adjustment.find(*p)
12518 != sections_needing_adjustment.end())
12519 (*p)->set_section_offsets_need_adjustment();
12522 // Stop relaxation if no EXIDX fix-up and no stub table change.
12523 bool continue_relaxation = done_exidx_fixup || any_stub_table_changed;
12525 // Finalize the stubs in the last relaxation pass.
12526 if (!continue_relaxation)
12528 for (Stub_table_iterator sp = this->stub_tables_.begin();
12529 (sp != this->stub_tables_.end()) && !any_stub_table_changed;
12530 ++sp)
12531 (*sp)->finalize_stubs();
12533 // Update output local symbol counts of objects if necessary.
12534 for (Input_objects::Relobj_iterator op = input_objects->relobj_begin();
12535 op != input_objects->relobj_end();
12536 ++op)
12538 Arm_relobj<big_endian>* arm_relobj =
12539 Arm_relobj<big_endian>::as_arm_relobj(*op);
12541 // Update output local symbol counts. We need to discard local
12542 // symbols defined in parts of input sections that are discarded by
12543 // relaxation.
12544 if (arm_relobj->output_local_symbol_count_needs_update())
12546 // We need to lock the object's file to update it.
12547 Task_lock_obj<Object> tl(task, arm_relobj);
12548 arm_relobj->update_output_local_symbol_count();
12553 return continue_relaxation;
12556 // Relocate a stub.
12558 template<bool big_endian>
12559 void
12560 Target_arm<big_endian>::relocate_stub(
12561 Stub* stub,
12562 const Relocate_info<32, big_endian>* relinfo,
12563 Output_section* output_section,
12564 unsigned char* view,
12565 Arm_address address,
12566 section_size_type view_size)
12568 Relocate relocate;
12569 const Stub_template* stub_template = stub->stub_template();
12570 for (size_t i = 0; i < stub_template->reloc_count(); i++)
12572 size_t reloc_insn_index = stub_template->reloc_insn_index(i);
12573 const Insn_template* insn = &stub_template->insns()[reloc_insn_index];
12575 unsigned int r_type = insn->r_type();
12576 section_size_type reloc_offset = stub_template->reloc_offset(i);
12577 section_size_type reloc_size = insn->size();
12578 gold_assert(reloc_offset + reloc_size <= view_size);
12580 // This is the address of the stub destination.
12581 Arm_address target = stub->reloc_target(i) + insn->reloc_addend();
12582 Symbol_value<32> symval;
12583 symval.set_output_value(target);
12585 // Synthesize a fake reloc just in case. We don't have a symbol so
12586 // we use 0.
12587 unsigned char reloc_buffer[elfcpp::Elf_sizes<32>::rel_size];
12588 memset(reloc_buffer, 0, sizeof(reloc_buffer));
12589 elfcpp::Rel_write<32, big_endian> reloc_write(reloc_buffer);
12590 reloc_write.put_r_offset(reloc_offset);
12591 reloc_write.put_r_info(elfcpp::elf_r_info<32>(0, r_type));
12593 relocate.relocate(relinfo, elfcpp::SHT_REL, this, output_section,
12594 this->fake_relnum_for_stubs, reloc_buffer,
12595 NULL, &symval, view + reloc_offset,
12596 address + reloc_offset, reloc_size);
12600 // Determine whether an object attribute tag takes an integer, a
12601 // string or both.
12603 template<bool big_endian>
12605 Target_arm<big_endian>::do_attribute_arg_type(int tag) const
12607 if (tag == Object_attribute::Tag_compatibility)
12608 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
12609 | Object_attribute::ATTR_TYPE_FLAG_STR_VAL);
12610 else if (tag == elfcpp::Tag_nodefaults)
12611 return (Object_attribute::ATTR_TYPE_FLAG_INT_VAL
12612 | Object_attribute::ATTR_TYPE_FLAG_NO_DEFAULT);
12613 else if (tag == elfcpp::Tag_CPU_raw_name || tag == elfcpp::Tag_CPU_name)
12614 return Object_attribute::ATTR_TYPE_FLAG_STR_VAL;
12615 else if (tag < 32)
12616 return Object_attribute::ATTR_TYPE_FLAG_INT_VAL;
12617 else
12618 return ((tag & 1) != 0
12619 ? Object_attribute::ATTR_TYPE_FLAG_STR_VAL
12620 : Object_attribute::ATTR_TYPE_FLAG_INT_VAL);
12623 // Reorder attributes.
12625 // The ABI defines that Tag_conformance should be emitted first, and that
12626 // Tag_nodefaults should be second (if either is defined). This sets those
12627 // two positions, and bumps up the position of all the remaining tags to
12628 // compensate.
12630 template<bool big_endian>
12632 Target_arm<big_endian>::do_attributes_order(int num) const
12634 // Reorder the known object attributes in output. We want to move
12635 // Tag_conformance to position 4 and Tag_conformance to position 5
12636 // and shift everything between 4 .. Tag_conformance - 1 to make room.
12637 if (num == 4)
12638 return elfcpp::Tag_conformance;
12639 if (num == 5)
12640 return elfcpp::Tag_nodefaults;
12641 if ((num - 2) < elfcpp::Tag_nodefaults)
12642 return num - 2;
12643 if ((num - 1) < elfcpp::Tag_conformance)
12644 return num - 1;
12645 return num;
12648 // Scan a span of THUMB code for Cortex-A8 erratum.
12650 template<bool big_endian>
12651 void
12652 Target_arm<big_endian>::scan_span_for_cortex_a8_erratum(
12653 Arm_relobj<big_endian>* arm_relobj,
12654 unsigned int shndx,
12655 section_size_type span_start,
12656 section_size_type span_end,
12657 const unsigned char* view,
12658 Arm_address address)
12660 // Scan for 32-bit Thumb-2 branches which span two 4K regions, where:
12662 // The opcode is BLX.W, BL.W, B.W, Bcc.W
12663 // The branch target is in the same 4KB region as the
12664 // first half of the branch.
12665 // The instruction before the branch is a 32-bit
12666 // length non-branch instruction.
12667 section_size_type i = span_start;
12668 bool last_was_32bit = false;
12669 bool last_was_branch = false;
12670 while (i < span_end)
12672 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
12673 const Valtype* wv = reinterpret_cast<const Valtype*>(view + i);
12674 uint32_t insn = elfcpp::Swap<16, big_endian>::readval(wv);
12675 bool is_blx = false, is_b = false;
12676 bool is_bl = false, is_bcc = false;
12678 bool insn_32bit = (insn & 0xe000) == 0xe000 && (insn & 0x1800) != 0x0000;
12679 if (insn_32bit)
12681 // Load the rest of the insn (in manual-friendly order).
12682 insn = (insn << 16) | elfcpp::Swap<16, big_endian>::readval(wv + 1);
12684 // Encoding T4: B<c>.W.
12685 is_b = (insn & 0xf800d000U) == 0xf0009000U;
12686 // Encoding T1: BL<c>.W.
12687 is_bl = (insn & 0xf800d000U) == 0xf000d000U;
12688 // Encoding T2: BLX<c>.W.
12689 is_blx = (insn & 0xf800d000U) == 0xf000c000U;
12690 // Encoding T3: B<c>.W (not permitted in IT block).
12691 is_bcc = ((insn & 0xf800d000U) == 0xf0008000U
12692 && (insn & 0x07f00000U) != 0x03800000U);
12695 bool is_32bit_branch = is_b || is_bl || is_blx || is_bcc;
12697 // If this instruction is a 32-bit THUMB branch that crosses a 4K
12698 // page boundary and it follows 32-bit non-branch instruction,
12699 // we need to work around.
12700 if (is_32bit_branch
12701 && ((address + i) & 0xfffU) == 0xffeU
12702 && last_was_32bit
12703 && !last_was_branch)
12705 // Check to see if there is a relocation stub for this branch.
12706 bool force_target_arm = false;
12707 bool force_target_thumb = false;
12708 const Cortex_a8_reloc* cortex_a8_reloc = NULL;
12709 Cortex_a8_relocs_info::const_iterator p =
12710 this->cortex_a8_relocs_info_.find(address + i);
12712 if (p != this->cortex_a8_relocs_info_.end())
12714 cortex_a8_reloc = p->second;
12715 bool target_is_thumb = (cortex_a8_reloc->destination() & 1) != 0;
12717 if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL
12718 && !target_is_thumb)
12719 force_target_arm = true;
12720 else if (cortex_a8_reloc->r_type() == elfcpp::R_ARM_THM_CALL
12721 && target_is_thumb)
12722 force_target_thumb = true;
12725 off_t offset;
12726 Stub_type stub_type = arm_stub_none;
12728 // Check if we have an offending branch instruction.
12729 uint16_t upper_insn = (insn >> 16) & 0xffffU;
12730 uint16_t lower_insn = insn & 0xffffU;
12731 typedef class Arm_relocate_functions<big_endian> RelocFuncs;
12733 if (cortex_a8_reloc != NULL
12734 && cortex_a8_reloc->reloc_stub() != NULL)
12735 // We've already made a stub for this instruction, e.g.
12736 // it's a long branch or a Thumb->ARM stub. Assume that
12737 // stub will suffice to work around the A8 erratum (see
12738 // setting of always_after_branch above).
12740 else if (is_bcc)
12742 offset = RelocFuncs::thumb32_cond_branch_offset(upper_insn,
12743 lower_insn);
12744 stub_type = arm_stub_a8_veneer_b_cond;
12746 else if (is_b || is_bl || is_blx)
12748 offset = RelocFuncs::thumb32_branch_offset(upper_insn,
12749 lower_insn);
12750 if (is_blx)
12751 offset &= ~3;
12753 stub_type = (is_blx
12754 ? arm_stub_a8_veneer_blx
12755 : (is_bl
12756 ? arm_stub_a8_veneer_bl
12757 : arm_stub_a8_veneer_b));
12760 if (stub_type != arm_stub_none)
12762 Arm_address pc_for_insn = address + i + 4;
12764 // The original instruction is a BL, but the target is
12765 // an ARM instruction. If we were not making a stub,
12766 // the BL would have been converted to a BLX. Use the
12767 // BLX stub instead in that case.
12768 if (this->may_use_v5t_interworking() && force_target_arm
12769 && stub_type == arm_stub_a8_veneer_bl)
12771 stub_type = arm_stub_a8_veneer_blx;
12772 is_blx = true;
12773 is_bl = false;
12775 // Conversely, if the original instruction was
12776 // BLX but the target is Thumb mode, use the BL stub.
12777 else if (force_target_thumb
12778 && stub_type == arm_stub_a8_veneer_blx)
12780 stub_type = arm_stub_a8_veneer_bl;
12781 is_blx = false;
12782 is_bl = true;
12785 if (is_blx)
12786 pc_for_insn &= ~3;
12788 // If we found a relocation, use the proper destination,
12789 // not the offset in the (unrelocated) instruction.
12790 // Note this is always done if we switched the stub type above.
12791 if (cortex_a8_reloc != NULL)
12792 offset = (off_t) (cortex_a8_reloc->destination() - pc_for_insn);
12794 Arm_address target = (pc_for_insn + offset) | (is_blx ? 0 : 1);
12796 // Add a new stub if destination address is in the same page.
12797 if (((address + i) & ~0xfffU) == (target & ~0xfffU))
12799 Cortex_a8_stub* stub =
12800 this->stub_factory_.make_cortex_a8_stub(stub_type,
12801 arm_relobj, shndx,
12802 address + i,
12803 target, insn);
12804 Stub_table<big_endian>* stub_table =
12805 arm_relobj->stub_table(shndx);
12806 gold_assert(stub_table != NULL);
12807 stub_table->add_cortex_a8_stub(address + i, stub);
12812 i += insn_32bit ? 4 : 2;
12813 last_was_32bit = insn_32bit;
12814 last_was_branch = is_32bit_branch;
12818 // Apply the Cortex-A8 workaround.
12820 template<bool big_endian>
12821 void
12822 Target_arm<big_endian>::apply_cortex_a8_workaround(
12823 const Cortex_a8_stub* stub,
12824 Arm_address stub_address,
12825 unsigned char* insn_view,
12826 Arm_address insn_address)
12828 typedef typename elfcpp::Swap<16, big_endian>::Valtype Valtype;
12829 Valtype* wv = reinterpret_cast<Valtype*>(insn_view);
12830 Valtype upper_insn = elfcpp::Swap<16, big_endian>::readval(wv);
12831 Valtype lower_insn = elfcpp::Swap<16, big_endian>::readval(wv + 1);
12832 off_t branch_offset = stub_address - (insn_address + 4);
12834 typedef class Arm_relocate_functions<big_endian> RelocFuncs;
12835 switch (stub->stub_template()->type())
12837 case arm_stub_a8_veneer_b_cond:
12838 // For a conditional branch, we re-write it to be an unconditional
12839 // branch to the stub. We use the THUMB-2 encoding here.
12840 upper_insn = 0xf000U;
12841 lower_insn = 0xb800U;
12842 // Fall through.
12843 case arm_stub_a8_veneer_b:
12844 case arm_stub_a8_veneer_bl:
12845 case arm_stub_a8_veneer_blx:
12846 if ((lower_insn & 0x5000U) == 0x4000U)
12847 // For a BLX instruction, make sure that the relocation is
12848 // rounded up to a word boundary. This follows the semantics of
12849 // the instruction which specifies that bit 1 of the target
12850 // address will come from bit 1 of the base address.
12851 branch_offset = (branch_offset + 2) & ~3;
12853 // Put BRANCH_OFFSET back into the insn.
12854 gold_assert(!Bits<25>::has_overflow32(branch_offset));
12855 upper_insn = RelocFuncs::thumb32_branch_upper(upper_insn, branch_offset);
12856 lower_insn = RelocFuncs::thumb32_branch_lower(lower_insn, branch_offset);
12857 break;
12859 default:
12860 gold_unreachable();
12863 // Put the relocated value back in the object file:
12864 elfcpp::Swap<16, big_endian>::writeval(wv, upper_insn);
12865 elfcpp::Swap<16, big_endian>::writeval(wv + 1, lower_insn);
12868 // Target selector for ARM. Note this is never instantiated directly.
12869 // It's only used in Target_selector_arm_nacl, below.
12871 template<bool big_endian>
12872 class Target_selector_arm : public Target_selector
12874 public:
12875 Target_selector_arm()
12876 : Target_selector(elfcpp::EM_ARM, 32, big_endian,
12877 (big_endian ? "elf32-bigarm" : "elf32-littlearm"),
12878 (big_endian ? "armelfb" : "armelf"))
12881 Target*
12882 do_instantiate_target()
12883 { return new Target_arm<big_endian>(); }
12886 // Fix .ARM.exidx section coverage.
12888 template<bool big_endian>
12889 void
12890 Target_arm<big_endian>::fix_exidx_coverage(
12891 Layout* layout,
12892 const Input_objects* input_objects,
12893 Arm_output_section<big_endian>* exidx_section,
12894 Symbol_table* symtab,
12895 const Task* task)
12897 // We need to look at all the input sections in output in ascending
12898 // order of output address. We do that by building a sorted list
12899 // of output sections by addresses. Then we looks at the output sections
12900 // in order. The input sections in an output section are already sorted
12901 // by addresses within the output section.
12903 typedef std::set<Output_section*, output_section_address_less_than>
12904 Sorted_output_section_list;
12905 Sorted_output_section_list sorted_output_sections;
12907 // Find out all the output sections of input sections pointed by
12908 // EXIDX input sections.
12909 for (Input_objects::Relobj_iterator p = input_objects->relobj_begin();
12910 p != input_objects->relobj_end();
12911 ++p)
12913 Arm_relobj<big_endian>* arm_relobj =
12914 Arm_relobj<big_endian>::as_arm_relobj(*p);
12915 std::vector<unsigned int> shndx_list;
12916 arm_relobj->get_exidx_shndx_list(&shndx_list);
12917 for (size_t i = 0; i < shndx_list.size(); ++i)
12919 const Arm_exidx_input_section* exidx_input_section =
12920 arm_relobj->exidx_input_section_by_shndx(shndx_list[i]);
12921 gold_assert(exidx_input_section != NULL);
12922 if (!exidx_input_section->has_errors())
12924 unsigned int text_shndx = exidx_input_section->link();
12925 Output_section* os = arm_relobj->output_section(text_shndx);
12926 if (os != NULL && (os->flags() & elfcpp::SHF_ALLOC) != 0)
12927 sorted_output_sections.insert(os);
12932 // Go over the output sections in ascending order of output addresses.
12933 typedef typename Arm_output_section<big_endian>::Text_section_list
12934 Text_section_list;
12935 Text_section_list sorted_text_sections;
12936 for (typename Sorted_output_section_list::iterator p =
12937 sorted_output_sections.begin();
12938 p != sorted_output_sections.end();
12939 ++p)
12941 Arm_output_section<big_endian>* arm_output_section =
12942 Arm_output_section<big_endian>::as_arm_output_section(*p);
12943 arm_output_section->append_text_sections_to_list(&sorted_text_sections);
12946 exidx_section->fix_exidx_coverage(layout, sorted_text_sections, symtab,
12947 merge_exidx_entries(), task);
12950 template<bool big_endian>
12951 void
12952 Target_arm<big_endian>::do_define_standard_symbols(
12953 Symbol_table* symtab,
12954 Layout* layout)
12956 // Handle the .ARM.exidx section.
12957 Output_section* exidx_section = layout->find_output_section(".ARM.exidx");
12959 if (exidx_section != NULL)
12961 // Create __exidx_start and __exidx_end symbols.
12962 symtab->define_in_output_data("__exidx_start",
12963 NULL, // version
12964 Symbol_table::PREDEFINED,
12965 exidx_section,
12966 0, // value
12967 0, // symsize
12968 elfcpp::STT_NOTYPE,
12969 elfcpp::STB_GLOBAL,
12970 elfcpp::STV_HIDDEN,
12971 0, // nonvis
12972 false, // offset_is_from_end
12973 true); // only_if_ref
12975 symtab->define_in_output_data("__exidx_end",
12976 NULL, // version
12977 Symbol_table::PREDEFINED,
12978 exidx_section,
12979 0, // value
12980 0, // symsize
12981 elfcpp::STT_NOTYPE,
12982 elfcpp::STB_GLOBAL,
12983 elfcpp::STV_HIDDEN,
12984 0, // nonvis
12985 true, // offset_is_from_end
12986 true); // only_if_ref
12988 else
12990 // Define __exidx_start and __exidx_end even when .ARM.exidx
12991 // section is missing to match ld's behaviour.
12992 symtab->define_as_constant("__exidx_start", NULL,
12993 Symbol_table::PREDEFINED,
12994 0, 0, elfcpp::STT_OBJECT,
12995 elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0,
12996 true, false);
12997 symtab->define_as_constant("__exidx_end", NULL,
12998 Symbol_table::PREDEFINED,
12999 0, 0, elfcpp::STT_OBJECT,
13000 elfcpp::STB_GLOBAL, elfcpp::STV_HIDDEN, 0,
13001 true, false);
13005 // NaCl variant. It uses different PLT contents.
13007 template<bool big_endian>
13008 class Output_data_plt_arm_nacl;
13010 template<bool big_endian>
13011 class Target_arm_nacl : public Target_arm<big_endian>
13013 public:
13014 Target_arm_nacl()
13015 : Target_arm<big_endian>(&arm_nacl_info)
13018 protected:
13019 virtual Output_data_plt_arm<big_endian>*
13020 do_make_data_plt(
13021 Layout* layout,
13022 Arm_output_data_got<big_endian>* got,
13023 Output_data_space* got_plt,
13024 Output_data_space* got_irelative)
13025 { return new Output_data_plt_arm_nacl<big_endian>(
13026 layout, got, got_plt, got_irelative); }
13028 private:
13029 static const Target::Target_info arm_nacl_info;
13032 template<bool big_endian>
13033 const Target::Target_info Target_arm_nacl<big_endian>::arm_nacl_info =
13035 32, // size
13036 big_endian, // is_big_endian
13037 elfcpp::EM_ARM, // machine_code
13038 false, // has_make_symbol
13039 false, // has_resolve
13040 false, // has_code_fill
13041 true, // is_default_stack_executable
13042 false, // can_icf_inline_merge_sections
13043 '\0', // wrap_char
13044 "/lib/ld-nacl-arm.so.1", // dynamic_linker
13045 0x20000, // default_text_segment_address
13046 0x10000, // abi_pagesize (overridable by -z max-page-size)
13047 0x10000, // common_pagesize (overridable by -z common-page-size)
13048 true, // isolate_execinstr
13049 0x10000000, // rosegment_gap
13050 elfcpp::SHN_UNDEF, // small_common_shndx
13051 elfcpp::SHN_UNDEF, // large_common_shndx
13052 0, // small_common_section_flags
13053 0, // large_common_section_flags
13054 ".ARM.attributes", // attributes_section
13055 "aeabi", // attributes_vendor
13056 "_start", // entry_symbol_name
13057 32, // hash_entry_size
13058 elfcpp::SHT_PROGBITS, // unwind_section_type
13061 template<bool big_endian>
13062 class Output_data_plt_arm_nacl : public Output_data_plt_arm<big_endian>
13064 public:
13065 Output_data_plt_arm_nacl(
13066 Layout* layout,
13067 Arm_output_data_got<big_endian>* got,
13068 Output_data_space* got_plt,
13069 Output_data_space* got_irelative)
13070 : Output_data_plt_arm<big_endian>(layout, 16, got, got_plt, got_irelative)
13073 protected:
13074 // Return the offset of the first non-reserved PLT entry.
13075 virtual unsigned int
13076 do_first_plt_entry_offset() const
13077 { return sizeof(first_plt_entry); }
13079 // Return the size of a PLT entry.
13080 virtual unsigned int
13081 do_get_plt_entry_size() const
13082 { return sizeof(plt_entry); }
13084 virtual void
13085 do_fill_first_plt_entry(unsigned char* pov,
13086 Arm_address got_address,
13087 Arm_address plt_address);
13089 virtual void
13090 do_fill_plt_entry(unsigned char* pov,
13091 Arm_address got_address,
13092 Arm_address plt_address,
13093 unsigned int got_offset,
13094 unsigned int plt_offset);
13096 private:
13097 inline uint32_t arm_movw_immediate(uint32_t value)
13099 return (value & 0x00000fff) | ((value & 0x0000f000) << 4);
13102 inline uint32_t arm_movt_immediate(uint32_t value)
13104 return ((value & 0x0fff0000) >> 16) | ((value & 0xf0000000) >> 12);
13107 // Template for the first PLT entry.
13108 static const uint32_t first_plt_entry[16];
13110 // Template for subsequent PLT entries.
13111 static const uint32_t plt_entry[4];
13114 // The first entry in the PLT.
13115 template<bool big_endian>
13116 const uint32_t Output_data_plt_arm_nacl<big_endian>::first_plt_entry[16] =
13118 // First bundle:
13119 0xe300c000, // movw ip, #:lower16:&GOT[2]-.+8
13120 0xe340c000, // movt ip, #:upper16:&GOT[2]-.+8
13121 0xe08cc00f, // add ip, ip, pc
13122 0xe52dc008, // str ip, [sp, #-8]!
13123 // Second bundle:
13124 0xe3ccc103, // bic ip, ip, #0xc0000000
13125 0xe59cc000, // ldr ip, [ip]
13126 0xe3ccc13f, // bic ip, ip, #0xc000000f
13127 0xe12fff1c, // bx ip
13128 // Third bundle:
13129 0xe320f000, // nop
13130 0xe320f000, // nop
13131 0xe320f000, // nop
13132 // .Lplt_tail:
13133 0xe50dc004, // str ip, [sp, #-4]
13134 // Fourth bundle:
13135 0xe3ccc103, // bic ip, ip, #0xc0000000
13136 0xe59cc000, // ldr ip, [ip]
13137 0xe3ccc13f, // bic ip, ip, #0xc000000f
13138 0xe12fff1c, // bx ip
13141 template<bool big_endian>
13142 void
13143 Output_data_plt_arm_nacl<big_endian>::do_fill_first_plt_entry(
13144 unsigned char* pov,
13145 Arm_address got_address,
13146 Arm_address plt_address)
13148 // Write first PLT entry. All but first two words are constants.
13149 const size_t num_first_plt_words = (sizeof(first_plt_entry)
13150 / sizeof(first_plt_entry[0]));
13152 int32_t got_displacement = got_address + 8 - (plt_address + 16);
13154 elfcpp::Swap<32, big_endian>::writeval
13155 (pov + 0, first_plt_entry[0] | arm_movw_immediate (got_displacement));
13156 elfcpp::Swap<32, big_endian>::writeval
13157 (pov + 4, first_plt_entry[1] | arm_movt_immediate (got_displacement));
13159 for (size_t i = 2; i < num_first_plt_words; ++i)
13160 elfcpp::Swap<32, big_endian>::writeval(pov + i * 4, first_plt_entry[i]);
13163 // Subsequent entries in the PLT.
13165 template<bool big_endian>
13166 const uint32_t Output_data_plt_arm_nacl<big_endian>::plt_entry[4] =
13168 0xe300c000, // movw ip, #:lower16:&GOT[n]-.+8
13169 0xe340c000, // movt ip, #:upper16:&GOT[n]-.+8
13170 0xe08cc00f, // add ip, ip, pc
13171 0xea000000, // b .Lplt_tail
13174 template<bool big_endian>
13175 void
13176 Output_data_plt_arm_nacl<big_endian>::do_fill_plt_entry(
13177 unsigned char* pov,
13178 Arm_address got_address,
13179 Arm_address plt_address,
13180 unsigned int got_offset,
13181 unsigned int plt_offset)
13183 // Calculate the displacement between the PLT slot and the
13184 // common tail that's part of the special initial PLT slot.
13185 int32_t tail_displacement = (plt_address + (11 * sizeof(uint32_t))
13186 - (plt_address + plt_offset
13187 + sizeof(plt_entry) + sizeof(uint32_t)));
13188 gold_assert((tail_displacement & 3) == 0);
13189 tail_displacement >>= 2;
13191 gold_assert ((tail_displacement & 0xff000000) == 0
13192 || (-tail_displacement & 0xff000000) == 0);
13194 // Calculate the displacement between the PLT slot and the entry
13195 // in the GOT. The offset accounts for the value produced by
13196 // adding to pc in the penultimate instruction of the PLT stub.
13197 const int32_t got_displacement = (got_address + got_offset
13198 - (plt_address + sizeof(plt_entry)));
13200 elfcpp::Swap<32, big_endian>::writeval
13201 (pov + 0, plt_entry[0] | arm_movw_immediate (got_displacement));
13202 elfcpp::Swap<32, big_endian>::writeval
13203 (pov + 4, plt_entry[1] | arm_movt_immediate (got_displacement));
13204 elfcpp::Swap<32, big_endian>::writeval
13205 (pov + 8, plt_entry[2]);
13206 elfcpp::Swap<32, big_endian>::writeval
13207 (pov + 12, plt_entry[3] | (tail_displacement & 0x00ffffff));
13210 // Target selectors.
13212 template<bool big_endian>
13213 class Target_selector_arm_nacl
13214 : public Target_selector_nacl<Target_selector_arm<big_endian>,
13215 Target_arm_nacl<big_endian> >
13217 public:
13218 Target_selector_arm_nacl()
13219 : Target_selector_nacl<Target_selector_arm<big_endian>,
13220 Target_arm_nacl<big_endian> >(
13221 "arm",
13222 big_endian ? "elf32-bigarm-nacl" : "elf32-littlearm-nacl",
13223 big_endian ? "armelfb_nacl" : "armelf_nacl")
13227 Target_selector_arm_nacl<false> target_selector_arm;
13228 Target_selector_arm_nacl<true> target_selector_armbe;
13230 } // End anonymous namespace.