1 /* Target-dependent code for Renesas M32R, for GDB.
3 Copyright (C) 1996-2024 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #include "frame-unwind.h"
22 #include "frame-base.h"
33 #include "arch-utils.h"
35 #include "trad-frame.h"
37 #include "m32r-tdep.h"
40 /* The size of the argument registers (r0 - r3) in bytes. */
41 #define M32R_ARG_REGISTER_SIZE 4
46 m32r_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
48 /* Align to the size of an instruction (so that they can safely be
49 pushed onto the stack. */
56 The little endian mode of M32R is unique. In most of architectures,
57 two 16-bit instructions, A and B, are placed as the following:
65 In M32R, they are placed like this:
73 This is because M32R always fetches instructions in 32-bit.
75 The following functions take care of this behavior. */
78 m32r_memory_insert_breakpoint (struct gdbarch
*gdbarch
,
79 struct bp_target_info
*bp_tgt
)
81 CORE_ADDR addr
= bp_tgt
->placed_address
= bp_tgt
->reqstd_address
;
84 gdb_byte contents_cache
[4];
85 gdb_byte bp_entry
[] = { 0x10, 0xf1 }; /* dpt */
87 /* Save the memory contents. */
88 val
= target_read_memory (addr
& 0xfffffffc, contents_cache
, 4);
90 return val
; /* return error */
92 memcpy (bp_tgt
->shadow_contents
, contents_cache
, 4);
93 bp_tgt
->shadow_len
= 4;
95 /* Determine appropriate breakpoint contents and size for this address. */
96 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
100 buf
[0] = bp_entry
[0];
101 buf
[1] = bp_entry
[1];
102 buf
[2] = contents_cache
[2] & 0x7f;
103 buf
[3] = contents_cache
[3];
107 buf
[0] = contents_cache
[0];
108 buf
[1] = contents_cache
[1];
109 buf
[2] = bp_entry
[0];
110 buf
[3] = bp_entry
[1];
113 else /* little-endian */
117 buf
[0] = contents_cache
[0];
118 buf
[1] = contents_cache
[1] & 0x7f;
119 buf
[2] = bp_entry
[1];
120 buf
[3] = bp_entry
[0];
124 buf
[0] = bp_entry
[1];
125 buf
[1] = bp_entry
[0];
126 buf
[2] = contents_cache
[2];
127 buf
[3] = contents_cache
[3];
131 /* Write the breakpoint. */
132 val
= target_write_memory (addr
& 0xfffffffc, buf
, 4);
137 m32r_memory_remove_breakpoint (struct gdbarch
*gdbarch
,
138 struct bp_target_info
*bp_tgt
)
140 CORE_ADDR addr
= bp_tgt
->placed_address
;
143 gdb_byte
*contents_cache
= bp_tgt
->shadow_contents
;
145 buf
[0] = contents_cache
[0];
146 buf
[1] = contents_cache
[1];
147 buf
[2] = contents_cache
[2];
148 buf
[3] = contents_cache
[3];
150 /* Remove parallel bit. */
151 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
153 if ((buf
[0] & 0x80) == 0 && (buf
[2] & 0x80) != 0)
156 else /* little-endian */
158 if ((buf
[3] & 0x80) == 0 && (buf
[1] & 0x80) != 0)
162 /* Write contents. */
163 val
= target_write_raw_memory (addr
& 0xfffffffc, buf
, 4);
167 /* Implement the breakpoint_kind_from_pc gdbarch method. */
170 m32r_breakpoint_kind_from_pc (struct gdbarch
*gdbarch
, CORE_ADDR
*pcptr
)
172 if ((*pcptr
& 3) == 0)
178 /* Implement the sw_breakpoint_from_kind gdbarch method. */
180 static const gdb_byte
*
181 m32r_sw_breakpoint_from_kind (struct gdbarch
*gdbarch
, int kind
, int *size
)
183 static gdb_byte be_bp_entry
[] = {
184 0x10, 0xf1, 0x70, 0x00
186 static gdb_byte le_bp_entry
[] = {
187 0x00, 0x70, 0xf1, 0x10
192 /* Determine appropriate breakpoint. */
193 if (gdbarch_byte_order (gdbarch
) == BFD_ENDIAN_BIG
)
200 return le_bp_entry
+ 2;
204 static const char * const m32r_register_names
[] = {
205 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
206 "r8", "r9", "r10", "r11", "r12", "fp", "lr", "sp",
207 "psw", "cbr", "spi", "spu", "bpc", "pc", "accl", "acch",
212 m32r_register_name (struct gdbarch
*gdbarch
, int reg_nr
)
214 static_assert (ARRAY_SIZE (m32r_register_names
) == M32R_NUM_REGS
);
215 return m32r_register_names
[reg_nr
];
219 /* Return the GDB type object for the "standard" data type
220 of data in register N. */
223 m32r_register_type (struct gdbarch
*gdbarch
, int reg_nr
)
225 if (reg_nr
== M32R_PC_REGNUM
)
226 return builtin_type (gdbarch
)->builtin_func_ptr
;
227 else if (reg_nr
== M32R_SP_REGNUM
|| reg_nr
== M32R_FP_REGNUM
)
228 return builtin_type (gdbarch
)->builtin_data_ptr
;
230 return builtin_type (gdbarch
)->builtin_int32
;
234 /* Write into appropriate registers a function return value
235 of type TYPE, given in virtual format.
237 Things always get returned in RET1_REGNUM, RET2_REGNUM. */
240 m32r_store_return_value (struct type
*type
, struct regcache
*regcache
,
241 const gdb_byte
*valbuf
)
243 struct gdbarch
*gdbarch
= regcache
->arch ();
244 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
246 int len
= type
->length ();
248 regval
= extract_unsigned_integer (valbuf
, len
> 4 ? 4 : len
, byte_order
);
249 regcache_cooked_write_unsigned (regcache
, RET1_REGNUM
, regval
);
253 regval
= extract_unsigned_integer (valbuf
+ 4,
254 len
- 4, byte_order
);
255 regcache_cooked_write_unsigned (regcache
, RET1_REGNUM
+ 1, regval
);
259 /* This is required by skip_prologue. The results of decoding a prologue
260 should be cached because this thrashing is getting nuts. */
263 decode_prologue (struct gdbarch
*gdbarch
,
264 CORE_ADDR start_pc
, CORE_ADDR scan_limit
,
265 CORE_ADDR
*pl_endptr
, unsigned long *framelength
)
267 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
268 unsigned long framesize
;
271 CORE_ADDR after_prologue
= 0;
272 CORE_ADDR after_push
= 0;
273 CORE_ADDR after_stack_adjust
= 0;
274 CORE_ADDR current_pc
;
275 LONGEST return_value
;
280 for (current_pc
= start_pc
; current_pc
< scan_limit
; current_pc
+= 2)
282 /* Check if current pc's location is readable. */
283 if (!safe_read_memory_integer (current_pc
, 2, byte_order
, &return_value
))
286 insn
= read_memory_unsigned_integer (current_pc
, 2, byte_order
);
291 /* If this is a 32 bit instruction, we dont want to examine its
292 immediate data as though it were an instruction. */
293 if (current_pc
& 0x02)
295 /* Decode this instruction further. */
302 if (current_pc
== scan_limit
)
303 scan_limit
+= 2; /* extend the search */
305 current_pc
+= 2; /* skip the immediate data */
307 /* Check if current pc's location is readable. */
308 if (!safe_read_memory_integer (current_pc
, 2, byte_order
,
312 if (insn
== 0x8faf) /* add3 sp, sp, xxxx */
313 /* add 16 bit sign-extended offset */
316 -((short) read_memory_unsigned_integer (current_pc
,
321 if (((insn
>> 8) == 0xe4) /* ld24 r4, xxxxxx; sub sp, r4 */
322 && safe_read_memory_integer (current_pc
+ 2,
325 && read_memory_unsigned_integer (current_pc
+ 2,
329 /* Subtract 24 bit sign-extended negative-offset. */
330 insn
= read_memory_unsigned_integer (current_pc
- 2,
332 if (insn
& 0x00800000) /* sign extend */
333 insn
|= 0xff000000; /* negative */
335 insn
&= 0x00ffffff; /* positive */
339 after_push
= current_pc
+ 2;
343 op1
= insn
& 0xf000; /* Isolate just the first nibble. */
345 if ((insn
& 0xf0ff) == 0x207f)
351 if ((insn
>> 8) == 0x4f) /* addi sp, xx */
352 /* Add 8 bit sign-extended offset. */
354 int stack_adjust
= (signed char) (insn
& 0xff);
356 /* there are probably two of these stack adjustments:
357 1) A negative one in the prologue, and
358 2) A positive one in the epilogue.
359 We are only interested in the first one. */
361 if (stack_adjust
< 0)
363 framesize
-= stack_adjust
;
365 /* A frameless function may have no "mv fp, sp".
366 In that case, this is the end of the prologue. */
367 after_stack_adjust
= current_pc
+ 2;
373 after_prologue
= current_pc
+ 2;
374 break; /* end of stack adjustments */
377 /* Nop looks like a branch, continue explicitly. */
380 after_prologue
= current_pc
+ 2;
381 continue; /* nop occurs between pushes. */
383 /* End of prolog if any of these are trap instructions. */
384 if ((insn
& 0xfff0) == 0x10f0)
386 after_prologue
= current_pc
;
389 /* End of prolog if any of these are branch instructions. */
390 if ((op1
== 0x7000) || (op1
== 0xb000) || (op1
== 0xf000))
392 after_prologue
= current_pc
;
395 /* Some of the branch instructions are mixed with other types. */
398 int subop
= insn
& 0x0ff0;
399 if ((subop
== 0x0ec0) || (subop
== 0x0fc0))
401 after_prologue
= current_pc
;
402 continue; /* jmp , jl */
408 *framelength
= framesize
;
410 if (current_pc
>= scan_limit
)
414 if (after_stack_adjust
!= 0)
415 /* We did not find a "mv fp,sp", but we DID find
416 a stack_adjust. Is it safe to use that as the
417 end of the prologue? I just don't know. */
419 *pl_endptr
= after_stack_adjust
;
421 else if (after_push
!= 0)
422 /* We did not find a "mv fp,sp", but we DID find
423 a push. Is it safe to use that as the
424 end of the prologue? I just don't know. */
426 *pl_endptr
= after_push
;
429 /* We reached the end of the loop without finding the end
430 of the prologue. No way to win -- we should report
431 failure. The way we do that is to return the original
432 start_pc. GDB will set a breakpoint at the start of
433 the function (etc.) */
434 *pl_endptr
= start_pc
;
439 if (after_prologue
== 0)
440 after_prologue
= current_pc
;
443 *pl_endptr
= after_prologue
;
446 } /* decode_prologue */
448 /* Function: skip_prologue
449 Find end of function prologue. */
451 #define DEFAULT_SEARCH_LIMIT 128
454 m32r_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
456 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
457 CORE_ADDR func_addr
, func_end
;
458 struct symtab_and_line sal
;
459 LONGEST return_value
;
461 /* See what the symbol table says. */
463 if (find_pc_partial_function (pc
, NULL
, &func_addr
, &func_end
))
465 sal
= find_pc_line (func_addr
, 0);
467 if (sal
.line
!= 0 && sal
.end
<= func_end
)
472 /* Either there's no line info, or the line after the prologue is after
473 the end of the function. In this case, there probably isn't a
476 func_end
= std::min (func_end
, func_addr
+ DEFAULT_SEARCH_LIMIT
);
480 func_end
= pc
+ DEFAULT_SEARCH_LIMIT
;
482 /* If pc's location is not readable, just quit. */
483 if (!safe_read_memory_integer (pc
, 4, byte_order
, &return_value
))
486 /* Find the end of prologue. */
487 if (decode_prologue (gdbarch
, pc
, func_end
, &sal
.end
, NULL
) < 0)
493 struct m32r_unwind_cache
495 /* The previous frame's inner most stack address. Used as this
496 frame ID's stack_addr. */
498 /* The frame's base, optionally used by the high-level debug info. */
501 /* How far the SP and r13 (FP) have been offset from the start of
502 the stack frame (as defined by the previous frame's stack
507 /* Table indicating the location of each and every register. */
508 trad_frame_saved_reg
*saved_regs
;
511 /* Put here the code to store, into fi->saved_regs, the addresses of
512 the saved registers of frame described by FRAME_INFO. This
513 includes special registers such as pc and fp saved in special ways
514 in the stack frame. sp is even more special: the address we return
515 for it IS the sp for the next frame. */
517 static struct m32r_unwind_cache
*
518 m32r_frame_unwind_cache (const frame_info_ptr
&this_frame
,
519 void **this_prologue_cache
)
521 CORE_ADDR pc
, scan_limit
;
526 struct m32r_unwind_cache
*info
;
529 if ((*this_prologue_cache
))
530 return (struct m32r_unwind_cache
*) (*this_prologue_cache
);
532 info
= FRAME_OBSTACK_ZALLOC (struct m32r_unwind_cache
);
533 (*this_prologue_cache
) = info
;
534 info
->saved_regs
= trad_frame_alloc_saved_regs (this_frame
);
538 info
->uses_frame
= 0;
540 scan_limit
= get_frame_pc (this_frame
);
541 for (pc
= get_frame_func (this_frame
);
542 pc
> 0 && pc
< scan_limit
; pc
+= 2)
546 op
= get_frame_memory_unsigned (this_frame
, pc
, 4);
547 if ((op
& 0x80000000) == 0x80000000)
549 /* 32-bit instruction */
550 if ((op
& 0xffff0000) == 0x8faf0000)
552 /* add3 sp,sp,xxxx */
553 short n
= op
& 0xffff;
554 info
->sp_offset
+= n
;
556 else if (((op
>> 8) == 0xe4)
557 && get_frame_memory_unsigned (this_frame
, pc
+ 2,
560 /* ld24 r4, xxxxxx; sub sp, r4 */
561 unsigned long n
= op
& 0xffffff;
562 info
->sp_offset
+= n
;
563 pc
+= 2; /* skip sub instruction */
566 if (pc
== scan_limit
)
567 scan_limit
+= 2; /* extend the search */
568 pc
+= 2; /* skip the immediate data */
573 /* 16-bit instructions */
574 op
= get_frame_memory_unsigned (this_frame
, pc
, 2) & 0x7fff;
575 if ((op
& 0xf0ff) == 0x207f)
578 int regno
= ((op
>> 8) & 0xf);
579 info
->sp_offset
-= 4;
580 info
->saved_regs
[regno
].set_addr (info
->sp_offset
);
582 else if ((op
& 0xff00) == 0x4f00)
585 int n
= (signed char) (op
& 0xff);
586 info
->sp_offset
+= n
;
588 else if (op
== 0x1d8f)
591 info
->uses_frame
= 1;
592 info
->r13_offset
= info
->sp_offset
;
593 break; /* end of stack adjustments */
595 else if ((op
& 0xfff0) == 0x10f0)
597 /* End of prologue if this is a trap instruction. */
598 break; /* End of stack adjustments. */
602 info
->size
= -info
->sp_offset
;
604 /* Compute the previous frame's stack pointer (which is also the
605 frame's ID's stack address), and this frame's base pointer. */
606 if (info
->uses_frame
)
608 /* The SP was moved to the FP. This indicates that a new frame
609 was created. Get THIS frame's FP value by unwinding it from
611 this_base
= get_frame_register_unsigned (this_frame
, M32R_FP_REGNUM
);
612 /* The FP points at the last saved register. Adjust the FP back
613 to before the first saved register giving the SP. */
614 prev_sp
= this_base
+ info
->size
;
618 /* Assume that the FP is this frame's SP but with that pushed
619 stack space added back. */
620 this_base
= get_frame_register_unsigned (this_frame
, M32R_SP_REGNUM
);
621 prev_sp
= this_base
+ info
->size
;
624 /* Convert that SP/BASE into real addresses. */
625 info
->prev_sp
= prev_sp
;
626 info
->base
= this_base
;
628 /* Adjust all the saved registers so that they contain addresses and
630 for (i
= 0; i
< gdbarch_num_regs (get_frame_arch (this_frame
)) - 1; i
++)
631 if (info
->saved_regs
[i
].is_addr ())
632 info
->saved_regs
[i
].set_addr (info
->prev_sp
633 + info
->saved_regs
[i
].addr ());
635 /* The call instruction moves the caller's PC in the callee's LR.
636 Since this is an unwind, do the reverse. Copy the location of LR
637 into PC (the address / regnum) so that a request for PC will be
638 converted into a request for the LR. */
639 info
->saved_regs
[M32R_PC_REGNUM
] = info
->saved_regs
[LR_REGNUM
];
641 /* The previous frame's SP needed to be computed. Save the computed
643 info
->saved_regs
[M32R_SP_REGNUM
].set_value (prev_sp
);
649 m32r_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
650 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
651 struct value
**args
, CORE_ADDR sp
,
652 function_call_return_method return_method
,
653 CORE_ADDR struct_addr
)
655 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
656 int stack_offset
, stack_alloc
;
657 int argreg
= ARG1_REGNUM
;
660 enum type_code typecode
;
663 gdb_byte valbuf
[M32R_ARG_REGISTER_SIZE
];
666 /* First force sp to a 4-byte alignment. */
669 /* Set the return address. For the m32r, the return breakpoint is
670 always at BP_ADDR. */
671 regcache_cooked_write_unsigned (regcache
, LR_REGNUM
, bp_addr
);
673 /* If STRUCT_RETURN is true, then the struct return address (in
674 STRUCT_ADDR) will consume the first argument-passing register.
675 Both adjust the register count and store that value. */
676 if (return_method
== return_method_struct
)
678 regcache_cooked_write_unsigned (regcache
, argreg
, struct_addr
);
682 /* Now make sure there's space on the stack. */
683 for (argnum
= 0, stack_alloc
= 0; argnum
< nargs
; argnum
++)
684 stack_alloc
+= ((args
[argnum
]->type ()->length () + 3) & ~3);
685 sp
-= stack_alloc
; /* Make room on stack for args. */
687 for (argnum
= 0, stack_offset
= 0; argnum
< nargs
; argnum
++)
689 type
= args
[argnum
]->type ();
690 typecode
= type
->code ();
691 len
= type
->length ();
693 memset (valbuf
, 0, sizeof (valbuf
));
695 /* Passes structures that do not fit in 2 registers by reference. */
697 && (typecode
== TYPE_CODE_STRUCT
|| typecode
== TYPE_CODE_UNION
))
699 store_unsigned_integer (valbuf
, 4, byte_order
,
700 args
[argnum
]->address ());
701 typecode
= TYPE_CODE_PTR
;
707 /* Value gets right-justified in the register or stack word. */
708 memcpy (valbuf
+ (register_size (gdbarch
, argreg
) - len
),
709 (gdb_byte
*) args
[argnum
]->contents ().data (), len
);
713 val
= (gdb_byte
*) args
[argnum
]->contents ().data ();
717 if (argreg
> ARGN_REGNUM
)
719 /* Must go on the stack. */
720 write_memory (sp
+ stack_offset
, val
, 4);
723 else if (argreg
<= ARGN_REGNUM
)
725 /* There's room in a register. */
727 extract_unsigned_integer (val
,
728 register_size (gdbarch
, argreg
),
730 regcache_cooked_write_unsigned (regcache
, argreg
++, regval
);
733 /* Store the value 4 bytes at a time. This means that things
734 larger than 4 bytes may go partly in registers and partly
736 len
-= register_size (gdbarch
, argreg
);
737 val
+= register_size (gdbarch
, argreg
);
741 /* Finally, update the SP register. */
742 regcache_cooked_write_unsigned (regcache
, M32R_SP_REGNUM
, sp
);
748 /* Given a return value in `regbuf' with a type `valtype',
749 extract and copy its value into `valbuf'. */
752 m32r_extract_return_value (struct type
*type
, struct regcache
*regcache
,
755 struct gdbarch
*gdbarch
= regcache
->arch ();
756 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
757 int len
= type
->length ();
760 /* By using store_unsigned_integer we avoid having to do
761 anything special for small big-endian values. */
762 regcache_cooked_read_unsigned (regcache
, RET1_REGNUM
, &tmp
);
763 store_unsigned_integer (dst
, (len
> 4 ? len
- 4 : len
), byte_order
, tmp
);
765 /* Ignore return values more than 8 bytes in size because the m32r
766 returns anything more than 8 bytes in the stack. */
769 regcache_cooked_read_unsigned (regcache
, RET1_REGNUM
+ 1, &tmp
);
770 store_unsigned_integer (dst
+ len
- 4, 4, byte_order
, tmp
);
774 static enum return_value_convention
775 m32r_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
776 struct type
*valtype
, struct regcache
*regcache
,
777 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
779 if (valtype
->length () > 8)
780 return RETURN_VALUE_STRUCT_CONVENTION
;
784 m32r_extract_return_value (valtype
, regcache
, readbuf
);
785 if (writebuf
!= NULL
)
786 m32r_store_return_value (valtype
, regcache
, writebuf
);
787 return RETURN_VALUE_REGISTER_CONVENTION
;
791 /* Given a GDB frame, determine the address of the calling function's
792 frame. This will be used to create a new GDB frame struct. */
795 m32r_frame_this_id (const frame_info_ptr
&this_frame
,
796 void **this_prologue_cache
, struct frame_id
*this_id
)
798 struct m32r_unwind_cache
*info
799 = m32r_frame_unwind_cache (this_frame
, this_prologue_cache
);
802 struct bound_minimal_symbol msym_stack
;
805 /* The FUNC is easy. */
806 func
= get_frame_func (this_frame
);
808 /* Check if the stack is empty. */
809 msym_stack
= lookup_minimal_symbol ("_stack", NULL
, NULL
);
810 if (msym_stack
.minsym
&& info
->base
== msym_stack
.value_address ())
813 /* Hopefully the prologue analysis either correctly determined the
814 frame's base (which is the SP from the previous frame), or set
815 that base to "NULL". */
816 base
= info
->prev_sp
;
820 id
= frame_id_build (base
, func
);
824 static struct value
*
825 m32r_frame_prev_register (const frame_info_ptr
&this_frame
,
826 void **this_prologue_cache
, int regnum
)
828 struct m32r_unwind_cache
*info
829 = m32r_frame_unwind_cache (this_frame
, this_prologue_cache
);
830 return trad_frame_get_prev_register (this_frame
, info
->saved_regs
, regnum
);
833 static const struct frame_unwind m32r_frame_unwind
= {
836 default_frame_unwind_stop_reason
,
838 m32r_frame_prev_register
,
840 default_frame_sniffer
844 m32r_frame_base_address (const frame_info_ptr
&this_frame
, void **this_cache
)
846 struct m32r_unwind_cache
*info
847 = m32r_frame_unwind_cache (this_frame
, this_cache
);
851 static const struct frame_base m32r_frame_base
= {
853 m32r_frame_base_address
,
854 m32r_frame_base_address
,
855 m32r_frame_base_address
858 static gdbarch_init_ftype m32r_gdbarch_init
;
860 static struct gdbarch
*
861 m32r_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
863 /* If there is already a candidate, use it. */
864 arches
= gdbarch_list_lookup_by_info (arches
, &info
);
866 return arches
->gdbarch
;
868 /* Allocate space for the new architecture. */
870 = gdbarch_alloc (&info
, gdbarch_tdep_up (new m32r_gdbarch_tdep
));
872 set_gdbarch_wchar_bit (gdbarch
, 16);
873 set_gdbarch_wchar_signed (gdbarch
, 0);
875 set_gdbarch_num_regs (gdbarch
, M32R_NUM_REGS
);
876 set_gdbarch_pc_regnum (gdbarch
, M32R_PC_REGNUM
);
877 set_gdbarch_sp_regnum (gdbarch
, M32R_SP_REGNUM
);
878 set_gdbarch_register_name (gdbarch
, m32r_register_name
);
879 set_gdbarch_register_type (gdbarch
, m32r_register_type
);
881 set_gdbarch_push_dummy_call (gdbarch
, m32r_push_dummy_call
);
882 set_gdbarch_return_value (gdbarch
, m32r_return_value
);
884 set_gdbarch_skip_prologue (gdbarch
, m32r_skip_prologue
);
885 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
886 set_gdbarch_breakpoint_kind_from_pc (gdbarch
, m32r_breakpoint_kind_from_pc
);
887 set_gdbarch_sw_breakpoint_from_kind (gdbarch
, m32r_sw_breakpoint_from_kind
);
888 set_gdbarch_memory_insert_breakpoint (gdbarch
,
889 m32r_memory_insert_breakpoint
);
890 set_gdbarch_memory_remove_breakpoint (gdbarch
,
891 m32r_memory_remove_breakpoint
);
893 set_gdbarch_frame_align (gdbarch
, m32r_frame_align
);
895 frame_base_set_default (gdbarch
, &m32r_frame_base
);
897 /* Hook in ABI-specific overrides, if they have been registered. */
898 gdbarch_init_osabi (info
, gdbarch
);
900 /* Hook in the default unwinders. */
901 frame_unwind_append_unwinder (gdbarch
, &m32r_frame_unwind
);
903 /* Support simple overlay manager. */
904 set_gdbarch_overlay_update (gdbarch
, simple_overlay_update
);
909 void _initialize_m32r_tdep ();
911 _initialize_m32r_tdep ()
913 gdbarch_register (bfd_arch_m32r
, m32r_gdbarch_init
);