gdb/i386-nto-tdep.c

   1 /* Target-dependent code for QNX Neutrino x86.
   2
   3    Copyright (C) 2003-2024 Free Software Foundation, Inc.
   4
   5    Contributed by QNX Software Systems Ltd.
   6
   7    This file is part of GDB.
   8
   9    This program is free software; you can redistribute it and/or modify
  10    it under the terms of the GNU General Public License as published by
  11    the Free Software Foundation; either version 3 of the License, or
  12    (at your option) any later version.
  13
  14    This program is distributed in the hope that it will be useful,
  15    but WITHOUT ANY WARRANTY; without even the implied warranty of
  16    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17    GNU General Public License for more details.
  18
  19    You should have received a copy of the GNU General Public License
  20    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  21
  22 #include "frame.h"
  23 #include "osabi.h"
  24 #include "regcache.h"
  25 #include "target.h"
  26
  27 #include "i386-tdep.h"
  28 #include "i387-tdep.h"
  29 #include "nto-tdep.h"
  30 #include "solib.h"
  31 #include "solib-svr4.h"
  32
  33 #ifndef X86_CPU_FXSR
  34 #define X86_CPU_FXSR (1L << 12)
  35 #endif
  36
  37 /* Why 13?  Look in our /usr/include/x86/context.h header at the
  38    x86_cpu_registers structure and you'll see an 'exx' junk register
  39    that is just filler.  Don't ask me, ask the kernel guys.  */
  40 #define NUM_GPREGS 13
  41
  42 /* Mapping between the general-purpose registers in `struct xxx'
  43    format and GDB's register cache layout.  */
  44
  45 /* From <x86/context.h>.  */
  46 static int i386nto_gregset_reg_offset[] =
  47 {
  48   7 * 4,                        /* %eax */
  49   6 * 4,                        /* %ecx */
  50   5 * 4,                        /* %edx */
  51   4 * 4,                        /* %ebx */
  52   11 * 4,                       /* %esp */
  53   2 * 4,                        /* %epb */
  54   1 * 4,                        /* %esi */
  55   0 * 4,                        /* %edi */
  56   8 * 4,                        /* %eip */
  57   10 * 4,                       /* %eflags */
  58   9 * 4,                        /* %cs */
  59   12 * 4,                       /* %ss */
  60   -1                            /* filler */
  61 };
  62
  63 /* Given a GDB register number REGNUM, return the offset into
  64    Neutrino's register structure or -1 if the register is unknown.  */
  65
  66 static int
  67 nto_reg_offset (int regnum)
  68 {
  69   if (regnum >= 0 && regnum < ARRAY_SIZE (i386nto_gregset_reg_offset))
  70     return i386nto_gregset_reg_offset[regnum];
  71
  72   return -1;
  73 }
  74
  75 static void
  76 i386nto_supply_gregset (struct regcache *regcache, char *gpregs)
  77 {
  78   struct gdbarch *gdbarch = regcache->arch ();
  79   i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
  80
  81   gdb_assert (tdep->gregset_reg_offset == i386nto_gregset_reg_offset);
  82   i386_gregset.supply_regset (&i386_gregset, regcache, -1,
  83                               gpregs, NUM_GPREGS * 4);
  84 }
  85
  86 static void
  87 i386nto_supply_fpregset (struct regcache *regcache, char *fpregs)
  88 {
  89   if (nto_cpuinfo_valid && nto_cpuinfo_flags | X86_CPU_FXSR)
  90     i387_supply_fxsave (regcache, -1, fpregs);
  91   else
  92     i387_supply_fsave (regcache, -1, fpregs);
  93 }
  94
  95 static void
  96 i386nto_supply_regset (struct regcache *regcache, int regset, char *data)
  97 {
  98   switch (regset)
  99     {
 100     case NTO_REG_GENERAL:
 101       i386nto_supply_gregset (regcache, data);
 102       break;
 103     case NTO_REG_FLOAT:
 104       i386nto_supply_fpregset (regcache, data);
 105       break;
 106     }
 107 }
 108
 109 static int
 110 i386nto_regset_id (int regno)
 111 {
 112   if (regno == -1)
 113     return NTO_REG_END;
 114   else if (regno < I386_NUM_GREGS)
 115     return NTO_REG_GENERAL;
 116   else if (regno < I386_NUM_GREGS + I387_NUM_REGS)
 117     return NTO_REG_FLOAT;
 118   else if (regno < I386_SSE_NUM_REGS)
 119     return NTO_REG_FLOAT; /* We store xmm registers in fxsave_area.  */
 120
 121   return -1;                    /* Error.  */
 122 }
 123
 124 static int
 125 i386nto_register_area (struct gdbarch *gdbarch,
 126                        int regno, int regset, unsigned *off)
 127 {
 128   i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
 129
 130   *off = 0;
 131   if (regset == NTO_REG_GENERAL)
 132     {
 133       if (regno == -1)
 134         return NUM_GPREGS * 4;
 135
 136       *off = nto_reg_offset (regno);
 137       if (*off == -1)
 138         return 0;
 139       return 4;
 140     }
 141   else if (regset == NTO_REG_FLOAT)
 142     {
 143       unsigned off_adjust, regsize, regset_size, regno_base;
 144       /* The following are flags indicating number in our fxsave_area.  */
 145       int first_four = (regno >= I387_FCTRL_REGNUM (tdep)
 146                         && regno <= I387_FISEG_REGNUM (tdep));
 147       int second_four = (regno > I387_FISEG_REGNUM (tdep)
 148                          && regno <= I387_FOP_REGNUM (tdep));
 149       int st_reg = (regno >= I387_ST0_REGNUM (tdep)
 150                     && regno < I387_ST0_REGNUM (tdep) + 8);
 151       int xmm_reg = (regno >= I387_XMM0_REGNUM (tdep)
 152                      && regno < I387_MXCSR_REGNUM (tdep));
 153
 154       if (nto_cpuinfo_valid && nto_cpuinfo_flags | X86_CPU_FXSR)
 155         {
 156           off_adjust = 32;
 157           regsize = 16;
 158           regset_size = 512;
 159           /* fxsave_area structure.  */
 160           if (first_four)
 161             {
 162               /* fpu_control_word, fpu_status_word, fpu_tag_word, fpu_operand
 163                  registers.  */
 164               regsize = 2; /* Two bytes each.  */
 165               off_adjust = 0;
 166               regno_base = I387_FCTRL_REGNUM (tdep);
 167             }
 168           else if (second_four)
 169             {
 170               /* fpu_ip, fpu_cs, fpu_op, fpu_ds registers.  */
 171               regsize = 4;
 172               off_adjust = 8;
 173               regno_base = I387_FISEG_REGNUM (tdep) + 1;
 174             }
 175           else if (st_reg)
 176             {
 177               /* ST registers.  */
 178               regsize = 16;
 179               off_adjust = 32;
 180               regno_base = I387_ST0_REGNUM (tdep);
 181             }
 182           else if (xmm_reg)
 183             {
 184               /* XMM registers.  */
 185               regsize = 16;
 186               off_adjust = 160;
 187               regno_base = I387_XMM0_REGNUM (tdep);
 188             }
 189           else if (regno == I387_MXCSR_REGNUM (tdep))
 190             {
 191               regsize = 4;
 192               off_adjust = 24;
 193               regno_base = I387_MXCSR_REGNUM (tdep);
 194             }
 195           else
 196             {
 197               /* Whole regset.  */
 198               gdb_assert (regno == -1);
 199               off_adjust = 0;
 200               regno_base = 0;
 201               regsize = regset_size;
 202             }
 203         }
 204       else
 205         {
 206           regset_size = 108;
 207           /* fsave_area structure.  */
 208           if (first_four || second_four)
 209             {
 210               /* fpu_control_word, ... , fpu_ds registers.  */
 211               regsize = 4;
 212               off_adjust = 0;
 213               regno_base = I387_FCTRL_REGNUM (tdep);
 214             }
 215           else if (st_reg)
 216             {
 217               /* One of ST registers.  */
 218               regsize = 10;
 219               off_adjust = 7 * 4;
 220               regno_base = I387_ST0_REGNUM (tdep);
 221             }
 222           else
 223             {
 224               /* Whole regset.  */
 225               gdb_assert (regno == -1);
 226               off_adjust = 0;
 227               regno_base = 0;
 228               regsize = regset_size;
 229             }
 230         }
 231
 232       if (regno != -1)
 233         *off = off_adjust + (regno - regno_base) * regsize;
 234       else
 235         *off = 0;
 236       return regsize;
 237     }
 238   return -1;
 239 }
 240
 241 static int
 242 i386nto_regset_fill (const struct regcache *regcache, int regset, char *data)
 243 {
 244   if (regset == NTO_REG_GENERAL)
 245     {
 246       int regno;
 247
 248       for (regno = 0; regno < NUM_GPREGS; regno++)
 249         {
 250           int offset = nto_reg_offset (regno);
 251           if (offset != -1)
 252             regcache->raw_collect (regno, data + offset);
 253         }
 254     }
 255   else if (regset == NTO_REG_FLOAT)
 256     {
 257       if (nto_cpuinfo_valid && nto_cpuinfo_flags | X86_CPU_FXSR)
 258         i387_collect_fxsave (regcache, -1, data);
 259       else
 260         i387_collect_fsave (regcache, -1, data);
 261     }
 262   else
 263     return -1;
 264
 265   return 0;
 266 }
 267
 268 /* Return whether THIS_FRAME corresponds to a QNX Neutrino sigtramp
 269    routine.  */
 270
 271 static int
 272 i386nto_sigtramp_p (const frame_info_ptr &this_frame)
 273 {
 274   CORE_ADDR pc = get_frame_pc (this_frame);
 275   const char *name;
 276
 277   find_pc_partial_function (pc, &name, NULL, NULL);
 278   return name && strcmp ("__signalstub", name) == 0;
 279 }
 280
 281 /* Assuming THIS_FRAME is a QNX Neutrino sigtramp routine, return the
 282    address of the associated sigcontext structure.  */
 283
 284 static CORE_ADDR
 285 i386nto_sigcontext_addr (const frame_info_ptr &this_frame)
 286 {
 287   struct gdbarch *gdbarch = get_frame_arch (this_frame);
 288   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
 289   gdb_byte buf[4];
 290   CORE_ADDR ptrctx;
 291
 292   /* We store __ucontext_t addr in EDI register.  */
 293   get_frame_register (this_frame, I386_EDI_REGNUM, buf);
 294   ptrctx = extract_unsigned_integer (buf, 4, byte_order);
 295   ptrctx += 24 /* Context pointer is at this offset.  */;
 296
 297   return ptrctx;
 298 }
 299
 300 static void
 301 init_i386nto_ops (void)
 302 {
 303   nto_regset_id = i386nto_regset_id;
 304   nto_supply_gregset = i386nto_supply_gregset;
 305   nto_supply_fpregset = i386nto_supply_fpregset;
 306   nto_supply_altregset = nto_dummy_supply_regset;
 307   nto_supply_regset = i386nto_supply_regset;
 308   nto_register_area = i386nto_register_area;
 309   nto_regset_fill = i386nto_regset_fill;
 310   nto_fetch_link_map_offsets =
 311     svr4_ilp32_fetch_link_map_offsets;
 312 }
 313
 314 static void
 315 i386nto_init_abi (struct gdbarch_info info, struct gdbarch *gdbarch)
 316 {
 317   i386_gdbarch_tdep *tdep = gdbarch_tdep<i386_gdbarch_tdep> (gdbarch);
 318   static solib_ops nto_svr4_so_ops;
 319
 320   /* Deal with our strange signals.  */
 321   nto_initialize_signals ();
 322
 323   /* NTO uses ELF.  */
 324   i386_elf_init_abi (info, gdbarch);
 325
 326   /* Neutrino rewinds to look more normal.  Need to override the i386
 327      default which is [unfortunately] to decrement the PC.  */
 328   set_gdbarch_decr_pc_after_break (gdbarch, 0);
 329
 330   tdep->gregset_reg_offset = i386nto_gregset_reg_offset;
 331   tdep->gregset_num_regs = ARRAY_SIZE (i386nto_gregset_reg_offset);
 332   tdep->sizeof_gregset = NUM_GPREGS * 4;
 333
 334   tdep->sigtramp_p = i386nto_sigtramp_p;
 335   tdep->sigcontext_addr = i386nto_sigcontext_addr;
 336   tdep->sc_reg_offset = i386nto_gregset_reg_offset;
 337   tdep->sc_num_regs = ARRAY_SIZE (i386nto_gregset_reg_offset);
 338
 339   /* Setjmp()'s return PC saved in EDX (5).  */
 340   tdep->jb_pc_offset = 20;      /* 5x32 bit ints in.  */
 341
 342   set_solib_svr4_fetch_link_map_offsets
 343     (gdbarch, svr4_ilp32_fetch_link_map_offsets);
 344
 345   /* Initialize this lazily, to avoid an initialization order
 346      dependency on solib-svr4.c's _initialize routine.  */
 347   if (nto_svr4_so_ops.in_dynsym_resolve_code == NULL)
 348     {
 349       nto_svr4_so_ops = svr4_so_ops;
 350
 351       /* Our loader handles solib relocations differently than svr4.  */
 352       nto_svr4_so_ops.relocate_section_addresses
 353         = nto_relocate_section_addresses;
 354
 355       /* Supply a nice function to find our solibs.  */
 356       nto_svr4_so_ops.find_and_open_solib
 357         = nto_find_and_open_solib;
 358
 359       /* Our linker code is in libc.  */
 360       nto_svr4_so_ops.in_dynsym_resolve_code
 361         = nto_in_dynsym_resolve_code;
 362     }
 363   set_gdbarch_so_ops (gdbarch, &nto_svr4_so_ops);
 364
 365   set_gdbarch_wchar_bit (gdbarch, 32);
 366   set_gdbarch_wchar_signed (gdbarch, 0);
 367 }
 368
 369 void _initialize_i386nto_tdep ();
 370 void
 371 _initialize_i386nto_tdep ()
 372 {
 373   init_i386nto_ops ();
 374   gdbarch_register_osabi (bfd_arch_i386, 0, GDB_OSABI_QNXNTO,
 375                           i386nto_init_abi);
 376   gdbarch_register_osabi_sniffer (bfd_arch_i386, bfd_target_elf_flavour,
 377                                   nto_elf_osabi_sniffer);
 378 }