1 2023-03-15 Nick Clifton <nickc@redhat.com>
4 * mep.opc (mep_print_insn): Check for an out of range index.
6 2022-12-31 Nick Clifton <nickc@redhat.com>
10 2022-07-08 Nick Clifton <nickc@redhat.com>
12 * 2.39 branch created.
14 2022-01-22 Nick Clifton <nickc@redhat.com>
16 * 2.38 release branch created.
18 2021-07-05 Alan Modra <amodra@gmail.com>
20 * mep.opc (macros): Make static and const.
21 (lookup_macro): Return and use const pointer.
22 (expand_macro): Make mac param const.
23 (expand_string): Make pmacro const.
25 2021-07-03 Nick Clifton <nickc@redhat.com>
27 * 2.37 release branch created.
29 2021-05-06 Stafford Horne <shorne@gmail.com>
32 * or1k.opc (or1k_imm16_relocs, parse_reloc): Define parse logic
33 for gotha() relocation.
35 2021-03-31 Alan Modra <amodra@gmail.com>
37 * frv.opc: Replace bfd_boolean with bool, FALSE with false, and
38 TRUE with true throughout.
40 2021-03-29 Alan Modra <amodra@gmail.com>
42 * frv.opc (frv_is_branch_major, frv_is_float_major),
43 (frv_is_media_major, frv_is_branch_insn, frv_is_float_insn),
44 (frv_is_media_insn, spr_valid): Correct prototypes.
46 2021-01-09 Nick Clifton <nickc@redhat.com>
48 * 2.36 release branch crated.
50 2020-10-05 Samanta Navarro <ferivoz@riseup.net>
52 * m32r.cpu: Fix spelling mistakes.
54 2020-09-18 David Faust <david.faust@oracle.com>
56 * bpf.cpu (insn-op-code-alu): Add SDIV and SMOD.
57 (define-alu-insn-bin, daib): Take ISAs as an argument.
58 (define-alu-instructions): Update calls to daib pmacro with
59 ISAs; add sdiv and smod.
61 2020-09-08 David Faust <david.faust@oracle.com>
63 * bpf.cpu (define-alu-instructions): Correct semantic operators
64 for div, mod to unsigned versions.
66 2020-09-01 Alan Modra <amodra@gmail.com>
68 * mep-core.cpu (f-8s8a2, f-12s4a2, f-17s16a2): Multiply signed
69 value by two rather than shifting left.
70 (f-24s5a2n): Similarly multiply signed f-24s5a2n-hi to extract.
72 2020-08-26 David Faust <david.faust@oracle.com>
74 * bpf.cpu (arch bpf): Add xbpf mach and isas.
75 (define-xbpf-isa) New pmacro.
76 (all-isas) Add xbpfle,xbpfbe.
77 (endian-isas): New pmacro.
79 (model xbpf-def): Likewise.
80 (h-gpr): Add xbpf mach.
81 (f-dstle, f-srcle, dstle, srcle): Add xbpfle isa.
82 (f-dstbe, f-srcbe, dstbe, srcbe): Add xbpfbe isa.
83 (define-alu-insn-un): Use new endian-isas pmacro.
84 (define-alu-insn-bin, define-alu-insn-mov): Likewise.
85 (define-endian-insn, define-lddw): Likewise.
86 (dlind, dxli, dxsi, dsti): Likewise.
87 (define-cond-jump-insn, define-call-insn): Likewise.
88 (define-atomic-insns): Likewise.
90 2020-07-04 Nick Clifton <nickc@redhat.com>
92 Binutils 2.35 branch created.
94 2020-06-25 David Faust <david.faust@oracle.com>
96 * bpf.cpu (f-offset16): Change type from INT to HI.
97 (dxli): Simplify memory access.
99 (define-endian-insn): Update c-call in semantics.
103 2020-06-02 Jose E. Marchesi <jose.marchesi@oracle.com>
105 * bpf.cpu (define-bpf-isa): Set base-insn-bitsize to 64.
106 * bpf.opc (bpf_print_insn): Do not set endian_code here.
108 2020-06-02 Jose E. Marchesi <jose.marchesi@oracle.com>
110 * mep.opc (print_slot_insn): Pass the insn endianness to
113 2020-05-28 Jose E. Marchesi <jose.marchesi@oracle.com>
114 David Faust <david.faust@oracle.com>
116 * bpf.cpu (define-alu-insn-un): Add definitions of semantics.
117 (define-alu-insn-mov): Likewise.
119 (define-alu-instructions): Likewise.
120 (define-endian-insn): Likewise.
121 (define-lddw): Likewise.
127 (define-ldstx-insns): Likewise.
128 (define-st-insns): Likewise.
129 (define-cond-jump-insn): Likewise.
131 (define-condjump-insns): Likewise.
132 (define-call-insn): Likewise.
135 (define-atomic-insns): Likewise.
136 (sem-exchange-and-add): New macro.
137 * bpf.cpu ("brkpt"): New instruction.
138 (bpfbf): Set word-bitsize to 32 and insn-endian big.
139 (h-gpr): Prefer r0 to `a' and r6 to `ctx'.
140 (h-pc): Expand definition.
141 * bpf.opc (bpf_print_insn): Set endian_code to BIG.
143 2020-05-21 Alan Modra <amodra@gmail.com>
145 * mep.opc (mep_cgen_expand_macros_and_parse_operand): Replace
146 "if (x) free (x)" with "free (x)".
148 2020-05-19 Stafford Horne <shorne@gmail.com>
151 * or1k.cpu (arch or1k): Remove or64 and or64nd machs.
152 (ORBIS-MACHS, ORFPX32-MACHS): Remove pmacros.
153 (cpu or1k64bf, mach or64, mach or64nd): Remove definitions.
154 * or1kcommon.cpu (h-fdr): Remove hardware.
155 * or1korfpx.cpu (rDDF, rADF, rBDF): Remove operand definitions.
156 (float-regreg-insn): Remove lf- mnemonic -d instruction pattern.
157 (float-setflag-insn-base): Remove lf-sf mnemonic -d pattern.
158 (float-cust-insn): Remove "lf-cust" cust-num "-d" pattern.
159 (lf-rem-d, lf-itof-d, lf-ftoi-d, lf-madd-d): Remove.
161 2020-02-16 David Faust <david.faust@oracle.com>
163 * bpf.cpu (define-cond-jump-insn): Renamed from djci.
164 (dcji) New version with support for JMP32
166 2020-02-03 Alan Modra <amodra@gmail.com>
168 * m32c.cpu (f-dsp-64-s16): Mask before shifting signed value.
170 2020-02-01 Alan Modra <amodra@gmail.com>
172 * frv.cpu (f-u12): Multiply rather than left shift signed values.
173 (f-label16, f-label24): Likewise.
175 2020-01-30 Alan Modra <amodra@gmail.com>
177 * m32c.cpu (f-src32-rn-unprefixed-QI): Shift before inverting.
178 (f-src32-rn-prefixed-QI, f-dst32-rn-unprefixed-QI): Likewise.
179 (f-dst32-rn-prefixed-QI): Likewise.
180 (f-dsp-32-s32): Mask before shifting left.
181 (f-dsp-48-u32, f-dsp-48-s32): Likewise.
182 (f-bitbase32-16-s11-unprefixed): Multiply signed field rather than
184 (f-bitbase32-24-s11-prefixed, f-bitbase32-24-s19-prefixed): Likewise.
185 (h-gr-SI): Mask before shifting.
187 2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
189 * bpf.cpu (define-alu-insn-un): The unary BPF instructions
190 (neg and neg32) use OP_SRC_K even if they operate only in
193 2020-01-18 Nick Clifton <nickc@redhat.com>
195 Binutils 2.34 branch created.
197 2020-01-13 Alan Modra <amodra@gmail.com>
199 * fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't
200 left shift signed values.
202 2020-01-06 Alan Modra <amodra@gmail.com>
204 * m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign
205 bits before shifting rather than masking after shifting.
206 (f-dsp-16-u16, f-dsp-16-s16, f-dsp-32-u16, f-dsp-32-s16): Likewise.
207 (f-dsp-40-u16, f-dsp-40-s16, f-dsp-48-u16, f-dsp-48-s16): Likewise.
208 (f-dsp-64-u16, f-dsp-8-s24): Likewise.
209 (f-bitbase32-16-s19-unprefixed): Avoid signed left shift.
211 2020-01-04 Alan Modra <amodra@gmail.com>
213 * m32r.cpu (f-disp8): Avoid left shift of negative values.
214 (f-disp16, f-disp24): Likewise.
216 2019-12-23 Alan Modra <amodra@gmail.com>
218 * iq2000.cpu (f-offset): Avoid left shift of negative values.
220 2019-12-20 Alan Modra <amodra@gmail.com>
222 * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values.
224 2019-12-17 Alan Modra <amodra@gmail.com>
226 * bpf.cpu (f-imm64): Avoid signed overflow.
228 2019-12-16 Alan Modra <amodra@gmail.com>
230 * xstormy16.cpu (f-rel12a): Avoid signed overflow.
232 2019-12-11 Alan Modra <amodra@gmail.com>
234 * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
235 * lm32.cpu (f-branch, f-vall): Likewise.
236 * m32.cpu (f-lab-8-16): Likewise.
238 2019-12-11 Alan Modra <amodra@gmail.com>
240 * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
241 shift left to avoid UB on left shift of negative values.
243 2019-11-20 Jose E. Marchesi <jose.marchesi@oracle.com>
245 * bpf.cpu: Fix comment describing the 128-bit instruction format.
247 2019-09-09 Phil Blundell <pb@pbcl.net>
249 binutils 2.33 branch created.
251 2019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com>
253 * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
256 2019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com>
258 * bpf.cpu (dlabs): New pmacro.
261 2019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
263 * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
264 explicit 'dst' argument.
266 2019-06-13 Stafford Horne <shorne@gmail.com>
268 * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
270 2019-06-13 Stafford Horne <shorne@gmail.com>
272 * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
273 (l-adrp): Improve comment.
275 2019-06-13 Stafford Horne <shorne@gmail.com>
277 * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
278 SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
279 SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
280 (float-setflag-insn-base): New pmacro based on float-setflag-insn.
281 (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
282 float-setflag-unordered-symantics): New pmacro for instruction
284 (float-setflag-insn): Update to use float-setflag-insn-base.
285 (float-setflag-unordered-insn): New pmacro for generating instructions.
287 2019-06-13 Andrey Bacherov <avbacherov@opencores.org>
288 Stafford Horne <shorne@gmail.com>
290 * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
291 (ORFPX-MACHS): Removed pmacro.
292 * or1k.opc (or1k_cgen_insn_supported): New function.
293 (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
294 (parse_regpair, print_regpair): New functions.
295 * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
297 (h-fdr): Update comment to indicate or64.
298 (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
299 (h-fd32r): New hardware for 64-bit fpu registers.
300 (h-i64r): New hardware for 64-bit int registers.
301 * or1korbis.cpu (f-resv-8-1): New field.
302 * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
303 (rDDF, rADF, rBDF): Update operand comment to indicate or64.
304 (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
305 (h-roff1): New hardware.
306 (double-field-and-ops mnemonic): New pmacro to generate operations
307 rDD32F, rAD32F, rBD32F, rDDI and rADI.
308 (float-regreg-insn): Update single precision generator to MACH
309 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
310 (float-setflag-insn): Update single precision generator to MACH
311 ORFPX32-MACHS. Fix double instructions from single to double
312 precision. Add generator for or32 64-bit instructions.
313 (float-cust-insn cust-num): Update single precision generator to MACH
314 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
315 (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
317 (lf-rem-d): Fix operation from mod to rem.
318 (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
319 (lf-itof-d): Fix operands from single to double.
320 (lf-ftoi-d): Update operand mode from DI to WI.
322 2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
327 2018-06-24 Nick Clifton <nickc@redhat.com>
331 2018-10-05 Richard Henderson <rth@twiddle.net>
332 Stafford Horne <shorne@gmail.com>
334 * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
335 (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
336 (l-mul): Fix overflow support and indentation.
337 (l-mulu): Fix overflow support and indentation.
338 (l-muld, l-muldu, l-msbu, l-macu): New instructions.
339 (l-div); Remove incorrect carry behavior.
340 (l-divu): Fix carry and overflow behavior.
341 (l-mac): Add overflow support.
342 (l-msb, l-msbu): Add carry and overflow support.
344 2018-10-05 Richard Henderson <rth@twiddle.net>
346 * or1k.opc (parse_disp26): Add support for plta() relocations.
347 (parse_disp21): New function.
348 (or1k_rclass): New enum.
349 (or1k_rtype): New enum.
350 (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
351 (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
352 (parse_imm16): Add support for the new 21bit and 13bit relocations.
353 * or1korbis.cpu (f-disp26): Don't assume SI.
354 (f-disp21): New pc-relative 21-bit 13 shifted to right.
355 (insn-opcode): Add ADRP.
356 (l-adrp): New instruction.
358 2018-10-05 Richard Henderson <rth@twiddle.net>
360 * or1k.opc: Add RTYPE_ enum.
361 (INVALID_STORE_RELOC): New string.
362 (or1k_imm16_relocs): New array array.
363 (parse_reloc): New static function that just does the parsing.
364 (parse_imm16): New static function for generic parsing.
365 (parse_simm16): Change to just call parse_imm16.
366 (parse_simm16_split): New function.
367 (parse_uimm16): Change to call parse_imm16.
368 (parse_uimm16_split): New function.
369 * or1korbis.cpu (simm16-split): Change to use new simm16_split.
370 (uimm16-split): Change to use new uimm16_split.
372 2018-07-24 Alan Modra <amodra@gmail.com>
375 * or1kcommon.cpu (spr-reg-indices): Fix description typo.
377 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
379 * or1kcommon.cpu (spr-reg-info): Typo fix.
381 2018-03-03 Alan Modra <amodra@gmail.com>
383 * frv.opc: Include opintl.h.
384 (add_next_to_vliw): Use opcodes_error_handler to print error.
385 Standardize error message.
386 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
388 2018-01-13 Nick Clifton <nickc@redhat.com>
392 2017-03-15 Stafford Horne <shorne@gmail.com>
394 * or1kcommon.cpu: Add pc set semantics to also update ppc.
396 2016-10-06 Alan Modra <amodra@gmail.com>
398 * mep.opc (expand_string): Add fall through comment.
400 2016-03-03 Alan Modra <amodra@gmail.com>
402 * fr30.cpu (f-m4): Replace bogus comment with a better guess
403 at what is really going on.
405 2016-03-02 Alan Modra <amodra@gmail.com>
407 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
409 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
411 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
412 a constant to better align disassembler output.
414 2014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
416 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
418 2014-06-12 Alan Modra <amodra@gmail.com>
420 * or1k.opc: Whitespace fixes.
422 2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
424 * or1korbis.cpu (h-atomic-reserve): New hardware.
425 (h-atomic-address): Likewise.
426 (insn-opcode): Add opcodes for LWA and SWA.
427 (atomic-reserve): New operand.
428 (atomic-address): Likewise.
429 (l-lwa, l-swa): New instructions.
430 (l-lbs): Fix typo in comment.
431 (store-insn): Clear atomic reserve on store to atomic-address.
432 Fix register names in fmt field.
434 2014-04-22 Christian Svensson <blue@cmd.nu>
436 * openrisc.cpu: Delete.
437 * openrisc.opc: Delete.
438 * or1k.cpu: New file.
439 * or1k.opc: New file.
440 * or1kcommon.cpu: New file.
441 * or1korbis.cpu: New file.
442 * or1korfpx.cpu: New file.
444 2013-12-07 Mike Frysinger <vapier@gentoo.org>
446 * epiphany.opc: Remove +x file mode.
448 2013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
451 * lm32.cpu (Control and status registers): Add CFG2, PSW,
452 TLBVADDR, TLBPADDR and TLBBADVADDR.
454 2012-11-30 Oleg Raikhman <oleg@adapteva.com>
455 Joern Rennecke <joern.rennecke@embecosm.com>
457 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
458 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
459 (testset-insn): Add NO_DIS attribute to t.l.
460 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
461 (move-insns): Add NO-DIS attribute to cmov.l.
462 (op-mmr-movts): Add NO-DIS attribute to movts.l.
463 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
464 (op-rrr): Add NO-DIS attribute to .l.
465 (shift-rrr): Add NO-DIS attribute to .l.
466 (op-shift-rri): Add NO-DIS attribute to i32.l.
467 (bitrl, movtl): Add NO-DIS attribute.
468 (op-iextrrr): Add NO-DIS attribute to .l
469 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
470 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
472 2012-02-27 Alan Modra <amodra@gmail.com>
474 * mt.opc (print_dollarhex): Trim values to 32 bits.
476 2011-12-15 Nick Clifton <nickc@redhat.com>
478 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
481 2011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
483 * epiphany.opc (parse_branch_addr): Fix type of valuep.
484 Cast value before printing it as a long.
485 (parse_postindex): Fix type of valuep.
487 2011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
489 * cpu/epiphany.cpu: New file.
490 * cpu/epiphany.opc: New file.
492 2011-08-22 Nick Clifton <nickc@redhat.com>
494 * fr30.cpu: Newly contributed file.
495 * fr30.opc: Likewise.
496 * ip2k.cpu: Likewise.
497 * ip2k.opc: Likewise.
498 * mep-avc.cpu: Likewise.
499 * mep-avc2.cpu: Likewise.
500 * mep-c5.cpu: Likewise.
501 * mep-core.cpu: Likewise.
502 * mep-default.cpu: Likewise.
503 * mep-ext-cop.cpu: Likewise.
504 * mep-fmax.cpu: Likewise.
505 * mep-h1.cpu: Likewise.
506 * mep-ivc2.cpu: Likewise.
507 * mep-rhcop.cpu: Likewise.
508 * mep-sample-ucidsp.cpu: Likewise.
511 * openrisc.cpu: Likewise.
512 * openrisc.opc: Likewise.
513 * xstormy16.cpu: Likewise.
514 * xstormy16.opc: Likewise.
516 2010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
518 * frv.opc: #undef DEBUG.
520 2010-07-03 DJ Delorie <dj@delorie.com>
522 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
524 2010-02-11 Doug Evans <dje@sebabeach.org>
526 * m32r.cpu (HASH-PREFIX): Delete.
527 (duhpo, dshpo): New pmacros.
528 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
529 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
530 attribute, define with dshpo.
531 (uimm24): Delete HASH-PREFIX attribute.
532 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
533 (print_signed_with_hash_prefix): New function.
534 (print_unsigned_with_hash_prefix): New function.
535 * xc16x.cpu (dowh): New pmacro.
536 (upof16): Define with dowh, specify print handler.
537 (qbit, qlobit, qhibit): Ditto.
539 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
540 (print_with_dot_prefix): New functions.
541 (print_with_pof_prefix, print_with_pag_prefix): New functions.
543 2010-01-24 Doug Evans <dje@sebabeach.org>
545 * frv.cpu (floating-point-conversion): Update call to fp conv op.
546 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
547 conditional-floating-point-conversion, ne-floating-point-conversion,
548 float-parallel-mul-add-double-semantics): Ditto.
550 2010-01-05 Doug Evans <dje@sebabeach.org>
552 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
553 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
555 2010-01-02 Doug Evans <dje@sebabeach.org>
557 * m32c.opc (parse_signed16): Fix typo.
559 2009-12-11 Nick Clifton <nickc@redhat.com>
561 * frv.opc: Fix shadowed variable warnings.
562 * m32c.opc: Fix shadowed variable warnings.
564 2009-11-14 Doug Evans <dje@sebabeach.org>
566 Must use VOID expression in VOID context.
567 * xc16x.cpu (mov4): Fix mode of `sequence'.
568 (mov9, mov10): Ditto.
569 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
570 (callr, callseg, calls, trap, rets, reti): Ditto.
571 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
572 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
573 (exts, exts1, extsr, extsr1, prior): Ditto.
575 2009-10-23 Doug Evans <dje@sebabeach.org>
577 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
578 cgen-ops.h -> cgen/basic-ops.h.
580 2009-09-25 Alan Modra <amodra@bigpond.net.au>
582 * m32r.cpu (stb-plus): Typo fix.
584 2009-09-23 Doug Evans <dje@sebabeach.org>
586 * m32r.cpu (sth-plus): Fix address mode and calculation.
588 (clrpsw): Fix mask calculation.
589 (bset, bclr, btst): Make mode in bit calculation match expression.
591 * xc16x.cpu (rtl-version): Set to 0.8.
592 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
593 make uppercase. Remove unnecessary name-prefix spec.
594 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
595 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
596 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
597 (h-cr): New hardware.
598 (muls): Comment out parts that won't compile, add fixme.
599 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
600 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
601 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
603 2009-07-16 Doug Evans <dje@sebabeach.org>
605 * cpu/simplify.inc (*): One line doc strings don't need \n.
606 (df): Invoke define-full-ifield instead of claiming it's an alias.
608 (dnop): Mark as deprecated.
610 2009-06-22 Alan Modra <amodra@bigpond.net.au>
612 * m32c.opc (parse_lab_5_3): Use correct enum.
614 2009-01-07 Hans-Peter Nilsson <hp@axis.com>
616 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
617 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
618 (media-arith-sat-semantics): Explicitly sign- or zero-extend
619 arguments of "operation" to DI using "mode" and the new pmacros.
621 2009-01-03 Hans-Peter Nilsson <hp@axis.com>
623 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
626 2008-12-23 Jon Beniston <jon@beniston.com>
628 * lm32.cpu: New file.
629 * lm32.opc: New file.
631 2008-01-29 Alan Modra <amodra@bigpond.net.au>
633 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
636 2007-10-22 Hans-Peter Nilsson <hp@axis.com>
638 * cris.cpu (movs, movu): Use result of extension operation when
641 2007-07-04 Nick Clifton <nickc@redhat.com>
643 * cris.cpu: Update copyright notice to refer to GPLv3.
644 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
645 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
646 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
648 * iq2000.cpu: Fix copyright notice to refer to FSF.
650 2007-04-30 Mark Salter <msalter@sadr.localdomain>
652 * frv.cpu (spr-names): Support new coprocessor SPR registers.
654 2007-04-20 Nick Clifton <nickc@redhat.com>
656 * xc16x.cpu: Restore after accidentally overwriting this file with
659 2007-03-29 DJ Delorie <dj@redhat.com>
661 * m32c.cpu (Imm-8-s4n): Fix print hook.
662 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
663 (arith-jnz-imm4-dst-defn): Make relaxable.
664 (arith-jnz16-imm4-dst-defn): Fix encodings.
666 2007-03-20 DJ Delorie <dj@redhat.com>
668 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
670 (src16-16-20-An-relative-*): New.
671 (dst16-*-20-An-relative-*): New.
672 (dst16-16-16sa-*): New
673 (dst16-16-16ar-*): New
674 (dst32-16-16sa-Unprefixed-*): New
675 (jsri): Fix operands.
676 (setzx): Fix encoding.
678 2007-03-08 Alan Modra <amodra@bigpond.net.au>
680 * m32r.opc: Formatting.
682 2006-05-22 Nick Clifton <nickc@redhat.com>
684 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
686 2006-04-10 DJ Delorie <dj@redhat.com>
688 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
689 decides if this function accepts symbolic constants or not.
690 (parse_signed_bitbase): Likewise.
691 (parse_unsigned_bitbase8): Pass the new parameter.
692 (parse_unsigned_bitbase11): Likewise.
693 (parse_unsigned_bitbase16): Likewise.
694 (parse_unsigned_bitbase19): Likewise.
695 (parse_unsigned_bitbase27): Likewise.
696 (parse_signed_bitbase8): Likewise.
697 (parse_signed_bitbase11): Likewise.
698 (parse_signed_bitbase19): Likewise.
700 2006-03-13 DJ Delorie <dj@redhat.com>
702 * m32c.cpu (Bit3-S): New.
704 * m32c.opc (parse_bit3_S): New.
706 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
707 (btst): Add optional :G suffix for MACH32.
709 (pop.w:G): Add optional :G suffix for MACH16.
710 (push.b.imm): Fix syntax.
712 2006-03-10 DJ Delorie <dj@redhat.com>
714 * m32c.cpu (mul.l): New.
717 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
719 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
720 an error message otherwise.
721 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
722 Fix up comments to correctly describe the functions.
724 2006-02-24 DJ Delorie <dj@redhat.com>
726 * m32c.cpu (RL_TYPE): New attribute, with macros.
727 (Lab-8-24): Add RELAX.
728 (unary-insn-defn-g, binary-arith-imm-dst-defn,
729 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
730 (binary-arith-src-dst-defn): Add 2ADDR attribute.
731 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
732 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
734 (jsri16, jsri32): Add 1ADDR attribute.
735 (jsr32.w, jsr32.a): Add JUMP attribute.
737 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
738 Anil Paranjape <anilp1@kpitcummins.com>
739 Shilin Shakti <shilins@kpitcummins.com>
741 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
743 * xc16x.opc: New file containing supporting XC16C routines.
745 2006-02-10 Nick Clifton <nickc@redhat.com>
747 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
749 2006-01-06 DJ Delorie <dj@redhat.com>
751 * m32c.cpu (mov.w:q): Fix mode.
752 (push32.b.imm): Likewise, for the comment.
754 2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
756 Second part of ms1 to mt renaming.
757 * mt.cpu (define-arch, define-isa): Set name to mt.
758 (define-mach): Adjust.
759 * mt.opc (CGEN_ASM_HASH): Update.
760 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
761 (parse_loopsize, parse_imm16): Adjust.
763 2005-12-13 DJ Delorie <dj@redhat.com>
765 * m32c.cpu (jsri): Fix order so register names aren't treated as
767 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
768 indexwd, indexws): Fix encodings.
770 2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
772 * mt.cpu: Rename from ms1.cpu.
773 * mt.opc: Rename from ms1.opc.
775 2005-12-06 Hans-Peter Nilsson <hp@axis.com>
777 * cris.cpu (simplecris-common-writable-specregs)
778 (simplecris-common-readable-specregs): Split from
779 simplecris-common-specregs. All users changed.
780 (cris-implemented-writable-specregs-v0)
781 (cris-implemented-readable-specregs-v0): Similar from
782 cris-implemented-specregs-v0.
783 (cris-implemented-writable-specregs-v3)
784 (cris-implemented-readable-specregs-v3)
785 (cris-implemented-writable-specregs-v8)
786 (cris-implemented-readable-specregs-v8)
787 (cris-implemented-writable-specregs-v10)
788 (cris-implemented-readable-specregs-v10)
789 (cris-implemented-writable-specregs-v32)
790 (cris-implemented-readable-specregs-v32): Similar.
791 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
792 insns and specializations.
794 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
797 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
799 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
800 f-cb2incr, f-rc3): New fields.
801 (LOOP): New instruction.
802 (JAL-HAZARD): New hazard.
803 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
805 (mul, muli, dbnz, iflush): Enable for ms2
806 (jal, reti): Has JAL-HAZARD.
807 (ldctxt, ldfb, stfb): Only ms1.
808 (fbcb): Only ms1,ms1-003.
809 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
810 fbcbincrs, mfbcbincrs): Enable for ms2.
811 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
812 * ms1.opc (parse_loopsize): New.
813 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
816 2005-10-28 Dave Brolley <brolley@redhat.com>
818 Contribute the following change:
819 2003-09-24 Dave Brolley <brolley@redhat.com>
821 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
822 CGEN_ATTR_VALUE_TYPE.
823 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
824 Use cgen_bitset_intersect_p.
826 2005-10-27 DJ Delorie <dj@redhat.com>
828 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
829 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
830 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
831 imm operand is needed.
832 (adjnz, sbjnz): Pass the right operands.
833 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
834 unary-insn): Add -g variants for opcodes that need to support :G.
835 (not.BW:G, push.BW:G): Call it.
836 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
837 stzx16-imm8-imm8-abs16): Fix operand typos.
838 * m32c.opc (m32c_asm_hash): Support bnCND.
839 (parse_signed4n, print_signed4n): New.
841 2005-10-26 DJ Delorie <dj@redhat.com>
843 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
844 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
845 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
847 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
848 (mov.BW:S r0,r1): Fix typo r1l->r1.
849 (tst): Allow :G suffix.
850 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
852 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
854 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
856 2005-10-25 DJ Delorie <dj@redhat.com>
858 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
859 making one a macro of the other.
861 2005-10-21 DJ Delorie <dj@redhat.com>
863 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
864 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
865 indexld, indexls): .w variants have `1' bit.
866 (rot32.b): QI, not SI.
867 (rot32.w): HI, not SI.
868 (xchg16): HI for .w variant.
870 2005-10-19 Nick Clifton <nickc@redhat.com>
872 * m32r.opc (parse_slo16): Fix bad application of previous patch.
874 2005-10-18 Andreas Schwab <schwab@suse.de>
876 * m32r.opc (parse_slo16): Better version of previous patch.
878 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
880 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
883 2005-07-25 DJ Delorie <dj@redhat.com>
885 * m32c.opc (parse_unsigned8): Add %dsp8().
886 (parse_signed8): Add %hi8().
887 (parse_unsigned16): Add %dsp16().
888 (parse_signed16): Add %lo16() and %hi16().
889 (parse_lab_5_3): Make valuep a bfd_vma *.
891 2005-07-18 Nick Clifton <nickc@redhat.com>
893 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
895 (f-lab32-jmp-s): Fix insertion sequence.
896 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
897 (Dsp-40-s8): Make parameter be signed.
898 (Dsp-40-s16): Likewise.
899 (Dsp-48-s8): Likewise.
900 (Dsp-48-s16): Likewise.
901 (Imm-13-u3): Likewise. (Despite its name!)
902 (BitBase16-16-s8): Make the parameter be unsigned.
903 (BitBase16-8-u11-S): Likewise.
904 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
905 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
908 * m32c.opc: Fix formatting.
909 Use safe-ctype.h instead of ctype.h
910 Move duplicated code sequences into a macro.
911 Fix compile time warnings about signedness mismatches.
913 (parse_lab_5_3): New parser function.
915 2005-07-16 Jim Blandy <jimb@redhat.com>
917 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
918 to represent isa sets.
920 2005-07-15 Jim Blandy <jimb@redhat.com>
922 * m32c.cpu, m32c.opc: Fix copyright.
924 2005-07-14 Jim Blandy <jimb@redhat.com>
926 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
928 2005-07-14 Alan Modra <amodra@bigpond.net.au>
930 * ms1.opc (print_dollarhex): Correct format string.
932 2005-07-06 Alan Modra <amodra@bigpond.net.au>
934 * iq2000.cpu: Include from binutils cpu dir.
936 2005-07-05 Nick Clifton <nickc@redhat.com>
938 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
939 unsigned in order to avoid compile time warnings about sign
942 * ms1.opc (parse_*): Likewise.
943 (parse_imm16): Use a "void *" as it is passed both signed and
946 2005-07-01 Nick Clifton <nickc@redhat.com>
948 * frv.opc: Update to ISO C90 function declaration style.
949 * iq2000.opc: Likewise.
950 * m32r.opc: Likewise.
953 2005-06-15 Dave Brolley <brolley@redhat.com>
955 Contributed by Red Hat.
956 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
957 * ms1.opc: New file. Written by Stan Cox.
959 2005-05-10 Nick Clifton <nickc@redhat.com>
961 * Update the address and phone number of the FSF organization in
962 the GPL notices in the following files:
963 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
964 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
965 sh64-media.cpu, simplify.inc
967 2005-02-24 Alan Modra <amodra@bigpond.net.au>
969 * frv.opc (parse_A): Warning fix.
971 2005-02-23 Nick Clifton <nickc@redhat.com>
973 * frv.opc: Fixed compile time warnings about differing signed'ness
974 of pointers passed to functions.
975 * m32r.opc: Likewise.
977 2005-02-11 Nick Clifton <nickc@redhat.com>
979 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
980 'bfd_vma *' in order avoid compile time warning message.
982 2005-01-28 Hans-Peter Nilsson <hp@axis.com>
984 * cris.cpu (mstep): Add missing insn.
986 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
988 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
989 * frv.cpu: Add support for TLS annotations in loads and calll.
990 * frv.opc (parse_symbolic_address): New.
991 (parse_ldd_annotation): New.
992 (parse_call_annotation): New.
993 (parse_ld_annotation): New.
994 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
995 Introduce TLS relocations.
996 (parse_d12, parse_s12, parse_u12): Likewise.
997 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
998 (parse_call_label, print_at): New.
1000 2004-12-21 Mikael Starvik <starvik@axis.com>
1002 * cris.cpu (cris-set-mem): Correct integral write semantics.
1004 2004-11-29 Hans-Peter Nilsson <hp@axis.com>
1006 * cris.cpu: New file.
1008 2004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
1010 * iq2000.cpu: Added quotes around macro arguments so that they
1011 will work with newer versions of guile.
1013 2004-10-27 Nick Clifton <nickc@redhat.com>
1015 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
1016 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
1018 * iq2000.cpu (dnop index): Rename to _index to avoid complications
1021 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
1023 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
1025 2004-05-15 Nick Clifton <nickc@redhat.com>
1027 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
1029 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1031 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
1033 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1035 * frv.cpu (define-arch frv): Add fr450 mach.
1036 (define-mach fr450): New.
1037 (define-model fr450): New. Add profile units to every fr450 insn.
1038 (define-attr UNIT): Add MDCUTSSI.
1039 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
1040 (define-attr AUDIO): New boolean.
1041 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
1042 (f-LRA-null, f-TLBPR-null): New fields.
1043 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
1044 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
1045 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
1046 (LRA-null, TLBPR-null): New macros.
1047 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
1048 (load-real-address): New macro.
1049 (lrai, lrad, tlbpr): New instructions.
1050 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
1051 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
1052 (mdcutssi): Change UNIT attribute to MDCUTSSI.
1053 (media-low-clear-semantics, media-scope-limit-semantics)
1054 (media-quad-limit, media-quad-shift): New macros.
1055 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
1056 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
1057 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
1058 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
1059 (fr450_unit_mapping): New array.
1060 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
1061 for new MDCUTSSI unit.
1062 (fr450_check_insn_major_constraints): New function.
1063 (check_insn_major_constraints): Use it.
1065 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1067 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
1068 (scutss): Change unit to I0.
1069 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
1070 (mqsaths): Fix FR400-MAJOR categorization.
1071 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
1072 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
1073 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
1076 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1078 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
1079 (rstb, rsth, rst, rstd, rstq): Delete.
1080 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
1082 2004-02-23 Nick Clifton <nickc@redhat.com>
1084 * Apply these patches from Renesas:
1086 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1088 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
1089 disassembling codes for 0x*2 addresses.
1091 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1093 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
1095 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1097 * cpu/m32r.cpu : Add new model m32r2.
1098 Add new instructions.
1099 Replace occurrances of 'Mitsubishi' with 'Renesas'.
1100 Changed PIPE attr of push from O to OS.
1101 Care for Little-endian of M32R.
1102 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
1103 Care for Little-endian of M32R.
1104 (parse_slo16): signed extension for value.
1106 2004-02-20 Andrew Cagney <cagney@redhat.com>
1108 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
1109 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
1111 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
1112 written by Ben Elliston.
1114 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1116 * frv.cpu (UNIT): Add IACC.
1117 (iacc-multiply-r-r): Use it.
1118 * frv.opc (fr400_unit_mapping): Add entry for IACC.
1119 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
1121 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1123 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1124 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
1125 cut&paste errors in shifting/truncating numerical operands.
1126 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
1127 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1128 (parse_uslo16): Likewise.
1129 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1130 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1131 (parse_s12): Likewise.
1132 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1133 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
1134 (parse_uslo16): Likewise.
1135 (parse_uhi16): Parse gothi and gotfuncdeschi.
1136 (parse_d12): Parse got12 and gotfuncdesc12.
1137 (parse_s12): Likewise.
1139 2003-10-10 Dave Brolley <brolley@redhat.com>
1141 * frv.cpu (dnpmop): New p-macro.
1142 (GRdoublek): Use dnpmop.
1143 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
1144 (store-double-r-r): Use (.sym regtype doublek).
1145 (r-store-double): Ditto.
1146 (store-double-r-r-u): Ditto.
1147 (conditional-store-double): Ditto.
1148 (conditional-store-double-u): Ditto.
1149 (store-double-r-simm): Ditto.
1150 (fmovs): Assign to UNIT FMALL.
1152 2003-10-06 Dave Brolley <brolley@redhat.com>
1154 * frv.cpu, frv.opc: Add support for fr550.
1156 2003-09-24 Dave Brolley <brolley@redhat.com>
1158 * frv.cpu (u-commit): New modelling unit for fr500.
1159 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
1160 (commit-r): Use u-commit model for fr500.
1162 (conditional-float-binary-op): Take profiling data as an argument.
1164 (ne-float-binary-op): Ditto.
1166 2003-09-19 Michael Snyder <msnyder@redhat.com>
1168 * frv.cpu (nldqi): Delete unimplemented instruction.
1170 2003-09-12 Dave Brolley <brolley@redhat.com>
1172 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
1173 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
1174 frv_ref_SI to get input register referenced for profiling.
1175 (clear-ne-flag-all): Pass insn profiling in as an argument.
1176 (clrgr,clrfr,clrga,clrfa): Add profiling information.
1178 2003-09-11 Michael Snyder <msnyder@redhat.com>
1180 * frv.cpu: Typographical corrections.
1182 2003-09-09 Dave Brolley <brolley@redhat.com>
1184 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
1185 (conditional-media-dual-complex, media-quad-complex): Likewise.
1187 2003-09-04 Dave Brolley <brolley@redhat.com>
1189 * frv.cpu (register-transfer): Pass in all attributes in on argument.
1191 (conditional-register-transfer): Ditto.
1192 (cache-preload): Ditto.
1193 (floating-point-conversion): Ditto.
1194 (floating-point-neg): Ditto.
1196 (float-binary-op-s): Ditto.
1197 (conditional-float-binary-op): Ditto.
1198 (ne-float-binary-op): Ditto.
1199 (float-dual-arith): Ditto.
1200 (ne-float-dual-arith): Ditto.
1202 2003-09-03 Dave Brolley <brolley@redhat.com>
1204 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
1205 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
1207 (A): Removed operand.
1208 (A0,A1): New operands replace operand A.
1209 (mnop): Now a real insn
1210 (mclracc): Removed insn.
1211 (mclracc-0, mclracc-1): New insns replace mclracc.
1212 (all insns): Use new UNIT attributes.
1214 2003-08-21 Nick Clifton <nickc@redhat.com>
1216 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
1217 and u-media-dual-btoh with output parameter.
1218 (cmbtoh): Add profiling hack.
1220 2003-08-19 Michael Snyder <msnyder@redhat.com>
1222 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
1224 2003-06-10 Doug Evans <dje@sebabeach.org>
1226 * frv.cpu: Add IDOC attribute.
1228 2003-06-06 Andrew Cagney <cagney@redhat.com>
1230 Contributed by Red Hat.
1231 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
1232 Stan Cox, and Frank Ch. Eigler.
1233 * iq2000.opc: New file. Written by Ben Elliston, Frank
1234 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1235 * iq2000m.cpu: New file. Written by Jeff Johnston.
1236 * iq10.cpu: New file. Written by Jeff Johnston.
1238 2003-06-05 Nick Clifton <nickc@redhat.com>
1240 * frv.cpu (FRintieven): New operand. An even-numbered only
1241 version of the FRinti operand.
1242 (FRintjeven): Likewise for FRintj.
1243 (FRintkeven): Likewise for FRintk.
1244 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1245 media-quad-arith-sat-semantics, media-quad-arith-sat,
1246 conditional-media-quad-arith-sat, mdunpackh,
1247 media-quad-multiply-semantics, media-quad-multiply,
1248 conditional-media-quad-multiply, media-quad-complex-i,
1249 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1250 conditional-media-quad-multiply-acc, munpackh,
1251 media-quad-multiply-cross-acc-semantics, mdpackh,
1252 media-quad-multiply-cross-acc, mbtoh-semantics,
1253 media-quad-cross-multiply-cross-acc-semantics,
1254 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1255 media-quad-cross-multiply-acc-semantics, cmbtoh,
1256 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1257 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1258 cmhtob): Use new operands.
1259 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
1260 (parse_even_register): New function.
1262 2003-06-03 Nick Clifton <nickc@redhat.com>
1264 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1265 immediate value not unsigned.
1267 2003-06-03 Andrew Cagney <cagney@redhat.com>
1269 Contributed by Red Hat.
1270 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
1271 and Eric Christopher.
1272 * frv.opc: New file. Written by Catherine Moore, and Dave
1274 * simplify.inc: New file. Written by Doug Evans.
1276 2003-05-02 Andrew Cagney <cagney@redhat.com>
1281 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1283 Copying and distribution of this file, with or without modification,
1284 are permitted in any medium without royalty provided the copyright
1285 notice and this notice are preserved.
1291 version-control: never