1 2022-12-31 Nick Clifton <nickc@redhat.com>
5 2022-07-08 Nick Clifton <nickc@redhat.com>
9 2022-01-22 Nick Clifton <nickc@redhat.com>
11 * 2.38 release branch created.
13 2021-07-05 Alan Modra <amodra@gmail.com>
15 * mep.opc (macros): Make static and const.
16 (lookup_macro): Return and use const pointer.
17 (expand_macro): Make mac param const.
18 (expand_string): Make pmacro const.
20 2021-07-03 Nick Clifton <nickc@redhat.com>
22 * 2.37 release branch created.
24 2021-05-06 Stafford Horne <shorne@gmail.com>
27 * or1k.opc (or1k_imm16_relocs, parse_reloc): Define parse logic
28 for gotha() relocation.
30 2021-03-31 Alan Modra <amodra@gmail.com>
32 * frv.opc: Replace bfd_boolean with bool, FALSE with false, and
33 TRUE with true throughout.
35 2021-03-29 Alan Modra <amodra@gmail.com>
37 * frv.opc (frv_is_branch_major, frv_is_float_major),
38 (frv_is_media_major, frv_is_branch_insn, frv_is_float_insn),
39 (frv_is_media_insn, spr_valid): Correct prototypes.
41 2021-01-09 Nick Clifton <nickc@redhat.com>
43 * 2.36 release branch crated.
45 2020-10-05 Samanta Navarro <ferivoz@riseup.net>
47 * m32r.cpu: Fix spelling mistakes.
49 2020-09-18 David Faust <david.faust@oracle.com>
51 * bpf.cpu (insn-op-code-alu): Add SDIV and SMOD.
52 (define-alu-insn-bin, daib): Take ISAs as an argument.
53 (define-alu-instructions): Update calls to daib pmacro with
54 ISAs; add sdiv and smod.
56 2020-09-08 David Faust <david.faust@oracle.com>
58 * bpf.cpu (define-alu-instructions): Correct semantic operators
59 for div, mod to unsigned versions.
61 2020-09-01 Alan Modra <amodra@gmail.com>
63 * mep-core.cpu (f-8s8a2, f-12s4a2, f-17s16a2): Multiply signed
64 value by two rather than shifting left.
65 (f-24s5a2n): Similarly multiply signed f-24s5a2n-hi to extract.
67 2020-08-26 David Faust <david.faust@oracle.com>
69 * bpf.cpu (arch bpf): Add xbpf mach and isas.
70 (define-xbpf-isa) New pmacro.
71 (all-isas) Add xbpfle,xbpfbe.
72 (endian-isas): New pmacro.
74 (model xbpf-def): Likewise.
75 (h-gpr): Add xbpf mach.
76 (f-dstle, f-srcle, dstle, srcle): Add xbpfle isa.
77 (f-dstbe, f-srcbe, dstbe, srcbe): Add xbpfbe isa.
78 (define-alu-insn-un): Use new endian-isas pmacro.
79 (define-alu-insn-bin, define-alu-insn-mov): Likewise.
80 (define-endian-insn, define-lddw): Likewise.
81 (dlind, dxli, dxsi, dsti): Likewise.
82 (define-cond-jump-insn, define-call-insn): Likewise.
83 (define-atomic-insns): Likewise.
85 2020-07-04 Nick Clifton <nickc@redhat.com>
87 Binutils 2.35 branch created.
89 2020-06-25 David Faust <david.faust@oracle.com>
91 * bpf.cpu (f-offset16): Change type from INT to HI.
92 (dxli): Simplify memory access.
94 (define-endian-insn): Update c-call in semantics.
98 2020-06-02 Jose E. Marchesi <jose.marchesi@oracle.com>
100 * bpf.cpu (define-bpf-isa): Set base-insn-bitsize to 64.
101 * bpf.opc (bpf_print_insn): Do not set endian_code here.
103 2020-06-02 Jose E. Marchesi <jose.marchesi@oracle.com>
105 * mep.opc (print_slot_insn): Pass the insn endianness to
108 2020-05-28 Jose E. Marchesi <jose.marchesi@oracle.com>
109 David Faust <david.faust@oracle.com>
111 * bpf.cpu (define-alu-insn-un): Add definitions of semantics.
112 (define-alu-insn-mov): Likewise.
114 (define-alu-instructions): Likewise.
115 (define-endian-insn): Likewise.
116 (define-lddw): Likewise.
122 (define-ldstx-insns): Likewise.
123 (define-st-insns): Likewise.
124 (define-cond-jump-insn): Likewise.
126 (define-condjump-insns): Likewise.
127 (define-call-insn): Likewise.
130 (define-atomic-insns): Likewise.
131 (sem-exchange-and-add): New macro.
132 * bpf.cpu ("brkpt"): New instruction.
133 (bpfbf): Set word-bitsize to 32 and insn-endian big.
134 (h-gpr): Prefer r0 to `a' and r6 to `ctx'.
135 (h-pc): Expand definition.
136 * bpf.opc (bpf_print_insn): Set endian_code to BIG.
138 2020-05-21 Alan Modra <amodra@gmail.com>
140 * mep.opc (mep_cgen_expand_macros_and_parse_operand): Replace
141 "if (x) free (x)" with "free (x)".
143 2020-05-19 Stafford Horne <shorne@gmail.com>
146 * or1k.cpu (arch or1k): Remove or64 and or64nd machs.
147 (ORBIS-MACHS, ORFPX32-MACHS): Remove pmacros.
148 (cpu or1k64bf, mach or64, mach or64nd): Remove definitions.
149 * or1kcommon.cpu (h-fdr): Remove hardware.
150 * or1korfpx.cpu (rDDF, rADF, rBDF): Remove operand definitions.
151 (float-regreg-insn): Remove lf- mnemonic -d instruction pattern.
152 (float-setflag-insn-base): Remove lf-sf mnemonic -d pattern.
153 (float-cust-insn): Remove "lf-cust" cust-num "-d" pattern.
154 (lf-rem-d, lf-itof-d, lf-ftoi-d, lf-madd-d): Remove.
156 2020-02-16 David Faust <david.faust@oracle.com>
158 * bpf.cpu (define-cond-jump-insn): Renamed from djci.
159 (dcji) New version with support for JMP32
161 2020-02-03 Alan Modra <amodra@gmail.com>
163 * m32c.cpu (f-dsp-64-s16): Mask before shifting signed value.
165 2020-02-01 Alan Modra <amodra@gmail.com>
167 * frv.cpu (f-u12): Multiply rather than left shift signed values.
168 (f-label16, f-label24): Likewise.
170 2020-01-30 Alan Modra <amodra@gmail.com>
172 * m32c.cpu (f-src32-rn-unprefixed-QI): Shift before inverting.
173 (f-src32-rn-prefixed-QI, f-dst32-rn-unprefixed-QI): Likewise.
174 (f-dst32-rn-prefixed-QI): Likewise.
175 (f-dsp-32-s32): Mask before shifting left.
176 (f-dsp-48-u32, f-dsp-48-s32): Likewise.
177 (f-bitbase32-16-s11-unprefixed): Multiply signed field rather than
179 (f-bitbase32-24-s11-prefixed, f-bitbase32-24-s19-prefixed): Likewise.
180 (h-gr-SI): Mask before shifting.
182 2020-01-30 Jose E. Marchesi <jose.marchesi@oracle.com>
184 * bpf.cpu (define-alu-insn-un): The unary BPF instructions
185 (neg and neg32) use OP_SRC_K even if they operate only in
188 2020-01-18 Nick Clifton <nickc@redhat.com>
190 Binutils 2.34 branch created.
192 2020-01-13 Alan Modra <amodra@gmail.com>
194 * fr30.cpu (f-disp9, f-disp10, f-s10, f-rel9, f-rel12): Don't
195 left shift signed values.
197 2020-01-06 Alan Modra <amodra@gmail.com>
199 * m32c.cpu (f-dsp-8-u16, f-dsp-8-s16): Rearrange to mask any sign
200 bits before shifting rather than masking after shifting.
201 (f-dsp-16-u16, f-dsp-16-s16, f-dsp-32-u16, f-dsp-32-s16): Likewise.
202 (f-dsp-40-u16, f-dsp-40-s16, f-dsp-48-u16, f-dsp-48-s16): Likewise.
203 (f-dsp-64-u16, f-dsp-8-s24): Likewise.
204 (f-bitbase32-16-s19-unprefixed): Avoid signed left shift.
206 2020-01-04 Alan Modra <amodra@gmail.com>
208 * m32r.cpu (f-disp8): Avoid left shift of negative values.
209 (f-disp16, f-disp24): Likewise.
211 2019-12-23 Alan Modra <amodra@gmail.com>
213 * iq2000.cpu (f-offset): Avoid left shift of negative values.
215 2019-12-20 Alan Modra <amodra@gmail.com>
217 * or1korbis.cpu (f-disp26, f-disp21): Don't left shift negative values.
219 2019-12-17 Alan Modra <amodra@gmail.com>
221 * bpf.cpu (f-imm64): Avoid signed overflow.
223 2019-12-16 Alan Modra <amodra@gmail.com>
225 * xstormy16.cpu (f-rel12a): Avoid signed overflow.
227 2019-12-11 Alan Modra <amodra@gmail.com>
229 * epiphany.cpu (f-sdisp11): Don't sign extend with shifts.
230 * lm32.cpu (f-branch, f-vall): Likewise.
231 * m32.cpu (f-lab-8-16): Likewise.
233 2019-12-11 Alan Modra <amodra@gmail.com>
235 * epiphany.cpu (f-simm8, f-simm24): Use multiply rather than
236 shift left to avoid UB on left shift of negative values.
238 2019-11-20 Jose E. Marchesi <jose.marchesi@oracle.com>
240 * bpf.cpu: Fix comment describing the 128-bit instruction format.
242 2019-09-09 Phil Blundell <pb@pbcl.net>
244 binutils 2.33 branch created.
246 2019-07-19 Jose E. Marchesi <jose.marchesi@oracle.com>
248 * bpf.cpu (h-gpr): when disassembling, use %r0 and %r6 instead of
251 2019-07-15 Jose E. Marchesi <jose.marchesi@oracle.com>
253 * bpf.cpu (dlabs): New pmacro.
256 2019-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
258 * bpf.cpu (dlsi): ldabs and ldind instructions do not take an
259 explicit 'dst' argument.
261 2019-06-13 Stafford Horne <shorne@gmail.com>
263 * or1korfpx.cpu (float-setflag-insn-base): Add 'sf' to symbol.
265 2019-06-13 Stafford Horne <shorne@gmail.com>
267 * or1k.cpu (or64nd, or32nd, or1200nd): Update comment.a
268 (l-adrp): Improve comment.
270 2019-06-13 Stafford Horne <shorne@gmail.com>
272 * or1korfpx.cpu (insn-opcode-float-regreg): Add SFUEQ_S, SFUNE_S,
273 SFUGT_S, SFUGE_S, SFULT_S, SFULE_S, SFUN_S, SFUEQ_D, SFUNE_D, SFUGT_D,
274 SFUGE_D, SFULT_D, SFULE_D, SFUN_D opcodes.
275 (float-setflag-insn-base): New pmacro based on float-setflag-insn.
276 (float-setflag-symantics, float-setflag-unordered-cmp-symantics,
277 float-setflag-unordered-symantics): New pmacro for instruction
279 (float-setflag-insn): Update to use float-setflag-insn-base.
280 (float-setflag-unordered-insn): New pmacro for generating instructions.
282 2019-06-13 Andrey Bacherov <avbacherov@opencores.org>
283 Stafford Horne <shorne@gmail.com>
285 * or1k.cpu (ORFPX64A32-MACHS): New pmacro.
286 (ORFPX-MACHS): Removed pmacro.
287 * or1k.opc (or1k_cgen_insn_supported): New function.
288 (CGEN_VALIDATE_INSN_SUPPORTED): Define macro.
289 (parse_regpair, print_regpair): New functions.
290 * or1kcommon.cpu (h-spr, spr-shift, spr-address, h-gpr): Reorder
292 (h-fdr): Update comment to indicate or64.
293 (reg-pair-reg-lo, reg-pair-reg-hi): New pmacros for register pairs.
294 (h-fd32r): New hardware for 64-bit fpu registers.
295 (h-i64r): New hardware for 64-bit int registers.
296 * or1korbis.cpu (f-resv-8-1): New field.
297 * or1korfpx.cpu (rDSF, rASF, rBSF): Update attribute to ORFPX32-MACHS.
298 (rDDF, rADF, rBDF): Update operand comment to indicate or64.
299 (f-rdoff-10-1, f-raoff-9-1, f-rboff-8-1): New fields.
300 (h-roff1): New hardware.
301 (double-field-and-ops mnemonic): New pmacro to generate operations
302 rDD32F, rAD32F, rBD32F, rDDI and rADI.
303 (float-regreg-insn): Update single precision generator to MACH
304 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
305 (float-setflag-insn): Update single precision generator to MACH
306 ORFPX32-MACHS. Fix double instructions from single to double
307 precision. Add generator for or32 64-bit instructions.
308 (float-cust-insn cust-num): Update single precision generator to MACH
309 ORFPX32-MACHS. Add generator for or32 64-bit instructions.
310 (lf-rem-s, lf-itof-s, lf-ftoi-s, lf-madd-s): Update MACH to
312 (lf-rem-d): Fix operation from mod to rem.
313 (lf-rem-d32, lf-itof-d32, lf-ftoi-d32, lf-madd-d32): New instruction.
314 (lf-itof-d): Fix operands from single to double.
315 (lf-ftoi-d): Update operand mode from DI to WI.
317 2019-05-23 Jose E. Marchesi <jose.marchesi@oracle.com>
322 2018-06-24 Nick Clifton <nickc@redhat.com>
326 2018-10-05 Richard Henderson <rth@twiddle.net>
327 Stafford Horne <shorne@gmail.com>
329 * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU.
330 (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU.
331 (l-mul): Fix overflow support and indentation.
332 (l-mulu): Fix overflow support and indentation.
333 (l-muld, l-muldu, l-msbu, l-macu): New instructions.
334 (l-div); Remove incorrect carry behavior.
335 (l-divu): Fix carry and overflow behavior.
336 (l-mac): Add overflow support.
337 (l-msb, l-msbu): Add carry and overflow support.
339 2018-10-05 Richard Henderson <rth@twiddle.net>
341 * or1k.opc (parse_disp26): Add support for plta() relocations.
342 (parse_disp21): New function.
343 (or1k_rclass): New enum.
344 (or1k_rtype): New enum.
345 (or1k_imm16_relocs): Define new PO and SPO relocation mappings.
346 (parse_reloc): Add new po(), gotpo() and gottppo() for LO13 relocations.
347 (parse_imm16): Add support for the new 21bit and 13bit relocations.
348 * or1korbis.cpu (f-disp26): Don't assume SI.
349 (f-disp21): New pc-relative 21-bit 13 shifted to right.
350 (insn-opcode): Add ADRP.
351 (l-adrp): New instruction.
353 2018-10-05 Richard Henderson <rth@twiddle.net>
355 * or1k.opc: Add RTYPE_ enum.
356 (INVALID_STORE_RELOC): New string.
357 (or1k_imm16_relocs): New array array.
358 (parse_reloc): New static function that just does the parsing.
359 (parse_imm16): New static function for generic parsing.
360 (parse_simm16): Change to just call parse_imm16.
361 (parse_simm16_split): New function.
362 (parse_uimm16): Change to call parse_imm16.
363 (parse_uimm16_split): New function.
364 * or1korbis.cpu (simm16-split): Change to use new simm16_split.
365 (uimm16-split): Change to use new uimm16_split.
367 2018-07-24 Alan Modra <amodra@gmail.com>
370 * or1kcommon.cpu (spr-reg-indices): Fix description typo.
372 2018-05-09 Sebastian Rasmussen <sebras@gmail.com>
374 * or1kcommon.cpu (spr-reg-info): Typo fix.
376 2018-03-03 Alan Modra <amodra@gmail.com>
378 * frv.opc: Include opintl.h.
379 (add_next_to_vliw): Use opcodes_error_handler to print error.
380 Standardize error message.
381 (fr500_check_insn_major_constraints, frv_vliw_add_insn): Likewise.
383 2018-01-13 Nick Clifton <nickc@redhat.com>
387 2017-03-15 Stafford Horne <shorne@gmail.com>
389 * or1kcommon.cpu: Add pc set semantics to also update ppc.
391 2016-10-06 Alan Modra <amodra@gmail.com>
393 * mep.opc (expand_string): Add fall through comment.
395 2016-03-03 Alan Modra <amodra@gmail.com>
397 * fr30.cpu (f-m4): Replace bogus comment with a better guess
398 at what is really going on.
400 2016-03-02 Alan Modra <amodra@gmail.com>
402 * fr30.cpu (f-m4): Replace -1 << 4 with -16.
404 2016-02-02 Andrew Burgess <andrew.burgess@embecosm.com>
406 * epiphany.opc (epiphany_print_insn): Set info->bytes_per_line to
407 a constant to better align disassembler output.
409 2014-07-20 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
411 * or1korbis.cpu (l-msync, l-psync, l-csync): New instructions.
413 2014-06-12 Alan Modra <amodra@gmail.com>
415 * or1k.opc: Whitespace fixes.
417 2014-05-08 Stefan Kristiansson <stefan.kristiansson@saunalahti.fi>
419 * or1korbis.cpu (h-atomic-reserve): New hardware.
420 (h-atomic-address): Likewise.
421 (insn-opcode): Add opcodes for LWA and SWA.
422 (atomic-reserve): New operand.
423 (atomic-address): Likewise.
424 (l-lwa, l-swa): New instructions.
425 (l-lbs): Fix typo in comment.
426 (store-insn): Clear atomic reserve on store to atomic-address.
427 Fix register names in fmt field.
429 2014-04-22 Christian Svensson <blue@cmd.nu>
431 * openrisc.cpu: Delete.
432 * openrisc.opc: Delete.
433 * or1k.cpu: New file.
434 * or1k.opc: New file.
435 * or1kcommon.cpu: New file.
436 * or1korbis.cpu: New file.
437 * or1korfpx.cpu: New file.
439 2013-12-07 Mike Frysinger <vapier@gentoo.org>
441 * epiphany.opc: Remove +x file mode.
443 2013-03-08 Yann Sionneau <yann.sionneau@gmail.com>
446 * lm32.cpu (Control and status registers): Add CFG2, PSW,
447 TLBVADDR, TLBPADDR and TLBBADVADDR.
449 2012-11-30 Oleg Raikhman <oleg@adapteva.com>
450 Joern Rennecke <joern.rennecke@embecosm.com>
452 * epiphany.cpu (keyword gr-names): Move sb/sl/ip after r9/r10/r12.
453 (load_insn): Add NO-DIS attribute to x, p, d, dpm, dl0, dl0.l.
454 (testset-insn): Add NO_DIS attribute to t.l.
455 (store-insn): Add NO-DIS attribute to x.l, p.l, d.l, dpm.l, dl0.l.
456 (move-insns): Add NO-DIS attribute to cmov.l.
457 (op-mmr-movts): Add NO-DIS attribute to movts.l.
458 (op-mmr-movfs): Add NO-DIS attribute to movfs.l.
459 (op-rrr): Add NO-DIS attribute to .l.
460 (shift-rrr): Add NO-DIS attribute to .l.
461 (op-shift-rri): Add NO-DIS attribute to i32.l.
462 (bitrl, movtl): Add NO-DIS attribute.
463 (op-iextrrr): Add NO-DIS attribute to .l
464 (op-two_operands-float, op-fabs-float): Add NO-DIS attribute to f32.l.
465 (op-fix2float-float, op-float2fix-float, op-fextop-float): Likewise.
467 2012-02-27 Alan Modra <amodra@gmail.com>
469 * mt.opc (print_dollarhex): Trim values to 32 bits.
471 2011-12-15 Nick Clifton <nickc@redhat.com>
473 * frv.opc (parse_uhi16): Fix handling of %hi operator on 64-bit
476 2011-10-26 Joern Rennecke <joern.rennecke@embecosm.com>
478 * epiphany.opc (parse_branch_addr): Fix type of valuep.
479 Cast value before printing it as a long.
480 (parse_postindex): Fix type of valuep.
482 2011-10-25 Joern Rennecke <joern.rennecke@embecosm.com>
484 * cpu/epiphany.cpu: New file.
485 * cpu/epiphany.opc: New file.
487 2011-08-22 Nick Clifton <nickc@redhat.com>
489 * fr30.cpu: Newly contributed file.
490 * fr30.opc: Likewise.
491 * ip2k.cpu: Likewise.
492 * ip2k.opc: Likewise.
493 * mep-avc.cpu: Likewise.
494 * mep-avc2.cpu: Likewise.
495 * mep-c5.cpu: Likewise.
496 * mep-core.cpu: Likewise.
497 * mep-default.cpu: Likewise.
498 * mep-ext-cop.cpu: Likewise.
499 * mep-fmax.cpu: Likewise.
500 * mep-h1.cpu: Likewise.
501 * mep-ivc2.cpu: Likewise.
502 * mep-rhcop.cpu: Likewise.
503 * mep-sample-ucidsp.cpu: Likewise.
506 * openrisc.cpu: Likewise.
507 * openrisc.opc: Likewise.
508 * xstormy16.cpu: Likewise.
509 * xstormy16.opc: Likewise.
511 2010-10-08 Pierre Muller <muller@ics.u-strasbg.fr>
513 * frv.opc: #undef DEBUG.
515 2010-07-03 DJ Delorie <dj@delorie.com>
517 * m32c.cpu (f-dsp-8-s24): Mask high byte after shifting it.
519 2010-02-11 Doug Evans <dje@sebabeach.org>
521 * m32r.cpu (HASH-PREFIX): Delete.
522 (duhpo, dshpo): New pmacros.
523 (simm8, simm16): Delete HASH-PREFIX attribute, define with dshpo.
524 (uimm3, uimm4, uimm5, uimm8, uimm16, imm1): Delete HASH-PREFIX
525 attribute, define with dshpo.
526 (uimm24): Delete HASH-PREFIX attribute.
527 * m32r.opc (CGEN_PRINT_NORMAL): Delete.
528 (print_signed_with_hash_prefix): New function.
529 (print_unsigned_with_hash_prefix): New function.
530 * xc16x.cpu (dowh): New pmacro.
531 (upof16): Define with dowh, specify print handler.
532 (qbit, qlobit, qhibit): Ditto.
534 * xc16x.opc (CGEN_PRINT_NORMAL): Delete.
535 (print_with_dot_prefix): New functions.
536 (print_with_pof_prefix, print_with_pag_prefix): New functions.
538 2010-01-24 Doug Evans <dje@sebabeach.org>
540 * frv.cpu (floating-point-conversion): Update call to fp conv op.
541 (floating-point-dual-conversion, ne-floating-point-dual-conversion,
542 conditional-floating-point-conversion, ne-floating-point-conversion,
543 float-parallel-mul-add-double-semantics): Ditto.
545 2010-01-05 Doug Evans <dje@sebabeach.org>
547 * m32c.cpu (f-dsp-32-u24): Fix mode of extract handler.
548 (f-dsp-40-u20, f-dsp-40-u24): Ditto.
550 2010-01-02 Doug Evans <dje@sebabeach.org>
552 * m32c.opc (parse_signed16): Fix typo.
554 2009-12-11 Nick Clifton <nickc@redhat.com>
556 * frv.opc: Fix shadowed variable warnings.
557 * m32c.opc: Fix shadowed variable warnings.
559 2009-11-14 Doug Evans <dje@sebabeach.org>
561 Must use VOID expression in VOID context.
562 * xc16x.cpu (mov4): Fix mode of `sequence'.
563 (mov9, mov10): Ditto.
564 (movbsrr, moveb1, jmprel, jmpseg, jmps): Fix mode of `if'.
565 (callr, callseg, calls, trap, rets, reti): Ditto.
566 (jb, jbc, jnb, jnbs): Fix mode of `if'. Comment out no-op `sll'.
567 (atomic, extr, extp, extp1, extpg1, extpr, extpr1): Fix mode of `cond'.
568 (exts, exts1, extsr, extsr1, prior): Ditto.
570 2009-10-23 Doug Evans <dje@sebabeach.org>
572 * m32c.opc (opc.h): cgen-types.h -> cgen/basic-modes.h.
573 cgen-ops.h -> cgen/basic-ops.h.
575 2009-09-25 Alan Modra <amodra@bigpond.net.au>
577 * m32r.cpu (stb-plus): Typo fix.
579 2009-09-23 Doug Evans <dje@sebabeach.org>
581 * m32r.cpu (sth-plus): Fix address mode and calculation.
583 (clrpsw): Fix mask calculation.
584 (bset, bclr, btst): Make mode in bit calculation match expression.
586 * xc16x.cpu (rtl-version): Set to 0.8.
587 (gr-names, ext-names,psw-names): Update, print-name -> enum-prefix,
588 make uppercase. Remove unnecessary name-prefix spec.
589 (grb-names, conditioncode-names, extconditioncode-names): Ditto.
590 (grb8-names, r8-names, regmem8-names, regdiv8-names): Ditto.
591 (reg0-name, reg0-name1, regbmem8-names, memgr8-names): Ditto.
592 (h-cr): New hardware.
593 (muls): Comment out parts that won't compile, add fixme.
594 (mulu, divl, divlu, jmpabs, jmpa-, jmprel, jbc, jnbs, callr): Ditto.
595 (scxti, scxtmg, scxtm, bclear, bclr18, bset19, bitset, bmov): Ditto.
596 (bmovn, band, bor, bxor, bcmp, bfldl, bfldh): Ditto.
598 2009-07-16 Doug Evans <dje@sebabeach.org>
600 * cpu/simplify.inc (*): One line doc strings don't need \n.
601 (df): Invoke define-full-ifield instead of claiming it's an alias.
603 (dnop): Mark as deprecated.
605 2009-06-22 Alan Modra <amodra@bigpond.net.au>
607 * m32c.opc (parse_lab_5_3): Use correct enum.
609 2009-01-07 Hans-Peter Nilsson <hp@axis.com>
611 * frv.cpu (mabshs): Explicitly sign-extend arguments of abs to DI.
612 (DI-ext-HI, DI-ext-UHI, DI-ext-DI): New pmacros.
613 (media-arith-sat-semantics): Explicitly sign- or zero-extend
614 arguments of "operation" to DI using "mode" and the new pmacros.
616 2009-01-03 Hans-Peter Nilsson <hp@axis.com>
618 * cris.cpu (cris-implemented-writable-specregs-v32): Correct size
621 2008-12-23 Jon Beniston <jon@beniston.com>
623 * lm32.cpu: New file.
624 * lm32.opc: New file.
626 2008-01-29 Alan Modra <amodra@bigpond.net.au>
628 * mt.opc (parse_imm16): Apply 2007-09-26 opcodes/mt-asm.c change
631 2007-10-22 Hans-Peter Nilsson <hp@axis.com>
633 * cris.cpu (movs, movu): Use result of extension operation when
636 2007-07-04 Nick Clifton <nickc@redhat.com>
638 * cris.cpu: Update copyright notice to refer to GPLv3.
639 * frv.cpu, frv.opc, iq10.cpu, iq2000m.cpu, iq2000.opc, m32c.cpu,
640 m32c.opc, m32r.cpu, m32r.opc, mt.cpu, mt.opc, sh64-compact.cpu,
641 sh64-media.cpu, sh.cpu, sh.opc, simplify.inc, xc16x.cpu,
643 * iq2000.cpu: Fix copyright notice to refer to FSF.
645 2007-04-30 Mark Salter <msalter@sadr.localdomain>
647 * frv.cpu (spr-names): Support new coprocessor SPR registers.
649 2007-04-20 Nick Clifton <nickc@redhat.com>
651 * xc16x.cpu: Restore after accidentally overwriting this file with
654 2007-03-29 DJ Delorie <dj@redhat.com>
656 * m32c.cpu (Imm-8-s4n): Fix print hook.
657 (Lab-24-8, Lab-32-8, Lab-40-8): Fix.
658 (arith-jnz-imm4-dst-defn): Make relaxable.
659 (arith-jnz16-imm4-dst-defn): Fix encodings.
661 2007-03-20 DJ Delorie <dj@redhat.com>
663 * m32c.cpu (f-dsp-40-u20, f-dsp-48-u20, Dsp-40-u20, Dsp-40-u20,
665 (src16-16-20-An-relative-*): New.
666 (dst16-*-20-An-relative-*): New.
667 (dst16-16-16sa-*): New
668 (dst16-16-16ar-*): New
669 (dst32-16-16sa-Unprefixed-*): New
670 (jsri): Fix operands.
671 (setzx): Fix encoding.
673 2007-03-08 Alan Modra <amodra@bigpond.net.au>
675 * m32r.opc: Formatting.
677 2006-05-22 Nick Clifton <nickc@redhat.com>
679 * iq2000.cpu: Fix include paths for iq2000m.cpu and iq10.cpu.
681 2006-04-10 DJ Delorie <dj@redhat.com>
683 * m32c.opc (parse_unsigned_bitbase): Take a new parameter which
684 decides if this function accepts symbolic constants or not.
685 (parse_signed_bitbase): Likewise.
686 (parse_unsigned_bitbase8): Pass the new parameter.
687 (parse_unsigned_bitbase11): Likewise.
688 (parse_unsigned_bitbase16): Likewise.
689 (parse_unsigned_bitbase19): Likewise.
690 (parse_unsigned_bitbase27): Likewise.
691 (parse_signed_bitbase8): Likewise.
692 (parse_signed_bitbase11): Likewise.
693 (parse_signed_bitbase19): Likewise.
695 2006-03-13 DJ Delorie <dj@redhat.com>
697 * m32c.cpu (Bit3-S): New.
699 * m32c.opc (parse_bit3_S): New.
701 * m32c.cpu (decimal-subtraction16-insn): Add second operand.
702 (btst): Add optional :G suffix for MACH32.
704 (pop.w:G): Add optional :G suffix for MACH16.
705 (push.b.imm): Fix syntax.
707 2006-03-10 DJ Delorie <dj@redhat.com>
709 * m32c.cpu (mul.l): New.
712 2006-03-03 Shrirang Khisti <shrirangk@kpitcummins.com)
714 * xc16x.opc (parse_hash): Return NULL if the input was parsed or
715 an error message otherwise.
716 (parse_dot, parse_pof, parse_pag, parse_sof, parse_seg): Likewise.
717 Fix up comments to correctly describe the functions.
719 2006-02-24 DJ Delorie <dj@redhat.com>
721 * m32c.cpu (RL_TYPE): New attribute, with macros.
722 (Lab-8-24): Add RELAX.
723 (unary-insn-defn-g, binary-arith-imm-dst-defn,
724 binary-arith-imm4-dst-defn): Add 1ADDR attribute.
725 (binary-arith-src-dst-defn): Add 2ADDR attribute.
726 (jcnd16-5, jcnd16, jcnd32, jmp16.s, jmp16.b, jmp16.w, jmp16.a,
727 jmp32.s, jmp32.b, jmp32.w, jmp32.a, jsr16.w, jsr16.a): Add JUMP
729 (jsri16, jsri32): Add 1ADDR attribute.
730 (jsr32.w, jsr32.a): Add JUMP attribute.
732 2006-02-17 Shrirang Khisti <shrirangk@kpitcummins.com>
733 Anil Paranjape <anilp1@kpitcummins.com>
734 Shilin Shakti <shilins@kpitcummins.com>
736 * xc16x.cpu: New file containing complete CGEN specific XC16X CPU
738 * xc16x.opc: New file containing supporting XC16C routines.
740 2006-02-10 Nick Clifton <nickc@redhat.com>
742 * iq2000.opc (parse_hi16): Truncate shifted values to 16 bits.
744 2006-01-06 DJ Delorie <dj@redhat.com>
746 * m32c.cpu (mov.w:q): Fix mode.
747 (push32.b.imm): Likewise, for the comment.
749 2005-12-16 Nathan Sidwell <nathan@codesourcery.com>
751 Second part of ms1 to mt renaming.
752 * mt.cpu (define-arch, define-isa): Set name to mt.
753 (define-mach): Adjust.
754 * mt.opc (CGEN_ASM_HASH): Update.
755 (mt_asm_hash, mt_cgen_insn_supported): Renamed.
756 (parse_loopsize, parse_imm16): Adjust.
758 2005-12-13 DJ Delorie <dj@redhat.com>
760 * m32c.cpu (jsri): Fix order so register names aren't treated as
762 (indexb, indexbd, indexbs, indexl, indexld, indexls, indexw,
763 indexwd, indexws): Fix encodings.
765 2005-12-12 Nathan Sidwell <nathan@codesourcery.com>
767 * mt.cpu: Rename from ms1.cpu.
768 * mt.opc: Rename from ms1.opc.
770 2005-12-06 Hans-Peter Nilsson <hp@axis.com>
772 * cris.cpu (simplecris-common-writable-specregs)
773 (simplecris-common-readable-specregs): Split from
774 simplecris-common-specregs. All users changed.
775 (cris-implemented-writable-specregs-v0)
776 (cris-implemented-readable-specregs-v0): Similar from
777 cris-implemented-specregs-v0.
778 (cris-implemented-writable-specregs-v3)
779 (cris-implemented-readable-specregs-v3)
780 (cris-implemented-writable-specregs-v8)
781 (cris-implemented-readable-specregs-v8)
782 (cris-implemented-writable-specregs-v10)
783 (cris-implemented-readable-specregs-v10)
784 (cris-implemented-writable-specregs-v32)
785 (cris-implemented-readable-specregs-v32): Similar.
786 (bdap-32-pc, move-m-pcplus-p0, move-m-spplus-p8): New
787 insns and specializations.
789 2005-11-08 Nathan Sidwell <nathan@codesourcery.com>
792 * ms1.cpu (ms2, ms2bf): New architecture variant, cpu, machine and
794 (f-uu8, f-uu1, f-imm16l, f-loopo, f-cb1sel, f-cb2sel, f-cb1incr,
795 f-cb2incr, f-rc3): New fields.
796 (LOOP): New instruction.
797 (JAL-HAZARD): New hazard.
798 (imm16o, loopsize, imm16l, rc3, cb1sel, cb2sel, cb1incr, cb2incr):
800 (mul, muli, dbnz, iflush): Enable for ms2
801 (jal, reti): Has JAL-HAZARD.
802 (ldctxt, ldfb, stfb): Only ms1.
803 (fbcb): Only ms1,ms1-003.
804 (wfbinc, mefbinc, wfbincr, mwfbincr, fbcbincs, mfbcbincs,
805 fbcbincrs, mfbcbincrs): Enable for ms2.
806 (loop, loopu, dfbc, dwfb, fbwfb, dfbr): New ms2 insns.
807 * ms1.opc (parse_loopsize): New.
808 (parse_imm16): hi16/lo16 relocs are applicable to IMM16L.
811 2005-10-28 Dave Brolley <brolley@redhat.com>
813 Contribute the following change:
814 2003-09-24 Dave Brolley <brolley@redhat.com>
816 * frv.opc: Use CGEN_ATTR_VALUE_ENUM_TYPE in place of
817 CGEN_ATTR_VALUE_TYPE.
818 * m32c.opc (m32c_cgen_insn_supported): Use CGEN_INSN_BITSET_ATTR_VALUE.
819 Use cgen_bitset_intersect_p.
821 2005-10-27 DJ Delorie <dj@redhat.com>
823 * m32c.cpu (Imm-8-s4n, Imm-12-s4n): New.
824 (arith-jnz16-imm4-dst-defn, arith-jnz32-imm4-dst-defn,
825 arith-jnz-imm4-dst-mach, arith-jnz-imm4-dst): Keep track of which
826 imm operand is needed.
827 (adjnz, sbjnz): Pass the right operands.
828 (unary-insn-defn, unary16-defn, unary32-defn, unary-insn-mach,
829 unary-insn): Add -g variants for opcodes that need to support :G.
830 (not.BW:G, push.BW:G): Call it.
831 (stzx16-imm8-imm8-dsp8sb, stzx16-imm8-imm8-dsp8fb,
832 stzx16-imm8-imm8-abs16): Fix operand typos.
833 * m32c.opc (m32c_asm_hash): Support bnCND.
834 (parse_signed4n, print_signed4n): New.
836 2005-10-26 DJ Delorie <dj@redhat.com>
838 * m32c.cpu (f-dsp-8-s24, Dsp-8-s24): New.
839 (mov-dspsp-dst-defn, mov-src-dspsp-defn, mov16-dspsp-dst-defn,
840 mov16-src-dspsp-defn, mov32-dspsp-dst-defn, mov32-src-dspsp-defn):
842 (mov.WL:S #imm,A0/A1): dsp24 is signed (i.e. -0x800000..0xffffff).
843 (mov.BW:S r0,r1): Fix typo r1l->r1.
844 (tst): Allow :G suffix.
845 * m32c.opc (parse_signed24): New, for -0x800000..0xffffff.
847 2005-10-26 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
849 * m32r.opc (parse_hi16): Do not assume a 32-bit host word size.
851 2005-10-25 DJ Delorie <dj@redhat.com>
853 * m32c.cpu (add16-bQ-sp,add16-wQ-sp): Fix to allow either width by
854 making one a macro of the other.
856 2005-10-21 DJ Delorie <dj@redhat.com>
858 * m32c.cpu (lde, ste): Add dsp[a0] and [a1a] addressing.
859 (indexb, indexbd, indexbs, indexw, indexwd, indexws, indexl,
860 indexld, indexls): .w variants have `1' bit.
861 (rot32.b): QI, not SI.
862 (rot32.w): HI, not SI.
863 (xchg16): HI for .w variant.
865 2005-10-19 Nick Clifton <nickc@redhat.com>
867 * m32r.opc (parse_slo16): Fix bad application of previous patch.
869 2005-10-18 Andreas Schwab <schwab@suse.de>
871 * m32r.opc (parse_slo16): Better version of previous patch.
873 2005-10-14 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
875 * cpu/m32r.opc (parse_slo16): Do not assume a 32-bit host word
878 2005-07-25 DJ Delorie <dj@redhat.com>
880 * m32c.opc (parse_unsigned8): Add %dsp8().
881 (parse_signed8): Add %hi8().
882 (parse_unsigned16): Add %dsp16().
883 (parse_signed16): Add %lo16() and %hi16().
884 (parse_lab_5_3): Make valuep a bfd_vma *.
886 2005-07-18 Nick Clifton <nickc@redhat.com>
888 * m32c.cpu (f-16-8, f-24-8, f-32-16, f-dsp-8-u24): New opcode
890 (f-lab32-jmp-s): Fix insertion sequence.
891 (Dsp-8-u24, Lab-5-3, Lab32-jmp-s): New operands.
892 (Dsp-40-s8): Make parameter be signed.
893 (Dsp-40-s16): Likewise.
894 (Dsp-48-s8): Likewise.
895 (Dsp-48-s16): Likewise.
896 (Imm-13-u3): Likewise. (Despite its name!)
897 (BitBase16-16-s8): Make the parameter be unsigned.
898 (BitBase16-8-u11-S): Likewise.
899 (Lab-8-8, Lab-8-16, Lab-16-8, jcnd16-5, jcnd16, jcnd32, jmp16.s,
900 jmp16.b, jmp16.w, jmp32.s, jmp32.b, jmp32.w, jsp16.w, jsr32.w): Allow
903 * m32c.opc: Fix formatting.
904 Use safe-ctype.h instead of ctype.h
905 Move duplicated code sequences into a macro.
906 Fix compile time warnings about signedness mismatches.
908 (parse_lab_5_3): New parser function.
910 2005-07-16 Jim Blandy <jimb@redhat.com>
912 * m32c.opc (m32c_cgen_insn_supported): Use int, not CGEN_BITSET,
913 to represent isa sets.
915 2005-07-15 Jim Blandy <jimb@redhat.com>
917 * m32c.cpu, m32c.opc: Fix copyright.
919 2005-07-14 Jim Blandy <jimb@redhat.com>
921 * m32c.cpu, m32c.opc: Machine description for the Renesas M32C.
923 2005-07-14 Alan Modra <amodra@bigpond.net.au>
925 * ms1.opc (print_dollarhex): Correct format string.
927 2005-07-06 Alan Modra <amodra@bigpond.net.au>
929 * iq2000.cpu: Include from binutils cpu dir.
931 2005-07-05 Nick Clifton <nickc@redhat.com>
933 * iq2000.opc (parse_lo16, parse_mlo16): Make value parameter
934 unsigned in order to avoid compile time warnings about sign
937 * ms1.opc (parse_*): Likewise.
938 (parse_imm16): Use a "void *" as it is passed both signed and
941 2005-07-01 Nick Clifton <nickc@redhat.com>
943 * frv.opc: Update to ISO C90 function declaration style.
944 * iq2000.opc: Likewise.
945 * m32r.opc: Likewise.
948 2005-06-15 Dave Brolley <brolley@redhat.com>
950 Contributed by Red Hat.
951 * ms1.cpu: New file. Written by Nick Clifton, Stan Cox.
952 * ms1.opc: New file. Written by Stan Cox.
954 2005-05-10 Nick Clifton <nickc@redhat.com>
956 * Update the address and phone number of the FSF organization in
957 the GPL notices in the following files:
958 cris.cpu, frv.cpu, frv.opc, iq10.cpu, iq2000.opc, iq2000m.cpu,
959 m32r.cpu, m32r.opc, sh.cpu, sh.opc, sh64-compact.cpu,
960 sh64-media.cpu, simplify.inc
962 2005-02-24 Alan Modra <amodra@bigpond.net.au>
964 * frv.opc (parse_A): Warning fix.
966 2005-02-23 Nick Clifton <nickc@redhat.com>
968 * frv.opc: Fixed compile time warnings about differing signed'ness
969 of pointers passed to functions.
970 * m32r.opc: Likewise.
972 2005-02-11 Nick Clifton <nickc@redhat.com>
974 * iq2000.opc (parse_jtargq10): Change type of valuep argument to
975 'bfd_vma *' in order avoid compile time warning message.
977 2005-01-28 Hans-Peter Nilsson <hp@axis.com>
979 * cris.cpu (mstep): Add missing insn.
981 2005-01-25 Alexandre Oliva <aoliva@redhat.com>
983 2004-11-10 Alexandre Oliva <aoliva@redhat.com>
984 * frv.cpu: Add support for TLS annotations in loads and calll.
985 * frv.opc (parse_symbolic_address): New.
986 (parse_ldd_annotation): New.
987 (parse_call_annotation): New.
988 (parse_ld_annotation): New.
989 (parse_ulo16, parse_uslo16): Use parse_symbolic_address.
990 Introduce TLS relocations.
991 (parse_d12, parse_s12, parse_u12): Likewise.
992 (parse_uhi16): Likewise. Fix constant checking on 64-bit host.
993 (parse_call_label, print_at): New.
995 2004-12-21 Mikael Starvik <starvik@axis.com>
997 * cris.cpu (cris-set-mem): Correct integral write semantics.
999 2004-11-29 Hans-Peter Nilsson <hp@axis.com>
1001 * cris.cpu: New file.
1003 2004-11-15 Michael K. Lechner <mike.lechner@gmail.com>
1005 * iq2000.cpu: Added quotes around macro arguments so that they
1006 will work with newer versions of guile.
1008 2004-10-27 Nick Clifton <nickc@redhat.com>
1010 * iq2000m.cpu (pkrlr1, pkrlr30, rbr1, rbr30, rxr1, rxr30, wbr1,
1011 wbr1u, wbr30, wbr30u, wxr1, wxr1u, wxr30, wxr30u): Add an index
1013 * iq2000.cpu (dnop index): Rename to _index to avoid complications
1016 2004-08-27 Richard Sandiford <rsandifo@redhat.com>
1018 * frv.cpu (cfmovs): Change UNIT attribute to FMALL.
1020 2004-05-15 Nick Clifton <nickc@redhat.com>
1022 * iq2000.opc (iq2000_cgen_insn_supported): Make 'insn' argument const.
1024 2004-03-30 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1026 * m32r.opc (parse_hi16): Fixed shigh(0xffff8000) bug.
1028 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1030 * frv.cpu (define-arch frv): Add fr450 mach.
1031 (define-mach fr450): New.
1032 (define-model fr450): New. Add profile units to every fr450 insn.
1033 (define-attr UNIT): Add MDCUTSSI.
1034 (define-attr FR450-MAJOR): New enum. Add to every fr450 insn.
1035 (define-attr AUDIO): New boolean.
1036 (f-LRAE, f-LRAD, f-LRAS, f-TLBPRopx, f-TLBPRL)
1037 (f-LRA-null, f-TLBPR-null): New fields.
1038 (scr0, scr1, scr2, scr3, imavr1, damvr1, cxnr, ttbr)
1039 (tplr, tppr, tpxr, timerh, timerl, timerd, btbr): New SPRs.
1040 (LRAE, LRAD, LRAS, TLBPRopx, TLBPRL): New operands.
1041 (LRA-null, TLBPR-null): New macros.
1042 (iacc-multiply-r-r, slass, scutss, int-arith-ss-r-r): Add AUDIO attr.
1043 (load-real-address): New macro.
1044 (lrai, lrad, tlbpr): New instructions.
1045 (media-cut-acc, media-cut-acc-ss): Add fr450-major argument.
1046 (mcut, mcuti, mcutss, mcutssi): Adjust accordingly.
1047 (mdcutssi): Change UNIT attribute to MDCUTSSI.
1048 (media-low-clear-semantics, media-scope-limit-semantics)
1049 (media-quad-limit, media-quad-shift): New macros.
1050 (mqlclrhs, mqlmths, mqsllhi, mqsrahi): New instructions.
1051 * frv.opc (frv_is_branch_major, frv_is_float_major, frv_is_media_major)
1052 (frv_is_branch_insn, frv_is_float_insn, frv_is_media_insn)
1053 (frv_vliw_reset, frv_vliw_add_insn): Handle bfd_mach_fr450.
1054 (fr450_unit_mapping): New array.
1055 (fr400_unit_mapping, fr500_unit_mapping, fr550_unit_mapping): Add entry
1056 for new MDCUTSSI unit.
1057 (fr450_check_insn_major_constraints): New function.
1058 (check_insn_major_constraints): Use it.
1060 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1062 * frv.cpu (nsdiv, nudiv, nsdivi, nudivi): Remove fr400 profiling unit.
1063 (scutss): Change unit to I0.
1064 (calll, callil, ccalll): Add missing FR550-MAJOR and profile unit.
1065 (mqsaths): Fix FR400-MAJOR categorization.
1066 (media-quad-multiply-cross-acc, media-quad-cross-multiply-cross-acc)
1067 (media-quad-cross-multiply-acc): Change unit from MDUALACC to FMALL.
1068 * frv.opc (fr400_check_insn_major_constraints): Check for (M-2,M-1)
1071 2004-03-01 Richard Sandiford <rsandifo@redhat.com>
1073 * frv.cpu (r-store, r-store-dual, r-store-quad): Delete.
1074 (rstb, rsth, rst, rstd, rstq): Delete.
1075 (rstbf, rsthf, rstf, rstdf, rstqf): Delete.
1077 2004-02-23 Nick Clifton <nickc@redhat.com>
1079 * Apply these patches from Renesas:
1081 2004-02-10 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1083 * cpu/m32r.opc (my_print_insn): Fixed incorrect output when
1084 disassembling codes for 0x*2 addresses.
1086 2003-12-15 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1088 * cpu/m32r.cpu: Add PIPE_O attribute to "pop" instruction.
1090 2003-12-03 Kazuhiro Inaoka <inaoka.kazuhiro@renesas.com>
1092 * cpu/m32r.cpu : Add new model m32r2.
1093 Add new instructions.
1094 Replace occurrances of 'Mitsubishi' with 'Renesas'.
1095 Changed PIPE attr of push from O to OS.
1096 Care for Little-endian of M32R.
1097 * cpu/m32r.opc (CGEN_DIS_HASH, my_print_insn):
1098 Care for Little-endian of M32R.
1099 (parse_slo16): signed extension for value.
1101 2004-02-20 Andrew Cagney <cagney@redhat.com>
1103 * m32r.opc, m32r.cpu: New files. Written by , Doug Evans, Nick
1104 Clifton, Ben Elliston, Matthew Green, and Andrew Haley.
1106 * sh.cpu, sh.opc, sh64-compact.cpu, sh64-media.cpu: New files, all
1107 written by Ben Elliston.
1109 2004-01-14 Richard Sandiford <rsandifo@redhat.com>
1111 * frv.cpu (UNIT): Add IACC.
1112 (iacc-multiply-r-r): Use it.
1113 * frv.opc (fr400_unit_mapping): Add entry for IACC.
1114 (fr500_unit_mapping, fr550_unit_mapping): Likewise.
1116 2004-01-06 Alexandre Oliva <aoliva@redhat.com>
1118 2003-12-19 Alexandre Oliva <aoliva@redhat.com>
1119 * frv.opc (parse_ulo16, parse_uhi16, parse_d12): Fix some
1120 cut&paste errors in shifting/truncating numerical operands.
1121 2003-08-08 Alexandre Oliva <aoliva@redhat.com>
1122 * frv.opc (parse_ulo16): Parse gotofflo and gotofffuncdesclo.
1123 (parse_uslo16): Likewise.
1124 (parse_uhi16): Parse gotoffhi and gotofffuncdeschi.
1125 (parse_d12): Parse gotoff12 and gotofffuncdesc12.
1126 (parse_s12): Likewise.
1127 2003-08-04 Alexandre Oliva <aoliva@redhat.com>
1128 * frv.opc (parse_ulo16): Parse gotlo and gotfuncdesclo.
1129 (parse_uslo16): Likewise.
1130 (parse_uhi16): Parse gothi and gotfuncdeschi.
1131 (parse_d12): Parse got12 and gotfuncdesc12.
1132 (parse_s12): Likewise.
1134 2003-10-10 Dave Brolley <brolley@redhat.com>
1136 * frv.cpu (dnpmop): New p-macro.
1137 (GRdoublek): Use dnpmop.
1138 (CPRdoublek, FRdoublei, FRdoublej, FRdoublek): Ditto.
1139 (store-double-r-r): Use (.sym regtype doublek).
1140 (r-store-double): Ditto.
1141 (store-double-r-r-u): Ditto.
1142 (conditional-store-double): Ditto.
1143 (conditional-store-double-u): Ditto.
1144 (store-double-r-simm): Ditto.
1145 (fmovs): Assign to UNIT FMALL.
1147 2003-10-06 Dave Brolley <brolley@redhat.com>
1149 * frv.cpu, frv.opc: Add support for fr550.
1151 2003-09-24 Dave Brolley <brolley@redhat.com>
1153 * frv.cpu (u-commit): New modelling unit for fr500.
1154 (mwtaccg): Use frv_ref_SI to reference ACC40Sk as an input operand.
1155 (commit-r): Use u-commit model for fr500.
1157 (conditional-float-binary-op): Take profiling data as an argument.
1159 (ne-float-binary-op): Ditto.
1161 2003-09-19 Michael Snyder <msnyder@redhat.com>
1163 * frv.cpu (nldqi): Delete unimplemented instruction.
1165 2003-09-12 Dave Brolley <brolley@redhat.com>
1167 * frv.cpu (u-clrgr, u-clrfr): New units of model fr500.
1168 (clear-ne-flag-r): Pass insn profiling in as an argument. Call
1169 frv_ref_SI to get input register referenced for profiling.
1170 (clear-ne-flag-all): Pass insn profiling in as an argument.
1171 (clrgr,clrfr,clrga,clrfa): Add profiling information.
1173 2003-09-11 Michael Snyder <msnyder@redhat.com>
1175 * frv.cpu: Typographical corrections.
1177 2003-09-09 Dave Brolley <brolley@redhat.com>
1179 * frv.cpu (media-dual-complex): Change UNIT to FMALL.
1180 (conditional-media-dual-complex, media-quad-complex): Likewise.
1182 2003-09-04 Dave Brolley <brolley@redhat.com>
1184 * frv.cpu (register-transfer): Pass in all attributes in on argument.
1186 (conditional-register-transfer): Ditto.
1187 (cache-preload): Ditto.
1188 (floating-point-conversion): Ditto.
1189 (floating-point-neg): Ditto.
1191 (float-binary-op-s): Ditto.
1192 (conditional-float-binary-op): Ditto.
1193 (ne-float-binary-op): Ditto.
1194 (float-dual-arith): Ditto.
1195 (ne-float-dual-arith): Ditto.
1197 2003-09-03 Dave Brolley <brolley@redhat.com>
1199 * frv.opc (parse_A, parse_A0, parse_A1): New parse handlers.
1200 * frv.cpu (UNIT): Add IALL, FMALL, FMLOW, STORE, SCAN, DCPL, MDUALACC,
1202 (A): Removed operand.
1203 (A0,A1): New operands replace operand A.
1204 (mnop): Now a real insn
1205 (mclracc): Removed insn.
1206 (mclracc-0, mclracc-1): New insns replace mclracc.
1207 (all insns): Use new UNIT attributes.
1209 2003-08-21 Nick Clifton <nickc@redhat.com>
1211 * frv.cpu (mbtoh): Replace input parameter to u-media-dual-expand
1212 and u-media-dual-btoh with output parameter.
1213 (cmbtoh): Add profiling hack.
1215 2003-08-19 Michael Snyder <msnyder@redhat.com>
1217 * frv.cpu: Fix typo, Frintkeven -> FRintkeven
1219 2003-06-10 Doug Evans <dje@sebabeach.org>
1221 * frv.cpu: Add IDOC attribute.
1223 2003-06-06 Andrew Cagney <cagney@redhat.com>
1225 Contributed by Red Hat.
1226 * iq2000.cpu: New file. Written by Ben Elliston, Jeff Johnston,
1227 Stan Cox, and Frank Ch. Eigler.
1228 * iq2000.opc: New file. Written by Ben Elliston, Frank
1229 Ch. Eigler, Chris Moller, Jeff Johnston, and Stan Cox.
1230 * iq2000m.cpu: New file. Written by Jeff Johnston.
1231 * iq10.cpu: New file. Written by Jeff Johnston.
1233 2003-06-05 Nick Clifton <nickc@redhat.com>
1235 * frv.cpu (FRintieven): New operand. An even-numbered only
1236 version of the FRinti operand.
1237 (FRintjeven): Likewise for FRintj.
1238 (FRintkeven): Likewise for FRintk.
1239 (mdcutssi, media-dual-word-rotate-r-r, mqsaths,
1240 media-quad-arith-sat-semantics, media-quad-arith-sat,
1241 conditional-media-quad-arith-sat, mdunpackh,
1242 media-quad-multiply-semantics, media-quad-multiply,
1243 conditional-media-quad-multiply, media-quad-complex-i,
1244 media-quad-multiply-acc-semantics, media-quad-multiply-acc,
1245 conditional-media-quad-multiply-acc, munpackh,
1246 media-quad-multiply-cross-acc-semantics, mdpackh,
1247 media-quad-multiply-cross-acc, mbtoh-semantics,
1248 media-quad-cross-multiply-cross-acc-semantics,
1249 media-quad-cross-multiply-cross-acc, mbtoh, mhtob-semantics,
1250 media-quad-cross-multiply-acc-semantics, cmbtoh,
1251 media-quad-cross-multiply-acc, media-quad-complex, mhtob,
1252 media-expand-halfword-to-double-semantics, mexpdhd, cmexpdhd,
1253 cmhtob): Use new operands.
1254 * frv.opc (CGEN_VERBOSE_ASSEMBLER_ERRORS): Define.
1255 (parse_even_register): New function.
1257 2003-06-03 Nick Clifton <nickc@redhat.com>
1259 * frv.cpu (media-dual-word-rotate-r-r): Use a signed 6-bit
1260 immediate value not unsigned.
1262 2003-06-03 Andrew Cagney <cagney@redhat.com>
1264 Contributed by Red Hat.
1265 * frv.cpu: New file. Written by Dave Brolley, Catherine Moore,
1266 and Eric Christopher.
1267 * frv.opc: New file. Written by Catherine Moore, and Dave
1269 * simplify.inc: New file. Written by Doug Evans.
1271 2003-05-02 Andrew Cagney <cagney@redhat.com>
1276 Copyright (C) 2003-2012 Free Software Foundation, Inc.
1278 Copying and distribution of this file, with or without modification,
1279 are permitted in any medium without royalty provided the copyright
1280 notice and this notice are preserved.
1286 version-control: never