1 /* Target-dependent code for the LoongArch architecture, for GDB.
3 Copyright (C) 2022-2024 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
20 #include "arch-utils.h"
21 #include "dwarf2/frame.h"
23 #include "frame-unwind.h"
25 #include "loongarch-tdep.h"
26 #include "reggroups.h"
28 #include "target-descriptions.h"
29 #include "trad-frame.h"
30 #include "user-regs.h"
32 /* Fetch the instruction at PC. */
35 loongarch_fetch_instruction (CORE_ADDR pc
)
37 size_t insn_len
= loongarch_insn_length (0);
38 gdb_byte buf
[insn_len
];
41 err
= target_read_memory (pc
, buf
, insn_len
);
43 memory_error (TARGET_XFER_E_IO
, pc
);
45 return extract_unsigned_integer (buf
, insn_len
, BFD_ENDIAN_LITTLE
);
48 /* Return TRUE if INSN is a unconditional branch instruction, otherwise return FALSE. */
51 loongarch_insn_is_uncond_branch (insn_t insn
)
53 if ((insn
& 0xfc000000) == 0x4c000000 /* jirl */
54 || (insn
& 0xfc000000) == 0x50000000 /* b */
55 || (insn
& 0xfc000000) == 0x54000000) /* bl */
60 /* Return TRUE if INSN is a conditional branch instruction, otherwise return FALSE. */
63 loongarch_insn_is_cond_branch (insn_t insn
)
65 if ((insn
& 0xfc000000) == 0x58000000 /* beq */
66 || (insn
& 0xfc000000) == 0x5c000000 /* bne */
67 || (insn
& 0xfc000000) == 0x60000000 /* blt */
68 || (insn
& 0xfc000000) == 0x64000000 /* bge */
69 || (insn
& 0xfc000000) == 0x68000000 /* bltu */
70 || (insn
& 0xfc000000) == 0x6c000000 /* bgeu */
71 || (insn
& 0xfc000000) == 0x40000000 /* beqz */
72 || (insn
& 0xfc000000) == 0x44000000) /* bnez */
77 /* Return TRUE if INSN is a branch instruction, otherwise return FALSE. */
80 loongarch_insn_is_branch (insn_t insn
)
82 bool is_uncond
= loongarch_insn_is_uncond_branch (insn
);
83 bool is_cond
= loongarch_insn_is_cond_branch (insn
);
85 return (is_uncond
|| is_cond
);
88 /* Return TRUE if INSN is a Load Linked instruction, otherwise return FALSE. */
91 loongarch_insn_is_ll (insn_t insn
)
93 if ((insn
& 0xff000000) == 0x20000000 /* ll.w */
94 || (insn
& 0xff000000) == 0x22000000) /* ll.d */
99 /* Return TRUE if INSN is a Store Conditional instruction, otherwise return FALSE. */
102 loongarch_insn_is_sc (insn_t insn
)
104 if ((insn
& 0xff000000) == 0x21000000 /* sc.w */
105 || (insn
& 0xff000000) == 0x23000000) /* sc.d */
110 /* Analyze the function prologue from START_PC to LIMIT_PC.
111 Return the address of the first instruction past the prologue. */
114 loongarch_scan_prologue (struct gdbarch
*gdbarch
, CORE_ADDR start_pc
,
115 CORE_ADDR limit_pc
, const frame_info_ptr
&this_frame
,
116 struct trad_frame_cache
*this_cache
)
118 CORE_ADDR cur_pc
= start_pc
, prologue_end
= 0;
119 int32_t sp
= LOONGARCH_SP_REGNUM
;
120 int32_t fp
= LOONGARCH_FP_REGNUM
;
121 int32_t reg_value
[32] = {0};
122 int32_t reg_used
[32] = {1, 0};
124 while (cur_pc
< limit_pc
)
126 insn_t insn
= loongarch_fetch_instruction (cur_pc
);
127 size_t insn_len
= loongarch_insn_length (insn
);
128 int32_t rd
= loongarch_decode_imm ("0:5", insn
, 0);
129 int32_t rj
= loongarch_decode_imm ("5:5", insn
, 0);
130 int32_t rk
= loongarch_decode_imm ("10:5", insn
, 0);
131 int32_t si12
= loongarch_decode_imm ("10:12", insn
, 1);
132 int32_t si20
= loongarch_decode_imm ("5:20", insn
, 1);
134 if ((insn
& 0xffc00000) == 0x02c00000 /* addi.d sp,sp,si12 */
135 && rd
== sp
&& rj
== sp
&& si12
< 0)
137 prologue_end
= cur_pc
+ insn_len
;
139 else if ((insn
& 0xffc00000) == 0x02c00000 /* addi.d fp,sp,si12 */
140 && rd
== fp
&& rj
== sp
&& si12
> 0)
142 prologue_end
= cur_pc
+ insn_len
;
144 else if ((insn
& 0xffc00000) == 0x29c00000 /* st.d rd,sp,si12 */
147 prologue_end
= cur_pc
+ insn_len
;
149 else if ((insn
& 0xff000000) == 0x27000000 /* stptr.d rd,sp,si14 */
152 prologue_end
= cur_pc
+ insn_len
;
154 else if ((insn
& 0xfe000000) == 0x14000000) /* lu12i.w rd,si20 */
156 reg_value
[rd
] = si20
<< 12;
159 else if ((insn
& 0xffc00000) == 0x03800000) /* ori rd,rj,si12 */
163 reg_value
[rd
] = reg_value
[rj
] | (si12
& 0xfff);
167 else if ((insn
& 0xffff8000) == 0x00108000 /* add.d sp,sp,rk */
168 && rd
== sp
&& rj
== sp
)
170 if (reg_used
[rk
] == 1 && reg_value
[rk
] < 0)
172 prologue_end
= cur_pc
+ insn_len
;
176 else if (loongarch_insn_is_branch (insn
))
184 if (prologue_end
== 0)
185 prologue_end
= cur_pc
;
190 /* Implement the loongarch_skip_prologue gdbarch method. */
193 loongarch_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
197 /* See if we can determine the end of the prologue via the symbol table.
198 If so, then return either PC, or the PC after the prologue, whichever
200 if (find_pc_partial_function (pc
, nullptr, &func_addr
, nullptr))
202 CORE_ADDR post_prologue_pc
203 = skip_prologue_using_sal (gdbarch
, func_addr
);
204 if (post_prologue_pc
!= 0)
205 return std::max (pc
, post_prologue_pc
);
208 /* Can't determine prologue from the symbol table, need to examine
211 /* Find an upper limit on the function prologue using the debug
212 information. If the debug information could not be used to provide
213 that bound, then use an arbitrary large number as the upper bound. */
214 CORE_ADDR limit_pc
= skip_prologue_using_sal (gdbarch
, pc
);
216 limit_pc
= pc
+ 100; /* Arbitrary large number. */
218 return loongarch_scan_prologue (gdbarch
, pc
, limit_pc
, nullptr, nullptr);
221 /* Decode the current instruction and determine the address of the
225 loongarch_next_pc (struct regcache
*regcache
, CORE_ADDR cur_pc
)
227 struct gdbarch
*gdbarch
= regcache
->arch ();
228 loongarch_gdbarch_tdep
*tdep
= gdbarch_tdep
<loongarch_gdbarch_tdep
> (gdbarch
);
229 insn_t insn
= loongarch_fetch_instruction (cur_pc
);
230 size_t insn_len
= loongarch_insn_length (insn
);
231 CORE_ADDR next_pc
= cur_pc
+ insn_len
;
233 if ((insn
& 0xfc000000) == 0x4c000000) /* jirl rd, rj, offs16 */
235 LONGEST rj
= regcache_raw_get_signed (regcache
,
236 loongarch_decode_imm ("5:5", insn
, 0));
237 next_pc
= rj
+ loongarch_decode_imm ("10:16<<2", insn
, 1);
239 else if ((insn
& 0xfc000000) == 0x50000000 /* b offs26 */
240 || (insn
& 0xfc000000) == 0x54000000) /* bl offs26 */
242 next_pc
= cur_pc
+ loongarch_decode_imm ("0:10|10:16<<2", insn
, 1);
244 else if ((insn
& 0xfc000000) == 0x58000000) /* beq rj, rd, offs16 */
246 LONGEST rj
= regcache_raw_get_signed (regcache
,
247 loongarch_decode_imm ("5:5", insn
, 0));
248 LONGEST rd
= regcache_raw_get_signed (regcache
,
249 loongarch_decode_imm ("0:5", insn
, 0));
251 next_pc
= cur_pc
+ loongarch_decode_imm ("10:16<<2", insn
, 1);
253 else if ((insn
& 0xfc000000) == 0x5c000000) /* bne rj, rd, offs16 */
255 LONGEST rj
= regcache_raw_get_signed (regcache
,
256 loongarch_decode_imm ("5:5", insn
, 0));
257 LONGEST rd
= regcache_raw_get_signed (regcache
,
258 loongarch_decode_imm ("0:5", insn
, 0));
260 next_pc
= cur_pc
+ loongarch_decode_imm ("10:16<<2", insn
, 1);
262 else if ((insn
& 0xfc000000) == 0x60000000) /* blt rj, rd, offs16 */
264 LONGEST rj
= regcache_raw_get_signed (regcache
,
265 loongarch_decode_imm ("5:5", insn
, 0));
266 LONGEST rd
= regcache_raw_get_signed (regcache
,
267 loongarch_decode_imm ("0:5", insn
, 0));
269 next_pc
= cur_pc
+ loongarch_decode_imm ("10:16<<2", insn
, 1);
271 else if ((insn
& 0xfc000000) == 0x64000000) /* bge rj, rd, offs16 */
273 LONGEST rj
= regcache_raw_get_signed (regcache
,
274 loongarch_decode_imm ("5:5", insn
, 0));
275 LONGEST rd
= regcache_raw_get_signed (regcache
,
276 loongarch_decode_imm ("0:5", insn
, 0));
278 next_pc
= cur_pc
+ loongarch_decode_imm ("10:16<<2", insn
, 1);
280 else if ((insn
& 0xfc000000) == 0x68000000) /* bltu rj, rd, offs16 */
282 ULONGEST rj
= regcache_raw_get_unsigned (regcache
,
283 loongarch_decode_imm ("5:5", insn
, 0));
284 ULONGEST rd
= regcache_raw_get_unsigned (regcache
,
285 loongarch_decode_imm ("0:5", insn
, 0));
287 next_pc
= cur_pc
+ loongarch_decode_imm ("10:16<<2", insn
, 1);
289 else if ((insn
& 0xfc000000) == 0x6c000000) /* bgeu rj, rd, offs16 */
291 ULONGEST rj
= regcache_raw_get_unsigned (regcache
,
292 loongarch_decode_imm ("5:5", insn
, 0));
293 ULONGEST rd
= regcache_raw_get_unsigned (regcache
,
294 loongarch_decode_imm ("0:5", insn
, 0));
296 next_pc
= cur_pc
+ loongarch_decode_imm ("10:16<<2", insn
, 1);
298 else if ((insn
& 0xfc000000) == 0x40000000) /* beqz rj, offs21 */
300 LONGEST rj
= regcache_raw_get_signed (regcache
,
301 loongarch_decode_imm ("5:5", insn
, 0));
303 next_pc
= cur_pc
+ loongarch_decode_imm ("0:5|10:16<<2", insn
, 1);
305 else if ((insn
& 0xfc000000) == 0x44000000) /* bnez rj, offs21 */
307 LONGEST rj
= regcache_raw_get_signed (regcache
,
308 loongarch_decode_imm ("5:5", insn
, 0));
310 next_pc
= cur_pc
+ loongarch_decode_imm ("0:5|10:16<<2", insn
, 1);
312 else if ((insn
& 0xffff8000) == 0x002b0000) /* syscall */
314 if (tdep
->syscall_next_pc
!= nullptr)
315 next_pc
= tdep
->syscall_next_pc (get_current_frame ());
321 /* We can't put a breakpoint in the middle of a ll/sc atomic sequence,
322 so look for the end of the sequence and put the breakpoint there. */
324 static std::vector
<CORE_ADDR
>
325 loongarch_deal_with_atomic_sequence (struct regcache
*regcache
, CORE_ADDR cur_pc
)
328 std::vector
<CORE_ADDR
> next_pcs
;
329 insn_t insn
= loongarch_fetch_instruction (cur_pc
);
330 size_t insn_len
= loongarch_insn_length (insn
);
331 const int atomic_sequence_length
= 16;
332 bool found_atomic_sequence_endpoint
= false;
334 /* Look for a Load Linked instruction which begins the atomic sequence. */
335 if (!loongarch_insn_is_ll (insn
))
338 /* Assume that no atomic sequence is longer than "atomic_sequence_length" instructions. */
339 for (int insn_count
= 0; insn_count
< atomic_sequence_length
; ++insn_count
)
342 insn
= loongarch_fetch_instruction (cur_pc
);
344 /* Look for a unconditional branch instruction, fallback to the standard code. */
345 if (loongarch_insn_is_uncond_branch (insn
))
349 /* Look for a conditional branch instruction, put a breakpoint in its destination address. */
350 else if (loongarch_insn_is_cond_branch (insn
))
352 next_pc
= loongarch_next_pc (regcache
, cur_pc
);
353 next_pcs
.push_back (next_pc
);
355 /* Look for a Store Conditional instruction which closes the atomic sequence. */
356 else if (loongarch_insn_is_sc (insn
))
358 found_atomic_sequence_endpoint
= true;
359 next_pc
= cur_pc
+ insn_len
;
360 next_pcs
.push_back (next_pc
);
365 /* We didn't find a closing Store Conditional instruction, fallback to the standard code. */
366 if (!found_atomic_sequence_endpoint
)
372 /* Implement the software_single_step gdbarch method */
374 static std::vector
<CORE_ADDR
>
375 loongarch_software_single_step (struct regcache
*regcache
)
377 CORE_ADDR cur_pc
= regcache_read_pc (regcache
);
378 std::vector
<CORE_ADDR
> next_pcs
379 = loongarch_deal_with_atomic_sequence (regcache
, cur_pc
);
381 if (!next_pcs
.empty ())
384 CORE_ADDR next_pc
= loongarch_next_pc (regcache
, cur_pc
);
389 /* Callback function for user_reg_add. */
391 static struct value
*
392 value_of_loongarch_user_reg (const frame_info_ptr
&frame
, const void *baton
)
394 return value_of_register ((long long) baton
,
395 get_next_frame_sentinel_okay (frame
));
398 /* Implement the frame_align gdbarch method. */
401 loongarch_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
403 return align_down (addr
, 16);
406 /* Generate, or return the cached frame cache for frame unwinder. */
408 static struct trad_frame_cache
*
409 loongarch_frame_cache (const frame_info_ptr
&this_frame
, void **this_cache
)
411 struct trad_frame_cache
*cache
;
414 if (*this_cache
!= nullptr)
415 return (struct trad_frame_cache
*) *this_cache
;
417 cache
= trad_frame_cache_zalloc (this_frame
);
420 trad_frame_set_reg_realreg (cache
, LOONGARCH_PC_REGNUM
, LOONGARCH_RA_REGNUM
);
422 pc
= get_frame_address_in_block (this_frame
);
423 trad_frame_set_id (cache
, frame_id_build_unavailable_stack (pc
));
428 /* Implement the this_id callback for frame unwinder. */
431 loongarch_frame_this_id (const frame_info_ptr
&this_frame
, void **prologue_cache
,
432 struct frame_id
*this_id
)
434 struct trad_frame_cache
*info
;
436 info
= loongarch_frame_cache (this_frame
, prologue_cache
);
437 trad_frame_get_id (info
, this_id
);
440 /* Implement the prev_register callback for frame unwinder. */
442 static struct value
*
443 loongarch_frame_prev_register (const frame_info_ptr
&this_frame
,
444 void **prologue_cache
, int regnum
)
446 struct trad_frame_cache
*info
;
448 info
= loongarch_frame_cache (this_frame
, prologue_cache
);
449 return trad_frame_get_register (info
, this_frame
, regnum
);
452 static const struct frame_unwind loongarch_frame_unwind
= {
453 "loongarch prologue",
454 /*.type =*/NORMAL_FRAME
,
455 /*.stop_reason =*/default_frame_unwind_stop_reason
,
456 /*.this_id =*/loongarch_frame_this_id
,
457 /*.prev_register =*/loongarch_frame_prev_register
,
458 /*.unwind_data =*/nullptr,
459 /*.sniffer =*/default_frame_sniffer
,
460 /*.dealloc_cache =*/nullptr,
461 /*.prev_arch =*/nullptr,
464 /* Write the contents of buffer VAL into the general-purpose argument
465 register defined by GAR in REGCACHE. GAR indicates the available
466 general-purpose argument registers which should be a value in the
467 range 1 to 8 (LOONGARCH_ARG_REGNUM), which correspond to registers
468 a7 and a0 respectively, that is to say, regnum is a7 if GAR is 1,
469 regnum is a6 if GAR is 2, regnum is a5 if GAR is 3, regnum is a4
470 if GAR is 4, regnum is a3 if GAR is 5, regnum is a2 if GAR is 6,
471 regnum is a1 if GAR is 7, regnum is a0 if GAR is 8. */
474 pass_in_gar (struct regcache
*regcache
, unsigned int gar
, const gdb_byte
*val
)
476 unsigned int regnum
= LOONGARCH_ARG_REGNUM
- gar
+ LOONGARCH_A0_REGNUM
;
477 regcache
->cooked_write (regnum
, val
);
480 /* Write the contents of buffer VAL into the floating-point argument
481 register defined by FAR in REGCACHE. FAR indicates the available
482 floating-point argument registers which should be a value in the
483 range 1 to 8 (LOONGARCH_ARG_REGNUM), which correspond to registers
484 f7 and f0 respectively, that is to say, regnum is f7 if FAR is 1,
485 regnum is f6 if FAR is 2, regnum is f5 if FAR is 3, regnum is f4
486 if FAR is 4, regnum is f3 if FAR is 5, regnum is f2 if FAR is 6,
487 regnum is f1 if FAR is 7, regnum is f0 if FAR is 8. */
490 pass_in_far (struct regcache
*regcache
, unsigned int far
, const gdb_byte
*val
)
492 unsigned int regnum
= LOONGARCH_ARG_REGNUM
- far
+ LOONGARCH_FIRST_FP_REGNUM
;
493 regcache
->cooked_write (regnum
, val
);
496 /* Pass a value on the stack. */
499 pass_on_stack (struct regcache
*regcache
, const gdb_byte
*val
,
500 size_t len
, int align
, gdb_byte
**addr
)
502 align
= align_up (align
, 8);
506 CORE_ADDR align_addr
= (CORE_ADDR
) (*addr
);
507 align_addr
= align_up (align_addr
, align
);
508 *addr
= (gdb_byte
*) align_addr
;
509 memcpy (*addr
, val
, len
);
513 /* Compute the numbers of struct member. */
516 compute_struct_member (struct type
*type
,
517 unsigned int *fixed_point_members
,
518 unsigned int *floating_point_members
,
519 bool *first_member_is_fixed_point
,
520 bool *has_long_double
)
522 for (int i
= 0; i
< type
->num_fields (); i
++)
524 /* Ignore any static fields. */
525 if (type
->field (i
).is_static ())
528 struct type
*field_type
= check_typedef (type
->field (i
).type ());
530 if ((field_type
->code () == TYPE_CODE_FLT
531 && field_type
->length () == 16)
532 || (field_type
->code () == TYPE_CODE_COMPLEX
533 && field_type
->length () == 32))
534 *has_long_double
= true;
536 if (field_type
->code () == TYPE_CODE_INT
537 || field_type
->code () == TYPE_CODE_BOOL
538 || field_type
->code () == TYPE_CODE_CHAR
539 || field_type
->code () == TYPE_CODE_RANGE
540 || field_type
->code () == TYPE_CODE_ENUM
541 || field_type
->code () == TYPE_CODE_PTR
)
543 (*fixed_point_members
)++;
545 if (*floating_point_members
== 0)
546 *first_member_is_fixed_point
= true;
548 else if (field_type
->code () == TYPE_CODE_FLT
)
549 (*floating_point_members
)++;
550 else if (field_type
->code () == TYPE_CODE_STRUCT
)
551 compute_struct_member (field_type
,
553 floating_point_members
,
554 first_member_is_fixed_point
,
556 else if (field_type
->code () == TYPE_CODE_COMPLEX
)
557 (*floating_point_members
) += 2;
561 /* Compute the lengths and offsets of struct member. */
564 struct_member_info (struct type
*type
,
565 unsigned int *member_offsets
,
566 unsigned int *member_lens
,
568 unsigned int *fields
)
570 unsigned int count
= type
->num_fields ();
573 for (i
= 0; i
< count
; ++i
)
575 if (type
->field (i
).loc_kind () != FIELD_LOC_KIND_BITPOS
)
578 struct type
*field_type
= check_typedef (type
->field (i
).type ());
580 = offset
+ type
->field (i
).loc_bitpos () / TARGET_CHAR_BIT
;
582 switch (field_type
->code ())
584 case TYPE_CODE_STRUCT
:
585 struct_member_info (field_type
, member_offsets
, member_lens
,
586 field_offset
, fields
);
589 case TYPE_CODE_COMPLEX
:
593 if (field_type
->length () == 8)
595 member_offsets
[0] = field_offset
;
596 member_offsets
[1] = field_offset
+ 4;
597 member_lens
[0] = member_lens
[1] = 4;
600 /* _Complex double */
601 else if (field_type
->length () == 16)
603 member_offsets
[0] = field_offset
;
604 member_offsets
[1] = field_offset
+ 8;
605 member_lens
[0] = member_lens
[1] = 8;
614 member_offsets
[*fields
] = field_offset
;
615 member_lens
[*fields
] = field_type
->length ();
621 /* only has special handling for structures with 1 or 2 fields. */
627 /* Implement the push_dummy_call gdbarch method. */
630 loongarch_push_dummy_call (struct gdbarch
*gdbarch
,
631 struct value
*function
,
632 struct regcache
*regcache
,
637 function_call_return_method return_method
,
638 CORE_ADDR struct_addr
)
640 int regsize
= register_size (gdbarch
, 0);
641 unsigned int gar
= LOONGARCH_ARG_REGNUM
;
642 unsigned int far
= LOONGARCH_ARG_REGNUM
;
643 unsigned int fixed_point_members
;
644 unsigned int floating_point_members
;
645 bool first_member_is_fixed_point
;
646 bool has_long_double
;
647 unsigned int member_offsets
[2];
648 unsigned int member_lens
[2];
650 gdb_byte buf
[1024] = { 0 };
651 gdb_byte
*addr
= buf
;
653 if (return_method
!= return_method_normal
)
654 pass_in_gar (regcache
, gar
--, (gdb_byte
*) &struct_addr
);
656 for (int i
= 0; i
< nargs
; i
++)
658 struct value
*arg
= args
[i
];
659 const gdb_byte
*val
= arg
->contents ().data ();
660 struct type
*type
= check_typedef (arg
->type ());
661 size_t len
= type
->length ();
662 int align
= type_align (type
);
663 enum type_code code
= type
->code ();
664 struct type
*func_type
= check_typedef (function
->type ());
665 bool varargs
= (func_type
->has_varargs () && i
>= func_type
->num_fields ());
672 case TYPE_CODE_RANGE
:
676 /* integer or pointer type is passed in GAR.
677 If no GAR is available, it's passed on the stack.
678 When passed in registers or on the stack,
679 the unsigned integer scalars are zero-extended to GRLEN bits,
680 and the signed integer scalars are sign-extended. */
681 if (type
->is_unsigned ())
683 ULONGEST data
= extract_unsigned_integer (val
, len
, BFD_ENDIAN_LITTLE
);
685 pass_in_gar (regcache
, gar
--, (gdb_byte
*) &data
);
687 pass_on_stack (regcache
, (gdb_byte
*) &data
, len
, align
, &addr
);
691 LONGEST data
= extract_signed_integer (val
, len
, BFD_ENDIAN_LITTLE
);
693 pass_in_gar (regcache
, gar
--, (gdb_byte
*) &data
);
695 pass_on_stack (regcache
, (gdb_byte
*) &data
, len
, align
, &addr
);
700 if (len
== 2 * regsize
)
704 /* long double type is passed in a pair of GAR,
705 with the low-order GRLEN bits in the lower-numbered register
706 and the high-order GRLEN bits in the higher-numbered register.
707 If exactly one register is available,
708 the low-order GRLEN bits are passed in the register
709 and the high-order GRLEN bits are passed on the stack.
710 If no GAR is available, it's passed on the stack. */
713 pass_in_gar (regcache
, gar
--, val
);
714 pass_in_gar (regcache
, gar
--, val
+ regsize
);
718 pass_in_gar (regcache
, gar
--, val
);
719 pass_on_stack (regcache
, val
+ regsize
, len
- regsize
, align
, &addr
);
723 pass_on_stack (regcache
, val
, len
, align
, &addr
);
728 /* Variadic arguments are passed in GARs
729 in the same manner as named arguments.
730 And after a variadic argument has been passed on the stack,
731 all future arguments will also be passed on the stack,
732 i.e., the last argument register may be left unused
733 due to the aligned register pair rule.
734 long double data type is passed in an aligned GAR pair,
735 the first register in the pair is even-numbered. */
740 pass_in_gar (regcache
, gar
--, val
);
741 pass_in_gar (regcache
, gar
--, val
+ regsize
);
746 pass_in_gar (regcache
, gar
--, val
);
747 pass_in_gar (regcache
, gar
--, val
+ regsize
);
753 pass_on_stack (regcache
, val
, len
, align
, &addr
);
757 pass_on_stack (regcache
, val
, len
, align
, &addr
);
763 /* The other floating-point type is passed in FAR.
764 If no FAR is available, it's passed in GAR.
765 If no GAR is available, it's passed on the stack. */
766 if (!varargs
&& far
> 0)
767 pass_in_far (regcache
, far
--, val
);
769 pass_in_gar (regcache
, gar
--, val
);
771 pass_on_stack (regcache
, val
, len
, align
, &addr
);
774 case TYPE_CODE_STRUCT
:
776 fixed_point_members
= 0;
777 floating_point_members
= 0;
778 first_member_is_fixed_point
= false;
779 has_long_double
= false;
780 member_offsets
[0] = member_offsets
[1] = 0;
781 member_lens
[0] = member_offsets
[1] = 0;
783 compute_struct_member (type
,
784 &fixed_point_members
,
785 &floating_point_members
,
786 &first_member_is_fixed_point
,
788 struct_member_info (type
, member_offsets
, member_lens
, 0, &fields
);
789 /* If the structure consists of one floating-point member within
790 FRLEN bits wide, it is passed in an FAR if available. If the
791 structure consists of two floating-point members both within
792 FRLEN bits wide, it is passed in two FARs if available. If the
793 structure consists of one integer member within GRLEN bits wide
794 and one floating-point member within FRLEN bits wide, it is
795 passed in a GAR and an FAR if available. */
796 if (has_long_double
== false
797 && ((fixed_point_members
== 0 && floating_point_members
== 1
799 || (fixed_point_members
== 0 && floating_point_members
== 2
801 || (fixed_point_members
== 1 && floating_point_members
== 1
802 && far
>= 1 && gar
>= 1)))
804 if (fixed_point_members
== 0 && floating_point_members
== 1)
806 pass_in_far (regcache
, far
--, val
+ member_offsets
[0]);
808 else if (fixed_point_members
== 0 && floating_point_members
== 2)
810 pass_in_far (regcache
, far
--, val
+ member_offsets
[0]);
811 pass_in_far (regcache
, far
--, val
+ member_offsets
[1]);
813 else if (fixed_point_members
== 1 && floating_point_members
== 1)
815 if (first_member_is_fixed_point
== false)
817 pass_in_far (regcache
, far
--, val
+ member_offsets
[0]);
818 pass_in_gar (regcache
, gar
--, val
+ member_offsets
[1]);
822 pass_in_gar (regcache
, gar
--, val
+ member_offsets
[0]);
823 pass_in_far (regcache
, far
--, val
+ member_offsets
[1]);
827 else if (len
> 0 && len
<= regsize
)
829 /* The structure has only fixed-point members. */
830 if (fixed_point_members
> 0 && floating_point_members
== 0)
832 /* If there is an available GAR,
833 the structure is passed through the GAR by value passing;
834 If no GAR is available, it's passed on the stack. */
836 pass_in_gar (regcache
, gar
--, val
);
838 pass_on_stack (regcache
, val
, len
, align
, &addr
);
840 /* The structure has only floating-point members. */
841 else if (fixed_point_members
== 0 && floating_point_members
> 0)
843 /* The structure has one floating-point member.
844 The argument is passed in a FAR.
845 If no FAR is available, the value is passed in a GAR.
846 if no GAR is available, the value is passed on the stack. */
847 if (floating_point_members
== 1)
849 if (!varargs
&& far
> 0)
850 pass_in_far (regcache
, far
--, val
);
852 pass_in_gar (regcache
, gar
--, val
);
854 pass_on_stack (regcache
, val
, len
, align
, &addr
);
856 /* The structure has two floating-point members.
857 The argument is passed in a pair of available FAR,
858 with the low-order float member bits in the lower-numbered FAR
859 and the high-order float member bits in the higher-numbered FAR.
860 If the number of available FAR is less than 2, it's passed in a GAR,
861 and passed on the stack if no GAR is available. */
862 else if (floating_point_members
== 2)
864 if (!varargs
&& far
>= 2)
866 pass_in_far (regcache
, far
--, val
);
867 pass_in_far (regcache
, far
--, val
+ align
);
871 pass_in_gar (regcache
, gar
--, val
);
875 pass_on_stack (regcache
, val
, len
, align
, &addr
);
879 /* The structure has both fixed-point and floating-point members. */
880 else if (fixed_point_members
> 0 && floating_point_members
> 0)
882 /* The structure has one float member and multiple fixed-point members.
883 If there are available GAR, the structure is passed in a GAR,
884 and passed on the stack if no GAR is available. */
885 if (floating_point_members
== 1 && fixed_point_members
> 1)
888 pass_in_gar (regcache
, gar
--, val
);
890 pass_on_stack (regcache
, val
, len
, align
, &addr
);
892 /* The structure has one float member and one fixed-point member.
893 If one FAR and one GAR are available,
894 the floating-point member of the structure is passed in the FAR,
895 and the fixed-point member of the structure is passed in the GAR.
896 If no floating-point register but one GAR is available, it's passed in GAR;
897 If no GAR is available, it's passed on the stack. */
898 else if (floating_point_members
== 1 && fixed_point_members
== 1)
900 if (!varargs
&& far
> 0 && gar
> 0)
902 if (first_member_is_fixed_point
== false)
904 pass_in_far (regcache
, far
--, val
);
905 pass_in_gar (regcache
, gar
--, val
+ align
);
909 pass_in_gar (regcache
, gar
--, val
);
910 pass_in_far (regcache
, far
--, val
+ align
);
916 pass_in_gar (regcache
, gar
--, val
);
918 pass_on_stack (regcache
, val
, len
, align
, &addr
);
923 else if (len
> regsize
&& len
<= 2 * regsize
)
925 /* The structure has only fixed-point members. */
926 if (fixed_point_members
> 0 && floating_point_members
== 0)
928 /* The argument is passed in a pair of available GAR,
929 with the low-order bits in the lower-numbered GAR
930 and the high-order bits in the higher-numbered GAR.
931 If only one GAR is available,
932 the low-order bits are in the GAR
933 and the high-order bits are on the stack,
934 and passed on the stack if no GAR is available. */
937 pass_in_gar (regcache
, gar
--, val
);
938 pass_in_gar (regcache
, gar
--, val
+ regsize
);
942 pass_in_gar (regcache
, gar
--, val
);
943 pass_on_stack (regcache
, val
+ regsize
, len
- regsize
, align
, &addr
);
947 pass_on_stack (regcache
, val
, len
, align
, &addr
);
950 /* The structure has only floating-point members. */
951 else if (fixed_point_members
== 0 && floating_point_members
> 0)
953 /* The structure has one long double member
954 or one double member and two adjacent float members
955 or 3-4 float members.
956 The argument is passed in a pair of available GAR,
957 with the low-order bits in the lower-numbered GAR
958 and the high-order bits in the higher-numbered GAR.
959 If only one GAR is available,
960 the low-order bits are in the GAR
961 and the high-order bits are on the stack,
962 and passed on the stack if no GAR is available. */
963 if ((len
== 16 && floating_point_members
== 1)
964 || (len
== 16 && floating_point_members
== 3)
965 || (len
== 12 && floating_point_members
== 3)
966 || (len
== 16 && floating_point_members
== 4))
970 pass_in_gar (regcache
, gar
--, val
);
971 pass_in_gar (regcache
, gar
--, val
+ regsize
);
977 pass_in_gar (regcache
, gar
--, val
);
978 pass_on_stack (regcache
, val
+ regsize
, len
- regsize
, align
, &addr
);
983 pass_on_stack (regcache
, val
, len
, align
, &addr
);
988 pass_on_stack (regcache
, val
, len
, align
, &addr
);
991 /* The structure has two double members
992 or one double member and one float member.
993 The argument is passed in a pair of available FAR,
994 with the low-order bits in the lower-numbered FAR
995 and the high-order bits in the higher-numbered FAR.
996 If no a pair of available FAR,
997 it's passed in a pair of available GAR,
998 with the low-order bits in the lower-numbered GAR
999 and the high-order bits in the higher-numbered GAR.
1000 If only one GAR is available,
1001 the low-order bits are in the GAR
1002 and the high-order bits are on stack,
1003 and passed on the stack if no GAR is available. */
1004 else if ((len
== 16 && floating_point_members
== 2)
1005 || (len
== 12 && floating_point_members
== 2))
1007 if (!varargs
&& far
>= 2)
1009 pass_in_far (regcache
, far
--, val
);
1010 pass_in_far (regcache
, far
--, val
+ regsize
);
1014 pass_in_gar (regcache
, gar
--, val
);
1015 pass_in_gar (regcache
, gar
--, val
+ regsize
);
1019 pass_in_gar (regcache
, gar
--, val
);
1020 pass_on_stack (regcache
, val
+ regsize
, len
- regsize
, align
, &addr
);
1024 pass_on_stack (regcache
, val
, len
, align
, &addr
);
1028 /* The structure has both fixed-point and floating-point members. */
1029 else if (fixed_point_members
> 0 && floating_point_members
> 0)
1031 /* The structure has one floating-point member and one fixed-point member. */
1032 if (floating_point_members
== 1 && fixed_point_members
== 1)
1034 /* If one FAR and one GAR are available,
1035 the floating-point member of the structure is passed in the FAR,
1036 and the fixed-point member of the structure is passed in the GAR;
1037 If no floating-point registers but two GARs are available,
1038 it's passed in the two GARs;
1039 If only one GAR is available,
1040 the low-order bits are in the GAR
1041 and the high-order bits are on the stack;
1042 And it's passed on the stack if no GAR is available. */
1043 if (!varargs
&& far
> 0 && gar
> 0)
1045 if (first_member_is_fixed_point
== false)
1047 pass_in_far (regcache
, far
--, val
);
1048 pass_in_gar (regcache
, gar
--, val
+ regsize
);
1052 pass_in_gar (regcache
, gar
--, val
);
1053 pass_in_far (regcache
, far
--, val
+ regsize
);
1056 else if ((!varargs
&& far
== 0 && gar
>= 2) || (varargs
&& gar
>= 2))
1058 pass_in_gar (regcache
, gar
--, val
);
1059 pass_in_gar (regcache
, gar
--, val
+ regsize
);
1061 else if ((!varargs
&& far
== 0 && gar
== 1) || (varargs
&& gar
== 1))
1063 pass_in_gar (regcache
, gar
--, val
);
1064 pass_on_stack (regcache
, val
+ regsize
, len
- regsize
, align
, &addr
);
1066 else if ((!varargs
&& far
== 0 && gar
== 0) || (varargs
&& gar
== 0))
1068 pass_on_stack (regcache
, val
, len
, align
, &addr
);
1073 /* The argument is passed in a pair of available GAR,
1074 with the low-order bits in the lower-numbered GAR
1075 and the high-order bits in the higher-numbered GAR.
1076 If only one GAR is available,
1077 the low-order bits are in the GAR
1078 and the high-order bits are on the stack,
1079 and passed on the stack if no GAR is available. */
1082 pass_in_gar (regcache
, gar
--, val
);
1083 pass_in_gar (regcache
, gar
--, val
+ regsize
);
1087 pass_in_gar (regcache
, gar
--, val
);
1088 pass_on_stack (regcache
, val
+ regsize
, len
- regsize
, align
, &addr
);
1092 pass_on_stack (regcache
, val
, len
, align
, &addr
);
1097 else if (len
> 2 * regsize
)
1099 /* It's passed by reference and are replaced in the argument list with the address.
1100 If there is an available GAR, the reference is passed in the GAR,
1101 and passed on the stack if no GAR is available. */
1102 sp
= align_down (sp
- len
, 16);
1103 write_memory (sp
, val
, len
);
1106 pass_in_gar (regcache
, gar
--, (const gdb_byte
*) &sp
);
1108 pass_on_stack (regcache
, (const gdb_byte
*) &sp
, len
, regsize
, &addr
);
1112 case TYPE_CODE_UNION
:
1113 /* Union is passed in GAR or stack. */
1114 if (len
> 0 && len
<= regsize
)
1116 /* The argument is passed in a GAR,
1117 or on the stack by value if no GAR is available. */
1119 pass_in_gar (regcache
, gar
--, val
);
1121 pass_on_stack (regcache
, val
, len
, align
, &addr
);
1123 else if (len
> regsize
&& len
<= 2 * regsize
)
1125 /* The argument is passed in a pair of available GAR,
1126 with the low-order bits in the lower-numbered GAR
1127 and the high-order bits in the higher-numbered GAR.
1128 If only one GAR is available,
1129 the low-order bits are in the GAR
1130 and the high-order bits are on the stack.
1131 The arguments are passed on the stack when no GAR is available. */
1134 pass_in_gar (regcache
, gar
--, val
);
1135 pass_in_gar (regcache
, gar
--, val
+ regsize
);
1139 pass_in_gar (regcache
, gar
--, val
);
1140 pass_on_stack (regcache
, val
+ regsize
, len
- regsize
, align
, &addr
);
1144 pass_on_stack (regcache
, val
, len
, align
, &addr
);
1147 else if (len
> 2 * regsize
)
1149 /* It's passed by reference and are replaced in the argument list with the address.
1150 If there is an available GAR, the reference is passed in the GAR,
1151 and passed on the stack if no GAR is available. */
1152 sp
= align_down (sp
- len
, 16);
1153 write_memory (sp
, val
, len
);
1156 pass_in_gar (regcache
, gar
--, (const gdb_byte
*) &sp
);
1158 pass_on_stack (regcache
, (const gdb_byte
*) &sp
, len
, regsize
, &addr
);
1161 case TYPE_CODE_COMPLEX
:
1163 struct type
*target_type
= check_typedef (type
->target_type ());
1164 size_t target_len
= target_type
->length ();
1166 if (target_len
< regsize
)
1168 /* The complex with two float members
1169 is passed in a pair of available FAR,
1170 with the low-order float member bits in the lower-numbered FAR
1171 and the high-order float member bits in the higher-numbered FAR.
1172 If the number of available FAR is less than 2, it's passed in a GAR,
1173 and passed on the stack if no GAR is available. */
1174 if (!varargs
&& far
>= 2)
1176 pass_in_far (regcache
, far
--, val
);
1177 pass_in_far (regcache
, far
--, val
+ align
);
1181 pass_in_gar (regcache
, gar
--, val
);
1185 pass_on_stack (regcache
, val
, len
, align
, &addr
);
1188 else if (target_len
== regsize
)
1190 /* The complex with two double members
1191 is passed in a pair of available FAR,
1192 with the low-order bits in the lower-numbered FAR
1193 and the high-order bits in the higher-numbered FAR.
1194 If no a pair of available FAR,
1195 it's passed in a pair of available GAR,
1196 with the low-order bits in the lower-numbered GAR
1197 and the high-order bits in the higher-numbered GAR.
1198 If only one GAR is available,
1199 the low-order bits are in the GAR
1200 and the high-order bits are on stack,
1201 and passed on the stack if no GAR is available. */
1203 if (!varargs
&& far
>= 2)
1205 pass_in_far (regcache
, far
--, val
);
1206 pass_in_far (regcache
, far
--, val
+ align
);
1210 pass_in_gar (regcache
, gar
--, val
);
1211 pass_in_gar (regcache
, gar
--, val
+ align
);
1215 pass_in_gar (regcache
, gar
--, val
);
1216 pass_on_stack (regcache
, val
+ align
, len
- align
, align
, &addr
);
1220 pass_on_stack (regcache
, val
, len
, align
, &addr
);
1224 else if (target_len
== 2 * regsize
)
1226 /* The complex with two long double members
1227 is passed by reference and are replaced in the argument list with the address.
1228 If there is an available GAR, the reference is passed in the GAR,
1229 and passed on the stack if no GAR is available. */
1230 sp
= align_down (sp
- len
, 16);
1231 write_memory (sp
, val
, len
);
1234 pass_in_gar (regcache
, gar
--, (const gdb_byte
*) &sp
);
1236 pass_on_stack (regcache
, (const gdb_byte
*) &sp
, regsize
, regsize
, &addr
);
1248 sp
= align_down (sp
, 16);
1249 write_memory (sp
, buf
, addr
- buf
);
1252 regcache_cooked_write_unsigned (regcache
, LOONGARCH_RA_REGNUM
, bp_addr
);
1253 regcache_cooked_write_unsigned (regcache
, LOONGARCH_SP_REGNUM
, sp
);
1258 /* Partial transfer of a cooked register. */
1261 loongarch_xfer_reg (struct regcache
*regcache
,
1262 int regnum
, int len
, gdb_byte
*readbuf
,
1263 const gdb_byte
*writebuf
, size_t offset
)
1266 regcache
->cooked_read_part (regnum
, 0, len
, readbuf
+ offset
);
1268 regcache
->cooked_write_part (regnum
, 0, len
, writebuf
+ offset
);
1271 /* Implement the return_value gdbarch method. */
1273 static enum return_value_convention
1274 loongarch_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
1275 struct type
*type
, struct regcache
*regcache
,
1276 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
1278 int regsize
= register_size (gdbarch
, 0);
1279 enum type_code code
= type
->code ();
1280 size_t len
= type
->length ();
1281 unsigned int fixed_point_members
;
1282 unsigned int floating_point_members
;
1283 bool first_member_is_fixed_point
;
1284 bool has_long_double
;
1285 unsigned int member_offsets
[2];
1286 unsigned int member_lens
[2];
1287 unsigned int fields
;
1288 int a0
= LOONGARCH_A0_REGNUM
;
1289 int a1
= LOONGARCH_A0_REGNUM
+ 1;
1290 int f0
= LOONGARCH_FIRST_FP_REGNUM
;
1291 int f1
= LOONGARCH_FIRST_FP_REGNUM
+ 1;
1296 case TYPE_CODE_BOOL
:
1297 case TYPE_CODE_CHAR
:
1298 case TYPE_CODE_RANGE
:
1299 case TYPE_CODE_ENUM
:
1302 /* integer or pointer type.
1303 The return value is passed in a0,
1304 the unsigned integer scalars are zero-extended to GRLEN bits,
1305 and the signed integer scalars are sign-extended. */
1308 gdb_byte buf
[regsize
];
1309 if (type
->is_unsigned ())
1311 ULONGEST data
= extract_unsigned_integer (writebuf
, len
, BFD_ENDIAN_LITTLE
);
1312 store_unsigned_integer (buf
, regsize
, BFD_ENDIAN_LITTLE
, data
);
1316 LONGEST data
= extract_signed_integer (writebuf
, len
, BFD_ENDIAN_LITTLE
);
1317 store_signed_integer (buf
, regsize
, BFD_ENDIAN_LITTLE
, data
);
1319 loongarch_xfer_reg (regcache
, a0
, regsize
, nullptr, buf
, 0);
1322 loongarch_xfer_reg (regcache
, a0
, len
, readbuf
, nullptr, 0);
1326 /* long double type.
1327 The return value is passed in a0 and a1. */
1328 if (len
== 2 * regsize
)
1330 loongarch_xfer_reg (regcache
, a0
, regsize
, readbuf
, writebuf
, 0);
1331 loongarch_xfer_reg (regcache
, a1
, len
- regsize
, readbuf
, writebuf
, regsize
);
1333 /* float or double type.
1334 The return value is passed in f0. */
1337 loongarch_xfer_reg (regcache
, f0
, len
, readbuf
, writebuf
, 0);
1340 case TYPE_CODE_STRUCT
:
1342 fixed_point_members
= 0;
1343 floating_point_members
= 0;
1344 first_member_is_fixed_point
= false;
1345 has_long_double
= false;
1346 member_offsets
[0] = member_offsets
[1] = 0;
1347 member_lens
[0] = member_offsets
[1] = 0;
1349 compute_struct_member (type
,
1350 &fixed_point_members
,
1351 &floating_point_members
,
1352 &first_member_is_fixed_point
,
1354 struct_member_info (type
, member_offsets
, member_lens
, 0, &fields
);
1355 /* struct consists of one floating-point member;
1356 struct consists of two floating-point members;
1357 struct consists of one floating-point member
1358 and one integer member. */
1359 if (has_long_double
== false
1360 && ((fixed_point_members
== 0 && floating_point_members
== 1)
1361 || (fixed_point_members
== 0 && floating_point_members
== 2)
1362 || (fixed_point_members
== 1 && floating_point_members
== 1)))
1364 if (fixed_point_members
== 0 && floating_point_members
== 1)
1366 loongarch_xfer_reg (regcache
, f0
, member_lens
[0], readbuf
,
1367 writebuf
, member_offsets
[0]);
1369 else if (fixed_point_members
== 0 && floating_point_members
== 2)
1371 loongarch_xfer_reg (regcache
, f0
, member_lens
[0], readbuf
,
1372 writebuf
, member_offsets
[0]);
1373 loongarch_xfer_reg (regcache
, f1
, member_lens
[1], readbuf
,
1374 writebuf
, member_offsets
[1]);
1376 else if (fixed_point_members
== 1 && floating_point_members
== 1)
1378 if (first_member_is_fixed_point
== false)
1380 loongarch_xfer_reg (regcache
, f0
, member_lens
[0], readbuf
,
1381 writebuf
, member_offsets
[0]);
1382 loongarch_xfer_reg (regcache
, a0
, member_lens
[1], readbuf
,
1383 writebuf
, member_offsets
[1]);
1387 loongarch_xfer_reg (regcache
, a0
, member_lens
[0], readbuf
,
1388 writebuf
, member_offsets
[0]);
1389 loongarch_xfer_reg (regcache
, f0
, member_lens
[1], readbuf
,
1390 writebuf
, member_offsets
[1]);
1394 else if (len
> 0 && len
<= regsize
)
1396 /* The structure has only fixed-point members. */
1397 if (fixed_point_members
> 0 && floating_point_members
== 0)
1399 /* The return value is passed in a0. */
1400 loongarch_xfer_reg (regcache
, a0
, len
, readbuf
, writebuf
, 0);
1402 /* The structure has only floating-point members. */
1403 else if (fixed_point_members
== 0 && floating_point_members
> 0)
1405 /* The structure has one floating-point member.
1406 The return value is passed in f0. */
1407 if (floating_point_members
== 1)
1409 loongarch_xfer_reg (regcache
, f0
, len
, readbuf
, writebuf
, 0);
1411 /* The structure has two floating-point members.
1412 The return value is passed in f0 and f1. */
1413 else if (floating_point_members
== 2)
1415 loongarch_xfer_reg (regcache
, f0
, len
/ 2, readbuf
, writebuf
, 0);
1416 loongarch_xfer_reg (regcache
, f1
, len
/ 2, readbuf
, writebuf
, len
/ 2);
1419 /* The structure has both fixed-point and floating-point members. */
1420 else if (fixed_point_members
> 0 && floating_point_members
> 0)
1422 /* The structure has one float member and multiple fixed-point members.
1423 The return value is passed in a0. */
1424 if (floating_point_members
== 1 && fixed_point_members
> 1)
1426 loongarch_xfer_reg (regcache
, a0
, len
, readbuf
, writebuf
, 0);
1428 /* The structure has one float member and one fixed-point member. */
1429 else if (floating_point_members
== 1 && fixed_point_members
== 1)
1431 /* The return value is passed in f0 and a0 if the first member is floating-point. */
1432 if (first_member_is_fixed_point
== false)
1434 loongarch_xfer_reg (regcache
, f0
, regsize
/ 2, readbuf
, writebuf
, 0);
1435 loongarch_xfer_reg (regcache
, a0
, regsize
/ 2, readbuf
, writebuf
, regsize
/ 2);
1437 /* The return value is passed in a0 and f0 if the first member is fixed-point. */
1440 loongarch_xfer_reg (regcache
, a0
, regsize
/ 2, readbuf
, writebuf
, 0);
1441 loongarch_xfer_reg (regcache
, f0
, regsize
/ 2, readbuf
, writebuf
, regsize
/ 2);
1446 else if (len
> regsize
&& len
<= 2 * regsize
)
1448 /* The structure has only fixed-point members. */
1449 if (fixed_point_members
> 0 && floating_point_members
== 0)
1451 /* The return value is passed in a0 and a1. */
1452 loongarch_xfer_reg (regcache
, a0
, regsize
, readbuf
, writebuf
, 0);
1453 loongarch_xfer_reg (regcache
, a1
, len
- regsize
, readbuf
, writebuf
, regsize
);
1455 /* The structure has only floating-point members. */
1456 else if (fixed_point_members
== 0 && floating_point_members
> 0)
1458 /* The structure has one long double member
1459 or one double member and two adjacent float members
1460 or 3-4 float members.
1461 The return value is passed in a0 and a1. */
1462 if ((len
== 16 && floating_point_members
== 1)
1463 || (len
== 16 && floating_point_members
== 3)
1464 || (len
== 12 && floating_point_members
== 3)
1465 || (len
== 16 && floating_point_members
== 4))
1467 loongarch_xfer_reg (regcache
, a0
, regsize
, readbuf
, writebuf
, 0);
1468 loongarch_xfer_reg (regcache
, a1
, len
- regsize
, readbuf
, writebuf
, regsize
);
1470 /* The structure has two double members
1471 or one double member and one float member.
1472 The return value is passed in f0 and f1. */
1473 else if ((len
== 16 && floating_point_members
== 2)
1474 || (len
== 12 && floating_point_members
== 2))
1476 loongarch_xfer_reg (regcache
, f0
, regsize
, readbuf
, writebuf
, 0);
1477 loongarch_xfer_reg (regcache
, f1
, len
- regsize
, readbuf
, writebuf
, regsize
);
1480 /* The structure has both fixed-point and floating-point members. */
1481 else if (fixed_point_members
> 0 && floating_point_members
> 0)
1483 /* The structure has one floating-point member and one fixed-point member. */
1484 if (floating_point_members
== 1 && fixed_point_members
== 1)
1486 /* The return value is passed in f0 and a0 if the first member is floating-point. */
1487 if (first_member_is_fixed_point
== false)
1489 loongarch_xfer_reg (regcache
, f0
, regsize
, readbuf
, writebuf
, 0);
1490 loongarch_xfer_reg (regcache
, a0
, len
- regsize
, readbuf
, writebuf
, regsize
);
1492 /* The return value is passed in a0 and f0 if the first member is fixed-point. */
1495 loongarch_xfer_reg (regcache
, a0
, regsize
, readbuf
, writebuf
, 0);
1496 loongarch_xfer_reg (regcache
, f0
, len
- regsize
, readbuf
, writebuf
, regsize
);
1501 /* The return value is passed in a0 and a1. */
1502 loongarch_xfer_reg (regcache
, a0
, regsize
, readbuf
, writebuf
, 0);
1503 loongarch_xfer_reg (regcache
, a1
, len
- regsize
, readbuf
, writebuf
, regsize
);
1507 else if (len
> 2 * regsize
)
1508 return RETURN_VALUE_STRUCT_CONVENTION
;
1511 case TYPE_CODE_UNION
:
1512 if (len
> 0 && len
<= regsize
)
1514 /* The return value is passed in a0. */
1515 loongarch_xfer_reg (regcache
, a0
, len
, readbuf
, writebuf
, 0);
1517 else if (len
> regsize
&& len
<= 2 * regsize
)
1519 /* The return value is passed in a0 and a1. */
1520 loongarch_xfer_reg (regcache
, a0
, regsize
, readbuf
, writebuf
, 0);
1521 loongarch_xfer_reg (regcache
, a1
, len
- regsize
, readbuf
, writebuf
, regsize
);
1523 else if (len
> 2 * regsize
)
1524 return RETURN_VALUE_STRUCT_CONVENTION
;
1526 case TYPE_CODE_COMPLEX
:
1527 if (len
> 0 && len
<= 2 * regsize
)
1529 /* The return value is passed in f0 and f1. */
1530 loongarch_xfer_reg (regcache
, f0
, len
/ 2, readbuf
, writebuf
, 0);
1531 loongarch_xfer_reg (regcache
, f1
, len
/ 2, readbuf
, writebuf
, len
/ 2);
1533 else if (len
> 2 * regsize
)
1534 return RETURN_VALUE_STRUCT_CONVENTION
;
1540 return RETURN_VALUE_REGISTER_CONVENTION
;
1543 /* Implement the dwarf2_reg_to_regnum gdbarch method. */
1546 loongarch_dwarf2_reg_to_regnum (struct gdbarch
*gdbarch
, int regnum
)
1548 if (regnum
>= 0 && regnum
< 32)
1550 else if (regnum
>= 32 && regnum
< 66)
1551 return LOONGARCH_FIRST_FP_REGNUM
+ regnum
- 32;
1556 static constexpr gdb_byte loongarch_default_breakpoint
[] = {0x05, 0x00, 0x2a, 0x00};
1557 typedef BP_MANIPULATION (loongarch_default_breakpoint
) loongarch_breakpoint
;
1559 /* Extract a set of required target features out of ABFD. If ABFD is nullptr
1560 then a LOONGARCH_GDBARCH_FEATURES is returned in its default state. */
1562 static struct loongarch_gdbarch_features
1563 loongarch_features_from_bfd (const bfd
*abfd
)
1565 struct loongarch_gdbarch_features features
;
1567 /* Now try to improve on the defaults by looking at the binary we are
1568 going to execute. We assume the user knows what they are doing and
1569 that the target will match the binary. Remember, this code path is
1570 only used at all if the target hasn't given us a description, so this
1571 is really a last ditched effort to do something sane before giving
1573 if (abfd
!= nullptr && bfd_get_flavour (abfd
) == bfd_target_elf_flavour
)
1575 unsigned char eclass
= elf_elfheader (abfd
)->e_ident
[EI_CLASS
];
1576 int e_flags
= elf_elfheader (abfd
)->e_flags
;
1578 if (eclass
== ELFCLASS32
)
1580 else if (eclass
== ELFCLASS64
)
1583 internal_error (_("unknown ELF header class %d"), eclass
);
1585 if (EF_LOONGARCH_IS_SINGLE_FLOAT (e_flags
))
1586 features
.fputype
= SINGLE_FLOAT
;
1587 else if (EF_LOONGARCH_IS_DOUBLE_FLOAT (e_flags
))
1588 features
.fputype
= DOUBLE_FLOAT
;
1594 /* Find a suitable default target description. Use the contents of INFO,
1595 specifically the bfd object being executed, to guide the selection of a
1596 suitable default target description. */
1598 static const struct target_desc
*
1599 loongarch_find_default_target_description (const struct gdbarch_info info
)
1601 /* Extract desired feature set from INFO. */
1602 struct loongarch_gdbarch_features features
1603 = loongarch_features_from_bfd (info
.abfd
);
1605 /* If the XLEN field is still 0 then we got nothing useful from INFO.BFD,
1606 maybe there was no bfd object. In this case we fall back to a minimal
1607 useful target, the x-register size is selected based on the architecture
1609 if (features
.xlen
== 0)
1610 features
.xlen
= info
.bfd_arch_info
->bits_per_address
== 32 ? 4 : 8;
1612 /* If the FPUTYPE field is still 0 then we got nothing useful from INFO.BFD,
1613 maybe there was no bfd object. In this case we fall back to a usual useful
1614 target with double float. */
1615 if (features
.fputype
== 0)
1616 features
.fputype
= DOUBLE_FLOAT
;
1618 /* Now build a target description based on the feature set. */
1619 return loongarch_lookup_target_description (features
);
1623 loongarch_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
1624 const struct reggroup
*group
)
1626 if (gdbarch_register_name (gdbarch
, regnum
) == NULL
1627 || *gdbarch_register_name (gdbarch
, regnum
) == '\0')
1630 int raw_p
= regnum
< gdbarch_num_regs (gdbarch
);
1632 if (group
== save_reggroup
|| group
== restore_reggroup
)
1635 if (group
== all_reggroup
)
1638 if (0 <= regnum
&& regnum
<= LOONGARCH_BADV_REGNUM
)
1639 return group
== general_reggroup
;
1641 /* Only ORIG_A0, PC, BADV in general_reggroup */
1642 if (group
== general_reggroup
)
1645 if (LOONGARCH_FIRST_FP_REGNUM
<= regnum
&& regnum
<= LOONGARCH_FCSR_REGNUM
)
1646 return group
== float_reggroup
;
1648 /* Only $fx / $fccx / $fcsr in float_reggroup */
1649 if (group
== float_reggroup
)
1652 if (LOONGARCH_FIRST_LSX_REGNUM
<= regnum
1653 && regnum
< LOONGARCH_FIRST_LASX_REGNUM
+ LOONGARCH_LINUX_NUM_LASXREGSET
)
1654 return group
== vector_reggroup
;
1656 /* Only $vrx / $xrx in vector_reggroup */
1657 if (group
== vector_reggroup
)
1660 int ret
= tdesc_register_in_reggroup_p (gdbarch
, regnum
, group
);
1664 return default_register_reggroup_p (gdbarch
, regnum
, group
);
1667 /* Initialize the current architecture based on INFO */
1669 static struct gdbarch
*
1670 loongarch_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1673 struct loongarch_gdbarch_features features
;
1674 tdesc_arch_data_up tdesc_data
= tdesc_data_alloc ();
1675 const struct target_desc
*tdesc
= info
.target_desc
;
1677 /* Ensure we always have a target description. */
1678 if (!tdesc_has_registers (tdesc
))
1679 tdesc
= loongarch_find_default_target_description (info
);
1681 const struct tdesc_feature
*feature_cpu
1682 = tdesc_find_feature (tdesc
, "org.gnu.gdb.loongarch.base");
1683 if (feature_cpu
== nullptr)
1687 /* Validate the description provides the mandatory base registers
1688 and allocate their numbers. */
1689 bool valid_p
= true;
1690 for (int i
= 0; i
< 32; i
++)
1691 valid_p
&= tdesc_numbered_register (feature_cpu
, tdesc_data
.get (), regnum
++,
1692 loongarch_r_normal_name
[i
] + 1);
1693 valid_p
&= tdesc_numbered_register (feature_cpu
, tdesc_data
.get (), regnum
++, "orig_a0");
1694 valid_p
&= tdesc_numbered_register (feature_cpu
, tdesc_data
.get (), regnum
++, "pc");
1695 valid_p
&= tdesc_numbered_register (feature_cpu
, tdesc_data
.get (), regnum
++, "badv");
1699 const struct tdesc_feature
*feature_fpu
1700 = tdesc_find_feature (tdesc
, "org.gnu.gdb.loongarch.fpu");
1701 if (feature_fpu
== nullptr)
1704 /* Validate the description provides the fpu registers and
1705 allocate their numbers. */
1706 regnum
= LOONGARCH_FIRST_FP_REGNUM
;
1707 for (int i
= 0; i
< LOONGARCH_LINUX_NUM_FPREGSET
; i
++)
1708 valid_p
&= tdesc_numbered_register (feature_fpu
, tdesc_data
.get (), regnum
++,
1709 loongarch_f_normal_name
[i
] + 1);
1710 for (int i
= 0; i
< LOONGARCH_LINUX_NUM_FCC
; i
++)
1711 valid_p
&= tdesc_numbered_register (feature_fpu
, tdesc_data
.get (), regnum
++,
1712 loongarch_c_normal_name
[i
] + 1);
1713 valid_p
&= tdesc_numbered_register (feature_fpu
, tdesc_data
.get (), regnum
++, "fcsr");
1717 const struct tdesc_feature
*feature_lsx
1718 = tdesc_find_feature (tdesc
, "org.gnu.gdb.loongarch.lsx");
1719 if (feature_lsx
== nullptr)
1722 /* Validate the description provides the lsx registers and
1723 allocate their numbers. */
1724 regnum
= LOONGARCH_FIRST_LSX_REGNUM
;
1725 for (int i
= 0; i
< LOONGARCH_LINUX_NUM_LSXREGSET
; i
++)
1726 valid_p
&= tdesc_numbered_register (feature_lsx
, tdesc_data
.get (), regnum
++,
1727 loongarch_v_normal_name
[i
] + 1);
1731 const struct tdesc_feature
*feature_lasx
1732 = tdesc_find_feature (tdesc
, "org.gnu.gdb.loongarch.lasx");
1733 if (feature_lasx
== nullptr)
1736 /* Validate the description provides the lasx registers and
1737 allocate their numbers. */
1738 regnum
= LOONGARCH_FIRST_LASX_REGNUM
;
1739 for (int i
= 0; i
< LOONGARCH_LINUX_NUM_LASXREGSET
; i
++)
1740 valid_p
&= tdesc_numbered_register (feature_lasx
, tdesc_data
.get (), regnum
++,
1741 loongarch_x_normal_name
[i
] + 1);
1745 const struct tdesc_feature
*feature_lbt
1746 = tdesc_find_feature (tdesc
, "org.gnu.gdb.loongarch.lbt");
1747 if (feature_lbt
== nullptr)
1750 /* Validate the description provides the lbt registers and
1751 allocate their numbers. */
1752 regnum
= LOONGARCH_FIRST_SCR_REGNUM
;
1753 for (int i
= 0; i
< LOONGARCH_LINUX_NUM_SCR
; i
++)
1754 valid_p
&= tdesc_numbered_register (feature_lbt
, tdesc_data
.get (), regnum
++,
1755 loongarch_cr_normal_name
[i
] + 1);
1756 valid_p
&= tdesc_numbered_register (feature_lbt
, tdesc_data
.get (), regnum
++,
1758 valid_p
&= tdesc_numbered_register (feature_lbt
, tdesc_data
.get (), regnum
++,
1763 /* LoongArch code is always little-endian. */
1764 info
.byte_order_for_code
= BFD_ENDIAN_LITTLE
;
1766 /* Have a look at what the supplied (if any) bfd object requires of the
1767 target, then check that this matches with what the target is
1769 struct loongarch_gdbarch_features abi_features
1770 = loongarch_features_from_bfd (info
.abfd
);
1772 /* If the ABI_FEATURES xlen or fputype is 0 then this indicates we got
1773 no useful abi features from the INFO object. In this case we just
1774 treat the hardware features as defining the abi. */
1775 if (abi_features
.xlen
== 0)
1777 int xlen_bitsize
= tdesc_register_bitsize (feature_cpu
, "pc");
1778 features
.xlen
= (xlen_bitsize
/ 8);
1779 features
.fputype
= abi_features
.fputype
;
1780 abi_features
= features
;
1782 if (abi_features
.fputype
== 0)
1784 features
.xlen
= abi_features
.xlen
;
1785 features
.fputype
= DOUBLE_FLOAT
;
1786 abi_features
= features
;
1789 /* Find a candidate among the list of pre-declared architectures. */
1790 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1792 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
1794 /* Check that the feature set of the ARCHES matches the feature set
1795 we are looking for. If it doesn't then we can't reuse this
1797 loongarch_gdbarch_tdep
*candidate_tdep
1798 = gdbarch_tdep
<loongarch_gdbarch_tdep
> (arches
->gdbarch
);
1800 if (candidate_tdep
->abi_features
!= abi_features
)
1806 if (arches
!= nullptr)
1807 return arches
->gdbarch
;
1809 /* None found, so create a new architecture from the information provided. */
1811 = gdbarch_alloc (&info
, gdbarch_tdep_up (new loongarch_gdbarch_tdep
));
1812 loongarch_gdbarch_tdep
*tdep
= gdbarch_tdep
<loongarch_gdbarch_tdep
> (gdbarch
);
1814 tdep
->abi_features
= abi_features
;
1816 /* Target data types. */
1817 set_gdbarch_short_bit (gdbarch
, 16);
1818 set_gdbarch_int_bit (gdbarch
, 32);
1819 set_gdbarch_long_bit (gdbarch
, info
.bfd_arch_info
->bits_per_address
);
1820 set_gdbarch_long_long_bit (gdbarch
, 64);
1821 set_gdbarch_float_bit (gdbarch
, 32);
1822 set_gdbarch_double_bit (gdbarch
, 64);
1823 set_gdbarch_long_double_bit (gdbarch
, 128);
1824 set_gdbarch_long_double_format (gdbarch
, floatformats_ieee_quad
);
1825 set_gdbarch_ptr_bit (gdbarch
, info
.bfd_arch_info
->bits_per_address
);
1826 set_gdbarch_char_signed (gdbarch
, 0);
1828 info
.target_desc
= tdesc
;
1829 info
.tdesc_data
= tdesc_data
.get ();
1831 for (int i
= 0; i
< ARRAY_SIZE (loongarch_r_alias
); ++i
)
1832 if (loongarch_r_alias
[i
][0] != '\0')
1833 user_reg_add (gdbarch
, loongarch_r_alias
[i
] + 1,
1834 value_of_loongarch_user_reg
, (void *) (size_t) i
);
1836 for (int i
= 0; i
< ARRAY_SIZE (loongarch_f_alias
); ++i
)
1838 if (loongarch_f_alias
[i
][0] != '\0')
1839 user_reg_add (gdbarch
, loongarch_f_alias
[i
] + 1,
1840 value_of_loongarch_user_reg
,
1841 (void *) (size_t) (LOONGARCH_FIRST_FP_REGNUM
+ i
));
1844 /* Information about registers. */
1845 set_gdbarch_num_regs (gdbarch
, regnum
);
1846 set_gdbarch_sp_regnum (gdbarch
, LOONGARCH_SP_REGNUM
);
1847 set_gdbarch_pc_regnum (gdbarch
, LOONGARCH_PC_REGNUM
);
1849 /* Finalise the target description registers. */
1850 tdesc_use_registers (gdbarch
, tdesc
, std::move (tdesc_data
));
1852 /* Functions handling dummy frames. */
1853 set_gdbarch_push_dummy_call (gdbarch
, loongarch_push_dummy_call
);
1855 /* Return value info */
1856 set_gdbarch_return_value (gdbarch
, loongarch_return_value
);
1858 /* Advance PC across function entry code. */
1859 set_gdbarch_skip_prologue (gdbarch
, loongarch_skip_prologue
);
1861 /* Stack grows downward. */
1862 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1865 set_gdbarch_frame_align (gdbarch
, loongarch_frame_align
);
1867 /* Breakpoint manipulation. */
1868 set_gdbarch_software_single_step (gdbarch
, loongarch_software_single_step
);
1869 set_gdbarch_breakpoint_kind_from_pc (gdbarch
, loongarch_breakpoint::kind_from_pc
);
1870 set_gdbarch_sw_breakpoint_from_kind (gdbarch
, loongarch_breakpoint::bp_from_kind
);
1872 /* Frame unwinders. Use DWARF debug info if available, otherwise use our own unwinder. */
1873 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, loongarch_dwarf2_reg_to_regnum
);
1874 dwarf2_append_unwinders (gdbarch
);
1875 frame_unwind_append_unwinder (gdbarch
, &loongarch_frame_unwind
);
1877 /* Hook in OS ABI-specific overrides, if they have been registered. */
1878 gdbarch_init_osabi (info
, gdbarch
);
1879 set_gdbarch_register_reggroup_p (gdbarch
, loongarch_register_reggroup_p
);
1884 void _initialize_loongarch_tdep ();
1886 _initialize_loongarch_tdep ()
1888 gdbarch_register (bfd_arch_loongarch
, loongarch_gdbarch_init
, nullptr);