gdb/bfin-tdep.c

   1 /* Target-dependent code for Analog Devices Blackfin processor, for GDB.
   2
   3    Copyright (C) 2005-2024 Free Software Foundation, Inc.
   4
   5    Contributed by Analog Devices, Inc.
   6
   7    This file is part of GDB.
   8
   9    This program is free software; you can redistribute it and/or modify
  10    it under the terms of the GNU General Public License as published by
  11    the Free Software Foundation; either version 3 of the License, or
  12    (at your option) any later version.
  13
  14    This program is distributed in the hope that it will be useful,
  15    but WITHOUT ANY WARRANTY; without even the implied warranty of
  16    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17    GNU General Public License for more details.
  18
  19    You should have received a copy of the GNU General Public License
  20    along with this program.  If not, see <http://www.gnu.org/licenses/>.  */
  21
  22 #include "inferior.h"
  23 #include "gdbcore.h"
  24 #include "arch-utils.h"
  25 #include "regcache.h"
  26 #include "frame.h"
  27 #include "frame-unwind.h"
  28 #include "frame-base.h"
  29 #include "trad-frame.h"
  30 #include "dis-asm.h"
  31 #include "sim-regno.h"
  32 #include "sim/sim-bfin.h"
  33 #include "dwarf2/frame.h"
  34 #include "symtab.h"
  35 #include "elf-bfd.h"
  36 #include "elf/bfin.h"
  37 #include "osabi.h"
  38 #include "infcall.h"
  39 #include "xml-syscall.h"
  40 #include "bfin-tdep.h"
  41
  42 /* Macros used by prologue functions.  */
  43 #define P_LINKAGE                       0xE800
  44 #define P_MINUS_SP1                     0x0140
  45 #define P_MINUS_SP2                     0x05C0
  46 #define P_MINUS_SP3                     0x0540
  47 #define P_MINUS_SP4                     0x04C0
  48 #define P_SP_PLUS                       0x6C06
  49 #define P_P2_LOW                        0xE10A
  50 #define P_P2_HIGH                       0XE14A
  51 #define P_SP_EQ_SP_PLUS_P2              0X5BB2
  52 #define P_SP_EQ_P2_PLUS_SP              0x5B96
  53 #define P_MINUS_MINUS_SP_EQ_RETS        0x0167
  54
  55 /* Macros used for program flow control.  */
  56 /* 16 bit instruction, max  */
  57 #define P_16_BIT_INSR_MAX               0xBFFF
  58 /* 32 bit instruction, min  */
  59 #define P_32_BIT_INSR_MIN               0xC000
  60 /* 32 bit instruction, max  */
  61 #define P_32_BIT_INSR_MAX               0xE801
  62 /* jump (preg), 16-bit, min  */
  63 #define P_JUMP_PREG_MIN                 0x0050
  64 /* jump (preg), 16-bit, max  */
  65 #define P_JUMP_PREG_MAX                 0x0057
  66 /* jump (pc+preg), 16-bit, min  */
  67 #define P_JUMP_PC_PLUS_PREG_MIN         0x0080
  68 /* jump (pc+preg), 16-bit, max  */
  69 #define P_JUMP_PC_PLUS_PREG_MAX         0x0087
  70 /* jump.s pcrel13m2, 16-bit, min  */
  71 #define P_JUMP_S_MIN                    0x2000
  72 /* jump.s pcrel13m2, 16-bit, max  */
  73 #define P_JUMP_S_MAX                    0x2FFF
  74 /* jump.l pcrel25m2, 32-bit, min  */
  75 #define P_JUMP_L_MIN                    0xE200
  76 /* jump.l pcrel25m2, 32-bit, max  */
  77 #define P_JUMP_L_MAX                    0xE2FF
  78 /* conditional jump pcrel11m2, 16-bit, min  */
  79 #define P_IF_CC_JUMP_MIN                0x1800
  80 /* conditional jump pcrel11m2, 16-bit, max  */
  81 #define P_IF_CC_JUMP_MAX                0x1BFF
  82 /* conditional jump(bp) pcrel11m2, 16-bit, min  */
  83 #define P_IF_CC_JUMP_BP_MIN             0x1C00
  84 /* conditional jump(bp) pcrel11m2, 16-bit, max  */
  85 #define P_IF_CC_JUMP_BP_MAX             0x1FFF
  86 /* conditional !jump pcrel11m2, 16-bit, min  */
  87 #define P_IF_NOT_CC_JUMP_MIN            0x1000
  88 /* conditional !jump pcrel11m2, 16-bit, max  */
  89 #define P_IF_NOT_CC_JUMP_MAX            0x13FF
  90 /* conditional jump(bp) pcrel11m2, 16-bit, min  */
  91 #define P_IF_NOT_CC_JUMP_BP_MIN         0x1400
  92 /* conditional jump(bp) pcrel11m2, 16-bit, max  */
  93 #define P_IF_NOT_CC_JUMP_BP_MAX         0x17FF
  94 /* call (preg), 16-bit, min  */
  95 #define P_CALL_PREG_MIN                 0x0060
  96 /* call (preg), 16-bit, max  */
  97 #define P_CALL_PREG_MAX                 0x0067
  98 /* call (pc+preg), 16-bit, min  */
  99 #define P_CALL_PC_PLUS_PREG_MIN         0x0070
 100 /* call (pc+preg), 16-bit, max  */
 101 #define P_CALL_PC_PLUS_PREG_MAX         0x0077
 102 /* call pcrel25m2, 32-bit, min  */
 103 #define P_CALL_MIN                      0xE300
 104 /* call pcrel25m2, 32-bit, max  */
 105 #define P_CALL_MAX                      0xE3FF
 106 /* RTS  */
 107 #define P_RTS                           0x0010
 108 /* MNOP  */
 109 #define P_MNOP                          0xC803
 110 /* EXCPT, 16-bit, min  */
 111 #define P_EXCPT_MIN                     0x00A0
 112 /* EXCPT, 16-bit, max  */
 113 #define P_EXCPT_MAX                     0x00AF
 114 /* multi instruction mask 1, 16-bit  */
 115 #define P_BIT_MULTI_INS_1               0xC000
 116 /* multi instruction mask 2, 16-bit  */
 117 #define P_BIT_MULTI_INS_2               0x0800
 118
 119 /* The maximum bytes we search to skip the prologue.  */
 120 #define UPPER_LIMIT                     40
 121
 122 /* ASTAT bits  */
 123 #define ASTAT_CC_POS                    5
 124 #define ASTAT_CC                        (1 << ASTAT_CC_POS)
 125
 126 /* Initial value: Register names used in BFIN's ISA documentation.  */
 127
 128 static const char * const bfin_register_name_strings[] =
 129 {
 130   "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
 131   "p0", "p1", "p2", "p3", "p4", "p5", "sp", "fp",
 132   "i0", "i1", "i2", "i3", "m0", "m1", "m2", "m3",
 133   "b0", "b1", "b2", "b3", "l0", "l1", "l2", "l3",
 134   "a0x", "a0w", "a1x", "a1w", "astat", "rets",
 135   "lc0", "lt0", "lb0", "lc1", "lt1", "lb1", "cycles", "cycles2",
 136   "usp", "seqstat", "syscfg", "reti", "retx", "retn", "rete",
 137   "pc", "cc",
 138 };
 139
 140 #define NUM_BFIN_REGNAMES ARRAY_SIZE (bfin_register_name_strings)
 141
 142
 143 /* In this diagram successive memory locations increase downwards or the
 144    stack grows upwards with negative indices.  (PUSH analogy for stack.)
 145
 146    The top frame is the "frame" of the current function being executed.
 147
 148      +--------------+ SP    -
 149      |  local vars  |       ^
 150      +--------------+       |
 151      |  save regs   |       |
 152      +--------------+ FP    |
 153      |   old FP    -|--    top
 154      +--------------+  |  frame
 155      |    RETS      |  |    |
 156      +--------------+  |    |
 157      |   param 1    |  |    |
 158      |   param 2    |  |    |
 159      |    ...       |  |    V
 160      +--------------+  |    -
 161      |  local vars  |  |    ^
 162      +--------------+  |    |
 163      |  save regs   |  |    |
 164      +--------------+<-     |
 165      |   old FP    -|--   next
 166      +--------------+  |  frame
 167      |    RETS      |  |    |
 168      +--------------+  |    |
 169      |   param 1    |  |    |
 170      |   param 2    |  |    |
 171      |    ...       |  |    V
 172      +--------------+  |    -
 173      |  local vars  |  |    ^
 174      +--------------+  |    |
 175      |  save regs   |  |    |
 176      +--------------+<-  next frame
 177      |   old FP     |       |
 178      +--------------+       |
 179      |    RETS      |       V
 180      +--------------+       -
 181
 182    The frame chain is formed as following:
 183
 184      FP has the topmost frame.
 185      FP + 4 has the previous FP and so on.  */
 186
 187
 188 /* Map from DWARF2 register number to GDB register number.  */
 189
 190 static const int map_gcc_gdb[] =
 191 {
 192   BFIN_R0_REGNUM,
 193   BFIN_R1_REGNUM,
 194   BFIN_R2_REGNUM,
 195   BFIN_R3_REGNUM,
 196   BFIN_R4_REGNUM,
 197   BFIN_R5_REGNUM,
 198   BFIN_R6_REGNUM,
 199   BFIN_R7_REGNUM,
 200   BFIN_P0_REGNUM,
 201   BFIN_P1_REGNUM,
 202   BFIN_P2_REGNUM,
 203   BFIN_P3_REGNUM,
 204   BFIN_P4_REGNUM,
 205   BFIN_P5_REGNUM,
 206   BFIN_SP_REGNUM,
 207   BFIN_FP_REGNUM,
 208   BFIN_I0_REGNUM,
 209   BFIN_I1_REGNUM,
 210   BFIN_I2_REGNUM,
 211   BFIN_I3_REGNUM,
 212   BFIN_B0_REGNUM,
 213   BFIN_B1_REGNUM,
 214   BFIN_B2_REGNUM,
 215   BFIN_B3_REGNUM,
 216   BFIN_L0_REGNUM,
 217   BFIN_L1_REGNUM,
 218   BFIN_L2_REGNUM,
 219   BFIN_L3_REGNUM,
 220   BFIN_M0_REGNUM,
 221   BFIN_M1_REGNUM,
 222   BFIN_M2_REGNUM,
 223   BFIN_M3_REGNUM,
 224   BFIN_A0_DOT_X_REGNUM,
 225   BFIN_A1_DOT_X_REGNUM,
 226   BFIN_CC_REGNUM,
 227   BFIN_RETS_REGNUM,
 228   BFIN_RETI_REGNUM,
 229   BFIN_RETX_REGNUM,
 230   BFIN_RETN_REGNUM,
 231   BFIN_RETE_REGNUM,
 232   BFIN_ASTAT_REGNUM,
 233   BFIN_SEQSTAT_REGNUM,
 234   BFIN_USP_REGNUM,
 235   BFIN_LT0_REGNUM,
 236   BFIN_LT1_REGNUM,
 237   BFIN_LC0_REGNUM,
 238   BFIN_LC1_REGNUM,
 239   BFIN_LB0_REGNUM,
 240   BFIN_LB1_REGNUM
 241 };
 242
 243 /* Big enough to hold the size of the largest register in bytes.  */
 244 #define BFIN_MAX_REGISTER_SIZE  4
 245
 246 struct bfin_frame_cache
 247 {
 248   /* Base address.  */
 249   CORE_ADDR base;
 250   CORE_ADDR sp_offset;
 251   CORE_ADDR pc;
 252   int frameless_pc_value;
 253
 254   /* Saved registers.  */
 255   CORE_ADDR saved_regs[BFIN_NUM_REGS];
 256   CORE_ADDR saved_sp;
 257
 258   /* Stack space reserved for local variables.  */
 259   long locals;
 260 };
 261
 262 /* Allocate and initialize a frame cache.  */
 263
 264 static struct bfin_frame_cache *
 265 bfin_alloc_frame_cache (void)
 266 {
 267   struct bfin_frame_cache *cache;
 268   int i;
 269
 270   cache = FRAME_OBSTACK_ZALLOC (struct bfin_frame_cache);
 271
 272   /* Base address.  */
 273   cache->base = 0;
 274   cache->sp_offset = -4;
 275   cache->pc = 0;
 276   cache->frameless_pc_value = 0;
 277
 278   /* Saved registers.  We initialize these to -1 since zero is a valid
 279      offset (that's where fp is supposed to be stored).  */
 280   for (i = 0; i < BFIN_NUM_REGS; i++)
 281     cache->saved_regs[i] = -1;
 282
 283   /* Frameless until proven otherwise.  */
 284   cache->locals = -1;
 285
 286   return cache;
 287 }
 288
 289 static struct bfin_frame_cache *
 290 bfin_frame_cache (const frame_info_ptr &this_frame, void **this_cache)
 291 {
 292   struct bfin_frame_cache *cache;
 293   int i;
 294
 295   if (*this_cache)
 296     return (struct bfin_frame_cache *) *this_cache;
 297
 298   cache = bfin_alloc_frame_cache ();
 299   *this_cache = cache;
 300
 301   cache->base = get_frame_register_unsigned (this_frame, BFIN_FP_REGNUM);
 302   if (cache->base == 0)
 303     return cache;
 304
 305   /* For normal frames, PC is stored at [FP + 4].  */
 306   cache->saved_regs[BFIN_PC_REGNUM] = 4;
 307   cache->saved_regs[BFIN_FP_REGNUM] = 0;
 308
 309   /* Adjust all the saved registers such that they contain addresses
 310      instead of offsets.  */
 311   for (i = 0; i < BFIN_NUM_REGS; i++)
 312     if (cache->saved_regs[i] != -1)
 313       cache->saved_regs[i] += cache->base;
 314
 315   cache->pc = get_frame_func (this_frame) ;
 316   if (cache->pc == 0 || cache->pc == get_frame_pc (this_frame))
 317     {
 318       /* Either there is no prologue (frameless function) or we are at
 319          the start of a function.  In short we do not have a frame.
 320          PC is stored in rets register.  FP points to previous frame.  */
 321
 322       cache->saved_regs[BFIN_PC_REGNUM] =
 323         get_frame_register_unsigned (this_frame, BFIN_RETS_REGNUM);
 324       cache->frameless_pc_value = 1;
 325       cache->base = get_frame_register_unsigned (this_frame, BFIN_FP_REGNUM);
 326       cache->saved_regs[BFIN_FP_REGNUM] = cache->base;
 327       cache->saved_sp = cache->base;
 328     }
 329   else
 330     {
 331       cache->frameless_pc_value = 0;
 332
 333       /* Now that we have the base address for the stack frame we can
 334          calculate the value of SP in the calling frame.  */
 335       cache->saved_sp = cache->base + 8;
 336     }
 337
 338   return cache;
 339 }
 340
 341 static void
 342 bfin_frame_this_id (const frame_info_ptr &this_frame,
 343                     void **this_cache,
 344                     struct frame_id *this_id)
 345 {
 346   struct bfin_frame_cache *cache = bfin_frame_cache (this_frame, this_cache);
 347
 348   /* This marks the outermost frame.  */
 349   if (cache->base == 0)
 350     return;
 351
 352   /* See the end of bfin_push_dummy_call.  */
 353   *this_id = frame_id_build (cache->base + 8, cache->pc);
 354 }
 355
 356 static struct value *
 357 bfin_frame_prev_register (const frame_info_ptr &this_frame,
 358                           void **this_cache,
 359                           int regnum)
 360 {
 361   struct gdbarch *gdbarch = get_frame_arch (this_frame);
 362   struct bfin_frame_cache *cache = bfin_frame_cache (this_frame, this_cache);
 363
 364   if (regnum == gdbarch_sp_regnum (gdbarch) && cache->saved_sp)
 365     return frame_unwind_got_constant (this_frame, regnum, cache->saved_sp);
 366
 367   if (regnum < BFIN_NUM_REGS && cache->saved_regs[regnum] != -1)
 368     return frame_unwind_got_memory (this_frame, regnum,
 369                                     cache->saved_regs[regnum]);
 370
 371   return frame_unwind_got_register (this_frame, regnum, regnum);
 372 }
 373
 374 static const struct frame_unwind bfin_frame_unwind =
 375 {
 376   "bfin prologue",
 377   NORMAL_FRAME,
 378   default_frame_unwind_stop_reason,
 379   bfin_frame_this_id,
 380   bfin_frame_prev_register,
 381   NULL,
 382   default_frame_sniffer
 383 };
 384
 385 /* Check for "[--SP] = <reg>;" insns.  These are appear in function
 386    prologues to save misc registers onto the stack.  */
 387
 388 static int
 389 is_minus_minus_sp (int op)
 390 {
 391   op &= 0xFFC0;
 392
 393   if ((op == P_MINUS_SP1) || (op == P_MINUS_SP2)
 394       || (op == P_MINUS_SP3) || (op == P_MINUS_SP4))
 395     return 1;
 396
 397   return 0;
 398 }
 399
 400 /* Skip all the insns that appear in generated function prologues.  */
 401
 402 static CORE_ADDR
 403 bfin_skip_prologue (struct gdbarch *gdbarch, CORE_ADDR pc)
 404 {
 405   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
 406   int op = read_memory_unsigned_integer (pc, 2, byte_order);
 407   CORE_ADDR orig_pc = pc;
 408   int done = 0;
 409
 410   /* The new gcc prologue generates the register saves BEFORE the link
 411      or RETS saving instruction.
 412      So, our job is to stop either at those instructions or some upper
 413      limit saying there is no frame!  */
 414
 415   while (!done)
 416     {
 417       if (is_minus_minus_sp (op))
 418         {
 419           while (is_minus_minus_sp (op))
 420             {
 421               pc += 2;
 422               op = read_memory_unsigned_integer (pc, 2, byte_order);
 423             }
 424
 425           if (op == P_LINKAGE)
 426             pc += 4;
 427
 428           done = 1;
 429         }
 430       else if (op == P_LINKAGE)
 431         {
 432           pc += 4;
 433           done = 1;
 434         }
 435       else if (op == P_MINUS_MINUS_SP_EQ_RETS)
 436         {
 437           pc += 2;
 438           done = 1;
 439         }
 440       else if (op == P_RTS)
 441         {
 442           done = 1;
 443         }
 444       else if ((op >= P_JUMP_PREG_MIN && op <= P_JUMP_PREG_MAX)
 445                || (op >= P_JUMP_PC_PLUS_PREG_MIN
 446                    && op <= P_JUMP_PC_PLUS_PREG_MAX)
 447                || (op == P_JUMP_S_MIN && op <= P_JUMP_S_MAX))
 448         {
 449           done = 1;
 450         }
 451       else if (pc - orig_pc >= UPPER_LIMIT)
 452         {
 453           warning (_("Function Prologue not recognised; "
 454                      "pc will point to ENTRY_POINT of the function"));
 455           pc = orig_pc + 2;
 456           done = 1;
 457         }
 458       else
 459         {
 460           pc += 2; /* Not a terminating instruction go on.  */
 461           op = read_memory_unsigned_integer (pc, 2, byte_order);
 462         }
 463     }
 464
 465    /* TODO:
 466       Dwarf2 uses entry point value AFTER some register initializations.
 467       We should perhaps skip such asssignments as well (R6 = R1, ...).  */
 468
 469   return pc;
 470 }
 471
 472 /* Return the GDB type object for the "standard" data type of data in
 473    register N.  This should be void pointer for P0-P5, SP, FP;
 474    void pointer to function for PC; int otherwise.  */
 475
 476 static struct type *
 477 bfin_register_type (struct gdbarch *gdbarch, int regnum)
 478 {
 479   if ((regnum >= BFIN_P0_REGNUM && regnum <= BFIN_FP_REGNUM)
 480       || regnum == BFIN_USP_REGNUM)
 481     return builtin_type (gdbarch)->builtin_data_ptr;
 482
 483   if (regnum == BFIN_PC_REGNUM || regnum == BFIN_RETS_REGNUM
 484       || regnum == BFIN_RETI_REGNUM || regnum == BFIN_RETX_REGNUM
 485       || regnum == BFIN_RETN_REGNUM || regnum == BFIN_RETE_REGNUM
 486       || regnum == BFIN_LT0_REGNUM || regnum == BFIN_LB0_REGNUM
 487       || regnum == BFIN_LT1_REGNUM || regnum == BFIN_LB1_REGNUM)
 488     return builtin_type (gdbarch)->builtin_func_ptr;
 489
 490   return builtin_type (gdbarch)->builtin_int32;
 491 }
 492
 493 static CORE_ADDR
 494 bfin_push_dummy_call (struct gdbarch *gdbarch,
 495                       struct value *function,
 496                       struct regcache *regcache,
 497                       CORE_ADDR bp_addr,
 498                       int nargs,
 499                       struct value **args,
 500                       CORE_ADDR sp,
 501                       function_call_return_method return_method,
 502                       CORE_ADDR struct_addr)
 503 {
 504   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
 505   int i;
 506   long reg_r0, reg_r1, reg_r2;
 507   int total_len = 0;
 508
 509   for (i = nargs - 1; i >= 0; i--)
 510     {
 511       struct type *value_type = args[i]->enclosing_type ();
 512
 513       total_len += align_up (value_type->length (), 4);
 514     }
 515
 516   /* At least twelve bytes of stack space must be allocated for the function's
 517      arguments, even for functions that have less than 12 bytes of argument
 518      data.  */
 519
 520   if (total_len < 12)
 521     sp -= 12 - total_len;
 522
 523   /* Push arguments in reverse order.  */
 524
 525   for (i = nargs - 1; i >= 0; i--)
 526     {
 527       struct type *value_type = args[i]->enclosing_type ();
 528       struct type *arg_type = check_typedef (value_type);
 529       int container_len = align_up (arg_type->length (), 4);
 530
 531       sp -= container_len;
 532       write_memory (sp, args[i]->contents ().data (), container_len);
 533     }
 534
 535   /* Initialize R0, R1, and R2 to the first 3 words of parameters.  */
 536
 537   reg_r0 = read_memory_integer (sp, 4, byte_order);
 538   regcache_cooked_write_unsigned (regcache, BFIN_R0_REGNUM, reg_r0);
 539   reg_r1 = read_memory_integer (sp + 4, 4, byte_order);
 540   regcache_cooked_write_unsigned (regcache, BFIN_R1_REGNUM, reg_r1);
 541   reg_r2 = read_memory_integer (sp + 8, 4, byte_order);
 542   regcache_cooked_write_unsigned (regcache, BFIN_R2_REGNUM, reg_r2);
 543
 544   /* Store struct value address.  */
 545
 546   if (return_method == return_method_struct)
 547     regcache_cooked_write_unsigned (regcache, BFIN_P0_REGNUM, struct_addr);
 548
 549   /* Set the dummy return value to bp_addr.
 550      A dummy breakpoint will be setup to execute the call.  */
 551
 552   regcache_cooked_write_unsigned (regcache, BFIN_RETS_REGNUM, bp_addr);
 553
 554   /* Finally, update the stack pointer.  */
 555
 556   regcache_cooked_write_unsigned (regcache, BFIN_SP_REGNUM, sp);
 557
 558   return sp;
 559 }
 560
 561 /* Convert DWARF2 register number REG to the appropriate register number
 562    used by GDB.  */
 563
 564 static int
 565 bfin_reg_to_regnum (struct gdbarch *gdbarch, int reg)
 566 {
 567   if (reg < 0 || reg >= ARRAY_SIZE (map_gcc_gdb))
 568     return -1;
 569
 570   return map_gcc_gdb[reg];
 571 }
 572
 573 /* Implement the breakpoint_kind_from_pc gdbarch method.  */
 574
 575 static int
 576 bfin_breakpoint_kind_from_pc (struct gdbarch *gdbarch, CORE_ADDR *pcptr)
 577 {
 578   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
 579   unsigned short iw;
 580
 581   iw = read_memory_unsigned_integer (*pcptr, 2, byte_order);
 582
 583   if ((iw & 0xf000) >= 0xc000)
 584     /* 32-bit instruction.  */
 585     return 4;
 586   else
 587     return 2;
 588 }
 589
 590 /* Implement the sw_breakpoint_from_kind gdbarch method.  */
 591
 592 static const gdb_byte *
 593 bfin_sw_breakpoint_from_kind (struct gdbarch *gdbarch, int kind, int *size)
 594 {
 595   static unsigned char bfin_breakpoint[] = {0xa1, 0x00, 0x00, 0x00};
 596   static unsigned char bfin_sim_breakpoint[] = {0x25, 0x00, 0x00, 0x00};
 597
 598   *size = kind;
 599
 600   if (strcmp (target_shortname (), "sim") == 0)
 601     return bfin_sim_breakpoint;
 602   else
 603     return bfin_breakpoint;
 604 }
 605
 606 static void
 607 bfin_extract_return_value (struct type *type,
 608                            struct regcache *regs,
 609                            gdb_byte *dst)
 610 {
 611   struct gdbarch *gdbarch = regs->arch ();
 612   enum bfd_endian byte_order = gdbarch_byte_order (gdbarch);
 613   bfd_byte *valbuf = dst;
 614   int len = type->length ();
 615   ULONGEST tmp;
 616   int regno = BFIN_R0_REGNUM;
 617
 618   gdb_assert (len <= 8);
 619
 620   while (len > 0)
 621     {
 622       regcache_cooked_read_unsigned (regs, regno++, &tmp);
 623       store_unsigned_integer (valbuf, (len > 4 ? 4 : len), byte_order, tmp);
 624       len -= 4;
 625       valbuf += 4;
 626     }
 627 }
 628
 629 /* Write into appropriate registers a function return value of type
 630    TYPE, given in virtual format.  */
 631
 632 static void
 633 bfin_store_return_value (struct type *type,
 634                          struct regcache *regs,
 635                          const gdb_byte *src)
 636 {
 637   const bfd_byte *valbuf = src;
 638
 639   /* Integral values greater than one word are stored in consecutive
 640      registers starting with R0.  This will always be a multiple of
 641      the register size.  */
 642
 643   int len = type->length ();
 644   int regno = BFIN_R0_REGNUM;
 645
 646   gdb_assert (len <= 8);
 647
 648   while (len > 0)
 649     {
 650       regs->cooked_write (regno++, valbuf);
 651       len -= 4;
 652       valbuf += 4;
 653     }
 654 }
 655
 656 /* Determine, for architecture GDBARCH, how a return value of TYPE
 657    should be returned.  If it is supposed to be returned in registers,
 658    and READBUF is nonzero, read the appropriate value from REGCACHE,
 659    and copy it into READBUF.  If WRITEBUF is nonzero, write the value
 660    from WRITEBUF into REGCACHE.  */
 661
 662 static enum return_value_convention
 663 bfin_return_value (struct gdbarch *gdbarch,
 664                    struct value *function,
 665                    struct type *type,
 666                    struct regcache *regcache,
 667                    gdb_byte *readbuf,
 668                    const gdb_byte *writebuf)
 669 {
 670   if (type->length () > 8)
 671     return RETURN_VALUE_STRUCT_CONVENTION;
 672
 673   if (readbuf)
 674     bfin_extract_return_value (type, regcache, readbuf);
 675
 676   if (writebuf)
 677     bfin_store_return_value (type, regcache, writebuf);
 678
 679   return RETURN_VALUE_REGISTER_CONVENTION;
 680 }
 681
 682 /* Return the BFIN register name corresponding to register I.  */
 683
 684 static const char *
 685 bfin_register_name (struct gdbarch *gdbarch, int i)
 686 {
 687   return bfin_register_name_strings[i];
 688 }
 689
 690 static enum register_status
 691 bfin_pseudo_register_read (struct gdbarch *gdbarch, readable_regcache *regcache,
 692                            int regnum, gdb_byte *buffer)
 693 {
 694   gdb_byte buf[BFIN_MAX_REGISTER_SIZE];
 695   enum register_status status;
 696
 697   if (regnum != BFIN_CC_REGNUM)
 698     internal_error (_("invalid register number %d"), regnum);
 699
 700   /* Extract the CC bit from the ASTAT register.  */
 701   status = regcache->raw_read (BFIN_ASTAT_REGNUM, buf);
 702   if (status == REG_VALID)
 703     {
 704       buffer[1] = buffer[2] = buffer[3] = 0;
 705       buffer[0] = !!(buf[0] & ASTAT_CC);
 706     }
 707   return status;
 708 }
 709
 710 static void
 711 bfin_pseudo_register_write (struct gdbarch *gdbarch, struct regcache *regcache,
 712                             int regnum, const gdb_byte *buffer)
 713 {
 714   gdb_byte buf[BFIN_MAX_REGISTER_SIZE];
 715
 716   if (regnum != BFIN_CC_REGNUM)
 717     internal_error (_("invalid register number %d"), regnum);
 718
 719   /* Overlay the CC bit in the ASTAT register.  */
 720   regcache->raw_read (BFIN_ASTAT_REGNUM, buf);
 721   buf[0] = (buf[0] & ~ASTAT_CC) | ((buffer[0] & 1) << ASTAT_CC_POS);
 722   regcache->raw_write (BFIN_ASTAT_REGNUM, buf);
 723 }
 724
 725 static CORE_ADDR
 726 bfin_frame_base_address (const frame_info_ptr &this_frame, void **this_cache)
 727 {
 728   struct bfin_frame_cache *cache = bfin_frame_cache (this_frame, this_cache);
 729
 730   return cache->base;
 731 }
 732
 733 static CORE_ADDR
 734 bfin_frame_local_address (const frame_info_ptr &this_frame, void **this_cache)
 735 {
 736   struct bfin_frame_cache *cache = bfin_frame_cache (this_frame, this_cache);
 737
 738   return cache->base - 4;
 739 }
 740
 741 static CORE_ADDR
 742 bfin_frame_args_address (const frame_info_ptr &this_frame, void **this_cache)
 743 {
 744   struct bfin_frame_cache *cache = bfin_frame_cache (this_frame, this_cache);
 745
 746   return cache->base + 8;
 747 }
 748
 749 static const struct frame_base bfin_frame_base =
 750 {
 751   &bfin_frame_unwind,
 752   bfin_frame_base_address,
 753   bfin_frame_local_address,
 754   bfin_frame_args_address
 755 };
 756
 757 static CORE_ADDR
 758 bfin_frame_align (struct gdbarch *gdbarch, CORE_ADDR address)
 759 {
 760   return align_down (address, 4);
 761 }
 762
 763 enum bfin_abi
 764 bfin_abi (struct gdbarch *gdbarch)
 765 {
 766   bfin_gdbarch_tdep *tdep = gdbarch_tdep<bfin_gdbarch_tdep> (gdbarch);
 767   return tdep->bfin_abi;
 768 }
 769
 770 /* Initialize the current architecture based on INFO.  If possible,
 771    re-use an architecture from ARCHES, which is a list of
 772    architectures already created during this debugging session.
 773
 774    Called e.g. at program startup, when reading a core file, and when
 775    reading a binary file.  */
 776
 777 static struct gdbarch *
 778 bfin_gdbarch_init (struct gdbarch_info info, struct gdbarch_list *arches)
 779 {
 780   enum bfin_abi abi;
 781
 782   abi = BFIN_ABI_FLAT;
 783
 784   /* If there is already a candidate, use it.  */
 785
 786   for (arches = gdbarch_list_lookup_by_info (arches, &info);
 787        arches != NULL;
 788        arches = gdbarch_list_lookup_by_info (arches->next, &info))
 789     {
 790       bfin_gdbarch_tdep *tdep
 791         = gdbarch_tdep<bfin_gdbarch_tdep> (arches->gdbarch);
 792
 793       if (tdep->bfin_abi != abi)
 794         continue;
 795
 796       return arches->gdbarch;
 797     }
 798
 799   gdbarch *gdbarch
 800     = gdbarch_alloc (&info, gdbarch_tdep_up (new bfin_gdbarch_tdep));
 801   bfin_gdbarch_tdep *tdep = gdbarch_tdep<bfin_gdbarch_tdep> (gdbarch);
 802
 803   tdep->bfin_abi = abi;
 804
 805   set_gdbarch_num_regs (gdbarch, BFIN_NUM_REGS);
 806   set_gdbarch_pseudo_register_read (gdbarch, bfin_pseudo_register_read);
 807   set_gdbarch_deprecated_pseudo_register_write (gdbarch,
 808                                                 bfin_pseudo_register_write);
 809   set_gdbarch_num_pseudo_regs (gdbarch, BFIN_NUM_PSEUDO_REGS);
 810   set_gdbarch_sp_regnum (gdbarch, BFIN_SP_REGNUM);
 811   set_gdbarch_pc_regnum (gdbarch, BFIN_PC_REGNUM);
 812   set_gdbarch_ps_regnum (gdbarch, BFIN_ASTAT_REGNUM);
 813   set_gdbarch_dwarf2_reg_to_regnum (gdbarch, bfin_reg_to_regnum);
 814   set_gdbarch_register_name (gdbarch, bfin_register_name);
 815   set_gdbarch_register_type (gdbarch, bfin_register_type);
 816   set_gdbarch_push_dummy_call (gdbarch, bfin_push_dummy_call);
 817   set_gdbarch_believe_pcc_promotion (gdbarch, 1);
 818   set_gdbarch_return_value (gdbarch, bfin_return_value);
 819   set_gdbarch_skip_prologue (gdbarch, bfin_skip_prologue);
 820   set_gdbarch_inner_than (gdbarch, core_addr_lessthan);
 821   set_gdbarch_breakpoint_kind_from_pc (gdbarch, bfin_breakpoint_kind_from_pc);
 822   set_gdbarch_sw_breakpoint_from_kind (gdbarch, bfin_sw_breakpoint_from_kind);
 823   set_gdbarch_decr_pc_after_break (gdbarch, 2);
 824   set_gdbarch_frame_args_skip (gdbarch, 8);
 825   set_gdbarch_frame_align (gdbarch, bfin_frame_align);
 826
 827   /* Hook in ABI-specific overrides, if they have been registered.  */
 828   gdbarch_init_osabi (info, gdbarch);
 829
 830   dwarf2_append_unwinders (gdbarch);
 831
 832   frame_base_set_default (gdbarch, &bfin_frame_base);
 833
 834   frame_unwind_append_unwinder (gdbarch, &bfin_frame_unwind);
 835
 836   return gdbarch;
 837 }
 838
 839 void _initialize_bfin_tdep ();
 840 void
 841 _initialize_bfin_tdep ()
 842 {
 843   gdbarch_register (bfd_arch_bfin, bfin_gdbarch_init);
 844 }