[gdb/testsuite] Require debug info for gdb.tui/tui-layout-asm-short-prog.exp
[binutils-gdb.git] / opcodes / loongarch-opc.c
blob1b510048c29939d31670c305983b7604dec7f712
1 /* LoongArch opcode support.
2 Copyright (C) 2021-2022 Free Software Foundation, Inc.
3 Contributed by Loongson Ltd.
5 This file is part of the GNU opcodes library.
7 This library is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
10 any later version.
12 It is distributed in the hope that it will be useful, but WITHOUT
13 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; see the file COPYING3. If not,
19 see <http://www.gnu.org/licenses/>. */
21 #include <stddef.h>
22 #include "opcode/loongarch.h"
23 #include "libiberty.h"
25 struct loongarch_ASEs_option LARCH_opts;
27 size_t
28 loongarch_insn_length (insn_t insn ATTRIBUTE_UNUSED)
30 return 4;
33 const char *const loongarch_r_normal_name[32] =
35 "$r0", "$r1", "$r2", "$r3", "$r4", "$r5", "$r6", "$r7",
36 "$r8", "$r9", "$r10", "$r11", "$r12", "$r13", "$r14", "$r15",
37 "$r16", "$r17", "$r18", "$r19", "$r20", "$r21", "$r22", "$r23",
38 "$r24", "$r25", "$r26", "$r27", "$r28", "$r29", "$r30", "$r31",
41 const char *const loongarch_r_lp64_name[32] =
43 "$zero", "$ra", "$tp", "$sp", "$a0", "$a1", "$a2", "$a3",
44 "$a4", "$a5", "$a6", "$a7", "$t0", "$t1", "$t2", "$t3",
45 "$t4", "$t5", "$t6", "$t7", "$t8", "$x", "$fp", "$s0",
46 "$s1", "$s2", "$s3", "$s4", "$s5", "$s6", "$s7", "$s8",
49 const char *const loongarch_r_lp64_name1[32] =
51 "", "", "", "", "$v0", "$v1", "", "", "", "", "", "", "", "", "", "",
52 "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "",
55 const char *const loongarch_f_normal_name[32] =
57 "$f0", "$f1", "$f2", "$f3", "$f4", "$f5", "$f6", "$f7",
58 "$f8", "$f9", "$f10", "$f11", "$f12", "$f13", "$f14", "$f15",
59 "$f16", "$f17", "$f18", "$f19", "$f20", "$f21", "$f22", "$f23",
60 "$f24", "$f25", "$f26", "$f27", "$f28", "$f29", "$f30", "$f31",
63 const char *const loongarch_f_lp64_name[32] =
65 "$fa0", "$fa1", "$fa2", "$fa3", "$fa4", "$fa5", "$fa6", "$fa7",
66 "$ft0", "$ft1", "$ft2", "$ft3", "$ft4", "$ft5", "$ft6", "$ft7",
67 "$ft8", "$ft9", "$ft10", "$ft11", "$ft12", "$ft13", "$ft14", "$ft15",
68 "$fs0", "$fs1", "$fs2", "$fs3", "$fs4", "$fs5", "$fs6", "$fs7",
71 const char *const loongarch_f_lp64_name1[32] =
73 "$fv0", "$fv1", "", "", "", "", "", "", "", "", "", "", "", "", "", "",
74 "", "", "", "", "", "", "", "", "", "", "", "", "", "", "", "",
77 const char *const loongarch_c_normal_name[8] =
79 "$fcc0", "$fcc1", "$fcc2", "$fcc3", "$fcc4", "$fcc5", "$fcc6", "$fcc7",
82 const char *const loongarch_cr_normal_name[4] =
84 "$scr0",
85 "$scr1",
86 "$scr2",
87 "$scr3",
90 const char *const loongarch_v_normal_name[32] =
92 "$vr0", "$vr1", "$vr2", "$vr3", "$vr4", "$vr5", "$vr6", "$vr7",
93 "$vr8", "$vr9", "$vr10", "$vr11", "$vr12", "$vr13", "$vr14", "$vr15",
94 "$vr16", "$vr17", "$vr18", "$vr19", "$vr20", "$vr21", "$vr22", "$vr23",
95 "$vr24", "$vr25", "$vr26", "$vr27", "$vr28", "$vr29", "$vr30", "$vr31",
98 const char *const loongarch_x_normal_name[32] =
100 "$xr0", "$xr1", "$xr2", "$xr3", "$xr4", "$xr5", "$xr6", "$xr7",
101 "$xr8", "$xr9", "$xr10", "$xr11", "$xr12", "$xr13", "$xr14", "$xr15",
102 "$xr16", "$xr17", "$xr18", "$xr19", "$xr20", "$xr21", "$xr22", "$xr23",
103 "$xr24", "$xr25", "$xr26", "$xr27", "$xr28", "$xr29", "$xr30", "$xr31",
106 /* Can not use xx_pa for abs. */
108 /* For LoongArch32 abs. */
109 #define INSN_LA_ABS32 \
110 "lu12i.w %1,%%abs_hi20(%2);" \
111 "ori %1,%1,%%abs_lo12(%2);", \
112 &LARCH_opts.ase_ilp32, \
113 &LARCH_opts.ase_lp64
114 #define INSN_LA_ABS64 \
115 "lu12i.w %1,%%abs_hi20(%2);" \
116 "ori %1,%1,%%abs_lo12(%2);" \
117 "lu32i.d %1,%%abs64_lo20(%2);" \
118 "lu52i.d %1,%1,%%abs64_hi12(%2);", \
119 &LARCH_opts.ase_lp64, 0
121 #define INSN_LA_PCREL32 \
122 "pcalau12i %1,%%pc_hi20(%2);" \
123 "addi.w %1,%1,%%pc_lo12(%2);", \
124 &LARCH_opts.ase_ilp32, \
125 &LARCH_opts.ase_lp64
126 #define INSN_LA_PCREL64 \
127 "pcalau12i %1,%%pc_hi20(%2);" \
128 "addi.d %1,%1,%%pc_lo12(%2);", \
129 &LARCH_opts.ase_lp64, 0
130 #define INSN_LA_PCREL64_LARGE \
131 "pcalau12i %1,%%pc_hi20(%3);" \
132 "addi.d %2,$r0,%%pc_lo12(%3);" \
133 "lu32i.d %2,%%pc64_lo20(%3);" \
134 "lu52i.d %2,%2,%%pc64_hi12(%3);" \
135 "add.d %1,%1,%2;", \
136 &LARCH_opts.ase_lp64, 0
138 #define INSN_LA_GOT32 \
139 "pcalau12i %1,%%got_pc_hi20(%2);" \
140 "ld.w %1,%1,%%got_pc_lo12(%2);", \
141 &LARCH_opts.ase_ilp32, \
142 &LARCH_opts.ase_lp64
143 /* got32 abs. */
144 #define INSN_LA_GOT32_ABS \
145 "lu12i.w %1,%%got_hi20(%2);" \
146 "ori %1,%1,%%got_lo12(%2);" \
147 "ld.w %1,%1,0;", \
148 &LARCH_opts.ase_gabs, \
149 &LARCH_opts.ase_lp64
150 #define INSN_LA_GOT64 \
151 "pcalau12i %1,%%got_pc_hi20(%2);" \
152 "ld.d %1,%1,%%got_pc_lo12(%2);", \
153 &LARCH_opts.ase_lp64, 0
154 /* got64 abs. */
155 #define INSN_LA_GOT64_LARGE_ABS \
156 "lu12i.w %1,%%got_hi20(%2);" \
157 "ori %1,%1,%%got_lo12(%2);" \
158 "lu32i.d %1,%%got64_lo20(%2);" \
159 "lu52i.d %1,%1,%%got64_hi12(%2);" \
160 "ld.d %1,%1,0", \
161 &LARCH_opts.ase_lp64, \
162 &LARCH_opts.ase_gpcr
163 /* got64 pic. */
164 #define INSN_LA_GOT64_LARGE_PCREL \
165 "pcalau12i %1,%%got_pc_hi20(%3);" \
166 "addi.d %2,$r0,%%got_pc_lo12(%3);" \
167 "lu32i.d %2,%%got64_pc_lo20(%3);" \
168 "lu52i.d %2,%2,%%got64_pc_hi12(%3);"\
169 "ldx.d %1,%1,%2;", \
170 &LARCH_opts.ase_lp64, \
171 &LARCH_opts.ase_gabs
173 /* For LoongArch32/64 cmode=normal. */
174 #define INSN_LA_TLS_LE \
175 "lu12i.w %1,%%le_hi20(%2);" \
176 "ori %1,%1,%%le_lo12(%2);", \
177 &LARCH_opts.ase_ilp32, 0
179 /* For LoongArch64 cmode=large. */
180 #define INSN_LA_TLS_LE64_LARGE \
181 "lu12i.w %1,%%le_hi20(%2);" \
182 "ori %1,%1,%%le_lo12(%2);" \
183 "lu32i.d %1,%%le64_lo20(%2);" \
184 "lu52i.d %1,%1,%%le64_hi12(%2);", \
185 &LARCH_opts.ase_lp64, 0
187 #define INSN_LA_TLS_IE32 \
188 "pcalau12i %1,%%ie_pc_hi20(%2);" \
189 "ld.w %1,%1,%%ie_pc_lo12(%2);", \
190 &LARCH_opts.ase_ilp32, \
191 &LARCH_opts.ase_lp64
192 /* For ie32 abs. */
193 #define INSN_LA_TLS_IE32_ABS \
194 "lu12i.w %1,%%ie_hi20(%2);" \
195 "ori %1,%1,%%ie_lo12(%2);" \
196 "ld.w %1,%1,0", \
197 &LARCH_opts.ase_gabs, \
198 &LARCH_opts.ase_lp64
199 #define INSN_LA_TLS_IE64 \
200 "pcalau12i %1,%%ie_pc_hi20(%2);" \
201 "ld.d %1,%1,%%ie_pc_lo12(%2);", \
202 &LARCH_opts.ase_lp64, 0
203 /* For ie64 pic. */
204 #define INSN_LA_TLS_IE64_LARGE_PCREL \
205 "pcalau12i %1,%%ie_pc_hi20(%3);" \
206 "addi.d %2,$r0,%%ie_pc_lo12(%3);" \
207 "lu32i.d %2,%%ie64_pc_lo20(%3);" \
208 "lu52i.d %2,%2,%%ie64_pc_hi12(%3);"\
209 "ldx.d %1,%1,%2;", \
210 &LARCH_opts.ase_lp64, \
211 &LARCH_opts.ase_gabs
212 /* For ie64 abs. */
213 #define INSN_LA_TLS_IE64_LARGE_ABS \
214 "lu12i.w %1,%%ie_hi20(%2);" \
215 "ori %1,%1,%%ie_lo12(%2);" \
216 "lu32i.d %1,%%ie64_lo20(%2);" \
217 "lu52i.d %1,%1,%%ie64_hi12(%2);" \
218 "ld.d %1,%1,0", \
219 &LARCH_opts.ase_lp64, \
220 &LARCH_opts.ase_gpcr
222 /* For LoongArch32/64 cmode=normal. */
223 #define INSN_LA_TLS_LD32 \
224 "pcalau12i %1,%%ld_pc_hi20(%2);" \
225 "addi.w %1,%1,%%got_pc_lo12(%2);", \
226 &LARCH_opts.ase_ilp32, \
227 &LARCH_opts.ase_lp64
228 #define INSN_LA_TLS_LD32_ABS \
229 "lu12i.w %1,%%ld_hi20(%2);" \
230 "ori %1,%1,%%got_lo12(%2);", \
231 &LARCH_opts.ase_gabs, \
232 &LARCH_opts.ase_lp64
233 #define INSN_LA_TLS_LD64 \
234 "pcalau12i %1,%%ld_pc_hi20(%2);" \
235 "addi.d %1,%1,%%got_pc_lo12(%2);", \
236 &LARCH_opts.ase_lp64, 0
237 #define INSN_LA_TLS_LD64_LARGE_PCREL \
238 "pcalau12i %1,%%ld_pc_hi20(%3);" \
239 "addi.d %2,$r0,%%got_pc_lo12(%3);" \
240 "lu32i.d %2,%%got64_pc_lo20(%3);" \
241 "lu52i.d %2,%2,%%got64_pc_hi12(%3);"\
242 "add.d %1,%1,%2;", \
243 &LARCH_opts.ase_lp64, \
244 &LARCH_opts.ase_gabs
245 #define INSN_LA_TLS_LD64_LARGE_ABS \
246 "lu12i.w %1,%%ld_hi20(%2);" \
247 "ori %1,%1,%%got_lo12(%2);" \
248 "lu32i.d %1,%%got64_lo20(%2);" \
249 "lu52i.d %1,%1,%%got64_hi12(%2);", \
250 &LARCH_opts.ase_lp64, \
251 &LARCH_opts.ase_gpcr
253 #define INSN_LA_TLS_GD32 \
254 "pcalau12i %1,%%gd_pc_hi20(%2);" \
255 "addi.w %1,%1,%%got_pc_lo12(%2);", \
256 &LARCH_opts.ase_ilp32, \
257 &LARCH_opts.ase_lp64
258 #define INSN_LA_TLS_GD32_ABS \
259 "lu12i.w %1,%%gd_hi20(%2);" \
260 "ori %1,%1,%%got_lo12(%2);", \
261 &LARCH_opts.ase_gabs, \
262 &LARCH_opts.ase_lp64
263 #define INSN_LA_TLS_GD64 \
264 "pcalau12i %1,%%gd_pc_hi20(%2);" \
265 "addi.d %1,%1,%%got_pc_lo12(%2);", \
266 &LARCH_opts.ase_lp64, 0
267 #define INSN_LA_TLS_GD64_LARGE_PCREL \
268 "pcalau12i %1,%%gd_pc_hi20(%3);" \
269 "addi.d %2,$r0,%%got_pc_lo12(%3);" \
270 "lu32i.d %2,%%got64_pc_lo20(%3);" \
271 "lu52i.d %2,%2,%%got64_pc_hi12(%3);"\
272 "add.d %1,%1,%2;", \
273 &LARCH_opts.ase_lp64, \
274 &LARCH_opts.ase_gabs
275 #define INSN_LA_TLS_GD64_LARGE_ABS \
276 "lu12i.w %1,%%gd_hi20(%2);" \
277 "ori %1,%1,%%got_lo12(%2);" \
278 "lu32i.d %1,%%got64_lo20(%2);" \
279 "lu52i.d %1,%1,%%got64_hi12(%2);", \
280 &LARCH_opts.ase_lp64, \
281 &LARCH_opts.ase_gpcr
284 static struct loongarch_opcode loongarch_macro_opcodes[] =
286 /* match, mask, name, format, macro, include, exclude, pinfo. */
287 { 0, 0, "li.w", "r,sc", "%f", 0, 0, 0 },
288 { 0, 0, "li.d", "r,sc", "%f", 0, 0, 0 },
290 { 0, 0, "la", "r,la", "la.global %1,%2", 0, 0, 0 },
291 { 0, 0, "la.global", "r,la", "la.pcrel %1,%2", &LARCH_opts.ase_gpcr, 0, 0 },
292 { 0, 0, "la.global", "r,r,la", "la.pcrel %1,%2,%3", &LARCH_opts.ase_gpcr, 0, 0 },
293 { 0, 0, "la.global", "r,la", "la.abs %1,%2", &LARCH_opts.ase_gabs, 0, 0 },
294 { 0, 0, "la.global", "r,r,la", "la.abs %1,%3", &LARCH_opts.ase_gabs, 0, 0 },
295 { 0, 0, "la.global", "r,la", "la.got %1,%2", 0, 0, 0 },
296 { 0, 0, "la.global", "r,r,la", "la.got %1,%2,%3", &LARCH_opts.ase_lp64, 0, 0 },
298 { 0, 0, "la.local", "r,la", "la.abs %1,%2", &LARCH_opts.ase_labs, 0, 0 },
299 { 0, 0, "la.local", "r,r,la", "la.abs %1,%3", &LARCH_opts.ase_labs, 0, 0 },
300 { 0, 0, "la.local", "r,la", "la.pcrel %1,%2", 0, 0, 0 },
301 { 0, 0, "la.local", "r,r,la", "la.pcrel %1,%2,%3", &LARCH_opts.ase_lp64, 0, 0 },
303 { 0, 0, "la.abs", "r,la", INSN_LA_ABS32, 0 },
304 { 0, 0, "la.abs", "r,la", INSN_LA_ABS64, 0 },
305 { 0, 0, "la.pcrel", "r,la", INSN_LA_PCREL32, 0 },
306 { 0, 0, "la.pcrel", "r,la", INSN_LA_PCREL64, 0 },
307 { 0, 0, "la.pcrel", "r,r,la", INSN_LA_PCREL64_LARGE, 0 },
308 { 0, 0, "la.got", "r,la", INSN_LA_GOT32, 0 },
309 { 0, 0, "la.got", "r,la", INSN_LA_GOT32_ABS, 0 },
310 { 0, 0, "la.got", "r,la", INSN_LA_GOT64, 0 },
311 { 0, 0, "la.got", "r,la", INSN_LA_GOT64_LARGE_ABS, 0 },
312 { 0, 0, "la.got", "r,r,la", INSN_LA_GOT64_LARGE_PCREL, 0 },
313 { 0, 0, "la.tls.le", "r,l", INSN_LA_TLS_LE, 0 },
314 { 0, 0, "la.tls.le", "r,l", INSN_LA_TLS_LE64_LARGE, 0 },
315 { 0, 0, "la.tls.ie", "r,l", INSN_LA_TLS_IE32, 0 },
316 { 0, 0, "la.tls.ie", "r,l", INSN_LA_TLS_IE32_ABS, 0 },
317 { 0, 0, "la.tls.ie", "r,l", INSN_LA_TLS_IE64, 0 },
318 { 0, 0, "la.tls.ie", "r,l", INSN_LA_TLS_IE64_LARGE_ABS, 0 },
319 { 0, 0, "la.tls.ie", "r,r,l", INSN_LA_TLS_IE64_LARGE_PCREL, 0 },
320 { 0, 0, "la.tls.ld", "r,l", INSN_LA_TLS_LD32, 0 },
321 { 0, 0, "la.tls.ld", "r,l", INSN_LA_TLS_LD32_ABS, 0 },
322 { 0, 0, "la.tls.ld", "r,l", INSN_LA_TLS_LD64, 0 },
323 { 0, 0, "la.tls.ld", "r,l", INSN_LA_TLS_LD64_LARGE_ABS, 0 },
324 { 0, 0, "la.tls.ld", "r,r,l", INSN_LA_TLS_LD64_LARGE_PCREL, 0 },
325 { 0, 0, "la.tls.gd", "r,l", INSN_LA_TLS_GD32, 0 },
326 { 0, 0, "la.tls.gd", "r,l", INSN_LA_TLS_GD32_ABS, 0 },
327 { 0, 0, "la.tls.gd", "r,l", INSN_LA_TLS_GD64, 0 },
328 { 0, 0, "la.tls.gd", "r,l", INSN_LA_TLS_GD64_LARGE_ABS, 0 },
329 { 0, 0, "la.tls.gd", "r,r,l", INSN_LA_TLS_GD64_LARGE_PCREL, 0 },
331 { 0 } /* Terminate the list. */
334 static struct loongarch_opcode loongarch_fix_opcodes[] =
336 /* match, mask, name, format, macro, include, exclude, pinfo. */
337 { 0x00001000, 0xfffffc00, "clo.w", "r0:5,r5:5", 0, 0, 0, 0 },
338 { 0x00001400, 0xfffffc00, "clz.w", "r0:5,r5:5", 0, 0, 0, 0 },
339 { 0x00001800, 0xfffffc00, "cto.w", "r0:5,r5:5", 0, 0, 0, 0 },
340 { 0x00001c00, 0xfffffc00, "ctz.w", "r0:5,r5:5", 0, 0, 0, 0 },
341 { 0x00002000, 0xfffffc00, "clo.d", "r0:5,r5:5", 0, 0, 0, 0 },
342 { 0x00002400, 0xfffffc00, "clz.d", "r0:5,r5:5", 0, 0, 0, 0 },
343 { 0x00002800, 0xfffffc00, "cto.d", "r0:5,r5:5", 0, 0, 0, 0 },
344 { 0x00002c00, 0xfffffc00, "ctz.d", "r0:5,r5:5", 0, 0, 0, 0 },
345 { 0x00003000, 0xfffffc00, "revb.2h", "r0:5,r5:5", 0, 0, 0, 0 },
346 { 0x00003400, 0xfffffc00, "revb.4h", "r0:5,r5:5", 0, 0, 0, 0 },
347 { 0x00003800, 0xfffffc00, "revb.2w", "r0:5,r5:5", 0, 0, 0, 0 },
348 { 0x00003c00, 0xfffffc00, "revb.d", "r0:5,r5:5", 0, 0, 0, 0 },
349 { 0x00004000, 0xfffffc00, "revh.2w", "r0:5,r5:5", 0, 0, 0, 0 },
350 { 0x00004400, 0xfffffc00, "revh.d", "r0:5,r5:5", 0, 0, 0, 0 },
351 { 0x00004800, 0xfffffc00, "bitrev.4b", "r0:5,r5:5", 0, 0, 0, 0 },
352 { 0x00004c00, 0xfffffc00, "bitrev.8b", "r0:5,r5:5", 0, 0, 0, 0 },
353 { 0x00005000, 0xfffffc00, "bitrev.w", "r0:5,r5:5", 0, 0, 0, 0 },
354 { 0x00005400, 0xfffffc00, "bitrev.d", "r0:5,r5:5", 0, 0, 0, 0 },
355 { 0x00005800, 0xfffffc00, "ext.w.h", "r0:5,r5:5", 0, 0, 0, 0 },
356 { 0x00005c00, 0xfffffc00, "ext.w.b", "r0:5,r5:5", 0, 0, 0, 0 },
357 /* or %1,%2,$r0 */
358 { 0x00150000, 0xfffffc00, "move", "r0:5,r5:5", 0, 0, 0, 0 },
359 { 0x00006000, 0xfffffc00, "rdtimel.w", "r0:5,r5:5", 0, 0, 0, 0 },
360 { 0x00006400, 0xfffffc00, "rdtimeh.w", "r0:5,r5:5", 0, 0, 0, 0 },
361 { 0x00006800, 0xfffffc00, "rdtime.d", "r0:5,r5:5", 0, 0, 0, 0 },
362 { 0x00006c00, 0xfffffc00, "cpucfg", "r0:5,r5:5", 0, 0, 0, 0 },
363 { 0x00010000, 0xffff801f, "asrtle.d", "r5:5,r10:5", 0, 0, 0, 0 },
364 { 0x00018000, 0xffff801f, "asrtgt.d", "r5:5,r10:5", 0, 0, 0, 0 },
365 { 0x00040000, 0xfffe0000, "alsl.w", "r0:5,r5:5,r10:5,u15:2+1", 0, 0, 0, 0 },
366 { 0x00060000, 0xfffe0000, "alsl.wu", "r0:5,r5:5,r10:5,u15:2+1", 0, 0, 0, 0 },
367 { 0x00080000, 0xfffe0000, "bytepick.w", "r0:5,r5:5,r10:5,u15:2", 0, 0, 0, 0 },
368 { 0x000c0000, 0xfffc0000, "bytepick.d", "r0:5,r5:5,r10:5,u15:3", 0, 0, 0, 0 },
369 { 0x00100000, 0xffff8000, "add.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
370 { 0x00108000, 0xffff8000, "add.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
371 { 0x00110000, 0xffff8000, "sub.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
372 { 0x00118000, 0xffff8000, "sub.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
373 { 0x00120000, 0xffff8000, "slt", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
374 { 0x00128000, 0xffff8000, "sltu", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
375 { 0x00130000, 0xffff8000, "maskeqz", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
376 { 0x00138000, 0xffff8000, "masknez", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
377 { 0x00140000, 0xffff8000, "nor", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
378 { 0x00148000, 0xffff8000, "and", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
379 { 0x00150000, 0xffff8000, "or", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
380 { 0x00158000, 0xffff8000, "xor", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
381 { 0x00160000, 0xffff8000, "orn", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
382 { 0x00168000, 0xffff8000, "andn", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
383 { 0x00170000, 0xffff8000, "sll.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
384 { 0x00178000, 0xffff8000, "srl.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
385 { 0x00180000, 0xffff8000, "sra.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
386 { 0x00188000, 0xffff8000, "sll.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
387 { 0x00190000, 0xffff8000, "srl.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
388 { 0x00198000, 0xffff8000, "sra.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
389 { 0x001b0000, 0xffff8000, "rotr.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
390 { 0x001b8000, 0xffff8000, "rotr.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
391 { 0x001c0000, 0xffff8000, "mul.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
392 { 0x001c8000, 0xffff8000, "mulh.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
393 { 0x001d0000, 0xffff8000, "mulh.wu", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
394 { 0x001d8000, 0xffff8000, "mul.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
395 { 0x001e0000, 0xffff8000, "mulh.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
396 { 0x001e8000, 0xffff8000, "mulh.du", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
397 { 0x001f0000, 0xffff8000, "mulw.d.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
398 { 0x001f8000, 0xffff8000, "mulw.d.wu", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
399 { 0x00200000, 0xffff8000, "div.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
400 { 0x00208000, 0xffff8000, "mod.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
401 { 0x00210000, 0xffff8000, "div.wu", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
402 { 0x00218000, 0xffff8000, "mod.wu", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
403 { 0x00220000, 0xffff8000, "div.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
404 { 0x00228000, 0xffff8000, "mod.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
405 { 0x00230000, 0xffff8000, "div.du", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
406 { 0x00238000, 0xffff8000, "mod.du", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
407 { 0x00240000, 0xffff8000, "crc.w.b.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
408 { 0x00248000, 0xffff8000, "crc.w.h.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
409 { 0x00250000, 0xffff8000, "crc.w.w.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
410 { 0x00258000, 0xffff8000, "crc.w.d.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
411 { 0x00260000, 0xffff8000, "crcc.w.b.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
412 { 0x00268000, 0xffff8000, "crcc.w.h.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
413 { 0x00270000, 0xffff8000, "crcc.w.w.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
414 { 0x00278000, 0xffff8000, "crcc.w.d.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
415 { 0x002a0000, 0xffff8000, "break", "u0:15", 0, 0, 0, 0 },
416 { 0x002a8000, 0xffff8000, "dbcl", "u0:15", 0, 0, 0, 0 },
417 { 0x002b0000, 0xffff8000, "syscall", "u0:15", 0, 0, 0, 0 },
418 { 0x002c0000, 0xfffe0000, "alsl.d", "r0:5,r5:5,r10:5,u15:2+1", 0, 0, 0, 0 },
419 { 0x00408000, 0xffff8000, "slli.w", "r0:5,r5:5,u10:5", 0, 0, 0, 0 },
420 { 0x00410000, 0xffff0000, "slli.d", "r0:5,r5:5,u10:6", 0, 0, 0, 0 },
421 { 0x00448000, 0xffff8000, "srli.w", "r0:5,r5:5,u10:5", 0, 0, 0, 0 },
422 { 0x00450000, 0xffff0000, "srli.d", "r0:5,r5:5,u10:6", 0, 0, 0, 0 },
423 { 0x00488000, 0xffff8000, "srai.w", "r0:5,r5:5,u10:5", 0, 0, 0, 0 },
424 { 0x00490000, 0xffff0000, "srai.d", "r0:5,r5:5,u10:6", 0, 0, 0, 0 },
425 { 0x004c8000, 0xffff8000, "rotri.w", "r0:5,r5:5,u10:5", 0, 0, 0, 0 },
426 { 0x004d0000, 0xffff0000, "rotri.d", "r0:5,r5:5,u10:6", 0, 0, 0, 0 },
427 { 0x00600000, 0xffe08000, "bstrins.w", "r0:5,r5:5,u16:5,u10:5", 0, 0, 0, 0 },
428 { 0x00608000, 0xffe08000, "bstrpick.w", "r0:5,r5:5,u16:5,u10:5", 0, 0, 0, 0 },
429 { 0x00800000, 0xffc00000, "bstrins.d", "r0:5,r5:5,u16:6,u10:6", 0, 0, 0, 0 },
430 { 0x00c00000, 0xffc00000, "bstrpick.d", "r0:5,r5:5,u16:6,u10:6", 0, 0, 0, 0 },
431 { 0 } /* Terminate the list. */
434 static struct loongarch_opcode loongarch_single_float_opcodes[] =
436 /* match, mask, name, format, macro, include, exclude, pinfo. */
437 { 0x01008000, 0xffff8000, "fadd.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0 },
438 { 0x01028000, 0xffff8000, "fsub.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0 },
439 { 0x01048000, 0xffff8000, "fmul.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0 },
440 { 0x01068000, 0xffff8000, "fdiv.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0 },
441 { 0x01088000, 0xffff8000, "fmax.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0 },
442 { 0x010a8000, 0xffff8000, "fmin.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0 },
443 { 0x010c8000, 0xffff8000, "fmaxa.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0 },
444 { 0x010e8000, 0xffff8000, "fmina.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0 },
445 { 0x01108000, 0xffff8000, "fscaleb.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0 },
446 { 0x01128000, 0xffff8000, "fcopysign.s", "f0:5,f5:5,f10:5", 0, 0, 0, 0 },
447 { 0x01140400, 0xfffffc00, "fabs.s", "f0:5,f5:5", 0, 0, 0, 0 },
448 { 0x01141400, 0xfffffc00, "fneg.s", "f0:5,f5:5", 0, 0, 0, 0 },
449 { 0x01142400, 0xfffffc00, "flogb.s", "f0:5,f5:5", 0, 0, 0, 0 },
450 { 0x01143400, 0xfffffc00, "fclass.s", "f0:5,f5:5", 0, 0, 0, 0 },
451 { 0x01144400, 0xfffffc00, "fsqrt.s", "f0:5,f5:5", 0, 0, 0, 0 },
452 { 0x01145400, 0xfffffc00, "frecip.s", "f0:5,f5:5", 0, 0, 0, 0 },
453 { 0x01146400, 0xfffffc00, "frsqrt.s", "f0:5,f5:5", 0, 0, 0, 0 },
454 { 0x01149400, 0xfffffc00, "fmov.s", "f0:5,f5:5", 0, 0, 0, 0 },
455 { 0x0114a400, 0xfffffc00, "movgr2fr.w", "f0:5,r5:5", 0, 0, 0, 0 },
456 { 0x0114ac00, 0xfffffc00, "movgr2frh.w", "f0:5,r5:5", 0, 0, 0, 0 },
457 { 0x0114b400, 0xfffffc00, "movfr2gr.s", "r0:5,f5:5", 0, 0, 0, 0 },
458 { 0x0114bc00, 0xfffffc00, "movfrh2gr.s", "r0:5,f5:5", 0, 0, 0, 0 },
459 { 0x0114c000, 0xfffffc00, "movgr2fcsr", "r0:5,r5:5", 0, 0, 0, 0 },
460 { 0x0114c800, 0xfffffc00, "movfcsr2gr", "r0:5,r5:5", 0, 0, 0, 0 },
461 { 0x0114d000, 0xfffffc18, "movfr2cf", "c0:3,f5:5", 0, 0, 0, 0 },
462 { 0x0114d400, 0xffffff00, "movcf2fr", "f0:5,c5:3", 0, 0, 0, 0 },
463 { 0x0114d800, 0xfffffc18, "movgr2cf", "c0:3,r5:5", 0, 0, 0, 0 },
464 { 0x0114dc00, 0xffffff00, "movcf2gr", "r0:5,c5:3", 0, 0, 0, 0 },
465 { 0x011a0400, 0xfffffc00, "ftintrm.w.s", "f0:5,f5:5", 0, 0, 0, 0 },
466 { 0x011a2400, 0xfffffc00, "ftintrm.l.s", "f0:5,f5:5", 0, 0, 0, 0 },
467 { 0x011a4400, 0xfffffc00, "ftintrp.w.s", "f0:5,f5:5", 0, 0, 0, 0 },
468 { 0x011a6400, 0xfffffc00, "ftintrp.l.s", "f0:5,f5:5", 0, 0, 0, 0 },
469 { 0x011a8400, 0xfffffc00, "ftintrz.w.s", "f0:5,f5:5", 0, 0, 0, 0 },
470 { 0x011aa400, 0xfffffc00, "ftintrz.l.s", "f0:5,f5:5", 0, 0, 0, 0 },
471 { 0x011ac400, 0xfffffc00, "ftintrne.w.s", "f0:5,f5:5", 0, 0, 0, 0 },
472 { 0x011ae400, 0xfffffc00, "ftintrne.l.s", "f0:5,f5:5", 0, 0, 0, 0 },
473 { 0x011b0400, 0xfffffc00, "ftint.w.s", "f0:5,f5:5", 0, 0, 0, 0 },
474 { 0x011b2400, 0xfffffc00, "ftint.l.s", "f0:5,f5:5", 0, 0, 0, 0 },
475 { 0x011d1000, 0xfffffc00, "ffint.s.w", "f0:5,f5:5", 0, 0, 0, 0 },
476 { 0x011d1800, 0xfffffc00, "ffint.s.l", "f0:5,f5:5", 0, 0, 0, 0 },
477 { 0x011e4400, 0xfffffc00, "frint.s", "f0:5,f5:5", 0, 0, 0, 0 },
478 { 0 } /* Terminate the list. */
480 static struct loongarch_opcode loongarch_double_float_opcodes[] =
482 /* match, mask, name, format, macro, include, exclude, pinfo. */
483 { 0x01010000, 0xffff8000, "fadd.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0 },
484 { 0x01030000, 0xffff8000, "fsub.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0 },
485 { 0x01050000, 0xffff8000, "fmul.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0 },
486 { 0x01070000, 0xffff8000, "fdiv.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0 },
487 { 0x01090000, 0xffff8000, "fmax.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0 },
488 { 0x010b0000, 0xffff8000, "fmin.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0 },
489 { 0x010d0000, 0xffff8000, "fmaxa.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0 },
490 { 0x010f0000, 0xffff8000, "fmina.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0 },
491 { 0x01110000, 0xffff8000, "fscaleb.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0 },
492 { 0x01130000, 0xffff8000, "fcopysign.d", "f0:5,f5:5,f10:5", 0, 0, 0, 0 },
493 { 0x01140800, 0xfffffc00, "fabs.d", "f0:5,f5:5", 0, 0, 0, 0 },
494 { 0x01141800, 0xfffffc00, "fneg.d", "f0:5,f5:5", 0, 0, 0, 0 },
495 { 0x01142800, 0xfffffc00, "flogb.d", "f0:5,f5:5", 0, 0, 0, 0 },
496 { 0x01143800, 0xfffffc00, "fclass.d", "f0:5,f5:5", 0, 0, 0, 0 },
497 { 0x01144800, 0xfffffc00, "fsqrt.d", "f0:5,f5:5", 0, 0, 0, 0 },
498 { 0x01145800, 0xfffffc00, "frecip.d", "f0:5,f5:5", 0, 0, 0, 0 },
499 { 0x01146800, 0xfffffc00, "frsqrt.d", "f0:5,f5:5", 0, 0, 0, 0 },
500 { 0x01149800, 0xfffffc00, "fmov.d", "f0:5,f5:5", 0, 0, 0, 0 },
501 { 0x0114a800, 0xfffffc00, "movgr2fr.d", "f0:5,r5:5", 0, 0, 0, 0 },
502 { 0x0114b800, 0xfffffc00, "movfr2gr.d", "r0:5,f5:5", 0, 0, 0, 0 },
503 { 0x01191800, 0xfffffc00, "fcvt.s.d", "f0:5,f5:5", 0, 0, 0, 0 },
504 { 0x01192400, 0xfffffc00, "fcvt.d.s", "f0:5,f5:5", 0, 0, 0, 0 },
505 { 0x011a0800, 0xfffffc00, "ftintrm.w.d", "f0:5,f5:5", 0, 0, 0, 0 },
506 { 0x011a2800, 0xfffffc00, "ftintrm.l.d", "f0:5,f5:5", 0, 0, 0, 0 },
507 { 0x011a4800, 0xfffffc00, "ftintrp.w.d", "f0:5,f5:5", 0, 0, 0, 0 },
508 { 0x011a6800, 0xfffffc00, "ftintrp.l.d", "f0:5,f5:5", 0, 0, 0, 0 },
509 { 0x011a8800, 0xfffffc00, "ftintrz.w.d", "f0:5,f5:5", 0, 0, 0, 0 },
510 { 0x011aa800, 0xfffffc00, "ftintrz.l.d", "f0:5,f5:5", 0, 0, 0, 0 },
511 { 0x011ac800, 0xfffffc00, "ftintrne.w.d", "f0:5,f5:5", 0, 0, 0, 0 },
512 { 0x011ae800, 0xfffffc00, "ftintrne.l.d", "f0:5,f5:5", 0, 0, 0, 0 },
513 { 0x011b0800, 0xfffffc00, "ftint.w.d", "f0:5,f5:5", 0, 0, 0, 0 },
514 { 0x011b2800, 0xfffffc00, "ftint.l.d", "f0:5,f5:5", 0, 0, 0, 0 },
515 { 0x011d2000, 0xfffffc00, "ffint.d.w", "f0:5,f5:5", 0, 0, 0, 0 },
516 { 0x011d2800, 0xfffffc00, "ffint.d.l", "f0:5,f5:5", 0, 0, 0, 0 },
517 { 0x011e4800, 0xfffffc00, "frint.d", "f0:5,f5:5", 0, 0, 0, 0 },
518 { 0 } /* Terminate the list. */
521 static struct loongarch_opcode loongarch_imm_opcodes[] =
523 /* match, mask, name, format, macro, include, exclude, pinfo. */
524 { 0x02000000, 0xffc00000, "slti", "r0:5,r5:5,s10:12", 0, 0, 0, 0 },
525 { 0x02400000, 0xffc00000, "sltui", "r0:5,r5:5,s10:12", 0, 0, 0, 0 },
526 { 0x02800000, 0xffc00000, "addi.w", "r0:5,r5:5,s10:12", 0, 0, 0, 0 },
527 { 0x02c00000, 0xffc00000, "addi.d", "r0:5,r5:5,s10:12", 0, 0, 0, 0 },
528 { 0x03000000, 0xffc00000, "lu52i.d", "r0:5,r5:5,s10:12", 0, 0, 0, 0 },
529 { 0x0, 0x0, "nop", "", "andi $r0,$r0,0", 0, 0, 0 },
530 { 0x03400000, 0xffc00000, "andi", "r0:5,r5:5,u10:12", 0, 0, 0, 0 },
531 { 0x03800000, 0xffc00000, "ori", "r0:5,r5:5,u10:12", 0, 0, 0, 0 },
532 { 0x03c00000, 0xffc00000, "xori", "r0:5,r5:5,u10:12", 0, 0, 0, 0 },
533 { 0x10000000, 0xfc000000, "addu16i.d", "r0:5,r5:5,s10:16", 0, 0, 0, 0 },
534 { 0x14000000, 0xfe000000, "lu12i.w", "r0:5,s5:20", 0, 0, 0, 0 },
535 { 0x16000000, 0xfe000000, "lu32i.d", "r0:5,s5:20", 0, 0, 0, 0 },
536 { 0x18000000, 0xfe000000, "pcaddi", "r0:5,s5:20", 0, 0, 0, 0 },
537 { 0x1a000000, 0xfe000000, "pcalau12i", "r0:5,s5:20", 0, 0, 0, 0 },
538 { 0x1c000000, 0xfe000000, "pcaddu12i", "r0:5,s5:20", 0, 0, 0, 0 },
539 { 0x1e000000, 0xfe000000, "pcaddu18i", "r0:5,s5:20", 0, 0, 0, 0 },
540 { 0 } /* Terminate the list. */
543 static struct loongarch_opcode loongarch_privilege_opcodes[] =
545 /* match, mask, name, format, macro, include, exclude, pinfo. */
546 { 0x04000000, 0xff0003e0, "csrrd", "r0:5,u10:14", 0, 0, 0, 0 },
547 { 0x04000020, 0xff0003e0, "csrwr", "r0:5,u10:14", 0, 0, 0, 0 },
548 { 0x04000000, 0xff000000, "csrxchg", "r0:5,r5:5,u10:14", 0, 0, 0, 0 },
549 { 0x06000000, 0xffc00000, "cacop", "u0:5,r5:5,s10:12", 0, 0, 0, 0 },
550 { 0x06400000, 0xfffc0000, "lddir", "r0:5,r5:5,u10:8", 0, 0, 0, 0 },
551 { 0x06440000, 0xfffc001f, "ldpte", "r5:5,u10:8", 0, 0, 0, 0 },
552 { 0x06480000, 0xfffffc00, "iocsrrd.b", "r0:5,r5:5", 0, 0, 0, 0 },
553 { 0x06480400, 0xfffffc00, "iocsrrd.h", "r0:5,r5:5", 0, 0, 0, 0 },
554 { 0x06480800, 0xfffffc00, "iocsrrd.w", "r0:5,r5:5", 0, 0, 0, 0 },
555 { 0x06480c00, 0xfffffc00, "iocsrrd.d", "r0:5,r5:5", 0, 0, 0, 0 },
556 { 0x06481000, 0xfffffc00, "iocsrwr.b", "r0:5,r5:5", 0, 0, 0, 0 },
557 { 0x06481400, 0xfffffc00, "iocsrwr.h", "r0:5,r5:5", 0, 0, 0, 0 },
558 { 0x06481800, 0xfffffc00, "iocsrwr.w", "r0:5,r5:5", 0, 0, 0, 0 },
559 { 0x06481c00, 0xfffffc00, "iocsrwr.d", "r0:5,r5:5", 0, 0, 0, 0 },
560 { 0x06482000, 0xffffffff, "tlbclr", "", 0, 0, 0, 0 },
561 { 0x06482400, 0xffffffff, "tlbflush", "", 0, 0, 0, 0 },
562 { 0x06482800, 0xffffffff, "tlbsrch", "", 0, 0, 0, 0 },
563 { 0x06482c00, 0xffffffff, "tlbrd", "", 0, 0, 0, 0 },
564 { 0x06483000, 0xffffffff, "tlbwr", "", 0, 0, 0, 0 },
565 { 0x06483400, 0xffffffff, "tlbfill", "", 0, 0, 0, 0 },
566 { 0x06483800, 0xffffffff, "ertn", "", 0, 0, 0, 0 },
567 { 0x06488000, 0xffff8000, "idle", "u0:15", 0, 0, 0, 0 },
568 { 0x06498000, 0xffff8000, "invtlb", "u0:5,r5:5,r10:5", 0, 0, 0, 0 },
569 { 0 } /* Terminate the list. */
572 static struct loongarch_opcode loongarch_4opt_single_float_opcodes[] =
574 /* match, mask, name, format, macro, include, exclude, pinfo. */
575 { 0x08100000, 0xfff00000, "fmadd.s", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 },
576 { 0x08500000, 0xfff00000, "fmsub.s", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 },
577 { 0x08900000, 0xfff00000, "fnmadd.s", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 },
578 { 0x08d00000, 0xfff00000, "fnmsub.s", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 },
579 { 0x0c100000, 0xffff8018, "fcmp.caf.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
580 { 0x0c108000, 0xffff8018, "fcmp.saf.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
581 { 0x0c110000, 0xffff8018, "fcmp.clt.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
582 { 0x0c118000, 0xffff8018, "fcmp.slt.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
583 { 0x0c118000, 0xffff8018, "fcmp.sgt.s", "c0:3,f10:5,f5:5", 0, 0, 0, 0 },
584 { 0x0c120000, 0xffff8018, "fcmp.ceq.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
585 { 0x0c128000, 0xffff8018, "fcmp.seq.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
586 { 0x0c130000, 0xffff8018, "fcmp.cle.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
587 { 0x0c138000, 0xffff8018, "fcmp.sle.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
588 { 0x0c138000, 0xffff8018, "fcmp.sge.s", "c0:3,f10:5,f5:5", 0, 0, 0, 0 },
589 { 0x0c140000, 0xffff8018, "fcmp.cun.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
590 { 0x0c148000, 0xffff8018, "fcmp.sun.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
591 { 0x0c150000, 0xffff8018, "fcmp.cult.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
592 { 0x0c150000, 0xffff8018, "fcmp.cugt.s", "c0:3,f10:5,f5:5", 0, 0, 0, 0 },
593 { 0x0c158000, 0xffff8018, "fcmp.sult.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
594 { 0x0c160000, 0xffff8018, "fcmp.cueq.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
595 { 0x0c168000, 0xffff8018, "fcmp.sueq.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
596 { 0x0c170000, 0xffff8018, "fcmp.cule.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
597 { 0x0c170000, 0xffff8018, "fcmp.cuge.s", "c0:3,f10:5,f5:5", 0, 0, 0, 0 },
598 { 0x0c178000, 0xffff8018, "fcmp.sule.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
599 { 0x0c180000, 0xffff8018, "fcmp.cne.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
600 { 0x0c188000, 0xffff8018, "fcmp.sne.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
601 { 0x0c1a0000, 0xffff8018, "fcmp.cor.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
602 { 0x0c1a8000, 0xffff8018, "fcmp.sor.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
603 { 0x0c1c0000, 0xffff8018, "fcmp.cune.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
604 { 0x0c1c8000, 0xffff8018, "fcmp.sune.s", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
605 { 0x0d000000, 0xfffc0000, "fsel", "f0:5,f5:5,f10:5,c15:3", 0, 0, 0, 0 },
606 { 0 } /* Terminate the list. */
609 static struct loongarch_opcode loongarch_4opt_double_float_opcodes[] =
611 /* match, mask, name, format, macro, include, exclude, pinfo. */
612 { 0x08200000, 0xfff00000, "fmadd.d", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 },
613 { 0x08600000, 0xfff00000, "fmsub.d", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 },
614 { 0x08a00000, 0xfff00000, "fnmadd.d", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 },
615 { 0x08e00000, 0xfff00000, "fnmsub.d", "f0:5,f5:5,f10:5,f15:5", 0, 0, 0, 0 },
616 { 0x0c200000, 0xffff8018, "fcmp.caf.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
617 { 0x0c208000, 0xffff8018, "fcmp.saf.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
618 { 0x0c210000, 0xffff8018, "fcmp.clt.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
619 { 0x0c218000, 0xffff8018, "fcmp.slt.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
620 { 0x0c218000, 0xffff8018, "fcmp.sgt.d", "c0:3,f10:5,f5:5", 0, 0, 0, 0 },
621 { 0x0c220000, 0xffff8018, "fcmp.ceq.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
622 { 0x0c228000, 0xffff8018, "fcmp.seq.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
623 { 0x0c230000, 0xffff8018, "fcmp.cle.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
624 { 0x0c238000, 0xffff8018, "fcmp.sle.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
625 { 0x0c238000, 0xffff8018, "fcmp.sge.d", "c0:3,f10:5,f5:5", 0, 0, 0, 0 },
626 { 0x0c240000, 0xffff8018, "fcmp.cun.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
627 { 0x0c248000, 0xffff8018, "fcmp.sun.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
628 { 0x0c250000, 0xffff8018, "fcmp.cult.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
629 { 0x0c250000, 0xffff8018, "fcmp.cugt.d", "c0:3,f10:5,f5:5", 0, 0, 0, 0 },
630 { 0x0c258000, 0xffff8018, "fcmp.sult.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
631 { 0x0c260000, 0xffff8018, "fcmp.cueq.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
632 { 0x0c268000, 0xffff8018, "fcmp.sueq.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
633 { 0x0c270000, 0xffff8018, "fcmp.cule.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
634 { 0x0c270000, 0xffff8018, "fcmp.cuge.d", "c0:3,f10:5,f5:5", 0, 0, 0, 0 },
635 { 0x0c278000, 0xffff8018, "fcmp.sule.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
636 { 0x0c280000, 0xffff8018, "fcmp.cne.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
637 { 0x0c288000, 0xffff8018, "fcmp.sne.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
638 { 0x0c2a0000, 0xffff8018, "fcmp.cor.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
639 { 0x0c2a8000, 0xffff8018, "fcmp.sor.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
640 { 0x0c2c0000, 0xffff8018, "fcmp.cune.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
641 { 0x0c2c8000, 0xffff8018, "fcmp.sune.d", "c0:3,f5:5,f10:5", 0, 0, 0, 0 },
642 { 0 } /* Terminate the list. */
645 static struct loongarch_opcode loongarch_load_store_opcodes[] =
647 /* match, mask, name, format, macro, include, exclude, pinfo. */
648 { 0x20000000, 0xff000000, "ll.w", "r0:5,r5:5,s10:14<<2", 0, 0, 0, 0 },
649 { 0x21000000, 0xff000000, "sc.w", "r0:5,r5:5,s10:14<<2", 0, 0, 0, 0 },
650 { 0x22000000, 0xff000000, "ll.d", "r0:5,r5:5,s10:14<<2", 0, 0, 0, 0 },
651 { 0x23000000, 0xff000000, "sc.d", "r0:5,r5:5,s10:14<<2", 0, 0, 0, 0 },
652 { 0x24000000, 0xff000000, "ldptr.w", "r0:5,r5:5,s10:14<<2", 0, 0, 0, 0 },
653 { 0x25000000, 0xff000000, "stptr.w", "r0:5,r5:5,s10:14<<2", 0, 0, 0, 0 },
654 { 0x26000000, 0xff000000, "ldptr.d", "r0:5,r5:5,s10:14<<2", 0, 0, 0, 0 },
655 { 0x27000000, 0xff000000, "stptr.d", "r0:5,r5:5,s10:14<<2", 0, 0, 0, 0 },
656 { 0x28000000, 0xffc00000, "ld.b", "r0:5,r5:5,s10:12", 0, 0, 0, 0 },
657 { 0x28400000, 0xffc00000, "ld.h", "r0:5,r5:5,s10:12", 0, 0, 0, 0 },
658 { 0x28800000, 0xffc00000, "ld.w", "r0:5,r5:5,s10:12", 0, 0, 0, 0 },
659 { 0x28c00000, 0xffc00000, "ld.d", "r0:5,r5:5,s10:12", 0, 0, 0, 0 },
660 { 0x29000000, 0xffc00000, "st.b", "r0:5,r5:5,s10:12", 0, 0, 0, 0 },
661 { 0x29400000, 0xffc00000, "st.h", "r0:5,r5:5,s10:12", 0, 0, 0, 0 },
662 { 0x29800000, 0xffc00000, "st.w", "r0:5,r5:5,s10:12", 0, 0, 0, 0 },
663 { 0x29c00000, 0xffc00000, "st.d", "r0:5,r5:5,s10:12", 0, 0, 0, 0 },
664 { 0x2a000000, 0xffc00000, "ld.bu", "r0:5,r5:5,s10:12", 0, 0, 0, 0 },
665 { 0x2a400000, 0xffc00000, "ld.hu", "r0:5,r5:5,s10:12", 0, 0, 0, 0 },
666 { 0x2a800000, 0xffc00000, "ld.wu", "r0:5,r5:5,s10:12", 0, 0, 0, 0 },
667 { 0x2ac00000, 0xffc00000, "preld", "u0:5,r5:5,s10:12", 0, 0, 0, 0 },
668 { 0x38000000, 0xffff8000, "ldx.b", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
669 { 0x38040000, 0xffff8000, "ldx.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
670 { 0x38080000, 0xffff8000, "ldx.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
671 { 0x380c0000, 0xffff8000, "ldx.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
672 { 0x38100000, 0xffff8000, "stx.b", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
673 { 0x38140000, 0xffff8000, "stx.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
674 { 0x38180000, 0xffff8000, "stx.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
675 { 0x381c0000, 0xffff8000, "stx.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
676 { 0x38200000, 0xffff8000, "ldx.bu", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
677 { 0x38240000, 0xffff8000, "ldx.hu", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
678 { 0x38280000, 0xffff8000, "ldx.wu", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
679 { 0x382c0000, 0xffff8000, "preldx", "u0:5,r5:5,r10:5", 0, 0, 0, 0 },
680 { 0x0, 0x0, "amswap.w", "r,r,r,u0:0", "amswap.w %1,%2,%3", 0, 0, 0 },
681 { 0x38600000, 0xffff8000, "amswap.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
682 { 0x0, 0x0, "amswap.d", "r,r,r,u0:0", "amswap.d %1,%2,%3", 0, 0, 0 },
683 { 0x38608000, 0xffff8000, "amswap.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
684 { 0x0, 0x0, "amadd.w", "r,r,r,u0:0", "amadd.w %1,%2,%3", 0, 0, 0 },
685 { 0x38610000, 0xffff8000, "amadd.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
686 { 0x0, 0x0, "amadd.d", "r,r,r,u0:0", "amadd.d %1,%2,%3", 0, 0, 0 },
687 { 0x38618000, 0xffff8000, "amadd.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
688 { 0x0, 0x0, "amand.w", "r,r,r,u0:0", "amand.w %1,%2,%3", 0, 0, 0 },
689 { 0x38620000, 0xffff8000, "amand.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
690 { 0x0, 0x0, "amand.d", "r,r,r,u0:0", "amand.d %1,%2,%3", 0, 0, 0 },
691 { 0x38628000, 0xffff8000, "amand.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
692 { 0x0, 0x0, "amor.w", "r,r,r,u0:0", "amor.w %1,%2,%3", 0, 0, 0 },
693 { 0x38630000, 0xffff8000, "amor.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
694 { 0x0, 0x0, "amor.d", "r,r,r,u0:0", "amor.d %1,%2,%3", 0, 0, 0 },
695 { 0x38638000, 0xffff8000, "amor.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
696 { 0x0, 0x0, "amxor.w", "r,r,r,u0:0", "amxor.w %1,%2,%3", 0, 0, 0 },
697 { 0x38640000, 0xffff8000, "amxor.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
698 { 0x0, 0x0, "amxor.d", "r,r,r,u0:0", "amxor.d %1,%2,%3", 0, 0, 0 },
699 { 0x38648000, 0xffff8000, "amxor.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
700 { 0x0, 0x0, "ammax.w", "r,r,r,u0:0", "ammax.w %1,%2,%3", 0, 0, 0 },
701 { 0x38650000, 0xffff8000, "ammax.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
702 { 0x0, 0x0, "ammax.d", "r,r,r,u0:0", "ammax.d %1,%2,%3", 0, 0, 0 },
703 { 0x38658000, 0xffff8000, "ammax.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
704 { 0x0, 0x0, "ammin.w", "r,r,r,u0:0", "ammin.w %1,%2,%3", 0, 0, 0 },
705 { 0x38660000, 0xffff8000, "ammin.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
706 { 0x0, 0x0, "ammin.d", "r,r,r,u0:0", "ammin.d %1,%2,%3", 0, 0, 0 },
707 { 0x38668000, 0xffff8000, "ammin.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
708 { 0x0, 0x0, "ammax.wu", "r,r,r,u0:0", "ammax.wu %1,%2,%3", 0, 0, 0 },
709 { 0x38670000, 0xffff8000, "ammax.wu", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
710 { 0x0, 0x0, "ammax.du", "r,r,r,u0:0", "ammax.du %1,%2,%3", 0, 0, 0 },
711 { 0x38678000, 0xffff8000, "ammax.du", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
712 { 0x0, 0x0, "ammin.wu", "r,r,r,u0:0", "ammin.wu %1,%2,%3", 0, 0, 0 },
713 { 0x38680000, 0xffff8000, "ammin.wu", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
714 { 0x0, 0x0, "ammin.du", "r,r,r,u0:0", "ammin.du %1,%2,%3", 0, 0, 0 },
715 { 0x38688000, 0xffff8000, "ammin.du", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
716 { 0x0, 0x0, "amswap_db.w", "r,r,r,u0:0", "amswap_db.w %1,%2,%3", 0, 0, 0 },
717 { 0x38690000, 0xffff8000, "amswap_db.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
718 { 0x0, 0x0, "amswap_db.d", "r,r,r,u0:0", "amswap_db.d %1,%2,%3", 0, 0, 0 },
719 { 0x38698000, 0xffff8000, "amswap_db.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
720 { 0x0, 0x0, "amadd_db.w", "r,r,r,u0:0", "amadd_db.w %1,%2,%3", 0, 0, 0 },
721 { 0x386a0000, 0xffff8000, "amadd_db.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
722 { 0x0, 0x0, "amadd_db.d", "r,r,r,u0:0", "amadd_db.d %1,%2,%3", 0, 0, 0 },
723 { 0x386a8000, 0xffff8000, "amadd_db.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
724 { 0x0, 0x0, "amand_db.w", "r,r,r,u0:0", "amand_db.w %1,%2,%3", 0, 0, 0 },
725 { 0x386b0000, 0xffff8000, "amand_db.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
726 { 0x0, 0x0, "amand_db.d", "r,r,r,u0:0", "amand_db.d %1,%2,%3", 0, 0, 0 },
727 { 0x386b8000, 0xffff8000, "amand_db.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
728 { 0x0, 0x0, "amor_db.w", "r,r,r,u0:0", "amor_db.w %1,%2,%3", 0, 0, 0 },
729 { 0x386c0000, 0xffff8000, "amor_db.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
730 { 0x0, 0x0, "amor_db.d", "r,r,r,u0:0", "amor_db.d %1,%2,%3", 0, 0, 0 },
731 { 0x386c8000, 0xffff8000, "amor_db.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
732 { 0x0, 0x0, "amxor_db.w", "r,r,r,u0:0", "amxor_db.w %1,%2,%3", 0, 0, 0 },
733 { 0x386d0000, 0xffff8000, "amxor_db.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
734 { 0x0, 0x0, "amxor_db.d", "r,r,r,u0:0", "amxor_db.d %1,%2,%3", 0, 0, 0 },
735 { 0x386d8000, 0xffff8000, "amxor_db.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
736 { 0x0, 0x0, "ammax_db.w", "r,r,r,u0:0", "ammax_db.w %1,%2,%3", 0, 0, 0 },
737 { 0x386e0000, 0xffff8000, "ammax_db.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
738 { 0x0, 0x0, "ammax_db.d", "r,r,r,u0:0", "ammax_db.d %1,%2,%3", 0, 0, 0 },
739 { 0x386e8000, 0xffff8000, "ammax_db.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
740 { 0x0, 0x0, "ammin_db.w", "r,r,r,u0:0", "ammin_db.w %1,%2,%3", 0, 0, 0 },
741 { 0x386f0000, 0xffff8000, "ammin_db.w", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
742 { 0x0, 0x0, "ammin_db.d", "r,r,r,u0:0", "ammin_db.d %1,%2,%3", 0, 0, 0 },
743 { 0x386f8000, 0xffff8000, "ammin_db.d", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
744 { 0x0, 0x0, "ammax_db.wu", "r,r,r,u0:0", "ammax_db.wu %1,%2,%3", 0, 0, 0 },
745 { 0x38700000, 0xffff8000, "ammax_db.wu", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
746 { 0x0, 0x0, "ammax_db.du", "r,r,r,u0:0", "ammax_db.du %1,%2,%3", 0, 0, 0 },
747 { 0x38708000, 0xffff8000, "ammax_db.du", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
748 { 0x0, 0x0, "ammin_db.wu", "r,r,r,u0:0", "ammin_db.wu %1,%2,%3", 0, 0, 0 },
749 { 0x38710000, 0xffff8000, "ammin_db.wu", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
750 { 0x0, 0x0, "ammin_db.du", "r,r,r,u0:0", "ammin_db.du %1,%2,%3", 0, 0, 0 },
751 { 0x38718000, 0xffff8000, "ammin_db.du", "r0:5,r10:5,r5:5", 0, 0, 0, 0 },
752 { 0x38720000, 0xffff8000, "dbar", "u0:15", 0, 0, 0, 0 },
753 { 0x38728000, 0xffff8000, "ibar", "u0:15", 0, 0, 0, 0 },
754 { 0x38780000, 0xffff8000, "ldgt.b", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
755 { 0x38788000, 0xffff8000, "ldgt.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
756 { 0x38790000, 0xffff8000, "ldgt.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
757 { 0x38798000, 0xffff8000, "ldgt.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
758 { 0x387a0000, 0xffff8000, "ldle.b", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
759 { 0x387a8000, 0xffff8000, "ldle.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
760 { 0x387b0000, 0xffff8000, "ldle.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
761 { 0x387b8000, 0xffff8000, "ldle.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
762 { 0x387c0000, 0xffff8000, "stgt.b", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
763 { 0x387c8000, 0xffff8000, "stgt.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
764 { 0x387d0000, 0xffff8000, "stgt.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
765 { 0x387d8000, 0xffff8000, "stgt.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
766 { 0x387e0000, 0xffff8000, "stle.b", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
767 { 0x387e8000, 0xffff8000, "stle.h", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
768 { 0x387f0000, 0xffff8000, "stle.w", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
769 { 0x387f8000, 0xffff8000, "stle.d", "r0:5,r5:5,r10:5", 0, 0, 0, 0 },
770 { 0 } /* Terminate the list. */
773 static struct loongarch_opcode loongarch_single_float_load_store_opcodes[] =
775 /* match, mask, name, format, macro, include, exclude, pinfo. */
776 { 0x2b000000, 0xffc00000, "fld.s", "f0:5,r5:5,s10:12", 0, 0, 0, 0 },
777 { 0x2b400000, 0xffc00000, "fst.s", "f0:5,r5:5,s10:12", 0, 0, 0, 0 },
778 { 0x38300000, 0xffff8000, "fldx.s", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 },
779 { 0x38380000, 0xffff8000, "fstx.s", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 },
780 { 0x38740000, 0xffff8000, "fldgt.s", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 },
781 { 0x38750000, 0xffff8000, "fldle.s", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 },
782 { 0x38760000, 0xffff8000, "fstgt.s", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 },
783 { 0x38770000, 0xffff8000, "fstle.s", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 },
784 { 0 } /* Terminate the list. */
787 static struct loongarch_opcode loongarch_double_float_load_store_opcodes[] =
789 /* match, mask, name, format, macro, include, exclude, pinfo. */
790 { 0x2b800000, 0xffc00000, "fld.d", "f0:5,r5:5,s10:12", 0, 0, 0, 0 },
791 { 0x2bc00000, 0xffc00000, "fst.d", "f0:5,r5:5,s10:12", 0, 0, 0, 0 },
792 { 0x38340000, 0xffff8000, "fldx.d", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 },
793 { 0x383c0000, 0xffff8000, "fstx.d", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 },
794 { 0x38748000, 0xffff8000, "fldgt.d", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 },
795 { 0x38758000, 0xffff8000, "fldle.d", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 },
796 { 0x38768000, 0xffff8000, "fstgt.d", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 },
797 { 0x38778000, 0xffff8000, "fstle.d", "f0:5,r5:5,r10:5", 0, &LARCH_opts.ase_lp64, 0, 0 },
798 { 0 } /* Terminate the list. */
801 static struct loongarch_opcode loongarch_float_jmp_opcodes[] =
803 { 0x0, 0x0, "bceqz", "c,la", "bceqz %1,%%b21(%2)", 0, 0, 0 },
804 { 0x48000000, 0xfc000300, "bceqz", "c5:3,sb0:5|10:16<<2", 0, 0, 0, 0 },
805 { 0x0, 0x0, "bcnez", "c,la", "bcnez %1,%%b21(%2)", 0, 0, 0 },
806 { 0x48000100, 0xfc000300, "bcnez", "c5:3,sb0:5|10:16<<2", 0, 0, 0, 0 },
807 { 0 } /* Terminate the list. */
810 static struct loongarch_opcode loongarch_jmp_opcodes[] =
812 /* match, mask, name, format, macro, include, exclude, pinfo. */
813 { 0x0, 0x0, "beqz", "r,la", "beqz %1,%%b21(%2)", 0, 0, 0 },
814 { 0x40000000, 0xfc000000, "beqz", "r5:5,sb0:5|10:16<<2", 0, 0, 0, 0 },
815 { 0x0, 0x0, "bnez", "r,la", "bnez %1,%%b21(%2)", 0, 0, 0 },
816 { 0x44000000, 0xfc000000, "bnez", "r5:5,sb0:5|10:16<<2", 0, 0, 0, 0 },
817 { 0x4c000000, 0xfc000000, "jirl", "r0:5,r5:5,s10:16<<2", 0, 0, 0, 0 },
818 { 0x0, 0x0, "b", "la", "b %%b26(%1)", 0, 0, 0 },
819 { 0x50000000, 0xfc000000, "b", "sb0:10|10:16<<2", 0, 0, 0, 0 },
820 { 0x0, 0x0, "bl", "la", "bl %%b26(%1)", 0, 0, 0 },
821 { 0x54000000, 0xfc000000, "bl", "sb0:10|10:16<<2", 0, 0, 0, 0 },
822 { 0x0, 0x0, "beq", "r,r,la", "beq %1,%2,%%b16(%3)", 0, 0, 0 },
823 { 0x58000000, 0xfc000000, "beq", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 },
824 { 0x0, 0x0, "bne", "r,r,la", "bne %1,%2,%%b16(%3)", 0, 0, 0 },
825 { 0x5c000000, 0xfc000000, "bne", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 },
826 { 0x0, 0x0, "blt", "r,r,la", "blt %1,%2,%%b16(%3)", 0, 0, 0 },
827 { 0x60000000, 0xfc000000, "blt", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 },
828 { 0x0, 0x0, "bge", "r,r,la", "bge %1,%2,%%b16(%3)", 0, 0, 0 },
829 { 0x64000000, 0xfc000000, "bge", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 },
830 { 0x0, 0x0, "bltu", "r,r,la", "bltu %1,%2,%%b16(%3)", 0, 0, 0 },
831 { 0x68000000, 0xfc000000, "bltu", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 },
832 { 0x0, 0x0, "bgeu", "r,r,la", "bgeu %1,%2,%%b16(%3)", 0, 0, 0 },
833 { 0x6c000000, 0xfc000000, "bgeu", "r5:5,r0:5,sb10:16<<2", 0, 0, 0, 0 },
834 /* Jumps implemented with macros. */
835 { 0x0, 0x0, "bgt", "r,r,la", "blt %2,%1,%%b16(%3)", 0, 0, 0 },
836 { 0x0, 0x0, "bltz", "r,la", "blt %1,$r0,%%b16(%2)", 0, 0, 0 },
837 { 0x0, 0x0, "bgtz", "r,la", "blt $r0,%1,%%b16(%2)", 0, 0, 0 },
838 { 0x0, 0x0, "ble", "r,r,la", "bge %2,%1,%%b16(%3)", 0, 0, 0 },
839 { 0x0, 0x0, "bgez", "r,la", "bge %1,$r0,%%b16(%2)", 0, 0, 0 },
840 { 0x0, 0x0, "blez", "r,la", "bge $r0,%1,%%b16(%2)", 0, 0, 0 },
841 { 0x0, 0x0, "bgtu", "r,r,la", "bltu %2,%1,%%b16(%3)", 0, 0, 0 },
842 { 0x0, 0x0, "bleu", "r,r,la", "bgeu %2,%1,%%b16(%3)", 0, 0, 0 },
843 { 0x0, 0x0, "jr", "r", "jirl $r0,%1,0", 0, 0, 0 },
844 { 0x0, 0x0, "ret", "", "jirl $r0,$r1,0", 0, 0, 0 },
845 { 0 } /* Terminate the list. */
848 struct loongarch_ase loongarch_ASEs[] =
850 { &LARCH_opts.ase_ilp32, loongarch_macro_opcodes, 0, 0, { 0 }, 0, 0 },
851 { &LARCH_opts.ase_ilp32, loongarch_imm_opcodes, 0, 0, { 0 }, 0, 0 },
852 { &LARCH_opts.ase_ilp32, loongarch_privilege_opcodes, 0, 0, { 0 }, 0, 0 },
853 { &LARCH_opts.ase_ilp32, loongarch_load_store_opcodes, 0, 0, { 0 }, 0, 0 },
854 { &LARCH_opts.ase_ilp32, loongarch_fix_opcodes, 0, 0, { 0 }, 0, 0 },
855 { &LARCH_opts.ase_ilp32, loongarch_jmp_opcodes, 0, 0, { 0 }, 0, 0 },
856 { &LARCH_opts.ase_sf, loongarch_float_jmp_opcodes, 0, 0, { 0 }, 0, 0 },
857 { &LARCH_opts.ase_sf, loongarch_single_float_opcodes, 0, 0, { 0 }, 0, 0 },
858 { &LARCH_opts.ase_df, loongarch_double_float_opcodes, 0, 0, { 0 }, 0, 0 },
859 { &LARCH_opts.ase_sf, loongarch_4opt_single_float_opcodes, 0, 0, { 0 }, 0, 0 },
860 { &LARCH_opts.ase_df, loongarch_4opt_double_float_opcodes, 0, 0, { 0 }, 0, 0 },
861 { &LARCH_opts.ase_sf, loongarch_single_float_load_store_opcodes, 0, 0, { 0 }, 0, 0 },
862 { &LARCH_opts.ase_df, loongarch_double_float_load_store_opcodes, 0, 0, { 0 }, 0, 0 },
863 { 0 },