1 /* Intel 386 target-dependent stuff.
3 Copyright (C) 1988-2024 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #include "opcode/i386.h"
22 #include "arch-utils.h"
24 #include "dummy-frame.h"
25 #include "dwarf2/frame.h"
27 #include "frame-base.h"
28 #include "frame-unwind.h"
37 #include "reggroups.h"
42 #include "target-float.h"
47 #include "i386-tdep.h"
48 #include "i387-tdep.h"
49 #include "gdbsupport/x86-xstate.h"
54 #include "record-full.h"
55 #include "target-descriptions.h"
56 #include "arch/i386.h"
61 #include "stap-probe.h"
62 #include "user-regs.h"
63 #include "cli/cli-utils.h"
64 #include "expression.h"
65 #include "parser-defs.h"
68 #include <unordered_set>
75 static const char * const i386_register_names
[] =
77 "eax", "ecx", "edx", "ebx",
78 "esp", "ebp", "esi", "edi",
79 "eip", "eflags", "cs", "ss",
80 "ds", "es", "fs", "gs",
81 "st0", "st1", "st2", "st3",
82 "st4", "st5", "st6", "st7",
83 "fctrl", "fstat", "ftag", "fiseg",
84 "fioff", "foseg", "fooff", "fop",
85 "xmm0", "xmm1", "xmm2", "xmm3",
86 "xmm4", "xmm5", "xmm6", "xmm7",
90 static const char * const i386_zmm_names
[] =
92 "zmm0", "zmm1", "zmm2", "zmm3",
93 "zmm4", "zmm5", "zmm6", "zmm7"
96 static const char * const i386_zmmh_names
[] =
98 "zmm0h", "zmm1h", "zmm2h", "zmm3h",
99 "zmm4h", "zmm5h", "zmm6h", "zmm7h"
102 static const char * const i386_k_names
[] =
104 "k0", "k1", "k2", "k3",
105 "k4", "k5", "k6", "k7"
108 static const char * const i386_ymm_names
[] =
110 "ymm0", "ymm1", "ymm2", "ymm3",
111 "ymm4", "ymm5", "ymm6", "ymm7",
114 static const char * const i386_ymmh_names
[] =
116 "ymm0h", "ymm1h", "ymm2h", "ymm3h",
117 "ymm4h", "ymm5h", "ymm6h", "ymm7h",
120 static const char * const i386_mpx_names
[] =
122 "bnd0raw", "bnd1raw", "bnd2raw", "bnd3raw", "bndcfgu", "bndstatus"
125 static const char * const i386_pkeys_names
[] =
130 /* Register names for MPX pseudo-registers. */
132 static const char * const i386_bnd_names
[] =
134 "bnd0", "bnd1", "bnd2", "bnd3"
137 /* Register names for MMX pseudo-registers. */
139 static const char * const i386_mmx_names
[] =
141 "mm0", "mm1", "mm2", "mm3",
142 "mm4", "mm5", "mm6", "mm7"
145 /* Register names for byte pseudo-registers. */
147 static const char * const i386_byte_names
[] =
149 "al", "cl", "dl", "bl",
150 "ah", "ch", "dh", "bh"
153 /* Register names for word pseudo-registers. */
155 static const char * const i386_word_names
[] =
157 "ax", "cx", "dx", "bx",
161 /* Constant used for reading/writing pseudo registers. In 64-bit mode, we have
162 16 lower ZMM regs that extend corresponding xmm/ymm registers. In addition,
163 we have 16 upper ZMM regs that have to be handled differently. */
165 const int num_lower_zmm_regs
= 16;
170 i386_mmx_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
172 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
173 int mm0_regnum
= tdep
->mm0_regnum
;
178 regnum
-= mm0_regnum
;
179 return regnum
>= 0 && regnum
< tdep
->num_mmx_regs
;
185 i386_byte_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
187 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
189 regnum
-= tdep
->al_regnum
;
190 return regnum
>= 0 && regnum
< tdep
->num_byte_regs
;
196 i386_word_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
198 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
200 regnum
-= tdep
->ax_regnum
;
201 return regnum
>= 0 && regnum
< tdep
->num_word_regs
;
204 /* Dword register? */
207 i386_dword_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
209 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
210 int eax_regnum
= tdep
->eax_regnum
;
215 regnum
-= eax_regnum
;
216 return regnum
>= 0 && regnum
< tdep
->num_dword_regs
;
219 /* AVX512 register? */
222 i386_zmmh_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
224 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
225 int zmm0h_regnum
= tdep
->zmm0h_regnum
;
227 if (zmm0h_regnum
< 0)
230 regnum
-= zmm0h_regnum
;
231 return regnum
>= 0 && regnum
< tdep
->num_zmm_regs
;
235 i386_zmm_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
237 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
238 int zmm0_regnum
= tdep
->zmm0_regnum
;
243 regnum
-= zmm0_regnum
;
244 return regnum
>= 0 && regnum
< tdep
->num_zmm_regs
;
248 i386_k_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
250 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
251 int k0_regnum
= tdep
->k0_regnum
;
257 return regnum
>= 0 && regnum
< I387_NUM_K_REGS
;
261 i386_ymmh_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
263 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
264 int ymm0h_regnum
= tdep
->ymm0h_regnum
;
266 if (ymm0h_regnum
< 0)
269 regnum
-= ymm0h_regnum
;
270 return regnum
>= 0 && regnum
< tdep
->num_ymm_regs
;
276 i386_ymm_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
278 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
279 int ymm0_regnum
= tdep
->ymm0_regnum
;
284 regnum
-= ymm0_regnum
;
285 return regnum
>= 0 && regnum
< tdep
->num_ymm_regs
;
289 i386_ymmh_avx512_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
291 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
292 int ymm16h_regnum
= tdep
->ymm16h_regnum
;
294 if (ymm16h_regnum
< 0)
297 regnum
-= ymm16h_regnum
;
298 return regnum
>= 0 && regnum
< tdep
->num_ymm_avx512_regs
;
302 i386_ymm_avx512_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
304 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
305 int ymm16_regnum
= tdep
->ymm16_regnum
;
307 if (ymm16_regnum
< 0)
310 regnum
-= ymm16_regnum
;
311 return regnum
>= 0 && regnum
< tdep
->num_ymm_avx512_regs
;
317 i386_bnd_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
319 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
320 int bnd0_regnum
= tdep
->bnd0_regnum
;
325 regnum
-= bnd0_regnum
;
326 return regnum
>= 0 && regnum
< I387_NUM_BND_REGS
;
332 i386_xmm_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
334 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
335 int num_xmm_regs
= I387_NUM_XMM_REGS (tdep
);
337 if (num_xmm_regs
== 0)
340 regnum
-= I387_XMM0_REGNUM (tdep
);
341 return regnum
>= 0 && regnum
< num_xmm_regs
;
344 /* XMM_512 register? */
347 i386_xmm_avx512_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
349 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
350 int num_xmm_avx512_regs
= I387_NUM_XMM_AVX512_REGS (tdep
);
352 if (num_xmm_avx512_regs
== 0)
355 regnum
-= I387_XMM16_REGNUM (tdep
);
356 return regnum
>= 0 && regnum
< num_xmm_avx512_regs
;
360 i386_mxcsr_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
362 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
364 if (I387_NUM_XMM_REGS (tdep
) == 0)
367 return (regnum
== I387_MXCSR_REGNUM (tdep
));
373 i386_fp_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
375 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
377 if (I387_ST0_REGNUM (tdep
) < 0)
380 return (I387_ST0_REGNUM (tdep
) <= regnum
381 && regnum
< I387_FCTRL_REGNUM (tdep
));
385 i386_fpc_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
387 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
389 if (I387_ST0_REGNUM (tdep
) < 0)
392 return (I387_FCTRL_REGNUM (tdep
) <= regnum
393 && regnum
< I387_XMM0_REGNUM (tdep
));
396 /* BNDr (raw) register? */
399 i386_bndr_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
401 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
403 if (I387_BND0R_REGNUM (tdep
) < 0)
406 regnum
-= tdep
->bnd0r_regnum
;
407 return regnum
>= 0 && regnum
< I387_NUM_BND_REGS
;
410 /* BND control register? */
413 i386_mpx_ctrl_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
415 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
417 if (I387_BNDCFGU_REGNUM (tdep
) < 0)
420 regnum
-= I387_BNDCFGU_REGNUM (tdep
);
421 return regnum
>= 0 && regnum
< I387_NUM_MPX_CTRL_REGS
;
427 i386_pkru_regnum_p (struct gdbarch
*gdbarch
, int regnum
)
429 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
430 int pkru_regnum
= tdep
->pkru_regnum
;
435 regnum
-= pkru_regnum
;
436 return regnum
>= 0 && regnum
< I387_NUM_PKEYS_REGS
;
439 /* Return the name of register REGNUM, or the empty string if it is
440 an anonymous register. */
443 i386_register_name (struct gdbarch
*gdbarch
, int regnum
)
445 /* Hide the upper YMM registers. */
446 if (i386_ymmh_regnum_p (gdbarch
, regnum
))
449 /* Hide the upper YMM16-31 registers. */
450 if (i386_ymmh_avx512_regnum_p (gdbarch
, regnum
))
453 /* Hide the upper ZMM registers. */
454 if (i386_zmmh_regnum_p (gdbarch
, regnum
))
457 return tdesc_register_name (gdbarch
, regnum
);
460 /* Return the name of register REGNUM. */
463 i386_pseudo_register_name (struct gdbarch
*gdbarch
, int regnum
)
465 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
466 if (i386_bnd_regnum_p (gdbarch
, regnum
))
467 return i386_bnd_names
[regnum
- tdep
->bnd0_regnum
];
468 if (i386_mmx_regnum_p (gdbarch
, regnum
))
469 return i386_mmx_names
[regnum
- I387_MM0_REGNUM (tdep
)];
470 else if (i386_ymm_regnum_p (gdbarch
, regnum
))
471 return i386_ymm_names
[regnum
- tdep
->ymm0_regnum
];
472 else if (i386_zmm_regnum_p (gdbarch
, regnum
))
473 return i386_zmm_names
[regnum
- tdep
->zmm0_regnum
];
474 else if (i386_byte_regnum_p (gdbarch
, regnum
))
475 return i386_byte_names
[regnum
- tdep
->al_regnum
];
476 else if (i386_word_regnum_p (gdbarch
, regnum
))
477 return i386_word_names
[regnum
- tdep
->ax_regnum
];
479 internal_error (_("invalid regnum"));
482 /* Convert a dbx register number REG to the appropriate register
483 number used by GDB. */
486 i386_dbx_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
488 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
490 /* This implements what GCC calls the "default" register map
491 (dbx_register_map[]). */
493 if (reg
>= 0 && reg
<= 7)
495 /* General-purpose registers. The debug info calls %ebp
496 register 4, and %esp register 5. */
503 else if (reg
>= 12 && reg
<= 19)
505 /* Floating-point registers. */
506 return reg
- 12 + I387_ST0_REGNUM (tdep
);
508 else if (reg
>= 21 && reg
<= 28)
511 int ymm0_regnum
= tdep
->ymm0_regnum
;
514 && i386_xmm_regnum_p (gdbarch
, reg
))
515 return reg
- 21 + ymm0_regnum
;
517 return reg
- 21 + I387_XMM0_REGNUM (tdep
);
519 else if (reg
>= 29 && reg
<= 36)
522 return reg
- 29 + I387_MM0_REGNUM (tdep
);
525 /* This will hopefully provoke a warning. */
526 return gdbarch_num_cooked_regs (gdbarch
);
529 /* Convert SVR4 DWARF register number REG to the appropriate register number
533 i386_svr4_dwarf_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
535 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
537 /* This implements the GCC register map that tries to be compatible
538 with the SVR4 C compiler for DWARF (svr4_dbx_register_map[]). */
540 /* The SVR4 register numbering includes %eip and %eflags, and
541 numbers the floating point registers differently. */
542 if (reg
>= 0 && reg
<= 9)
544 /* General-purpose registers. */
547 else if (reg
>= 11 && reg
<= 18)
549 /* Floating-point registers. */
550 return reg
- 11 + I387_ST0_REGNUM (tdep
);
552 else if (reg
>= 21 && reg
<= 36)
554 /* The SSE and MMX registers have the same numbers as with dbx. */
555 return i386_dbx_reg_to_regnum (gdbarch
, reg
);
560 case 37: return I387_FCTRL_REGNUM (tdep
);
561 case 38: return I387_FSTAT_REGNUM (tdep
);
562 case 39: return I387_MXCSR_REGNUM (tdep
);
563 case 40: return I386_ES_REGNUM
;
564 case 41: return I386_CS_REGNUM
;
565 case 42: return I386_SS_REGNUM
;
566 case 43: return I386_DS_REGNUM
;
567 case 44: return I386_FS_REGNUM
;
568 case 45: return I386_GS_REGNUM
;
574 /* Wrapper on i386_svr4_dwarf_reg_to_regnum to return
575 num_regs + num_pseudo_regs for other debug formats. */
578 i386_svr4_reg_to_regnum (struct gdbarch
*gdbarch
, int reg
)
580 int regnum
= i386_svr4_dwarf_reg_to_regnum (gdbarch
, reg
);
583 return gdbarch_num_cooked_regs (gdbarch
);
589 /* This is the variable that is set with "set disassembly-flavor", and
590 its legitimate values. */
591 static const char att_flavor
[] = "att";
592 static const char intel_flavor
[] = "intel";
593 static const char *const valid_flavors
[] =
599 static const char *disassembly_flavor
= att_flavor
;
602 /* Use the program counter to determine the contents and size of a
603 breakpoint instruction. Return a pointer to a string of bytes that
604 encode a breakpoint instruction, store the length of the string in
605 *LEN and optionally adjust *PC to point to the correct memory
606 location for inserting the breakpoint.
608 On the i386 we have a single breakpoint that fits in a single byte
609 and can be inserted anywhere.
611 This function is 64-bit safe. */
613 constexpr gdb_byte i386_break_insn
[] = { 0xcc }; /* int 3 */
615 typedef BP_MANIPULATION (i386_break_insn
) i386_breakpoint
;
618 /* Displaced instruction handling. */
620 /* Skip the legacy instruction prefixes in INSN.
621 Not all prefixes are valid for any particular insn
622 but we needn't care, the insn will fault if it's invalid.
623 The result is a pointer to the first opcode byte,
624 or NULL if we run off the end of the buffer. */
627 i386_skip_prefixes (gdb_byte
*insn
, size_t max_len
)
629 gdb_byte
*end
= insn
+ max_len
;
635 case DATA_PREFIX_OPCODE
:
636 case ADDR_PREFIX_OPCODE
:
637 case CS_PREFIX_OPCODE
:
638 case DS_PREFIX_OPCODE
:
639 case ES_PREFIX_OPCODE
:
640 case FS_PREFIX_OPCODE
:
641 case GS_PREFIX_OPCODE
:
642 case SS_PREFIX_OPCODE
:
643 case LOCK_PREFIX_OPCODE
:
644 case REPE_PREFIX_OPCODE
:
645 case REPNE_PREFIX_OPCODE
:
657 i386_absolute_jmp_p (const gdb_byte
*insn
)
659 /* jmp far (absolute address in operand). */
665 /* jump near, absolute indirect (/4). */
666 if ((insn
[1] & 0x38) == 0x20)
669 /* jump far, absolute indirect (/5). */
670 if ((insn
[1] & 0x38) == 0x28)
677 /* Return non-zero if INSN is a jump, zero otherwise. */
680 i386_jmp_p (const gdb_byte
*insn
)
682 /* jump short, relative. */
686 /* jump near, relative. */
690 return i386_absolute_jmp_p (insn
);
694 i386_absolute_call_p (const gdb_byte
*insn
)
696 /* call far, absolute. */
702 /* Call near, absolute indirect (/2). */
703 if ((insn
[1] & 0x38) == 0x10)
706 /* Call far, absolute indirect (/3). */
707 if ((insn
[1] & 0x38) == 0x18)
715 i386_ret_p (const gdb_byte
*insn
)
719 case 0xc2: /* ret near, pop N bytes. */
720 case 0xc3: /* ret near */
721 case 0xca: /* ret far, pop N bytes. */
722 case 0xcb: /* ret far */
723 case 0xcf: /* iret */
732 i386_call_p (const gdb_byte
*insn
)
734 if (i386_absolute_call_p (insn
))
737 /* call near, relative. */
744 /* Return non-zero if INSN is a system call, and set *LENGTHP to its
745 length in bytes. Otherwise, return zero. */
748 i386_syscall_p (const gdb_byte
*insn
, int *lengthp
)
750 /* Is it 'int $0x80'? */
751 if ((insn
[0] == 0xcd && insn
[1] == 0x80)
752 /* Or is it 'sysenter'? */
753 || (insn
[0] == 0x0f && insn
[1] == 0x34)
754 /* Or is it 'syscall'? */
755 || (insn
[0] == 0x0f && insn
[1] == 0x05))
764 /* The gdbarch insn_is_call method. */
767 i386_insn_is_call (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
769 gdb_byte buf
[I386_MAX_INSN_LEN
], *insn
;
771 read_code (addr
, buf
, I386_MAX_INSN_LEN
);
772 insn
= i386_skip_prefixes (buf
, I386_MAX_INSN_LEN
);
774 return i386_call_p (insn
);
777 /* The gdbarch insn_is_ret method. */
780 i386_insn_is_ret (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
782 gdb_byte buf
[I386_MAX_INSN_LEN
], *insn
;
784 read_code (addr
, buf
, I386_MAX_INSN_LEN
);
785 insn
= i386_skip_prefixes (buf
, I386_MAX_INSN_LEN
);
787 return i386_ret_p (insn
);
790 /* The gdbarch insn_is_jump method. */
793 i386_insn_is_jump (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
795 gdb_byte buf
[I386_MAX_INSN_LEN
], *insn
;
797 read_code (addr
, buf
, I386_MAX_INSN_LEN
);
798 insn
= i386_skip_prefixes (buf
, I386_MAX_INSN_LEN
);
800 return i386_jmp_p (insn
);
803 /* Some kernels may run one past a syscall insn, so we have to cope. */
805 displaced_step_copy_insn_closure_up
806 i386_displaced_step_copy_insn (struct gdbarch
*gdbarch
,
807 CORE_ADDR from
, CORE_ADDR to
,
808 struct regcache
*regs
)
810 size_t len
= gdbarch_max_insn_length (gdbarch
);
811 std::unique_ptr
<i386_displaced_step_copy_insn_closure
> closure
812 (new i386_displaced_step_copy_insn_closure (len
));
813 gdb_byte
*buf
= closure
->buf
.data ();
815 read_memory (from
, buf
, len
);
817 /* GDB may get control back after the insn after the syscall.
818 Presumably this is a kernel bug.
819 If this is a syscall, make sure there's a nop afterwards. */
824 insn
= i386_skip_prefixes (buf
, len
);
825 if (insn
!= NULL
&& i386_syscall_p (insn
, &syscall_length
))
826 insn
[syscall_length
] = NOP_OPCODE
;
829 write_memory (to
, buf
, len
);
831 displaced_debug_printf ("%s->%s: %s",
832 paddress (gdbarch
, from
), paddress (gdbarch
, to
),
833 bytes_to_string (buf
, len
).c_str ());
835 /* This is a work around for a problem with g++ 4.8. */
836 return displaced_step_copy_insn_closure_up (closure
.release ());
839 /* Fix up the state of registers and memory after having single-stepped
840 a displaced instruction. */
843 i386_displaced_step_fixup (struct gdbarch
*gdbarch
,
844 struct displaced_step_copy_insn_closure
*closure_
,
845 CORE_ADDR from
, CORE_ADDR to
,
846 struct regcache
*regs
, bool completed_p
)
848 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
850 /* The offset we applied to the instruction's address.
851 This could well be negative (when viewed as a signed 32-bit
852 value), but ULONGEST won't reflect that, so take care when
854 ULONGEST insn_offset
= to
- from
;
856 i386_displaced_step_copy_insn_closure
*closure
857 = (i386_displaced_step_copy_insn_closure
*) closure_
;
858 gdb_byte
*insn
= closure
->buf
.data ();
859 /* The start of the insn, needed in case we see some prefixes. */
860 gdb_byte
*insn_start
= insn
;
862 displaced_debug_printf ("fixup (%s, %s), insn = 0x%02x 0x%02x ...",
863 paddress (gdbarch
, from
), paddress (gdbarch
, to
),
866 /* The list of issues to contend with here is taken from
867 resume_execution in arch/i386/kernel/kprobes.c, Linux 2.6.20.
868 Yay for Free Software! */
870 /* Relocate the %eip, if necessary. */
872 /* The instruction recognizers we use assume any leading prefixes
873 have been skipped. */
875 /* This is the size of the buffer in closure. */
876 size_t max_insn_len
= gdbarch_max_insn_length (gdbarch
);
877 gdb_byte
*opcode
= i386_skip_prefixes (insn
, max_insn_len
);
878 /* If there are too many prefixes, just ignore the insn.
879 It will fault when run. */
884 /* Except in the case of absolute or indirect jump or call
885 instructions, or a return instruction, the new eip is relative to
886 the displaced instruction; make it relative. Well, signal
887 handler returns don't need relocation either, but we use the
888 value of %eip to recognize those; see below. */
890 || (!i386_absolute_jmp_p (insn
)
891 && !i386_absolute_call_p (insn
)
892 && !i386_ret_p (insn
)))
896 CORE_ADDR pc
= regcache_read_pc (regs
);
898 /* A signal trampoline system call changes the %eip, resuming
899 execution of the main program after the signal handler has
900 returned. That makes them like 'return' instructions; we
901 shouldn't relocate %eip.
903 But most system calls don't, and we do need to relocate %eip.
905 Our heuristic for distinguishing these cases: if stepping
906 over the system call instruction left control directly after
907 the instruction, the we relocate --- control almost certainly
908 doesn't belong in the displaced copy. Otherwise, we assume
909 the instruction has put control where it belongs, and leave
910 it unrelocated. Goodness help us if there are PC-relative
912 if (i386_syscall_p (insn
, &insn_len
)
913 && pc
!= to
+ (insn
- insn_start
) + insn_len
914 /* GDB can get control back after the insn after the syscall.
915 Presumably this is a kernel bug.
916 i386_displaced_step_copy_insn ensures it's a nop,
917 we add one to the length for it. */
918 && pc
!= to
+ (insn
- insn_start
) + insn_len
+ 1)
919 displaced_debug_printf ("syscall changed %%eip; not relocating");
922 ULONGEST eip
= (pc
- insn_offset
) & 0xffffffffUL
;
924 /* If we just stepped over a breakpoint insn, we don't backup
925 the pc on purpose; this is to match behaviour without
928 regcache_write_pc (regs
, eip
);
930 displaced_debug_printf ("relocated %%eip from %s to %s",
931 paddress (gdbarch
, pc
),
932 paddress (gdbarch
, eip
));
936 /* If the instruction was PUSHFL, then the TF bit will be set in the
937 pushed value, and should be cleared. We'll leave this for later,
938 since GDB already messes up the TF flag when stepping over a
941 /* If the instruction was a call, the return address now atop the
942 stack is the address following the copied instruction. We need
943 to make it the address following the original instruction. */
944 if (completed_p
&& i386_call_p (insn
))
948 const ULONGEST retaddr_len
= 4;
950 regcache_cooked_read_unsigned (regs
, I386_ESP_REGNUM
, &esp
);
951 retaddr
= read_memory_unsigned_integer (esp
, retaddr_len
, byte_order
);
952 retaddr
= (retaddr
- insn_offset
) & 0xffffffffUL
;
953 write_memory_unsigned_integer (esp
, retaddr_len
, byte_order
, retaddr
);
955 displaced_debug_printf ("relocated return addr at %s to %s",
956 paddress (gdbarch
, esp
),
957 paddress (gdbarch
, retaddr
));
962 append_insns (CORE_ADDR
*to
, ULONGEST len
, const gdb_byte
*buf
)
964 target_write_memory (*to
, buf
, len
);
969 i386_relocate_instruction (struct gdbarch
*gdbarch
,
970 CORE_ADDR
*to
, CORE_ADDR oldloc
)
972 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
973 gdb_byte buf
[I386_MAX_INSN_LEN
];
974 int offset
= 0, rel32
, newrel
;
976 gdb_byte
*insn
= buf
;
978 read_memory (oldloc
, buf
, I386_MAX_INSN_LEN
);
980 insn_length
= gdb_buffered_insn_length (gdbarch
, insn
,
981 I386_MAX_INSN_LEN
, oldloc
);
983 /* Get past the prefixes. */
984 insn
= i386_skip_prefixes (insn
, I386_MAX_INSN_LEN
);
986 /* Adjust calls with 32-bit relative addresses as push/jump, with
987 the address pushed being the location where the original call in
988 the user program would return to. */
991 gdb_byte push_buf
[16];
992 unsigned int ret_addr
;
994 /* Where "ret" in the original code will return to. */
995 ret_addr
= oldloc
+ insn_length
;
996 push_buf
[0] = 0x68; /* pushq $... */
997 store_unsigned_integer (&push_buf
[1], 4, byte_order
, ret_addr
);
999 append_insns (to
, 5, push_buf
);
1001 /* Convert the relative call to a relative jump. */
1004 /* Adjust the destination offset. */
1005 rel32
= extract_signed_integer (insn
+ 1, 4, byte_order
);
1006 newrel
= (oldloc
- *to
) + rel32
;
1007 store_signed_integer (insn
+ 1, 4, byte_order
, newrel
);
1009 displaced_debug_printf ("adjusted insn rel32=%s at %s to rel32=%s at %s",
1010 hex_string (rel32
), paddress (gdbarch
, oldloc
),
1011 hex_string (newrel
), paddress (gdbarch
, *to
));
1013 /* Write the adjusted jump into its displaced location. */
1014 append_insns (to
, 5, insn
);
1018 /* Adjust jumps with 32-bit relative addresses. Calls are already
1020 if (insn
[0] == 0xe9)
1022 /* Adjust conditional jumps. */
1023 else if (insn
[0] == 0x0f && (insn
[1] & 0xf0) == 0x80)
1028 rel32
= extract_signed_integer (insn
+ offset
, 4, byte_order
);
1029 newrel
= (oldloc
- *to
) + rel32
;
1030 store_signed_integer (insn
+ offset
, 4, byte_order
, newrel
);
1031 displaced_debug_printf ("adjusted insn rel32=%s at %s to rel32=%s at %s",
1032 hex_string (rel32
), paddress (gdbarch
, oldloc
),
1033 hex_string (newrel
), paddress (gdbarch
, *to
));
1036 /* Write the adjusted instructions into their displaced
1038 append_insns (to
, insn_length
, buf
);
1042 #ifdef I386_REGNO_TO_SYMMETRY
1043 #error "The Sequent Symmetry is no longer supported."
1046 /* According to the System V ABI, the registers %ebp, %ebx, %edi, %esi
1047 and %esp "belong" to the calling function. Therefore these
1048 registers should be saved if they're going to be modified. */
1050 /* The maximum number of saved registers. This should include all
1051 registers mentioned above, and %eip. */
1052 #define I386_NUM_SAVED_REGS I386_NUM_GREGS
1054 struct i386_frame_cache
1062 /* Saved registers. */
1063 CORE_ADDR saved_regs
[I386_NUM_SAVED_REGS
];
1068 /* Stack space reserved for local variables. */
1072 /* Allocate and initialize a frame cache. */
1074 static struct i386_frame_cache
*
1075 i386_alloc_frame_cache (void)
1077 struct i386_frame_cache
*cache
;
1080 cache
= FRAME_OBSTACK_ZALLOC (struct i386_frame_cache
);
1085 cache
->sp_offset
= -4;
1088 /* Saved registers. We initialize these to -1 since zero is a valid
1089 offset (that's where %ebp is supposed to be stored). */
1090 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
1091 cache
->saved_regs
[i
] = -1;
1092 cache
->saved_sp
= 0;
1093 cache
->saved_sp_reg
= -1;
1094 cache
->pc_in_eax
= 0;
1096 /* Frameless until proven otherwise. */
1102 /* If the instruction at PC is a jump, return the address of its
1103 target. Otherwise, return PC. */
1106 i386_follow_jump (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
1108 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1113 if (target_read_code (pc
, &op
, 1))
1120 op
= read_code_unsigned_integer (pc
+ 1, 1, byte_order
);
1126 /* Relative jump: if data16 == 0, disp32, else disp16. */
1129 delta
= read_memory_integer (pc
+ 2, 2, byte_order
);
1131 /* Include the size of the jmp instruction (including the
1137 delta
= read_memory_integer (pc
+ 1, 4, byte_order
);
1139 /* Include the size of the jmp instruction. */
1144 /* Relative jump, disp8 (ignore data16). */
1145 delta
= read_memory_integer (pc
+ data16
+ 1, 1, byte_order
);
1147 delta
+= data16
+ 2;
1154 /* Check whether PC points at a prologue for a function returning a
1155 structure or union. If so, it updates CACHE and returns the
1156 address of the first instruction after the code sequence that
1157 removes the "hidden" argument from the stack or CURRENT_PC,
1158 whichever is smaller. Otherwise, return PC. */
1161 i386_analyze_struct_return (CORE_ADDR pc
, CORE_ADDR current_pc
,
1162 struct i386_frame_cache
*cache
)
1164 /* Functions that return a structure or union start with:
1167 xchgl %eax, (%esp) 0x87 0x04 0x24
1168 or xchgl %eax, 0(%esp) 0x87 0x44 0x24 0x00
1170 (the System V compiler puts out the second `xchg' instruction,
1171 and the assembler doesn't try to optimize it, so the 'sib' form
1172 gets generated). This sequence is used to get the address of the
1173 return buffer for a function that returns a structure. */
1174 static gdb_byte proto1
[3] = { 0x87, 0x04, 0x24 };
1175 static gdb_byte proto2
[4] = { 0x87, 0x44, 0x24, 0x00 };
1179 if (current_pc
<= pc
)
1182 if (target_read_code (pc
, &op
, 1))
1185 if (op
!= 0x58) /* popl %eax */
1188 if (target_read_code (pc
+ 1, buf
, 4))
1191 if (memcmp (buf
, proto1
, 3) != 0 && memcmp (buf
, proto2
, 4) != 0)
1194 if (current_pc
== pc
)
1196 cache
->sp_offset
+= 4;
1200 if (current_pc
== pc
+ 1)
1202 cache
->pc_in_eax
= 1;
1206 if (buf
[1] == proto1
[1])
1213 i386_skip_probe (CORE_ADDR pc
)
1215 /* A function may start with
1229 if (target_read_code (pc
, &op
, 1))
1232 if (op
== 0x68 || op
== 0x6a)
1236 /* Skip past the `pushl' instruction; it has either a one-byte or a
1237 four-byte operand, depending on the opcode. */
1243 /* Read the following 8 bytes, which should be `call _probe' (6
1244 bytes) followed by `addl $4,%esp' (2 bytes). */
1245 read_memory (pc
+ delta
, buf
, sizeof (buf
));
1246 if (buf
[0] == 0xe8 && buf
[6] == 0xc4 && buf
[7] == 0x4)
1247 pc
+= delta
+ sizeof (buf
);
1253 /* GCC 4.1 and later, can put code in the prologue to realign the
1254 stack pointer. Check whether PC points to such code, and update
1255 CACHE accordingly. Return the first instruction after the code
1256 sequence or CURRENT_PC, whichever is smaller. If we don't
1257 recognize the code, return PC. */
1260 i386_analyze_stack_align (CORE_ADDR pc
, CORE_ADDR current_pc
,
1261 struct i386_frame_cache
*cache
)
1263 /* There are 2 code sequences to re-align stack before the frame
1266 1. Use a caller-saved saved register:
1272 2. Use a callee-saved saved register:
1279 "andl $-XXX, %esp" can be either 3 bytes or 6 bytes:
1281 0x83 0xe4 0xf0 andl $-16, %esp
1282 0x81 0xe4 0x00 0xff 0xff 0xff andl $-256, %esp
1287 int offset
, offset_and
;
1288 static int regnums
[8] = {
1289 I386_EAX_REGNUM
, /* %eax */
1290 I386_ECX_REGNUM
, /* %ecx */
1291 I386_EDX_REGNUM
, /* %edx */
1292 I386_EBX_REGNUM
, /* %ebx */
1293 I386_ESP_REGNUM
, /* %esp */
1294 I386_EBP_REGNUM
, /* %ebp */
1295 I386_ESI_REGNUM
, /* %esi */
1296 I386_EDI_REGNUM
/* %edi */
1299 if (target_read_code (pc
, buf
, sizeof buf
))
1302 /* Check caller-saved saved register. The first instruction has
1303 to be "leal 4(%esp), %reg". */
1304 if (buf
[0] == 0x8d && buf
[2] == 0x24 && buf
[3] == 0x4)
1306 /* MOD must be binary 10 and R/M must be binary 100. */
1307 if ((buf
[1] & 0xc7) != 0x44)
1310 /* REG has register number. */
1311 reg
= (buf
[1] >> 3) & 7;
1316 /* Check callee-saved saved register. The first instruction
1317 has to be "pushl %reg". */
1318 if ((buf
[0] & 0xf8) != 0x50)
1324 /* The next instruction has to be "leal 8(%esp), %reg". */
1325 if (buf
[1] != 0x8d || buf
[3] != 0x24 || buf
[4] != 0x8)
1328 /* MOD must be binary 10 and R/M must be binary 100. */
1329 if ((buf
[2] & 0xc7) != 0x44)
1332 /* REG has register number. Registers in pushl and leal have to
1334 if (reg
!= ((buf
[2] >> 3) & 7))
1340 /* Rigister can't be %esp nor %ebp. */
1341 if (reg
== 4 || reg
== 5)
1344 /* The next instruction has to be "andl $-XXX, %esp". */
1345 if (buf
[offset
+ 1] != 0xe4
1346 || (buf
[offset
] != 0x81 && buf
[offset
] != 0x83))
1349 offset_and
= offset
;
1350 offset
+= buf
[offset
] == 0x81 ? 6 : 3;
1352 /* The next instruction has to be "pushl -4(%reg)". 8bit -4 is
1353 0xfc. REG must be binary 110 and MOD must be binary 01. */
1354 if (buf
[offset
] != 0xff
1355 || buf
[offset
+ 2] != 0xfc
1356 || (buf
[offset
+ 1] & 0xf8) != 0x70)
1359 /* R/M has register. Registers in leal and pushl have to be the
1361 if (reg
!= (buf
[offset
+ 1] & 7))
1364 if (current_pc
> pc
+ offset_and
)
1365 cache
->saved_sp_reg
= regnums
[reg
];
1367 return std::min (pc
+ offset
+ 3, current_pc
);
1370 /* Maximum instruction length we need to handle. */
1371 #define I386_MAX_MATCHED_INSN_LEN 6
1373 /* Instruction description. */
1377 gdb_byte insn
[I386_MAX_MATCHED_INSN_LEN
];
1378 gdb_byte mask
[I386_MAX_MATCHED_INSN_LEN
];
1381 /* Return whether instruction at PC matches PATTERN. */
1384 i386_match_pattern (CORE_ADDR pc
, struct i386_insn pattern
)
1388 if (target_read_code (pc
, &op
, 1))
1391 if ((op
& pattern
.mask
[0]) == pattern
.insn
[0])
1393 gdb_byte buf
[I386_MAX_MATCHED_INSN_LEN
- 1];
1394 int insn_matched
= 1;
1397 gdb_assert (pattern
.len
> 1);
1398 gdb_assert (pattern
.len
<= I386_MAX_MATCHED_INSN_LEN
);
1400 if (target_read_code (pc
+ 1, buf
, pattern
.len
- 1))
1403 for (i
= 1; i
< pattern
.len
; i
++)
1405 if ((buf
[i
- 1] & pattern
.mask
[i
]) != pattern
.insn
[i
])
1408 return insn_matched
;
1413 /* Search for the instruction at PC in the list INSN_PATTERNS. Return
1414 the first instruction description that matches. Otherwise, return
1417 static struct i386_insn
*
1418 i386_match_insn (CORE_ADDR pc
, struct i386_insn
*insn_patterns
)
1420 struct i386_insn
*pattern
;
1422 for (pattern
= insn_patterns
; pattern
->len
> 0; pattern
++)
1424 if (i386_match_pattern (pc
, *pattern
))
1431 /* Return whether PC points inside a sequence of instructions that
1432 matches INSN_PATTERNS. */
1435 i386_match_insn_block (CORE_ADDR pc
, struct i386_insn
*insn_patterns
)
1437 CORE_ADDR current_pc
;
1439 struct i386_insn
*insn
;
1441 insn
= i386_match_insn (pc
, insn_patterns
);
1446 ix
= insn
- insn_patterns
;
1447 for (i
= ix
- 1; i
>= 0; i
--)
1449 current_pc
-= insn_patterns
[i
].len
;
1451 if (!i386_match_pattern (current_pc
, insn_patterns
[i
]))
1455 current_pc
= pc
+ insn
->len
;
1456 for (insn
= insn_patterns
+ ix
+ 1; insn
->len
> 0; insn
++)
1458 if (!i386_match_pattern (current_pc
, *insn
))
1461 current_pc
+= insn
->len
;
1467 /* Some special instructions that might be migrated by GCC into the
1468 part of the prologue that sets up the new stack frame. Because the
1469 stack frame hasn't been setup yet, no registers have been saved
1470 yet, and only the scratch registers %eax, %ecx and %edx can be
1473 static i386_insn i386_frame_setup_skip_insns
[] =
1475 /* Check for `movb imm8, r' and `movl imm32, r'.
1477 ??? Should we handle 16-bit operand-sizes here? */
1479 /* `movb imm8, %al' and `movb imm8, %ah' */
1480 /* `movb imm8, %cl' and `movb imm8, %ch' */
1481 { 2, { 0xb0, 0x00 }, { 0xfa, 0x00 } },
1482 /* `movb imm8, %dl' and `movb imm8, %dh' */
1483 { 2, { 0xb2, 0x00 }, { 0xfb, 0x00 } },
1484 /* `movl imm32, %eax' and `movl imm32, %ecx' */
1485 { 5, { 0xb8 }, { 0xfe } },
1486 /* `movl imm32, %edx' */
1487 { 5, { 0xba }, { 0xff } },
1489 /* Check for `mov imm32, r32'. Note that there is an alternative
1490 encoding for `mov m32, %eax'.
1492 ??? Should we handle SIB addressing here?
1493 ??? Should we handle 16-bit operand-sizes here? */
1495 /* `movl m32, %eax' */
1496 { 5, { 0xa1 }, { 0xff } },
1497 /* `movl m32, %eax' and `mov; m32, %ecx' */
1498 { 6, { 0x89, 0x05 }, {0xff, 0xf7 } },
1499 /* `movl m32, %edx' */
1500 { 6, { 0x89, 0x15 }, {0xff, 0xff } },
1502 /* Check for `xorl r32, r32' and the equivalent `subl r32, r32'.
1503 Because of the symmetry, there are actually two ways to encode
1504 these instructions; opcode bytes 0x29 and 0x2b for `subl' and
1505 opcode bytes 0x31 and 0x33 for `xorl'. */
1507 /* `subl %eax, %eax' */
1508 { 2, { 0x29, 0xc0 }, { 0xfd, 0xff } },
1509 /* `subl %ecx, %ecx' */
1510 { 2, { 0x29, 0xc9 }, { 0xfd, 0xff } },
1511 /* `subl %edx, %edx' */
1512 { 2, { 0x29, 0xd2 }, { 0xfd, 0xff } },
1513 /* `xorl %eax, %eax' */
1514 { 2, { 0x31, 0xc0 }, { 0xfd, 0xff } },
1515 /* `xorl %ecx, %ecx' */
1516 { 2, { 0x31, 0xc9 }, { 0xfd, 0xff } },
1517 /* `xorl %edx, %edx' */
1518 { 2, { 0x31, 0xd2 }, { 0xfd, 0xff } },
1522 /* Check whether PC points to an endbr32 instruction. */
1524 i386_skip_endbr (CORE_ADDR pc
)
1526 static const gdb_byte endbr32
[] = { 0xf3, 0x0f, 0x1e, 0xfb };
1528 gdb_byte buf
[sizeof (endbr32
)];
1530 /* Stop there if we can't read the code */
1531 if (target_read_code (pc
, buf
, sizeof (endbr32
)))
1534 /* If the instruction isn't an endbr32, stop */
1535 if (memcmp (buf
, endbr32
, sizeof (endbr32
)) != 0)
1538 return pc
+ sizeof (endbr32
);
1541 /* Check whether PC points to a no-op instruction. */
1543 i386_skip_noop (CORE_ADDR pc
)
1548 if (target_read_code (pc
, &op
, 1))
1554 /* Ignore `nop' instruction. */
1558 if (target_read_code (pc
, &op
, 1))
1562 /* Ignore no-op instruction `mov %edi, %edi'.
1563 Microsoft system dlls often start with
1564 a `mov %edi,%edi' instruction.
1565 The 5 bytes before the function start are
1566 filled with `nop' instructions.
1567 This pattern can be used for hot-patching:
1568 The `mov %edi, %edi' instruction can be replaced by a
1569 near jump to the location of the 5 `nop' instructions
1570 which can be replaced by a 32-bit jump to anywhere
1571 in the 32-bit address space. */
1573 else if (op
== 0x8b)
1575 if (target_read_code (pc
+ 1, &op
, 1))
1581 if (target_read_code (pc
, &op
, 1))
1591 /* Check whether PC points at a code that sets up a new stack frame.
1592 If so, it updates CACHE and returns the address of the first
1593 instruction after the sequence that sets up the frame or LIMIT,
1594 whichever is smaller. If we don't recognize the code, return PC. */
1597 i386_analyze_frame_setup (struct gdbarch
*gdbarch
,
1598 CORE_ADDR pc
, CORE_ADDR limit
,
1599 struct i386_frame_cache
*cache
)
1601 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1602 struct i386_insn
*insn
;
1609 if (target_read_code (pc
, &op
, 1))
1612 if (op
== 0x55) /* pushl %ebp */
1614 /* Take into account that we've executed the `pushl %ebp' that
1615 starts this instruction sequence. */
1616 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
1617 cache
->sp_offset
+= 4;
1620 /* If that's all, return now. */
1624 /* Check for some special instructions that might be migrated by
1625 GCC into the prologue and skip them. At this point in the
1626 prologue, code should only touch the scratch registers %eax,
1627 %ecx and %edx, so while the number of possibilities is sheer,
1630 Make sure we only skip these instructions if we later see the
1631 `movl %esp, %ebp' that actually sets up the frame. */
1632 while (pc
+ skip
< limit
)
1634 insn
= i386_match_insn (pc
+ skip
, i386_frame_setup_skip_insns
);
1641 /* If that's all, return now. */
1642 if (limit
<= pc
+ skip
)
1645 if (target_read_code (pc
+ skip
, &op
, 1))
1648 /* The i386 prologue looks like
1654 and a different prologue can be generated for atom.
1658 lea -0x10(%esp),%esp
1660 We handle both of them here. */
1664 /* Check for `movl %esp, %ebp' -- can be written in two ways. */
1666 if (read_code_unsigned_integer (pc
+ skip
+ 1, 1, byte_order
)
1672 if (read_code_unsigned_integer (pc
+ skip
+ 1, 1, byte_order
)
1677 case 0x8d: /* Check for 'lea (%ebp), %ebp'. */
1678 if (read_code_unsigned_integer (pc
+ skip
+ 1, 2, byte_order
)
1687 /* OK, we actually have a frame. We just don't know how large
1688 it is yet. Set its size to zero. We'll adjust it if
1689 necessary. We also now commit to skipping the special
1690 instructions mentioned before. */
1693 /* If that's all, return now. */
1697 /* Check for stack adjustment
1703 NOTE: You can't subtract a 16-bit immediate from a 32-bit
1704 reg, so we don't have to worry about a data16 prefix. */
1705 if (target_read_code (pc
, &op
, 1))
1709 /* `subl' with 8-bit immediate. */
1710 if (read_code_unsigned_integer (pc
+ 1, 1, byte_order
) != 0xec)
1711 /* Some instruction starting with 0x83 other than `subl'. */
1714 /* `subl' with signed 8-bit immediate (though it wouldn't
1715 make sense to be negative). */
1716 cache
->locals
= read_code_integer (pc
+ 2, 1, byte_order
);
1719 else if (op
== 0x81)
1721 /* Maybe it is `subl' with a 32-bit immediate. */
1722 if (read_code_unsigned_integer (pc
+ 1, 1, byte_order
) != 0xec)
1723 /* Some instruction starting with 0x81 other than `subl'. */
1726 /* It is `subl' with a 32-bit immediate. */
1727 cache
->locals
= read_code_integer (pc
+ 2, 4, byte_order
);
1730 else if (op
== 0x8d)
1732 /* The ModR/M byte is 0x64. */
1733 if (read_code_unsigned_integer (pc
+ 1, 1, byte_order
) != 0x64)
1735 /* 'lea' with 8-bit displacement. */
1736 cache
->locals
= -1 * read_code_integer (pc
+ 3, 1, byte_order
);
1741 /* Some instruction other than `subl' nor 'lea'. */
1745 else if (op
== 0xc8) /* enter */
1747 cache
->locals
= read_code_unsigned_integer (pc
+ 1, 2, byte_order
);
1754 /* Check whether PC points at code that saves registers on the stack.
1755 If so, it updates CACHE and returns the address of the first
1756 instruction after the register saves or CURRENT_PC, whichever is
1757 smaller. Otherwise, return PC. */
1760 i386_analyze_register_saves (CORE_ADDR pc
, CORE_ADDR current_pc
,
1761 struct i386_frame_cache
*cache
)
1763 CORE_ADDR offset
= 0;
1767 if (cache
->locals
> 0)
1768 offset
-= cache
->locals
;
1769 for (i
= 0; i
< 8 && pc
< current_pc
; i
++)
1771 if (target_read_code (pc
, &op
, 1))
1773 if (op
< 0x50 || op
> 0x57)
1777 cache
->saved_regs
[op
- 0x50] = offset
;
1778 cache
->sp_offset
+= 4;
1785 /* Do a full analysis of the prologue at PC and update CACHE
1786 accordingly. Bail out early if CURRENT_PC is reached. Return the
1787 address where the analysis stopped.
1789 We handle these cases:
1791 The startup sequence can be at the start of the function, or the
1792 function can start with a branch to startup code at the end.
1794 %ebp can be set up with either the 'enter' instruction, or "pushl
1795 %ebp, movl %esp, %ebp" (`enter' is too slow to be useful, but was
1796 once used in the System V compiler).
1798 Local space is allocated just below the saved %ebp by either the
1799 'enter' instruction, or by "subl $<size>, %esp". 'enter' has a
1800 16-bit unsigned argument for space to allocate, and the 'addl'
1801 instruction could have either a signed byte, or 32-bit immediate.
1803 Next, the registers used by this function are pushed. With the
1804 System V compiler they will always be in the order: %edi, %esi,
1805 %ebx (and sometimes a harmless bug causes it to also save but not
1806 restore %eax); however, the code below is willing to see the pushes
1807 in any order, and will handle up to 8 of them.
1809 If the setup sequence is at the end of the function, then the next
1810 instruction will be a branch back to the start. */
1813 i386_analyze_prologue (struct gdbarch
*gdbarch
,
1814 CORE_ADDR pc
, CORE_ADDR current_pc
,
1815 struct i386_frame_cache
*cache
)
1817 pc
= i386_skip_endbr (pc
);
1818 pc
= i386_skip_noop (pc
);
1819 pc
= i386_follow_jump (gdbarch
, pc
);
1820 pc
= i386_analyze_struct_return (pc
, current_pc
, cache
);
1821 pc
= i386_skip_probe (pc
);
1822 pc
= i386_analyze_stack_align (pc
, current_pc
, cache
);
1823 pc
= i386_analyze_frame_setup (gdbarch
, pc
, current_pc
, cache
);
1824 return i386_analyze_register_saves (pc
, current_pc
, cache
);
1827 /* Return PC of first real instruction. */
1830 i386_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR start_pc
)
1832 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1834 static gdb_byte pic_pat
[6] =
1836 0xe8, 0, 0, 0, 0, /* call 0x0 */
1837 0x5b, /* popl %ebx */
1839 struct i386_frame_cache cache
;
1843 CORE_ADDR func_addr
;
1845 if (find_pc_partial_function (start_pc
, NULL
, &func_addr
, NULL
))
1847 CORE_ADDR post_prologue_pc
1848 = skip_prologue_using_sal (gdbarch
, func_addr
);
1849 struct compunit_symtab
*cust
= find_pc_compunit_symtab (func_addr
);
1851 /* LLVM backend (Clang/Flang) always emits a line note before the
1852 prologue and another one after. We trust clang and newer Intel
1853 compilers to emit usable line notes. */
1854 if (post_prologue_pc
1856 && cust
->producer () != NULL
1857 && (producer_is_llvm (cust
->producer ())
1858 || producer_is_icc_ge_19 (cust
->producer ()))))
1859 return std::max (start_pc
, post_prologue_pc
);
1863 pc
= i386_analyze_prologue (gdbarch
, start_pc
, 0xffffffff, &cache
);
1864 if (cache
.locals
< 0)
1867 /* Found valid frame setup. */
1869 /* The native cc on SVR4 in -K PIC mode inserts the following code
1870 to get the address of the global offset table (GOT) into register
1875 movl %ebx,x(%ebp) (optional)
1878 This code is with the rest of the prologue (at the end of the
1879 function), so we have to skip it to get to the first real
1880 instruction at the start of the function. */
1882 for (i
= 0; i
< 6; i
++)
1884 if (target_read_code (pc
+ i
, &op
, 1))
1887 if (pic_pat
[i
] != op
)
1894 if (target_read_code (pc
+ delta
, &op
, 1))
1897 if (op
== 0x89) /* movl %ebx, x(%ebp) */
1899 op
= read_code_unsigned_integer (pc
+ delta
+ 1, 1, byte_order
);
1901 if (op
== 0x5d) /* One byte offset from %ebp. */
1903 else if (op
== 0x9d) /* Four byte offset from %ebp. */
1905 else /* Unexpected instruction. */
1908 if (target_read_code (pc
+ delta
, &op
, 1))
1913 if (delta
> 0 && op
== 0x81
1914 && read_code_unsigned_integer (pc
+ delta
+ 1, 1, byte_order
)
1921 /* If the function starts with a branch (to startup code at the end)
1922 the last instruction should bring us back to the first
1923 instruction of the real code. */
1924 if (i386_follow_jump (gdbarch
, start_pc
) != start_pc
)
1925 pc
= i386_follow_jump (gdbarch
, pc
);
1930 /* Check that the code pointed to by PC corresponds to a call to
1931 __main, skip it if so. Return PC otherwise. */
1934 i386_skip_main_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
1936 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1939 if (target_read_code (pc
, &op
, 1))
1945 if (target_read_code (pc
+ 1, buf
, sizeof buf
) == 0)
1947 /* Make sure address is computed correctly as a 32bit
1948 integer even if CORE_ADDR is 64 bit wide. */
1949 struct bound_minimal_symbol s
;
1950 CORE_ADDR call_dest
;
1952 call_dest
= pc
+ 5 + extract_signed_integer (buf
, 4, byte_order
);
1953 call_dest
= call_dest
& 0xffffffffU
;
1954 s
= lookup_minimal_symbol_by_pc (call_dest
);
1955 if (s
.minsym
!= NULL
1956 && s
.minsym
->linkage_name () != NULL
1957 && strcmp (s
.minsym
->linkage_name (), "__main") == 0)
1965 /* This function is 64-bit safe. */
1968 i386_unwind_pc (struct gdbarch
*gdbarch
, frame_info_ptr next_frame
)
1972 frame_unwind_register (next_frame
, gdbarch_pc_regnum (gdbarch
), buf
);
1973 return extract_typed_address (buf
, builtin_type (gdbarch
)->builtin_func_ptr
);
1977 /* Normal frames. */
1980 i386_frame_cache_1 (frame_info_ptr this_frame
,
1981 struct i386_frame_cache
*cache
)
1983 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
1984 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
1988 cache
->pc
= get_frame_func (this_frame
);
1990 /* In principle, for normal frames, %ebp holds the frame pointer,
1991 which holds the base address for the current stack frame.
1992 However, for functions that don't need it, the frame pointer is
1993 optional. For these "frameless" functions the frame pointer is
1994 actually the frame pointer of the calling frame. Signal
1995 trampolines are just a special case of a "frameless" function.
1996 They (usually) share their frame pointer with the frame that was
1997 in progress when the signal occurred. */
1999 get_frame_register (this_frame
, I386_EBP_REGNUM
, buf
);
2000 cache
->base
= extract_unsigned_integer (buf
, 4, byte_order
);
2001 if (cache
->base
== 0)
2007 /* For normal frames, %eip is stored at 4(%ebp). */
2008 cache
->saved_regs
[I386_EIP_REGNUM
] = 4;
2011 i386_analyze_prologue (gdbarch
, cache
->pc
, get_frame_pc (this_frame
),
2014 if (cache
->locals
< 0)
2016 /* We didn't find a valid frame, which means that CACHE->base
2017 currently holds the frame pointer for our calling frame. If
2018 we're at the start of a function, or somewhere half-way its
2019 prologue, the function's frame probably hasn't been fully
2020 setup yet. Try to reconstruct the base address for the stack
2021 frame by looking at the stack pointer. For truly "frameless"
2022 functions this might work too. */
2024 if (cache
->saved_sp_reg
!= -1)
2026 /* Saved stack pointer has been saved. */
2027 get_frame_register (this_frame
, cache
->saved_sp_reg
, buf
);
2028 cache
->saved_sp
= extract_unsigned_integer (buf
, 4, byte_order
);
2030 /* We're halfway aligning the stack. */
2031 cache
->base
= ((cache
->saved_sp
- 4) & 0xfffffff0) - 4;
2032 cache
->saved_regs
[I386_EIP_REGNUM
] = cache
->saved_sp
- 4;
2034 /* This will be added back below. */
2035 cache
->saved_regs
[I386_EIP_REGNUM
] -= cache
->base
;
2037 else if (cache
->pc
!= 0
2038 || target_read_code (get_frame_pc (this_frame
), buf
, 1))
2040 /* We're in a known function, but did not find a frame
2041 setup. Assume that the function does not use %ebp.
2042 Alternatively, we may have jumped to an invalid
2043 address; in that case there is definitely no new
2045 get_frame_register (this_frame
, I386_ESP_REGNUM
, buf
);
2046 cache
->base
= extract_unsigned_integer (buf
, 4, byte_order
)
2050 /* We're in an unknown function. We could not find the start
2051 of the function to analyze the prologue; our best option is
2052 to assume a typical frame layout with the caller's %ebp
2054 cache
->saved_regs
[I386_EBP_REGNUM
] = 0;
2057 if (cache
->saved_sp_reg
!= -1)
2059 /* Saved stack pointer has been saved (but the SAVED_SP_REG
2060 register may be unavailable). */
2061 if (cache
->saved_sp
== 0
2062 && deprecated_frame_register_read (this_frame
,
2063 cache
->saved_sp_reg
, buf
))
2064 cache
->saved_sp
= extract_unsigned_integer (buf
, 4, byte_order
);
2066 /* Now that we have the base address for the stack frame we can
2067 calculate the value of %esp in the calling frame. */
2068 else if (cache
->saved_sp
== 0)
2069 cache
->saved_sp
= cache
->base
+ 8;
2071 /* Adjust all the saved registers such that they contain addresses
2072 instead of offsets. */
2073 for (i
= 0; i
< I386_NUM_SAVED_REGS
; i
++)
2074 if (cache
->saved_regs
[i
] != -1)
2075 cache
->saved_regs
[i
] += cache
->base
;
2080 static struct i386_frame_cache
*
2081 i386_frame_cache (frame_info_ptr this_frame
, void **this_cache
)
2083 struct i386_frame_cache
*cache
;
2086 return (struct i386_frame_cache
*) *this_cache
;
2088 cache
= i386_alloc_frame_cache ();
2089 *this_cache
= cache
;
2093 i386_frame_cache_1 (this_frame
, cache
);
2095 catch (const gdb_exception_error
&ex
)
2097 if (ex
.error
!= NOT_AVAILABLE_ERROR
)
2105 i386_frame_this_id (frame_info_ptr this_frame
, void **this_cache
,
2106 struct frame_id
*this_id
)
2108 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
2111 (*this_id
) = frame_id_build_unavailable_stack (cache
->pc
);
2112 else if (cache
->base
== 0)
2114 /* This marks the outermost frame. */
2118 /* See the end of i386_push_dummy_call. */
2119 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
2123 static enum unwind_stop_reason
2124 i386_frame_unwind_stop_reason (frame_info_ptr this_frame
,
2127 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
2130 return UNWIND_UNAVAILABLE
;
2132 /* This marks the outermost frame. */
2133 if (cache
->base
== 0)
2134 return UNWIND_OUTERMOST
;
2136 return UNWIND_NO_REASON
;
2139 static struct value
*
2140 i386_frame_prev_register (frame_info_ptr this_frame
, void **this_cache
,
2143 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
2145 gdb_assert (regnum
>= 0);
2147 /* The System V ABI says that:
2149 "The flags register contains the system flags, such as the
2150 direction flag and the carry flag. The direction flag must be
2151 set to the forward (that is, zero) direction before entry and
2152 upon exit from a function. Other user flags have no specified
2153 role in the standard calling sequence and are not preserved."
2155 To guarantee the "upon exit" part of that statement we fake a
2156 saved flags register that has its direction flag cleared.
2158 Note that GCC doesn't seem to rely on the fact that the direction
2159 flag is cleared after a function return; it always explicitly
2160 clears the flag before operations where it matters.
2162 FIXME: kettenis/20030316: I'm not quite sure whether this is the
2163 right thing to do. The way we fake the flags register here makes
2164 it impossible to change it. */
2166 if (regnum
== I386_EFLAGS_REGNUM
)
2170 val
= get_frame_register_unsigned (this_frame
, regnum
);
2172 return frame_unwind_got_constant (this_frame
, regnum
, val
);
2175 if (regnum
== I386_EIP_REGNUM
&& cache
->pc_in_eax
)
2176 return frame_unwind_got_register (this_frame
, regnum
, I386_EAX_REGNUM
);
2178 if (regnum
== I386_ESP_REGNUM
2179 && (cache
->saved_sp
!= 0 || cache
->saved_sp_reg
!= -1))
2181 /* If the SP has been saved, but we don't know where, then this
2182 means that SAVED_SP_REG register was found unavailable back
2183 when we built the cache. */
2184 if (cache
->saved_sp
== 0)
2185 return frame_unwind_got_register (this_frame
, regnum
,
2186 cache
->saved_sp_reg
);
2188 return frame_unwind_got_constant (this_frame
, regnum
,
2192 if (regnum
< I386_NUM_SAVED_REGS
&& cache
->saved_regs
[regnum
] != -1)
2193 return frame_unwind_got_memory (this_frame
, regnum
,
2194 cache
->saved_regs
[regnum
]);
2196 return frame_unwind_got_register (this_frame
, regnum
, regnum
);
2199 static const struct frame_unwind i386_frame_unwind
=
2203 i386_frame_unwind_stop_reason
,
2205 i386_frame_prev_register
,
2207 default_frame_sniffer
2210 /* Normal frames, but in a function epilogue. */
2212 /* Implement the stack_frame_destroyed_p gdbarch method.
2214 The epilogue is defined here as the 'ret' instruction, which will
2215 follow any instruction such as 'leave' or 'pop %ebp' that destroys
2216 the function's stack frame. */
2219 i386_stack_frame_destroyed_p (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
2222 if (target_read_memory (pc
, &insn
, 1))
2223 return 0; /* Can't read memory at pc. */
2225 if (insn
!= 0xc3) /* 'ret' instruction. */
2232 i386_epilogue_frame_sniffer_1 (const struct frame_unwind
*self
,
2233 frame_info_ptr this_frame
,
2234 void **this_prologue_cache
, bool override_p
)
2236 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2237 CORE_ADDR pc
= get_frame_pc (this_frame
);
2239 if (frame_relative_level (this_frame
) != 0)
2240 /* We're not in the inner frame, so assume we're not in an epilogue. */
2244 = compunit_epilogue_unwind_valid (find_pc_compunit_symtab (pc
));
2248 /* Don't override the symtab unwinders, skip
2249 "i386 epilogue override". */
2254 if (!unwind_valid_p
)
2255 /* "i386 epilogue override" unwinder already ran, skip
2260 /* Check whether we're in an epilogue. */
2261 return i386_stack_frame_destroyed_p (gdbarch
, pc
);
2265 i386_epilogue_override_frame_sniffer (const struct frame_unwind
*self
,
2266 frame_info_ptr this_frame
,
2267 void **this_prologue_cache
)
2269 return i386_epilogue_frame_sniffer_1 (self
, this_frame
, this_prologue_cache
,
2274 i386_epilogue_frame_sniffer (const struct frame_unwind
*self
,
2275 frame_info_ptr this_frame
,
2276 void **this_prologue_cache
)
2278 return i386_epilogue_frame_sniffer_1 (self
, this_frame
, this_prologue_cache
,
2282 static struct i386_frame_cache
*
2283 i386_epilogue_frame_cache (frame_info_ptr this_frame
, void **this_cache
)
2285 struct i386_frame_cache
*cache
;
2289 return (struct i386_frame_cache
*) *this_cache
;
2291 cache
= i386_alloc_frame_cache ();
2292 *this_cache
= cache
;
2296 cache
->pc
= get_frame_func (this_frame
);
2298 /* At this point the stack looks as if we just entered the
2299 function, with the return address at the top of the
2301 sp
= get_frame_register_unsigned (this_frame
, I386_ESP_REGNUM
);
2302 cache
->base
= sp
+ cache
->sp_offset
;
2303 cache
->saved_sp
= cache
->base
+ 8;
2304 cache
->saved_regs
[I386_EIP_REGNUM
] = cache
->base
+ 4;
2308 catch (const gdb_exception_error
&ex
)
2310 if (ex
.error
!= NOT_AVAILABLE_ERROR
)
2317 static enum unwind_stop_reason
2318 i386_epilogue_frame_unwind_stop_reason (frame_info_ptr this_frame
,
2321 struct i386_frame_cache
*cache
=
2322 i386_epilogue_frame_cache (this_frame
, this_cache
);
2325 return UNWIND_UNAVAILABLE
;
2327 return UNWIND_NO_REASON
;
2331 i386_epilogue_frame_this_id (frame_info_ptr this_frame
,
2333 struct frame_id
*this_id
)
2335 struct i386_frame_cache
*cache
=
2336 i386_epilogue_frame_cache (this_frame
, this_cache
);
2339 (*this_id
) = frame_id_build_unavailable_stack (cache
->pc
);
2341 (*this_id
) = frame_id_build (cache
->base
+ 8, cache
->pc
);
2344 static struct value
*
2345 i386_epilogue_frame_prev_register (frame_info_ptr this_frame
,
2346 void **this_cache
, int regnum
)
2348 /* Make sure we've initialized the cache. */
2349 i386_epilogue_frame_cache (this_frame
, this_cache
);
2351 return i386_frame_prev_register (this_frame
, this_cache
, regnum
);
2354 static const struct frame_unwind i386_epilogue_override_frame_unwind
=
2356 "i386 epilogue override",
2358 i386_epilogue_frame_unwind_stop_reason
,
2359 i386_epilogue_frame_this_id
,
2360 i386_epilogue_frame_prev_register
,
2362 i386_epilogue_override_frame_sniffer
2365 static const struct frame_unwind i386_epilogue_frame_unwind
=
2369 i386_epilogue_frame_unwind_stop_reason
,
2370 i386_epilogue_frame_this_id
,
2371 i386_epilogue_frame_prev_register
,
2373 i386_epilogue_frame_sniffer
2377 /* Stack-based trampolines. */
2379 /* These trampolines are used on cross x86 targets, when taking the
2380 address of a nested function. When executing these trampolines,
2381 no stack frame is set up, so we are in a similar situation as in
2382 epilogues and i386_epilogue_frame_this_id can be re-used. */
2384 /* Static chain passed in register. */
2386 static i386_insn i386_tramp_chain_in_reg_insns
[] =
2388 /* `movl imm32, %eax' and `movl imm32, %ecx' */
2389 { 5, { 0xb8 }, { 0xfe } },
2392 { 5, { 0xe9 }, { 0xff } },
2397 /* Static chain passed on stack (when regparm=3). */
2399 static i386_insn i386_tramp_chain_on_stack_insns
[] =
2402 { 5, { 0x68 }, { 0xff } },
2405 { 5, { 0xe9 }, { 0xff } },
2410 /* Return whether PC points inside a stack trampoline. */
2413 i386_in_stack_tramp_p (CORE_ADDR pc
)
2418 /* A stack trampoline is detected if no name is associated
2419 to the current pc and if it points inside a trampoline
2422 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
2426 if (target_read_memory (pc
, &insn
, 1))
2429 if (!i386_match_insn_block (pc
, i386_tramp_chain_in_reg_insns
)
2430 && !i386_match_insn_block (pc
, i386_tramp_chain_on_stack_insns
))
2437 i386_stack_tramp_frame_sniffer (const struct frame_unwind
*self
,
2438 frame_info_ptr this_frame
,
2441 if (frame_relative_level (this_frame
) == 0)
2442 return i386_in_stack_tramp_p (get_frame_pc (this_frame
));
2447 static const struct frame_unwind i386_stack_tramp_frame_unwind
=
2451 i386_epilogue_frame_unwind_stop_reason
,
2452 i386_epilogue_frame_this_id
,
2453 i386_epilogue_frame_prev_register
,
2455 i386_stack_tramp_frame_sniffer
2458 /* Generate a bytecode expression to get the value of the saved PC. */
2461 i386_gen_return_address (struct gdbarch
*gdbarch
,
2462 struct agent_expr
*ax
, struct axs_value
*value
,
2465 /* The following sequence assumes the traditional use of the base
2467 ax_reg (ax
, I386_EBP_REGNUM
);
2469 ax_simple (ax
, aop_add
);
2470 value
->type
= register_type (gdbarch
, I386_EIP_REGNUM
);
2471 value
->kind
= axs_lvalue_memory
;
2475 /* Signal trampolines. */
2477 static struct i386_frame_cache
*
2478 i386_sigtramp_frame_cache (frame_info_ptr this_frame
, void **this_cache
)
2480 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
2481 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
2482 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2483 struct i386_frame_cache
*cache
;
2488 return (struct i386_frame_cache
*) *this_cache
;
2490 cache
= i386_alloc_frame_cache ();
2494 get_frame_register (this_frame
, I386_ESP_REGNUM
, buf
);
2495 cache
->base
= extract_unsigned_integer (buf
, 4, byte_order
) - 4;
2497 addr
= tdep
->sigcontext_addr (this_frame
);
2498 if (tdep
->sc_reg_offset
)
2502 gdb_assert (tdep
->sc_num_regs
<= I386_NUM_SAVED_REGS
);
2504 for (i
= 0; i
< tdep
->sc_num_regs
; i
++)
2505 if (tdep
->sc_reg_offset
[i
] != -1)
2506 cache
->saved_regs
[i
] = addr
+ tdep
->sc_reg_offset
[i
];
2510 cache
->saved_regs
[I386_EIP_REGNUM
] = addr
+ tdep
->sc_pc_offset
;
2511 cache
->saved_regs
[I386_ESP_REGNUM
] = addr
+ tdep
->sc_sp_offset
;
2516 catch (const gdb_exception_error
&ex
)
2518 if (ex
.error
!= NOT_AVAILABLE_ERROR
)
2522 *this_cache
= cache
;
2526 static enum unwind_stop_reason
2527 i386_sigtramp_frame_unwind_stop_reason (frame_info_ptr this_frame
,
2530 struct i386_frame_cache
*cache
=
2531 i386_sigtramp_frame_cache (this_frame
, this_cache
);
2534 return UNWIND_UNAVAILABLE
;
2536 return UNWIND_NO_REASON
;
2540 i386_sigtramp_frame_this_id (frame_info_ptr this_frame
, void **this_cache
,
2541 struct frame_id
*this_id
)
2543 struct i386_frame_cache
*cache
=
2544 i386_sigtramp_frame_cache (this_frame
, this_cache
);
2547 (*this_id
) = frame_id_build_unavailable_stack (get_frame_pc (this_frame
));
2550 /* See the end of i386_push_dummy_call. */
2551 (*this_id
) = frame_id_build (cache
->base
+ 8, get_frame_pc (this_frame
));
2555 static struct value
*
2556 i386_sigtramp_frame_prev_register (frame_info_ptr this_frame
,
2557 void **this_cache
, int regnum
)
2559 /* Make sure we've initialized the cache. */
2560 i386_sigtramp_frame_cache (this_frame
, this_cache
);
2562 return i386_frame_prev_register (this_frame
, this_cache
, regnum
);
2566 i386_sigtramp_frame_sniffer (const struct frame_unwind
*self
,
2567 frame_info_ptr this_frame
,
2568 void **this_prologue_cache
)
2570 gdbarch
*arch
= get_frame_arch (this_frame
);
2571 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (arch
);
2573 /* We shouldn't even bother if we don't have a sigcontext_addr
2575 if (tdep
->sigcontext_addr
== NULL
)
2578 if (tdep
->sigtramp_p
!= NULL
)
2580 if (tdep
->sigtramp_p (this_frame
))
2584 if (tdep
->sigtramp_start
!= 0)
2586 CORE_ADDR pc
= get_frame_pc (this_frame
);
2588 gdb_assert (tdep
->sigtramp_end
!= 0);
2589 if (pc
>= tdep
->sigtramp_start
&& pc
< tdep
->sigtramp_end
)
2596 static const struct frame_unwind i386_sigtramp_frame_unwind
=
2600 i386_sigtramp_frame_unwind_stop_reason
,
2601 i386_sigtramp_frame_this_id
,
2602 i386_sigtramp_frame_prev_register
,
2604 i386_sigtramp_frame_sniffer
2609 i386_frame_base_address (frame_info_ptr this_frame
, void **this_cache
)
2611 struct i386_frame_cache
*cache
= i386_frame_cache (this_frame
, this_cache
);
2616 static const struct frame_base i386_frame_base
=
2619 i386_frame_base_address
,
2620 i386_frame_base_address
,
2621 i386_frame_base_address
2624 static struct frame_id
2625 i386_dummy_id (struct gdbarch
*gdbarch
, frame_info_ptr this_frame
)
2629 fp
= get_frame_register_unsigned (this_frame
, I386_EBP_REGNUM
);
2631 /* See the end of i386_push_dummy_call. */
2632 return frame_id_build (fp
+ 8, get_frame_pc (this_frame
));
2635 /* _Decimal128 function return values need 16-byte alignment on the
2639 i386_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR sp
)
2641 return sp
& -(CORE_ADDR
)16;
2645 /* Figure out where the longjmp will land. Slurp the args out of the
2646 stack. We expect the first arg to be a pointer to the jmp_buf
2647 structure from which we extract the address that we will land at.
2648 This address is copied into PC. This routine returns non-zero on
2652 i386_get_longjmp_target (frame_info_ptr frame
, CORE_ADDR
*pc
)
2655 CORE_ADDR sp
, jb_addr
;
2656 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
2657 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2658 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
2659 int jb_pc_offset
= tdep
->jb_pc_offset
;
2661 /* If JB_PC_OFFSET is -1, we have no way to find out where the
2662 longjmp will land. */
2663 if (jb_pc_offset
== -1)
2666 get_frame_register (frame
, I386_ESP_REGNUM
, buf
);
2667 sp
= extract_unsigned_integer (buf
, 4, byte_order
);
2668 if (target_read_memory (sp
+ 4, buf
, 4))
2671 jb_addr
= extract_unsigned_integer (buf
, 4, byte_order
);
2672 if (target_read_memory (jb_addr
+ jb_pc_offset
, buf
, 4))
2675 *pc
= extract_unsigned_integer (buf
, 4, byte_order
);
2680 /* Check whether TYPE must be 16-byte-aligned when passed as a
2681 function argument. 16-byte vectors, _Decimal128 and structures or
2682 unions containing such types must be 16-byte-aligned; other
2683 arguments are 4-byte-aligned. */
2686 i386_16_byte_align_p (struct type
*type
)
2688 type
= check_typedef (type
);
2689 if ((type
->code () == TYPE_CODE_DECFLOAT
2690 || (type
->code () == TYPE_CODE_ARRAY
&& type
->is_vector ()))
2691 && type
->length () == 16)
2693 if (type
->code () == TYPE_CODE_ARRAY
)
2694 return i386_16_byte_align_p (type
->target_type ());
2695 if (type
->code () == TYPE_CODE_STRUCT
2696 || type
->code () == TYPE_CODE_UNION
)
2699 for (i
= 0; i
< type
->num_fields (); i
++)
2701 if (type
->field (i
).is_static ())
2703 if (i386_16_byte_align_p (type
->field (i
).type ()))
2710 /* Implementation for set_gdbarch_push_dummy_code. */
2713 i386_push_dummy_code (struct gdbarch
*gdbarch
, CORE_ADDR sp
, CORE_ADDR funaddr
,
2714 struct value
**args
, int nargs
, struct type
*value_type
,
2715 CORE_ADDR
*real_pc
, CORE_ADDR
*bp_addr
,
2716 struct regcache
*regcache
)
2718 /* Use 0xcc breakpoint - 1 byte. */
2722 /* Keep the stack aligned. */
2726 /* The "push_dummy_call" gdbarch method, optionally with the thiscall
2727 calling convention. */
2730 i386_thiscall_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
2731 struct regcache
*regcache
, CORE_ADDR bp_addr
,
2732 int nargs
, struct value
**args
, CORE_ADDR sp
,
2733 function_call_return_method return_method
,
2734 CORE_ADDR struct_addr
, bool thiscall
)
2736 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
2742 /* BND registers can be in arbitrary values at the moment of the
2743 inferior call. This can cause boundary violations that are not
2744 due to a real bug or even desired by the user. The best to be done
2745 is set the BND registers to allow access to the whole memory, INIT
2746 state, before pushing the inferior call. */
2747 i387_reset_bnd_regs (gdbarch
, regcache
);
2749 /* Determine the total space required for arguments and struct
2750 return address in a first pass (allowing for 16-byte-aligned
2751 arguments), then push arguments in a second pass. */
2753 for (write_pass
= 0; write_pass
< 2; write_pass
++)
2755 int args_space_used
= 0;
2757 if (return_method
== return_method_struct
)
2761 /* Push value address. */
2762 store_unsigned_integer (buf
, 4, byte_order
, struct_addr
);
2763 write_memory (sp
, buf
, 4);
2764 args_space_used
+= 4;
2770 for (i
= thiscall
? 1 : 0; i
< nargs
; i
++)
2772 int len
= args
[i
]->enclosing_type ()->length ();
2776 if (i386_16_byte_align_p (args
[i
]->enclosing_type ()))
2777 args_space_used
= align_up (args_space_used
, 16);
2779 write_memory (sp
+ args_space_used
,
2780 args
[i
]->contents_all ().data (), len
);
2781 /* The System V ABI says that:
2783 "An argument's size is increased, if necessary, to make it a
2784 multiple of [32-bit] words. This may require tail padding,
2785 depending on the size of the argument."
2787 This makes sure the stack stays word-aligned. */
2788 args_space_used
+= align_up (len
, 4);
2792 if (i386_16_byte_align_p (args
[i
]->enclosing_type ()))
2793 args_space
= align_up (args_space
, 16);
2794 args_space
+= align_up (len
, 4);
2802 /* The original System V ABI only requires word alignment,
2803 but modern incarnations need 16-byte alignment in order
2804 to support SSE. Since wasting a few bytes here isn't
2805 harmful we unconditionally enforce 16-byte alignment. */
2810 /* Store return address. */
2812 store_unsigned_integer (buf
, 4, byte_order
, bp_addr
);
2813 write_memory (sp
, buf
, 4);
2815 /* Finally, update the stack pointer... */
2816 store_unsigned_integer (buf
, 4, byte_order
, sp
);
2817 regcache
->cooked_write (I386_ESP_REGNUM
, buf
);
2819 /* ...and fake a frame pointer. */
2820 regcache
->cooked_write (I386_EBP_REGNUM
, buf
);
2822 /* The 'this' pointer needs to be in ECX. */
2824 regcache
->cooked_write (I386_ECX_REGNUM
,
2825 args
[0]->contents_all ().data ());
2827 /* If the PLT is position-independent, the SYSTEM V ABI requires %ebx to be
2828 set to the address of the GOT when doing a call to a PLT address.
2829 Note that we do not try to determine whether the PLT is
2830 position-independent, we just set the register regardless. */
2831 CORE_ADDR func_addr
= find_function_addr (function
, nullptr, nullptr);
2832 if (in_plt_section (func_addr
))
2834 struct objfile
*objf
= nullptr;
2835 asection
*asect
= nullptr;
2836 obj_section
*osect
= nullptr;
2838 /* Get object file containing func_addr. */
2839 obj_section
*func_section
= find_pc_section (func_addr
);
2840 if (func_section
!= nullptr)
2841 objf
= func_section
->objfile
;
2843 if (objf
!= nullptr)
2845 /* Get corresponding .got.plt or .got section. */
2846 asect
= bfd_get_section_by_name (objf
->obfd
.get (), ".got.plt");
2847 if (asect
== nullptr)
2848 asect
= bfd_get_section_by_name (objf
->obfd
.get (), ".got");
2851 if (asect
!= nullptr)
2852 /* Translate asection to obj_section. */
2853 osect
= maint_obj_section_from_bfd_section (objf
->obfd
.get (),
2856 if (osect
!= nullptr)
2858 /* Store the section address in %ebx. */
2859 store_unsigned_integer (buf
, 4, byte_order
, osect
->addr ());
2860 regcache
->cooked_write (I386_EBX_REGNUM
, buf
);
2864 /* If we would only do this for a position-independent PLT, it would
2865 make sense to issue a warning here. */
2869 /* MarkK wrote: This "+ 8" is all over the place:
2870 (i386_frame_this_id, i386_sigtramp_frame_this_id,
2871 i386_dummy_id). It's there, since all frame unwinders for
2872 a given target have to agree (within a certain margin) on the
2873 definition of the stack address of a frame. Otherwise frame id
2874 comparison might not work correctly. Since DWARF2/GCC uses the
2875 stack address *before* the function call as a frame's CFA. On
2876 the i386, when %ebp is used as a frame pointer, the offset
2877 between the contents %ebp and the CFA as defined by GCC. */
2881 /* Implement the "push_dummy_call" gdbarch method. */
2884 i386_push_dummy_call (struct gdbarch
*gdbarch
, struct value
*function
,
2885 struct regcache
*regcache
, CORE_ADDR bp_addr
, int nargs
,
2886 struct value
**args
, CORE_ADDR sp
,
2887 function_call_return_method return_method
,
2888 CORE_ADDR struct_addr
)
2890 return i386_thiscall_push_dummy_call (gdbarch
, function
, regcache
, bp_addr
,
2891 nargs
, args
, sp
, return_method
,
2892 struct_addr
, false);
2895 /* These registers are used for returning integers (and on some
2896 targets also for returning `struct' and `union' values when their
2897 size and alignment match an integer type). */
2898 #define LOW_RETURN_REGNUM I386_EAX_REGNUM /* %eax */
2899 #define HIGH_RETURN_REGNUM I386_EDX_REGNUM /* %edx */
2901 /* Read, for architecture GDBARCH, a function return value of TYPE
2902 from REGCACHE, and copy that into VALBUF. */
2905 i386_extract_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
2906 struct regcache
*regcache
, gdb_byte
*valbuf
)
2908 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
2909 int len
= type
->length ();
2910 gdb_byte buf
[I386_MAX_REGISTER_SIZE
];
2912 /* _Float16 and _Float16 _Complex values are returned via xmm0. */
2913 if (((type
->code () == TYPE_CODE_FLT
) && len
== 2)
2914 || ((type
->code () == TYPE_CODE_COMPLEX
) && len
== 4))
2916 regcache
->raw_read (I387_XMM0_REGNUM (tdep
), valbuf
);
2919 else if (type
->code () == TYPE_CODE_FLT
)
2921 if (tdep
->st0_regnum
< 0)
2923 warning (_("Cannot find floating-point return value."));
2924 memset (valbuf
, 0, len
);
2928 /* Floating-point return values can be found in %st(0). Convert
2929 its contents to the desired type. This is probably not
2930 exactly how it would happen on the target itself, but it is
2931 the best we can do. */
2932 regcache
->raw_read (I386_ST0_REGNUM
, buf
);
2933 target_float_convert (buf
, i387_ext_type (gdbarch
), valbuf
, type
);
2937 int low_size
= register_size (gdbarch
, LOW_RETURN_REGNUM
);
2938 int high_size
= register_size (gdbarch
, HIGH_RETURN_REGNUM
);
2940 if (len
<= low_size
)
2942 regcache
->raw_read (LOW_RETURN_REGNUM
, buf
);
2943 memcpy (valbuf
, buf
, len
);
2945 else if (len
<= (low_size
+ high_size
))
2947 regcache
->raw_read (LOW_RETURN_REGNUM
, buf
);
2948 memcpy (valbuf
, buf
, low_size
);
2949 regcache
->raw_read (HIGH_RETURN_REGNUM
, buf
);
2950 memcpy (valbuf
+ low_size
, buf
, len
- low_size
);
2953 internal_error (_("Cannot extract return value of %d bytes long."),
2958 /* Write, for architecture GDBARCH, a function return value of TYPE
2959 from VALBUF into REGCACHE. */
2962 i386_store_return_value (struct gdbarch
*gdbarch
, struct type
*type
,
2963 struct regcache
*regcache
, const gdb_byte
*valbuf
)
2965 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
2966 int len
= type
->length ();
2968 if (type
->code () == TYPE_CODE_FLT
)
2971 gdb_byte buf
[I386_MAX_REGISTER_SIZE
];
2973 if (tdep
->st0_regnum
< 0)
2975 warning (_("Cannot set floating-point return value."));
2979 /* Returning floating-point values is a bit tricky. Apart from
2980 storing the return value in %st(0), we have to simulate the
2981 state of the FPU at function return point. */
2983 /* Convert the value found in VALBUF to the extended
2984 floating-point format used by the FPU. This is probably
2985 not exactly how it would happen on the target itself, but
2986 it is the best we can do. */
2987 target_float_convert (valbuf
, type
, buf
, i387_ext_type (gdbarch
));
2988 regcache
->raw_write (I386_ST0_REGNUM
, buf
);
2990 /* Set the top of the floating-point register stack to 7. The
2991 actual value doesn't really matter, but 7 is what a normal
2992 function return would end up with if the program started out
2993 with a freshly initialized FPU. */
2994 regcache_raw_read_unsigned (regcache
, I387_FSTAT_REGNUM (tdep
), &fstat
);
2996 regcache_raw_write_unsigned (regcache
, I387_FSTAT_REGNUM (tdep
), fstat
);
2998 /* Mark %st(1) through %st(7) as empty. Since we set the top of
2999 the floating-point register stack to 7, the appropriate value
3000 for the tag word is 0x3fff. */
3001 regcache_raw_write_unsigned (regcache
, I387_FTAG_REGNUM (tdep
), 0x3fff);
3005 int low_size
= register_size (gdbarch
, LOW_RETURN_REGNUM
);
3006 int high_size
= register_size (gdbarch
, HIGH_RETURN_REGNUM
);
3008 if (len
<= low_size
)
3009 regcache
->raw_write_part (LOW_RETURN_REGNUM
, 0, len
, valbuf
);
3010 else if (len
<= (low_size
+ high_size
))
3012 regcache
->raw_write (LOW_RETURN_REGNUM
, valbuf
);
3013 regcache
->raw_write_part (HIGH_RETURN_REGNUM
, 0, len
- low_size
,
3017 internal_error (_("Cannot store return value of %d bytes long."), len
);
3022 /* This is the variable that is set with "set struct-convention", and
3023 its legitimate values. */
3024 static const char default_struct_convention
[] = "default";
3025 static const char pcc_struct_convention
[] = "pcc";
3026 static const char reg_struct_convention
[] = "reg";
3027 static const char *const valid_conventions
[] =
3029 default_struct_convention
,
3030 pcc_struct_convention
,
3031 reg_struct_convention
,
3034 static const char *struct_convention
= default_struct_convention
;
3036 /* Return non-zero if TYPE, which is assumed to be a structure,
3037 a union type, or an array type, should be returned in registers
3038 for architecture GDBARCH. */
3041 i386_reg_struct_return_p (struct gdbarch
*gdbarch
, struct type
*type
)
3043 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
3044 enum type_code code
= type
->code ();
3045 int len
= type
->length ();
3047 gdb_assert (code
== TYPE_CODE_STRUCT
3048 || code
== TYPE_CODE_UNION
3049 || code
== TYPE_CODE_ARRAY
);
3051 if (struct_convention
== pcc_struct_convention
3052 || (struct_convention
== default_struct_convention
3053 && tdep
->struct_return
== pcc_struct_return
)
3054 || TYPE_HAS_DYNAMIC_LENGTH (type
))
3057 /* Structures consisting of a single `float', `double' or 'long
3058 double' member are returned in %st(0). */
3059 if (code
== TYPE_CODE_STRUCT
&& type
->num_fields () == 1)
3061 type
= check_typedef (type
->field (0).type ());
3062 if (type
->code () == TYPE_CODE_FLT
)
3063 return (len
== 4 || len
== 8 || len
== 12);
3066 return (len
== 1 || len
== 2 || len
== 4 || len
== 8);
3069 /* Determine, for architecture GDBARCH, how a return value of TYPE
3070 should be returned. If it is supposed to be returned in registers,
3071 and READBUF is non-zero, read the appropriate value from REGCACHE,
3072 and copy it into READBUF. If WRITEBUF is non-zero, write the value
3073 from WRITEBUF into REGCACHE. */
3075 static enum return_value_convention
3076 i386_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
3077 struct type
*type
, struct regcache
*regcache
,
3078 struct value
**read_value
, const gdb_byte
*writebuf
)
3080 enum type_code code
= type
->code ();
3082 if (((code
== TYPE_CODE_STRUCT
3083 || code
== TYPE_CODE_UNION
3084 || code
== TYPE_CODE_ARRAY
)
3085 && !i386_reg_struct_return_p (gdbarch
, type
))
3086 /* Complex double and long double uses the struct return convention. */
3087 || (code
== TYPE_CODE_COMPLEX
&& type
->length () == 16)
3088 || (code
== TYPE_CODE_COMPLEX
&& type
->length () == 24)
3089 /* 128-bit decimal float uses the struct return convention. */
3090 || (code
== TYPE_CODE_DECFLOAT
&& type
->length () == 16))
3092 /* The System V ABI says that:
3094 "A function that returns a structure or union also sets %eax
3095 to the value of the original address of the caller's area
3096 before it returns. Thus when the caller receives control
3097 again, the address of the returned object resides in register
3098 %eax and can be used to access the object."
3100 So the ABI guarantees that we can always find the return
3101 value just after the function has returned. */
3103 /* Note that the ABI doesn't mention functions returning arrays,
3104 which is something possible in certain languages such as Ada.
3105 In this case, the value is returned as if it was wrapped in
3106 a record, so the convention applied to records also applies
3109 if (read_value
!= nullptr)
3113 regcache_raw_read_unsigned (regcache
, I386_EAX_REGNUM
, &addr
);
3114 *read_value
= value_at_non_lval (type
, addr
);
3117 return RETURN_VALUE_ABI_RETURNS_ADDRESS
;
3120 /* This special case is for structures consisting of a single
3121 `float', `double' or 'long double' member. These structures are
3122 returned in %st(0). For these structures, we call ourselves
3123 recursively, changing TYPE into the type of the first member of
3124 the structure. Since that should work for all structures that
3125 have only one member, we don't bother to check the member's type
3127 if (code
== TYPE_CODE_STRUCT
&& type
->num_fields () == 1)
3129 struct type
*inner_type
= check_typedef (type
->field (0).type ());
3130 enum return_value_convention result
3131 = i386_return_value (gdbarch
, function
, inner_type
, regcache
,
3132 read_value
, writebuf
);
3133 if (read_value
!= nullptr)
3134 (*read_value
)->deprecated_set_type (type
);
3138 if (read_value
!= nullptr)
3140 *read_value
= value::allocate (type
);
3141 i386_extract_return_value (gdbarch
, type
, regcache
,
3142 (*read_value
)->contents_raw ().data ());
3145 i386_store_return_value (gdbarch
, type
, regcache
, writebuf
);
3147 return RETURN_VALUE_REGISTER_CONVENTION
;
3152 i387_ext_type (struct gdbarch
*gdbarch
)
3154 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
3156 if (!tdep
->i387_ext_type
)
3158 tdep
->i387_ext_type
= tdesc_find_type (gdbarch
, "i387_ext");
3159 gdb_assert (tdep
->i387_ext_type
!= NULL
);
3162 return tdep
->i387_ext_type
;
3165 /* Construct type for pseudo BND registers. We can't use
3166 tdesc_find_type since a complement of one value has to be used
3167 to describe the upper bound. */
3169 static struct type
*
3170 i386_bnd_type (struct gdbarch
*gdbarch
)
3172 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
3175 if (!tdep
->i386_bnd_type
)
3178 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3180 /* The type we're building is described bellow: */
3185 void *ubound
; /* One complement of raw ubound field. */
3189 t
= arch_composite_type (gdbarch
,
3190 "__gdb_builtin_type_bound128", TYPE_CODE_STRUCT
);
3192 append_composite_type_field (t
, "lbound", bt
->builtin_data_ptr
);
3193 append_composite_type_field (t
, "ubound", bt
->builtin_data_ptr
);
3195 t
->set_name ("builtin_type_bound128");
3196 tdep
->i386_bnd_type
= t
;
3199 return tdep
->i386_bnd_type
;
3202 /* Construct vector type for pseudo ZMM registers. We can't use
3203 tdesc_find_type since ZMM isn't described in target description. */
3205 static struct type
*
3206 i386_zmm_type (struct gdbarch
*gdbarch
)
3208 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
3210 if (!tdep
->i386_zmm_type
)
3212 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3214 /* The type we're building is this: */
3216 union __gdb_builtin_type_vec512i
3218 int128_t v4_int128
[4];
3219 int64_t v8_int64
[8];
3220 int32_t v16_int32
[16];
3221 int16_t v32_int16
[32];
3222 int8_t v64_int8
[64];
3223 double v8_double
[8];
3224 float v16_float
[16];
3225 float16_t v32_half
[32];
3226 bfloat16_t v32_bfloat16
[32];
3232 t
= arch_composite_type (gdbarch
,
3233 "__gdb_builtin_type_vec512i", TYPE_CODE_UNION
);
3234 append_composite_type_field (t
, "v32_bfloat16",
3235 init_vector_type (bt
->builtin_bfloat16
, 32));
3236 append_composite_type_field (t
, "v32_half",
3237 init_vector_type (bt
->builtin_half
, 32));
3238 append_composite_type_field (t
, "v16_float",
3239 init_vector_type (bt
->builtin_float
, 16));
3240 append_composite_type_field (t
, "v8_double",
3241 init_vector_type (bt
->builtin_double
, 8));
3242 append_composite_type_field (t
, "v64_int8",
3243 init_vector_type (bt
->builtin_int8
, 64));
3244 append_composite_type_field (t
, "v32_int16",
3245 init_vector_type (bt
->builtin_int16
, 32));
3246 append_composite_type_field (t
, "v16_int32",
3247 init_vector_type (bt
->builtin_int32
, 16));
3248 append_composite_type_field (t
, "v8_int64",
3249 init_vector_type (bt
->builtin_int64
, 8));
3250 append_composite_type_field (t
, "v4_int128",
3251 init_vector_type (bt
->builtin_int128
, 4));
3253 t
->set_is_vector (true);
3254 t
->set_name ("builtin_type_vec512i");
3255 tdep
->i386_zmm_type
= t
;
3258 return tdep
->i386_zmm_type
;
3261 /* Construct vector type for pseudo YMM registers. We can't use
3262 tdesc_find_type since YMM isn't described in target description. */
3264 static struct type
*
3265 i386_ymm_type (struct gdbarch
*gdbarch
)
3267 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
3269 if (!tdep
->i386_ymm_type
)
3271 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3273 /* The type we're building is this: */
3275 union __gdb_builtin_type_vec256i
3277 int128_t v2_int128
[2];
3278 int64_t v4_int64
[4];
3279 int32_t v8_int32
[8];
3280 int16_t v16_int16
[16];
3281 int8_t v32_int8
[32];
3282 double v4_double
[4];
3284 float16_t v16_half
[16];
3285 bfloat16_t v16_bfloat16
[16];
3291 t
= arch_composite_type (gdbarch
,
3292 "__gdb_builtin_type_vec256i", TYPE_CODE_UNION
);
3293 append_composite_type_field (t
, "v16_bfloat16",
3294 init_vector_type (bt
->builtin_bfloat16
, 16));
3295 append_composite_type_field (t
, "v16_half",
3296 init_vector_type (bt
->builtin_half
, 16));
3297 append_composite_type_field (t
, "v8_float",
3298 init_vector_type (bt
->builtin_float
, 8));
3299 append_composite_type_field (t
, "v4_double",
3300 init_vector_type (bt
->builtin_double
, 4));
3301 append_composite_type_field (t
, "v32_int8",
3302 init_vector_type (bt
->builtin_int8
, 32));
3303 append_composite_type_field (t
, "v16_int16",
3304 init_vector_type (bt
->builtin_int16
, 16));
3305 append_composite_type_field (t
, "v8_int32",
3306 init_vector_type (bt
->builtin_int32
, 8));
3307 append_composite_type_field (t
, "v4_int64",
3308 init_vector_type (bt
->builtin_int64
, 4));
3309 append_composite_type_field (t
, "v2_int128",
3310 init_vector_type (bt
->builtin_int128
, 2));
3312 t
->set_is_vector (true);
3313 t
->set_name ("builtin_type_vec256i");
3314 tdep
->i386_ymm_type
= t
;
3317 return tdep
->i386_ymm_type
;
3320 /* Construct vector type for MMX registers. */
3321 static struct type
*
3322 i386_mmx_type (struct gdbarch
*gdbarch
)
3324 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
3326 if (!tdep
->i386_mmx_type
)
3328 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3330 /* The type we're building is this: */
3332 union __gdb_builtin_type_vec64i
3335 int32_t v2_int32
[2];
3336 int16_t v4_int16
[4];
3343 t
= arch_composite_type (gdbarch
,
3344 "__gdb_builtin_type_vec64i", TYPE_CODE_UNION
);
3346 append_composite_type_field (t
, "uint64", bt
->builtin_int64
);
3347 append_composite_type_field (t
, "v2_int32",
3348 init_vector_type (bt
->builtin_int32
, 2));
3349 append_composite_type_field (t
, "v4_int16",
3350 init_vector_type (bt
->builtin_int16
, 4));
3351 append_composite_type_field (t
, "v8_int8",
3352 init_vector_type (bt
->builtin_int8
, 8));
3354 t
->set_is_vector (true);
3355 t
->set_name ("builtin_type_vec64i");
3356 tdep
->i386_mmx_type
= t
;
3359 return tdep
->i386_mmx_type
;
3362 /* Return the GDB type object for the "standard" data type of data in
3366 i386_pseudo_register_type (struct gdbarch
*gdbarch
, int regnum
)
3368 if (i386_bnd_regnum_p (gdbarch
, regnum
))
3369 return i386_bnd_type (gdbarch
);
3370 if (i386_mmx_regnum_p (gdbarch
, regnum
))
3371 return i386_mmx_type (gdbarch
);
3372 else if (i386_ymm_regnum_p (gdbarch
, regnum
))
3373 return i386_ymm_type (gdbarch
);
3374 else if (i386_ymm_avx512_regnum_p (gdbarch
, regnum
))
3375 return i386_ymm_type (gdbarch
);
3376 else if (i386_zmm_regnum_p (gdbarch
, regnum
))
3377 return i386_zmm_type (gdbarch
);
3380 const struct builtin_type
*bt
= builtin_type (gdbarch
);
3381 if (i386_byte_regnum_p (gdbarch
, regnum
))
3382 return bt
->builtin_int8
;
3383 else if (i386_word_regnum_p (gdbarch
, regnum
))
3384 return bt
->builtin_int16
;
3385 else if (i386_dword_regnum_p (gdbarch
, regnum
))
3386 return bt
->builtin_int32
;
3387 else if (i386_k_regnum_p (gdbarch
, regnum
))
3388 return bt
->builtin_int64
;
3391 internal_error (_("invalid regnum"));
3394 /* Map a cooked register onto a raw register or memory. For the i386,
3395 the MMX registers need to be mapped onto floating point registers. */
3398 i386_mmx_regnum_to_fp_regnum (frame_info_ptr next_frame
, int regnum
)
3400 gdbarch
*arch
= frame_unwind_arch (next_frame
);
3401 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (arch
);
3403 = frame_unwind_register_unsigned (next_frame
, I387_FSTAT_REGNUM (tdep
));
3404 int tos
= (fstat
>> 11) & 0x7;
3405 int mmxreg
= regnum
- tdep
->mm0_regnum
;
3406 int fpreg
= (mmxreg
+ tos
) % 8;
3408 return (I387_ST0_REGNUM (tdep
) + fpreg
);
3411 /* A helper function for us by i386_pseudo_register_read_value and
3412 amd64_pseudo_register_read_value. It does all the work but reads
3413 the data into an already-allocated value. */
3416 i386_pseudo_register_read_value (gdbarch
*gdbarch
, frame_info_ptr next_frame
,
3417 const int pseudo_reg_num
)
3419 if (i386_mmx_regnum_p (gdbarch
, pseudo_reg_num
))
3421 int fpnum
= i386_mmx_regnum_to_fp_regnum (next_frame
, pseudo_reg_num
);
3423 /* Extract (always little endian). */
3424 return pseudo_from_raw_part (next_frame
, pseudo_reg_num
, fpnum
, 0);
3428 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
3429 if (i386_bnd_regnum_p (gdbarch
, pseudo_reg_num
))
3431 int i
= pseudo_reg_num
- tdep
->bnd0_regnum
;
3433 /* Extract (always little endian). Read lower 128bits. */
3435 = value_of_register (I387_BND0R_REGNUM (tdep
) + i
, next_frame
);
3436 int size
= builtin_type (gdbarch
)->builtin_data_ptr
->length ();
3438 = value::allocate_register (next_frame
, pseudo_reg_num
);
3440 /* Copy the lower. */
3441 bndr_value
->contents_copy (result
, 0, 0, size
);
3443 /* Copy the upper. */
3444 bndr_value
->contents_copy (result
, size
, 8, size
);
3446 /* If upper bytes are available, compute ones' complement. */
3447 if (result
->bytes_available (size
, size
))
3449 bfd_endian byte_order
3450 = gdbarch_byte_order (frame_unwind_arch (next_frame
));
3451 gdb::array_view
<gdb_byte
> upper_bytes
3452 = result
->contents_raw ().slice (size
, size
);
3454 = extract_unsigned_integer (upper_bytes
, byte_order
);
3456 store_unsigned_integer (upper_bytes
, byte_order
, upper
);
3461 else if (i386_zmm_regnum_p (gdbarch
, pseudo_reg_num
))
3463 /* Which register is it, relative to zmm0. */
3464 int i_0
= pseudo_reg_num
- tdep
->zmm0_regnum
;
3466 if (i_0
< num_lower_zmm_regs
)
3467 return pseudo_from_concat_raw (next_frame
, pseudo_reg_num
,
3468 I387_XMM0_REGNUM (tdep
) + i_0
,
3469 tdep
->ymm0h_regnum
+ i_0
,
3470 tdep
->zmm0h_regnum
+ i_0
);
3473 /* Which register is it, relative to zmm16. */
3474 int i_16
= i_0
- num_lower_zmm_regs
;
3476 return pseudo_from_concat_raw (next_frame
, pseudo_reg_num
,
3477 I387_XMM16_REGNUM (tdep
) + i_16
,
3478 I387_YMM16H_REGNUM (tdep
) + i_16
,
3479 tdep
->zmm0h_regnum
+ i_0
);
3482 else if (i386_ymm_regnum_p (gdbarch
, pseudo_reg_num
))
3484 int i
= pseudo_reg_num
- tdep
->ymm0_regnum
;
3486 return pseudo_from_concat_raw (next_frame
, pseudo_reg_num
,
3487 I387_XMM0_REGNUM (tdep
) + i
,
3488 tdep
->ymm0h_regnum
+ i
);
3490 else if (i386_ymm_avx512_regnum_p (gdbarch
, pseudo_reg_num
))
3492 int i
= pseudo_reg_num
- tdep
->ymm16_regnum
;
3494 return pseudo_from_concat_raw (next_frame
, pseudo_reg_num
,
3495 I387_XMM16_REGNUM (tdep
) + i
,
3496 tdep
->ymm16h_regnum
+ i
);
3498 else if (i386_word_regnum_p (gdbarch
, pseudo_reg_num
))
3500 int gpnum
= pseudo_reg_num
- tdep
->ax_regnum
;
3502 /* Extract (always little endian). */
3503 return pseudo_from_raw_part (next_frame
, pseudo_reg_num
, gpnum
, 0);
3505 else if (i386_byte_regnum_p (gdbarch
, pseudo_reg_num
))
3507 int gpnum
= pseudo_reg_num
- tdep
->al_regnum
;
3509 /* Extract (always little endian). We read both lower and
3511 return pseudo_from_raw_part (next_frame
, pseudo_reg_num
, gpnum
% 4,
3512 gpnum
>= 4 ? 1 : 0);
3515 internal_error (_("invalid regnum"));
3520 i386_pseudo_register_write (gdbarch
*gdbarch
, frame_info_ptr next_frame
,
3521 const int pseudo_reg_num
,
3522 gdb::array_view
<const gdb_byte
> buf
)
3524 if (i386_mmx_regnum_p (gdbarch
, pseudo_reg_num
))
3526 int fpnum
= i386_mmx_regnum_to_fp_regnum (next_frame
, pseudo_reg_num
);
3528 pseudo_to_raw_part (next_frame
, buf
, fpnum
, 0);
3532 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
3534 if (i386_bnd_regnum_p (gdbarch
, pseudo_reg_num
))
3536 int size
= builtin_type (gdbarch
)->builtin_data_ptr
->length ();
3537 bfd_endian byte_order
3538 = gdbarch_byte_order (current_inferior ()->arch ());
3540 /* New values from input value. */
3541 int reg_index
= pseudo_reg_num
- tdep
->bnd0_regnum
;
3542 int raw_regnum
= I387_BND0R_REGNUM (tdep
) + reg_index
;
3544 value
*bndr_value
= value_of_register (raw_regnum
, next_frame
);
3545 gdb::array_view
<gdb_byte
> bndr_view
3546 = bndr_value
->contents_writeable ();
3548 /* Copy lower bytes directly. */
3549 copy (buf
.slice (0, size
), bndr_view
.slice (0, size
));
3551 /* Convert and then copy upper bytes. */
3553 = extract_unsigned_integer (buf
.slice (size
, size
), byte_order
);
3555 store_unsigned_integer (bndr_view
.slice (8, size
), byte_order
,
3558 put_frame_register (next_frame
, raw_regnum
, bndr_view
);
3560 else if (i386_zmm_regnum_p (gdbarch
, pseudo_reg_num
))
3562 /* Which register is it, relative to zmm0. */
3563 int reg_index_0
= pseudo_reg_num
- tdep
->zmm0_regnum
;
3565 if (reg_index_0
< num_lower_zmm_regs
)
3566 pseudo_to_concat_raw (next_frame
, buf
,
3567 I387_XMM0_REGNUM (tdep
) + reg_index_0
,
3568 I387_YMM0_REGNUM (tdep
) + reg_index_0
,
3569 tdep
->zmm0h_regnum
+ reg_index_0
);
3572 /* Which register is it, relative to zmm16. */
3573 int reg_index_16
= reg_index_0
- num_lower_zmm_regs
;
3575 pseudo_to_concat_raw (next_frame
, buf
,
3576 I387_XMM16_REGNUM (tdep
) + reg_index_16
,
3577 I387_YMM16H_REGNUM (tdep
) + reg_index_16
,
3578 tdep
->zmm0h_regnum
+ +reg_index_0
);
3581 else if (i386_ymm_regnum_p (gdbarch
, pseudo_reg_num
))
3583 int i
= pseudo_reg_num
- tdep
->ymm0_regnum
;
3585 pseudo_to_concat_raw (next_frame
, buf
, I387_XMM0_REGNUM (tdep
) + i
,
3586 tdep
->ymm0h_regnum
+ i
);
3588 else if (i386_ymm_avx512_regnum_p (gdbarch
, pseudo_reg_num
))
3590 int i
= pseudo_reg_num
- tdep
->ymm16_regnum
;
3592 pseudo_to_concat_raw (next_frame
, buf
, I387_XMM16_REGNUM (tdep
) + i
,
3593 tdep
->ymm16h_regnum
+ i
);
3595 else if (i386_word_regnum_p (gdbarch
, pseudo_reg_num
))
3597 int gpnum
= pseudo_reg_num
- tdep
->ax_regnum
;
3599 pseudo_to_raw_part (next_frame
, buf
, gpnum
, 0);
3601 else if (i386_byte_regnum_p (gdbarch
, pseudo_reg_num
))
3603 int gpnum
= pseudo_reg_num
- tdep
->al_regnum
;
3605 pseudo_to_raw_part (next_frame
, buf
, gpnum
% 4, gpnum
>= 4 ? 1 : 0);
3608 internal_error (_("invalid regnum"));
3612 /* Implement the 'ax_pseudo_register_collect' gdbarch method. */
3615 i386_ax_pseudo_register_collect (struct gdbarch
*gdbarch
,
3616 struct agent_expr
*ax
, int regnum
)
3618 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
3620 if (i386_mmx_regnum_p (gdbarch
, regnum
))
3622 /* MMX to FPU register mapping depends on current TOS. Let's just
3623 not care and collect everything... */
3626 ax_reg_mask (ax
, I387_FSTAT_REGNUM (tdep
));
3627 for (i
= 0; i
< 8; i
++)
3628 ax_reg_mask (ax
, I387_ST0_REGNUM (tdep
) + i
);
3631 else if (i386_bnd_regnum_p (gdbarch
, regnum
))
3633 regnum
-= tdep
->bnd0_regnum
;
3634 ax_reg_mask (ax
, I387_BND0R_REGNUM (tdep
) + regnum
);
3637 else if (i386_zmm_regnum_p (gdbarch
, regnum
))
3639 regnum
-= tdep
->zmm0_regnum
;
3640 if (regnum
< num_lower_zmm_regs
)
3642 ax_reg_mask (ax
, I387_XMM0_REGNUM (tdep
) + regnum
);
3643 ax_reg_mask (ax
, tdep
->ymm0h_regnum
+ regnum
);
3647 ax_reg_mask (ax
, I387_XMM16_REGNUM (tdep
) + regnum
3648 - num_lower_zmm_regs
);
3649 ax_reg_mask (ax
, I387_YMM16H_REGNUM (tdep
) + regnum
3650 - num_lower_zmm_regs
);
3652 ax_reg_mask (ax
, tdep
->zmm0h_regnum
+ regnum
);
3655 else if (i386_ymm_regnum_p (gdbarch
, regnum
))
3657 regnum
-= tdep
->ymm0_regnum
;
3658 ax_reg_mask (ax
, I387_XMM0_REGNUM (tdep
) + regnum
);
3659 ax_reg_mask (ax
, tdep
->ymm0h_regnum
+ regnum
);
3662 else if (i386_ymm_avx512_regnum_p (gdbarch
, regnum
))
3664 regnum
-= tdep
->ymm16_regnum
;
3665 ax_reg_mask (ax
, I387_XMM16_REGNUM (tdep
) + regnum
);
3666 ax_reg_mask (ax
, tdep
->ymm16h_regnum
+ regnum
);
3669 else if (i386_word_regnum_p (gdbarch
, regnum
))
3671 int gpnum
= regnum
- tdep
->ax_regnum
;
3673 ax_reg_mask (ax
, gpnum
);
3676 else if (i386_byte_regnum_p (gdbarch
, regnum
))
3678 int gpnum
= regnum
- tdep
->al_regnum
;
3680 ax_reg_mask (ax
, gpnum
% 4);
3684 internal_error (_("invalid regnum"));
3689 /* Return the register number of the register allocated by GCC after
3690 REGNUM, or -1 if there is no such register. */
3693 i386_next_regnum (int regnum
)
3695 /* GCC allocates the registers in the order:
3697 %eax, %edx, %ecx, %ebx, %esi, %edi, %ebp, %esp, ...
3699 Since storing a variable in %esp doesn't make any sense we return
3700 -1 for %ebp and for %esp itself. */
3701 static int next_regnum
[] =
3703 I386_EDX_REGNUM
, /* Slot for %eax. */
3704 I386_EBX_REGNUM
, /* Slot for %ecx. */
3705 I386_ECX_REGNUM
, /* Slot for %edx. */
3706 I386_ESI_REGNUM
, /* Slot for %ebx. */
3707 -1, -1, /* Slots for %esp and %ebp. */
3708 I386_EDI_REGNUM
, /* Slot for %esi. */
3709 I386_EBP_REGNUM
/* Slot for %edi. */
3712 if (regnum
>= 0 && regnum
< sizeof (next_regnum
) / sizeof (next_regnum
[0]))
3713 return next_regnum
[regnum
];
3718 /* Return nonzero if a value of type TYPE stored in register REGNUM
3719 needs any special handling. */
3722 i386_convert_register_p (struct gdbarch
*gdbarch
,
3723 int regnum
, struct type
*type
)
3725 int len
= type
->length ();
3727 /* Values may be spread across multiple registers. Most debugging
3728 formats aren't expressive enough to specify the locations, so
3729 some heuristics is involved. Right now we only handle types that
3730 have a length that is a multiple of the word size, since GCC
3731 doesn't seem to put any other types into registers. */
3732 if (len
> 4 && len
% 4 == 0)
3734 int last_regnum
= regnum
;
3738 last_regnum
= i386_next_regnum (last_regnum
);
3742 if (last_regnum
!= -1)
3746 return i387_convert_register_p (gdbarch
, regnum
, type
);
3749 /* Read a value of type TYPE from register REGNUM in frame FRAME, and
3750 return its contents in TO. */
3753 i386_register_to_value (frame_info_ptr frame
, int regnum
,
3754 struct type
*type
, gdb_byte
*to
,
3755 int *optimizedp
, int *unavailablep
)
3757 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
3758 int len
= type
->length ();
3760 if (i386_fp_regnum_p (gdbarch
, regnum
))
3761 return i387_register_to_value (frame
, regnum
, type
, to
,
3762 optimizedp
, unavailablep
);
3764 /* Read a value spread across multiple registers. */
3766 gdb_assert (len
> 4 && len
% 4 == 0);
3770 gdb_assert (regnum
!= -1);
3771 gdb_assert (register_size (gdbarch
, regnum
) == 4);
3774 = gdb::make_array_view (to
, register_size (gdbarch
, regnum
));
3775 frame_info_ptr next_frame
= get_next_frame_sentinel_okay (frame
);
3776 if (!get_frame_register_bytes (next_frame
, regnum
, 0, to_view
,
3777 optimizedp
, unavailablep
))
3780 regnum
= i386_next_regnum (regnum
);
3785 *optimizedp
= *unavailablep
= 0;
3789 /* Write the contents FROM of a value of type TYPE into register
3790 REGNUM in frame FRAME. */
3793 i386_value_to_register (frame_info_ptr frame
, int regnum
,
3794 struct type
*type
, const gdb_byte
*from
)
3796 int len
= type
->length ();
3798 if (i386_fp_regnum_p (get_frame_arch (frame
), regnum
))
3800 i387_value_to_register (frame
, regnum
, type
, from
);
3804 /* Write a value spread across multiple registers. */
3806 gdb_assert (len
> 4 && len
% 4 == 0);
3810 gdb_assert (regnum
!= -1);
3811 gdb_assert (register_size (get_frame_arch (frame
), regnum
) == 4);
3813 auto from_view
= gdb::make_array_view (from
, 4);
3814 put_frame_register (get_next_frame_sentinel_okay (frame
), regnum
,
3816 regnum
= i386_next_regnum (regnum
);
3822 /* Supply register REGNUM from the buffer specified by GREGS and LEN
3823 in the general-purpose register set REGSET to register cache
3824 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
3827 i386_supply_gregset (const struct regset
*regset
, struct regcache
*regcache
,
3828 int regnum
, const void *gregs
, size_t len
)
3830 struct gdbarch
*gdbarch
= regcache
->arch ();
3831 const i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
3832 const gdb_byte
*regs
= (const gdb_byte
*) gregs
;
3835 gdb_assert (len
>= tdep
->sizeof_gregset
);
3837 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
3839 if ((regnum
== i
|| regnum
== -1)
3840 && tdep
->gregset_reg_offset
[i
] != -1)
3841 regcache
->raw_supply (i
, regs
+ tdep
->gregset_reg_offset
[i
]);
3845 /* Collect register REGNUM from the register cache REGCACHE and store
3846 it in the buffer specified by GREGS and LEN as described by the
3847 general-purpose register set REGSET. If REGNUM is -1, do this for
3848 all registers in REGSET. */
3851 i386_collect_gregset (const struct regset
*regset
,
3852 const struct regcache
*regcache
,
3853 int regnum
, void *gregs
, size_t len
)
3855 struct gdbarch
*gdbarch
= regcache
->arch ();
3856 const i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
3857 gdb_byte
*regs
= (gdb_byte
*) gregs
;
3860 gdb_assert (len
>= tdep
->sizeof_gregset
);
3862 for (i
= 0; i
< tdep
->gregset_num_regs
; i
++)
3864 if ((regnum
== i
|| regnum
== -1)
3865 && tdep
->gregset_reg_offset
[i
] != -1)
3866 regcache
->raw_collect (i
, regs
+ tdep
->gregset_reg_offset
[i
]);
3870 /* Supply register REGNUM from the buffer specified by FPREGS and LEN
3871 in the floating-point register set REGSET to register cache
3872 REGCACHE. If REGNUM is -1, do this for all registers in REGSET. */
3875 i386_supply_fpregset (const struct regset
*regset
, struct regcache
*regcache
,
3876 int regnum
, const void *fpregs
, size_t len
)
3878 struct gdbarch
*gdbarch
= regcache
->arch ();
3879 const i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
3881 if (len
== I387_SIZEOF_FXSAVE
)
3883 i387_supply_fxsave (regcache
, regnum
, fpregs
);
3887 gdb_assert (len
>= tdep
->sizeof_fpregset
);
3888 i387_supply_fsave (regcache
, regnum
, fpregs
);
3891 /* Collect register REGNUM from the register cache REGCACHE and store
3892 it in the buffer specified by FPREGS and LEN as described by the
3893 floating-point register set REGSET. If REGNUM is -1, do this for
3894 all registers in REGSET. */
3897 i386_collect_fpregset (const struct regset
*regset
,
3898 const struct regcache
*regcache
,
3899 int regnum
, void *fpregs
, size_t len
)
3901 struct gdbarch
*gdbarch
= regcache
->arch ();
3902 const i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
3904 if (len
== I387_SIZEOF_FXSAVE
)
3906 i387_collect_fxsave (regcache
, regnum
, fpregs
);
3910 gdb_assert (len
>= tdep
->sizeof_fpregset
);
3911 i387_collect_fsave (regcache
, regnum
, fpregs
);
3914 /* Register set definitions. */
3916 const struct regset i386_gregset
=
3918 NULL
, i386_supply_gregset
, i386_collect_gregset
3921 const struct regset i386_fpregset
=
3923 NULL
, i386_supply_fpregset
, i386_collect_fpregset
3926 /* Default iterator over core file register note sections. */
3929 i386_iterate_over_regset_sections (struct gdbarch
*gdbarch
,
3930 iterate_over_regset_sections_cb
*cb
,
3932 const struct regcache
*regcache
)
3934 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
3936 cb (".reg", tdep
->sizeof_gregset
, tdep
->sizeof_gregset
, &i386_gregset
, NULL
,
3938 if (tdep
->sizeof_fpregset
)
3939 cb (".reg2", tdep
->sizeof_fpregset
, tdep
->sizeof_fpregset
, tdep
->fpregset
,
3944 /* Stuff for WIN32 PE style DLL's but is pretty generic really. */
3947 i386_pe_skip_trampoline_code (frame_info_ptr frame
,
3948 CORE_ADDR pc
, char *name
)
3950 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
3951 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
3954 if (pc
&& read_memory_unsigned_integer (pc
, 2, byte_order
) == 0x25ff)
3956 unsigned long indirect
=
3957 read_memory_unsigned_integer (pc
+ 2, 4, byte_order
);
3958 struct minimal_symbol
*indsym
=
3959 indirect
? lookup_minimal_symbol_by_pc (indirect
).minsym
: 0;
3960 const char *symname
= indsym
? indsym
->linkage_name () : 0;
3964 if (startswith (symname
, "__imp_")
3965 || startswith (symname
, "_imp_"))
3967 read_memory_unsigned_integer (indirect
, 4, byte_order
);
3970 return 0; /* Not a trampoline. */
3974 /* Return whether the THIS_FRAME corresponds to a sigtramp
3978 i386_sigtramp_p (frame_info_ptr this_frame
)
3980 CORE_ADDR pc
= get_frame_pc (this_frame
);
3983 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
3984 return (name
&& strcmp ("_sigtramp", name
) == 0);
3988 /* We have two flavours of disassembly. The machinery on this page
3989 deals with switching between those. */
3992 i386_print_insn (bfd_vma pc
, struct disassemble_info
*info
)
3994 gdb_assert (disassembly_flavor
== att_flavor
3995 || disassembly_flavor
== intel_flavor
);
3997 info
->disassembler_options
= disassembly_flavor
;
3999 return default_print_insn (pc
, info
);
4003 /* There are a few i386 architecture variants that differ only
4004 slightly from the generic i386 target. For now, we don't give them
4005 their own source file, but include them here. As a consequence,
4006 they'll always be included. */
4008 /* System V Release 4 (SVR4). */
4010 /* Return whether THIS_FRAME corresponds to a SVR4 sigtramp
4014 i386_svr4_sigtramp_p (frame_info_ptr this_frame
)
4016 CORE_ADDR pc
= get_frame_pc (this_frame
);
4019 /* The origin of these symbols is currently unknown. */
4020 find_pc_partial_function (pc
, &name
, NULL
, NULL
);
4021 return (name
&& (strcmp ("_sigreturn", name
) == 0
4022 || strcmp ("sigvechandler", name
) == 0));
4025 /* Assuming THIS_FRAME is for a SVR4 sigtramp routine, return the
4026 address of the associated sigcontext (ucontext) structure. */
4029 i386_svr4_sigcontext_addr (frame_info_ptr this_frame
)
4031 struct gdbarch
*gdbarch
= get_frame_arch (this_frame
);
4032 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
4036 get_frame_register (this_frame
, I386_ESP_REGNUM
, buf
);
4037 sp
= extract_unsigned_integer (buf
, 4, byte_order
);
4039 return read_memory_unsigned_integer (sp
+ 8, 4, byte_order
);
4044 /* Implementation of `gdbarch_stap_is_single_operand', as defined in
4048 i386_stap_is_single_operand (struct gdbarch
*gdbarch
, const char *s
)
4050 return (*s
== '$' /* Literal number. */
4051 || (isdigit (*s
) && s
[1] == '(' && s
[2] == '%') /* Displacement. */
4052 || (*s
== '(' && s
[1] == '%') /* Register indirection. */
4053 || (*s
== '%' && isalpha (s
[1]))); /* Register access. */
4056 /* Helper function for i386_stap_parse_special_token.
4058 This function parses operands of the form `-8+3+1(%rbp)', which
4059 must be interpreted as `*(-8 + 3 - 1 + (void *) $eax)'.
4061 Return true if the operand was parsed successfully, false
4064 static expr::operation_up
4065 i386_stap_parse_special_token_triplet (struct gdbarch
*gdbarch
,
4066 struct stap_parse_info
*p
)
4068 const char *s
= p
->arg
;
4070 if (isdigit (*s
) || *s
== '-' || *s
== '+')
4074 long displacements
[3];
4079 got_minus
[0] = false;
4085 got_minus
[0] = true;
4088 if (!isdigit ((unsigned char) *s
))
4091 displacements
[0] = strtol (s
, &endp
, 10);
4094 if (*s
!= '+' && *s
!= '-')
4096 /* We are not dealing with a triplet. */
4100 got_minus
[1] = false;
4106 got_minus
[1] = true;
4109 if (!isdigit ((unsigned char) *s
))
4112 displacements
[1] = strtol (s
, &endp
, 10);
4115 if (*s
!= '+' && *s
!= '-')
4117 /* We are not dealing with a triplet. */
4121 got_minus
[2] = false;
4127 got_minus
[2] = true;
4130 if (!isdigit ((unsigned char) *s
))
4133 displacements
[2] = strtol (s
, &endp
, 10);
4136 if (*s
!= '(' || s
[1] != '%')
4142 while (isalnum (*s
))
4148 len
= s
- start
- 1;
4149 std::string
regname (start
, len
);
4151 if (user_reg_map_name_to_regnum (gdbarch
, regname
.c_str (), len
) == -1)
4152 error (_("Invalid register name `%s' on expression `%s'."),
4153 regname
.c_str (), p
->saved_arg
);
4156 for (i
= 0; i
< 3; i
++)
4158 LONGEST this_val
= displacements
[i
];
4160 this_val
= -this_val
;
4166 using namespace expr
;
4168 struct type
*long_type
= builtin_type (gdbarch
)->builtin_long
;
4170 = make_operation
<long_const_operation
> (long_type
, value
);
4173 = make_operation
<register_operation
> (std::move (regname
));
4174 struct type
*void_ptr
= builtin_type (gdbarch
)->builtin_data_ptr
;
4175 reg
= make_operation
<unop_cast_operation
> (std::move (reg
), void_ptr
);
4178 = make_operation
<add_operation
> (std::move (reg
), std::move (offset
));
4179 struct type
*arg_ptr_type
= lookup_pointer_type (p
->arg_type
);
4180 sum
= make_operation
<unop_cast_operation
> (std::move (sum
),
4182 return make_operation
<unop_ind_operation
> (std::move (sum
));
4188 /* Helper function for i386_stap_parse_special_token.
4190 This function parses operands of the form `register base +
4191 (register index * size) + offset', as represented in
4192 `(%rcx,%rax,8)', or `[OFFSET](BASE_REG,INDEX_REG[,SIZE])'.
4194 Return true if the operand was parsed successfully, false
4197 static expr::operation_up
4198 i386_stap_parse_special_token_three_arg_disp (struct gdbarch
*gdbarch
,
4199 struct stap_parse_info
*p
)
4201 const char *s
= p
->arg
;
4203 if (isdigit (*s
) || *s
== '(' || *s
== '-' || *s
== '+')
4205 bool offset_minus
= false;
4207 bool size_minus
= false;
4218 offset_minus
= true;
4221 if (offset_minus
&& !isdigit (*s
))
4228 offset
= strtol (s
, &endp
, 10);
4232 if (*s
!= '(' || s
[1] != '%')
4238 while (isalnum (*s
))
4241 if (*s
!= ',' || s
[1] != '%')
4244 len_base
= s
- start
;
4245 std::string
base (start
, len_base
);
4247 if (user_reg_map_name_to_regnum (gdbarch
, base
.c_str (), len_base
) == -1)
4248 error (_("Invalid register name `%s' on expression `%s'."),
4249 base
.c_str (), p
->saved_arg
);
4254 while (isalnum (*s
))
4257 len_index
= s
- start
;
4258 std::string
index (start
, len_index
);
4260 if (user_reg_map_name_to_regnum (gdbarch
, index
.c_str (),
4262 error (_("Invalid register name `%s' on expression `%s'."),
4263 index
.c_str (), p
->saved_arg
);
4265 if (*s
!= ',' && *s
!= ')')
4281 size
= strtol (s
, &endp
, 10);
4291 using namespace expr
;
4293 struct type
*long_type
= builtin_type (gdbarch
)->builtin_long
;
4294 operation_up reg
= make_operation
<register_operation
> (std::move (base
));
4301 = make_operation
<long_const_operation
> (long_type
, offset
);
4302 reg
= make_operation
<add_operation
> (std::move (reg
),
4306 operation_up ind_reg
4307 = make_operation
<register_operation
> (std::move (index
));
4314 = make_operation
<long_const_operation
> (long_type
, size
);
4315 ind_reg
= make_operation
<mul_operation
> (std::move (ind_reg
),
4320 = make_operation
<add_operation
> (std::move (reg
),
4321 std::move (ind_reg
));
4323 struct type
*arg_ptr_type
= lookup_pointer_type (p
->arg_type
);
4324 sum
= make_operation
<unop_cast_operation
> (std::move (sum
),
4326 return make_operation
<unop_ind_operation
> (std::move (sum
));
4332 /* Implementation of `gdbarch_stap_parse_special_token', as defined in
4336 i386_stap_parse_special_token (struct gdbarch
*gdbarch
,
4337 struct stap_parse_info
*p
)
4339 /* The special tokens to be parsed here are:
4341 - `register base + (register index * size) + offset', as represented
4342 in `(%rcx,%rax,8)', or `[OFFSET](BASE_REG,INDEX_REG[,SIZE])'.
4344 - Operands of the form `-8+3+1(%rbp)', which must be interpreted as
4345 `*(-8 + 3 - 1 + (void *) $eax)'. */
4347 expr::operation_up result
4348 = i386_stap_parse_special_token_triplet (gdbarch
, p
);
4350 if (result
== nullptr)
4351 result
= i386_stap_parse_special_token_three_arg_disp (gdbarch
, p
);
4356 /* Implementation of 'gdbarch_stap_adjust_register', as defined in
4360 i386_stap_adjust_register (struct gdbarch
*gdbarch
, struct stap_parse_info
*p
,
4361 const std::string
®name
, int regnum
)
4363 static const std::unordered_set
<std::string
> reg_assoc
4364 = { "ax", "bx", "cx", "dx",
4365 "si", "di", "bp", "sp" };
4367 /* If we are dealing with a register whose size is less than the size
4368 specified by the "[-]N@" prefix, and it is one of the registers that
4369 we know has an extended variant available, then use the extended
4370 version of the register instead. */
4371 if (register_size (gdbarch
, regnum
) < p
->arg_type
->length ()
4372 && reg_assoc
.find (regname
) != reg_assoc
.end ())
4373 return "e" + regname
;
4375 /* Otherwise, just use the requested register. */
4381 /* gdbarch gnu_triplet_regexp method. Both arches are acceptable as GDB always
4382 also supplies -m64 or -m32 by gdbarch_gcc_target_options. */
4385 i386_gnu_triplet_regexp (struct gdbarch
*gdbarch
)
4387 return "(x86_64|i.86)";
4392 /* Implement the "in_indirect_branch_thunk" gdbarch function. */
4395 i386_in_indirect_branch_thunk (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
4397 return x86_in_indirect_branch_thunk (pc
, i386_register_names
,
4398 I386_EAX_REGNUM
, I386_EIP_REGNUM
);
4404 i386_elf_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
4406 static const char *const stap_integer_prefixes
[] = { "$", NULL
};
4407 static const char *const stap_register_prefixes
[] = { "%", NULL
};
4408 static const char *const stap_register_indirection_prefixes
[] = { "(",
4410 static const char *const stap_register_indirection_suffixes
[] = { ")",
4413 /* We typically use stabs-in-ELF with the SVR4 register numbering. */
4414 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_svr4_reg_to_regnum
);
4416 /* Registering SystemTap handlers. */
4417 set_gdbarch_stap_integer_prefixes (gdbarch
, stap_integer_prefixes
);
4418 set_gdbarch_stap_register_prefixes (gdbarch
, stap_register_prefixes
);
4419 set_gdbarch_stap_register_indirection_prefixes (gdbarch
,
4420 stap_register_indirection_prefixes
);
4421 set_gdbarch_stap_register_indirection_suffixes (gdbarch
,
4422 stap_register_indirection_suffixes
);
4423 set_gdbarch_stap_is_single_operand (gdbarch
,
4424 i386_stap_is_single_operand
);
4425 set_gdbarch_stap_parse_special_token (gdbarch
,
4426 i386_stap_parse_special_token
);
4427 set_gdbarch_stap_adjust_register (gdbarch
,
4428 i386_stap_adjust_register
);
4430 set_gdbarch_in_indirect_branch_thunk (gdbarch
,
4431 i386_in_indirect_branch_thunk
);
4434 /* System V Release 4 (SVR4). */
4437 i386_svr4_init_abi (struct gdbarch_info info
, struct gdbarch
*gdbarch
)
4439 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
4441 /* System V Release 4 uses ELF. */
4442 i386_elf_init_abi (info
, gdbarch
);
4444 /* System V Release 4 has shared libraries. */
4445 set_gdbarch_skip_trampoline_code (gdbarch
, find_solib_trampoline_target
);
4447 tdep
->sigtramp_p
= i386_svr4_sigtramp_p
;
4448 tdep
->sigcontext_addr
= i386_svr4_sigcontext_addr
;
4449 tdep
->sc_pc_offset
= 36 + 14 * 4;
4450 tdep
->sc_sp_offset
= 36 + 17 * 4;
4452 tdep
->jb_pc_offset
= 20;
4457 /* i386 register groups. In addition to the normal groups, add "mmx"
4460 static const reggroup
*i386_sse_reggroup
;
4461 static const reggroup
*i386_mmx_reggroup
;
4464 i386_init_reggroups (void)
4466 i386_sse_reggroup
= reggroup_new ("sse", USER_REGGROUP
);
4467 i386_mmx_reggroup
= reggroup_new ("mmx", USER_REGGROUP
);
4471 i386_add_reggroups (struct gdbarch
*gdbarch
)
4473 reggroup_add (gdbarch
, i386_sse_reggroup
);
4474 reggroup_add (gdbarch
, i386_mmx_reggroup
);
4478 i386_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
4479 const struct reggroup
*group
)
4481 const i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
4482 int fp_regnum_p
, mmx_regnum_p
, xmm_regnum_p
, mxcsr_regnum_p
,
4483 ymm_regnum_p
, ymmh_regnum_p
, ymm_avx512_regnum_p
, ymmh_avx512_regnum_p
,
4484 bndr_regnum_p
, bnd_regnum_p
, zmm_regnum_p
, zmmh_regnum_p
,
4485 mpx_ctrl_regnum_p
, xmm_avx512_regnum_p
,
4486 avx512_p
, avx_p
, sse_p
, pkru_regnum_p
;
4488 /* Don't include pseudo registers, except for MMX, in any register
4490 if (i386_byte_regnum_p (gdbarch
, regnum
))
4493 if (i386_word_regnum_p (gdbarch
, regnum
))
4496 if (i386_dword_regnum_p (gdbarch
, regnum
))
4499 mmx_regnum_p
= i386_mmx_regnum_p (gdbarch
, regnum
);
4500 if (group
== i386_mmx_reggroup
)
4501 return mmx_regnum_p
;
4503 pkru_regnum_p
= i386_pkru_regnum_p(gdbarch
, regnum
);
4504 xmm_regnum_p
= i386_xmm_regnum_p (gdbarch
, regnum
);
4505 xmm_avx512_regnum_p
= i386_xmm_avx512_regnum_p (gdbarch
, regnum
);
4506 mxcsr_regnum_p
= i386_mxcsr_regnum_p (gdbarch
, regnum
);
4507 if (group
== i386_sse_reggroup
)
4508 return xmm_regnum_p
|| xmm_avx512_regnum_p
|| mxcsr_regnum_p
;
4510 ymm_regnum_p
= i386_ymm_regnum_p (gdbarch
, regnum
);
4511 ymm_avx512_regnum_p
= i386_ymm_avx512_regnum_p (gdbarch
, regnum
);
4512 zmm_regnum_p
= i386_zmm_regnum_p (gdbarch
, regnum
);
4514 avx512_p
= ((tdep
->xcr0
& X86_XSTATE_AVX_AVX512_MASK
)
4515 == X86_XSTATE_AVX_AVX512_MASK
);
4516 avx_p
= ((tdep
->xcr0
& X86_XSTATE_AVX_AVX512_MASK
)
4517 == X86_XSTATE_AVX_MASK
) && !avx512_p
;
4518 sse_p
= ((tdep
->xcr0
& X86_XSTATE_AVX_AVX512_MASK
)
4519 == X86_XSTATE_SSE_MASK
) && !avx512_p
&& ! avx_p
;
4521 if (group
== vector_reggroup
)
4522 return (mmx_regnum_p
4523 || (zmm_regnum_p
&& avx512_p
)
4524 || ((ymm_regnum_p
|| ymm_avx512_regnum_p
) && avx_p
)
4525 || ((xmm_regnum_p
|| xmm_avx512_regnum_p
) && sse_p
)
4528 fp_regnum_p
= (i386_fp_regnum_p (gdbarch
, regnum
)
4529 || i386_fpc_regnum_p (gdbarch
, regnum
));
4530 if (group
== float_reggroup
)
4533 /* For "info reg all", don't include upper YMM registers nor XMM
4534 registers when AVX is supported. */
4535 ymmh_regnum_p
= i386_ymmh_regnum_p (gdbarch
, regnum
);
4536 ymmh_avx512_regnum_p
= i386_ymmh_avx512_regnum_p (gdbarch
, regnum
);
4537 zmmh_regnum_p
= i386_zmmh_regnum_p (gdbarch
, regnum
);
4538 if (group
== all_reggroup
4539 && (((xmm_regnum_p
|| xmm_avx512_regnum_p
) && !sse_p
)
4540 || ((ymm_regnum_p
|| ymm_avx512_regnum_p
) && !avx_p
)
4542 || ymmh_avx512_regnum_p
4546 bnd_regnum_p
= i386_bnd_regnum_p (gdbarch
, regnum
);
4547 if (group
== all_reggroup
4548 && ((bnd_regnum_p
&& (tdep
->xcr0
& X86_XSTATE_MPX_MASK
))))
4549 return bnd_regnum_p
;
4551 bndr_regnum_p
= i386_bndr_regnum_p (gdbarch
, regnum
);
4552 if (group
== all_reggroup
4553 && ((bndr_regnum_p
&& (tdep
->xcr0
& X86_XSTATE_MPX_MASK
))))
4556 mpx_ctrl_regnum_p
= i386_mpx_ctrl_regnum_p (gdbarch
, regnum
);
4557 if (group
== all_reggroup
4558 && ((mpx_ctrl_regnum_p
&& (tdep
->xcr0
& X86_XSTATE_MPX_MASK
))))
4559 return mpx_ctrl_regnum_p
;
4561 if (group
== general_reggroup
)
4562 return (!fp_regnum_p
4566 && !xmm_avx512_regnum_p
4569 && !ymm_avx512_regnum_p
4570 && !ymmh_avx512_regnum_p
4573 && !mpx_ctrl_regnum_p
4578 return default_register_reggroup_p (gdbarch
, regnum
, group
);
4582 /* Get the ARGIth function argument for the current function. */
4585 i386_fetch_pointer_argument (frame_info_ptr frame
, int argi
,
4588 struct gdbarch
*gdbarch
= get_frame_arch (frame
);
4589 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
4590 CORE_ADDR sp
= get_frame_register_unsigned (frame
, I386_ESP_REGNUM
);
4591 return read_memory_unsigned_integer (sp
+ (4 * (argi
+ 1)), 4, byte_order
);
4594 #define PREFIX_REPZ 0x01
4595 #define PREFIX_REPNZ 0x02
4596 #define PREFIX_LOCK 0x04
4597 #define PREFIX_DATA 0x08
4598 #define PREFIX_ADDR 0x10
4610 /* i386 arith/logic operations */
4623 struct i386_record_s
4625 struct gdbarch
*gdbarch
;
4626 struct regcache
*regcache
;
4627 CORE_ADDR orig_addr
;
4633 uint8_t mod
, reg
, rm
;
4642 /* Parse the "modrm" part of the memory address irp->addr points at.
4643 Returns -1 if something goes wrong, 0 otherwise. */
4646 i386_record_modrm (struct i386_record_s
*irp
)
4648 struct gdbarch
*gdbarch
= irp
->gdbarch
;
4650 if (record_read_memory (gdbarch
, irp
->addr
, &irp
->modrm
, 1))
4654 irp
->mod
= (irp
->modrm
>> 6) & 3;
4655 irp
->reg
= (irp
->modrm
>> 3) & 7;
4656 irp
->rm
= irp
->modrm
& 7;
4661 /* Extract the memory address that the current instruction writes to,
4662 and return it in *ADDR. Return -1 if something goes wrong. */
4665 i386_record_lea_modrm_addr (struct i386_record_s
*irp
, uint64_t *addr
)
4667 struct gdbarch
*gdbarch
= irp
->gdbarch
;
4668 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
4673 if (irp
->aflag
|| irp
->regmap
[X86_RECORD_R8_REGNUM
])
4680 uint8_t base
= irp
->rm
;
4685 if (record_read_memory (gdbarch
, irp
->addr
, &byte
, 1))
4688 scale
= (byte
>> 6) & 3;
4689 index
= ((byte
>> 3) & 7) | irp
->rex_x
;
4697 if ((base
& 7) == 5)
4700 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 4))
4703 *addr
= extract_signed_integer (buf
, 4, byte_order
);
4704 if (irp
->regmap
[X86_RECORD_R8_REGNUM
] && !havesib
)
4705 *addr
+= irp
->addr
+ irp
->rip_offset
;
4709 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 1))
4712 *addr
= (int8_t) buf
[0];
4715 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 4))
4717 *addr
= extract_signed_integer (buf
, 4, byte_order
);
4725 if (base
== 4 && irp
->popl_esp_hack
)
4726 *addr
+= irp
->popl_esp_hack
;
4727 regcache_raw_read_unsigned (irp
->regcache
, irp
->regmap
[base
],
4730 if (irp
->aflag
== 2)
4735 *addr
= (uint32_t) (offset64
+ *addr
);
4737 if (havesib
&& (index
!= 4 || scale
!= 0))
4739 regcache_raw_read_unsigned (irp
->regcache
, irp
->regmap
[index
],
4741 if (irp
->aflag
== 2)
4742 *addr
+= offset64
<< scale
;
4744 *addr
= (uint32_t) (*addr
+ (offset64
<< scale
));
4749 /* Since we are in 64-bit mode with ADDR32 prefix, zero-extend
4750 address from 32-bit to 64-bit. */
4751 *addr
= (uint32_t) *addr
;
4762 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 2))
4765 *addr
= extract_signed_integer (buf
, 2, byte_order
);
4771 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 1))
4774 *addr
= (int8_t) buf
[0];
4777 if (record_read_memory (gdbarch
, irp
->addr
, buf
, 2))
4780 *addr
= extract_signed_integer (buf
, 2, byte_order
);
4787 regcache_raw_read_unsigned (irp
->regcache
,
4788 irp
->regmap
[X86_RECORD_REBX_REGNUM
],
4790 *addr
= (uint32_t) (*addr
+ offset64
);
4791 regcache_raw_read_unsigned (irp
->regcache
,
4792 irp
->regmap
[X86_RECORD_RESI_REGNUM
],
4794 *addr
= (uint32_t) (*addr
+ offset64
);
4797 regcache_raw_read_unsigned (irp
->regcache
,
4798 irp
->regmap
[X86_RECORD_REBX_REGNUM
],
4800 *addr
= (uint32_t) (*addr
+ offset64
);
4801 regcache_raw_read_unsigned (irp
->regcache
,
4802 irp
->regmap
[X86_RECORD_REDI_REGNUM
],
4804 *addr
= (uint32_t) (*addr
+ offset64
);
4807 regcache_raw_read_unsigned (irp
->regcache
,
4808 irp
->regmap
[X86_RECORD_REBP_REGNUM
],
4810 *addr
= (uint32_t) (*addr
+ offset64
);
4811 regcache_raw_read_unsigned (irp
->regcache
,
4812 irp
->regmap
[X86_RECORD_RESI_REGNUM
],
4814 *addr
= (uint32_t) (*addr
+ offset64
);
4817 regcache_raw_read_unsigned (irp
->regcache
,
4818 irp
->regmap
[X86_RECORD_REBP_REGNUM
],
4820 *addr
= (uint32_t) (*addr
+ offset64
);
4821 regcache_raw_read_unsigned (irp
->regcache
,
4822 irp
->regmap
[X86_RECORD_REDI_REGNUM
],
4824 *addr
= (uint32_t) (*addr
+ offset64
);
4827 regcache_raw_read_unsigned (irp
->regcache
,
4828 irp
->regmap
[X86_RECORD_RESI_REGNUM
],
4830 *addr
= (uint32_t) (*addr
+ offset64
);
4833 regcache_raw_read_unsigned (irp
->regcache
,
4834 irp
->regmap
[X86_RECORD_REDI_REGNUM
],
4836 *addr
= (uint32_t) (*addr
+ offset64
);
4839 regcache_raw_read_unsigned (irp
->regcache
,
4840 irp
->regmap
[X86_RECORD_REBP_REGNUM
],
4842 *addr
= (uint32_t) (*addr
+ offset64
);
4845 regcache_raw_read_unsigned (irp
->regcache
,
4846 irp
->regmap
[X86_RECORD_REBX_REGNUM
],
4848 *addr
= (uint32_t) (*addr
+ offset64
);
4858 /* Record the address and contents of the memory that will be changed
4859 by the current instruction. Return -1 if something goes wrong, 0
4863 i386_record_lea_modrm (struct i386_record_s
*irp
)
4865 struct gdbarch
*gdbarch
= irp
->gdbarch
;
4868 if (irp
->override
>= 0)
4870 if (record_full_memory_query
)
4873 Process record ignores the memory change of instruction at address %s\n\
4874 because it can't get the value of the segment register.\n\
4875 Do you want to stop the program?"),
4876 paddress (gdbarch
, irp
->orig_addr
)))
4883 if (i386_record_lea_modrm_addr (irp
, &addr
))
4886 if (record_full_arch_list_add_mem (addr
, 1 << irp
->ot
))
4892 /* Record the effects of a push operation. Return -1 if something
4893 goes wrong, 0 otherwise. */
4896 i386_record_push (struct i386_record_s
*irp
, int size
)
4900 if (record_full_arch_list_add_reg (irp
->regcache
,
4901 irp
->regmap
[X86_RECORD_RESP_REGNUM
]))
4903 regcache_raw_read_unsigned (irp
->regcache
,
4904 irp
->regmap
[X86_RECORD_RESP_REGNUM
],
4906 if (record_full_arch_list_add_mem ((CORE_ADDR
) addr
- size
, size
))
4913 /* Defines contents to record. */
4914 #define I386_SAVE_FPU_REGS 0xfffd
4915 #define I386_SAVE_FPU_ENV 0xfffe
4916 #define I386_SAVE_FPU_ENV_REG_STACK 0xffff
4918 /* Record the values of the floating point registers which will be
4919 changed by the current instruction. Returns -1 if something is
4920 wrong, 0 otherwise. */
4922 static int i386_record_floats (struct gdbarch
*gdbarch
,
4923 struct i386_record_s
*ir
,
4926 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
4929 /* Oza: Because of floating point insn push/pop of fpu stack is going to
4930 happen. Currently we store st0-st7 registers, but we need not store all
4931 registers all the time, in future we use ftag register and record only
4932 those who are not marked as an empty. */
4934 if (I386_SAVE_FPU_REGS
== iregnum
)
4936 for (i
= I387_ST0_REGNUM (tdep
); i
<= I387_ST0_REGNUM (tdep
) + 7; i
++)
4938 if (record_full_arch_list_add_reg (ir
->regcache
, i
))
4942 else if (I386_SAVE_FPU_ENV
== iregnum
)
4944 for (i
= I387_FCTRL_REGNUM (tdep
); i
<= I387_FOP_REGNUM (tdep
); i
++)
4946 if (record_full_arch_list_add_reg (ir
->regcache
, i
))
4950 else if (I386_SAVE_FPU_ENV_REG_STACK
== iregnum
)
4952 for (i
= I387_ST0_REGNUM (tdep
); i
<= I387_FOP_REGNUM (tdep
); i
++)
4953 if (record_full_arch_list_add_reg (ir
->regcache
, i
))
4956 else if ((iregnum
>= I387_ST0_REGNUM (tdep
)) &&
4957 (iregnum
<= I387_FOP_REGNUM (tdep
)))
4959 if (record_full_arch_list_add_reg (ir
->regcache
,iregnum
))
4964 /* Parameter error. */
4967 if(I386_SAVE_FPU_ENV
!= iregnum
)
4969 for (i
= I387_FCTRL_REGNUM (tdep
); i
<= I387_FOP_REGNUM (tdep
); i
++)
4971 if (record_full_arch_list_add_reg (ir
->regcache
, i
))
4978 /* Parse the current instruction, and record the values of the
4979 registers and memory that will be changed by the current
4980 instruction. Returns -1 if something goes wrong, 0 otherwise. */
4982 #define I386_RECORD_FULL_ARCH_LIST_ADD_REG(regnum) \
4983 record_full_arch_list_add_reg (ir.regcache, ir.regmap[(regnum)])
4986 i386_process_record (struct gdbarch
*gdbarch
, struct regcache
*regcache
,
4987 CORE_ADDR input_addr
)
4989 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
4995 gdb_byte buf
[I386_MAX_REGISTER_SIZE
];
4996 struct i386_record_s ir
;
4997 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
5001 memset (&ir
, 0, sizeof (struct i386_record_s
));
5002 ir
.regcache
= regcache
;
5003 ir
.addr
= input_addr
;
5004 ir
.orig_addr
= input_addr
;
5008 ir
.popl_esp_hack
= 0;
5009 ir
.regmap
= tdep
->record_regmap
;
5010 ir
.gdbarch
= gdbarch
;
5012 if (record_debug
> 1)
5013 gdb_printf (gdb_stdlog
, "Process record: i386_process_record "
5015 paddress (gdbarch
, ir
.addr
));
5020 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
5023 switch (opcode8
) /* Instruction prefixes */
5025 case REPE_PREFIX_OPCODE
:
5026 prefixes
|= PREFIX_REPZ
;
5028 case REPNE_PREFIX_OPCODE
:
5029 prefixes
|= PREFIX_REPNZ
;
5031 case LOCK_PREFIX_OPCODE
:
5032 prefixes
|= PREFIX_LOCK
;
5034 case CS_PREFIX_OPCODE
:
5035 ir
.override
= X86_RECORD_CS_REGNUM
;
5037 case SS_PREFIX_OPCODE
:
5038 ir
.override
= X86_RECORD_SS_REGNUM
;
5040 case DS_PREFIX_OPCODE
:
5041 ir
.override
= X86_RECORD_DS_REGNUM
;
5043 case ES_PREFIX_OPCODE
:
5044 ir
.override
= X86_RECORD_ES_REGNUM
;
5046 case FS_PREFIX_OPCODE
:
5047 ir
.override
= X86_RECORD_FS_REGNUM
;
5049 case GS_PREFIX_OPCODE
:
5050 ir
.override
= X86_RECORD_GS_REGNUM
;
5052 case DATA_PREFIX_OPCODE
:
5053 prefixes
|= PREFIX_DATA
;
5055 case ADDR_PREFIX_OPCODE
:
5056 prefixes
|= PREFIX_ADDR
;
5058 case 0x40: /* i386 inc %eax */
5059 case 0x41: /* i386 inc %ecx */
5060 case 0x42: /* i386 inc %edx */
5061 case 0x43: /* i386 inc %ebx */
5062 case 0x44: /* i386 inc %esp */
5063 case 0x45: /* i386 inc %ebp */
5064 case 0x46: /* i386 inc %esi */
5065 case 0x47: /* i386 inc %edi */
5066 case 0x48: /* i386 dec %eax */
5067 case 0x49: /* i386 dec %ecx */
5068 case 0x4a: /* i386 dec %edx */
5069 case 0x4b: /* i386 dec %ebx */
5070 case 0x4c: /* i386 dec %esp */
5071 case 0x4d: /* i386 dec %ebp */
5072 case 0x4e: /* i386 dec %esi */
5073 case 0x4f: /* i386 dec %edi */
5074 if (ir
.regmap
[X86_RECORD_R8_REGNUM
]) /* 64 bit target */
5077 rex_w
= (opcode8
>> 3) & 1;
5078 rex_r
= (opcode8
& 0x4) << 1;
5079 ir
.rex_x
= (opcode8
& 0x2) << 2;
5080 ir
.rex_b
= (opcode8
& 0x1) << 3;
5082 else /* 32 bit target */
5091 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && rex_w
== 1)
5097 if (prefixes
& PREFIX_DATA
)
5100 if (prefixes
& PREFIX_ADDR
)
5102 else if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5105 /* Now check op code. */
5106 opcode
= (uint32_t) opcode8
;
5111 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
5114 opcode
= (uint32_t) opcode8
| 0x0f00;
5118 case 0x00: /* arith & logic */
5166 if (((opcode
>> 3) & 7) != OP_CMPL
)
5168 if ((opcode
& 1) == 0)
5171 ir
.ot
= ir
.dflag
+ OT_WORD
;
5173 switch ((opcode
>> 1) & 3)
5175 case 0: /* OP Ev, Gv */
5176 if (i386_record_modrm (&ir
))
5180 if (i386_record_lea_modrm (&ir
))
5186 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5188 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5191 case 1: /* OP Gv, Ev */
5192 if (i386_record_modrm (&ir
))
5195 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5197 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5199 case 2: /* OP A, Iv */
5200 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5204 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5207 case 0x80: /* GRP1 */
5211 if (i386_record_modrm (&ir
))
5214 if (ir
.reg
!= OP_CMPL
)
5216 if ((opcode
& 1) == 0)
5219 ir
.ot
= ir
.dflag
+ OT_WORD
;
5226 ir
.rip_offset
= (ir
.ot
> OT_LONG
) ? 4 : (1 << ir
.ot
);
5227 if (i386_record_lea_modrm (&ir
))
5231 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
5233 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5236 case 0x40: /* inc */
5245 case 0x48: /* dec */
5254 I386_RECORD_FULL_ARCH_LIST_ADD_REG (opcode
& 7);
5255 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5258 case 0xf6: /* GRP3 */
5260 if ((opcode
& 1) == 0)
5263 ir
.ot
= ir
.dflag
+ OT_WORD
;
5264 if (i386_record_modrm (&ir
))
5267 if (ir
.mod
!= 3 && ir
.reg
== 0)
5268 ir
.rip_offset
= (ir
.ot
> OT_LONG
) ? 4 : (1 << ir
.ot
);
5273 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5279 if (i386_record_lea_modrm (&ir
))
5285 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5287 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5289 if (ir
.reg
== 3) /* neg */
5290 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5296 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5297 if (ir
.ot
!= OT_BYTE
)
5298 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
5299 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5303 opcode
= opcode
<< 8 | ir
.modrm
;
5309 case 0xfe: /* GRP4 */
5310 case 0xff: /* GRP5 */
5311 if (i386_record_modrm (&ir
))
5313 if (ir
.reg
>= 2 && opcode
== 0xfe)
5316 opcode
= opcode
<< 8 | ir
.modrm
;
5323 if ((opcode
& 1) == 0)
5326 ir
.ot
= ir
.dflag
+ OT_WORD
;
5329 if (i386_record_lea_modrm (&ir
))
5335 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5337 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5339 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5342 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
5344 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5346 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5349 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM
);
5350 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5352 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5356 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5359 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
5361 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5366 opcode
= opcode
<< 8 | ir
.modrm
;
5372 case 0x84: /* test */
5376 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5379 case 0x98: /* CWDE/CBW */
5380 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5383 case 0x99: /* CDQ/CWD */
5384 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5385 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
5388 case 0x0faf: /* imul */
5391 ir
.ot
= ir
.dflag
+ OT_WORD
;
5392 if (i386_record_modrm (&ir
))
5395 ir
.rip_offset
= (ir
.ot
> OT_LONG
) ? 4 : (1 << ir
.ot
);
5396 else if (opcode
== 0x6b)
5399 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5401 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5402 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5405 case 0x0fc0: /* xadd */
5407 if ((opcode
& 1) == 0)
5410 ir
.ot
= ir
.dflag
+ OT_WORD
;
5411 if (i386_record_modrm (&ir
))
5416 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5418 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5419 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5421 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5425 if (i386_record_lea_modrm (&ir
))
5427 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5429 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5431 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5434 case 0x0fb0: /* cmpxchg */
5436 if ((opcode
& 1) == 0)
5439 ir
.ot
= ir
.dflag
+ OT_WORD
;
5440 if (i386_record_modrm (&ir
))
5445 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5446 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5448 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5452 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5453 if (i386_record_lea_modrm (&ir
))
5456 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5459 case 0x0fc7: /* cmpxchg8b / rdrand / rdseed */
5460 if (i386_record_modrm (&ir
))
5464 /* rdrand and rdseed use the 3 bits of the REG field of ModR/M as
5465 an extended opcode. rdrand has bits 110 (/6) and rdseed
5466 has bits 111 (/7). */
5467 if (ir
.reg
== 6 || ir
.reg
== 7)
5469 /* The storage register is described by the 3 R/M bits, but the
5470 REX.B prefix may be used to give access to registers
5471 R8~R15. In this case ir.rex_b + R/M will give us the register
5472 in the range R8~R15.
5474 REX.W may also be used to access 64-bit registers, but we
5475 already record entire registers and not just partial bits
5477 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rex_b
+ ir
.rm
);
5478 /* These instructions also set conditional bits. */
5479 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5484 /* We don't handle this particular instruction yet. */
5486 opcode
= opcode
<< 8 | ir
.modrm
;
5490 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5491 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
5492 if (i386_record_lea_modrm (&ir
))
5494 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5497 case 0x50: /* push */
5507 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
5509 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5513 case 0x06: /* push es */
5514 case 0x0e: /* push cs */
5515 case 0x16: /* push ss */
5516 case 0x1e: /* push ds */
5517 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5522 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5526 case 0x0fa0: /* push fs */
5527 case 0x0fa8: /* push gs */
5528 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5533 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5537 case 0x60: /* pusha */
5538 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5543 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 4)))
5547 case 0x58: /* pop */
5555 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5556 I386_RECORD_FULL_ARCH_LIST_ADD_REG ((opcode
& 0x7) | ir
.rex_b
);
5559 case 0x61: /* popa */
5560 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5565 for (regnum
= X86_RECORD_REAX_REGNUM
;
5566 regnum
<= X86_RECORD_REDI_REGNUM
;
5568 I386_RECORD_FULL_ARCH_LIST_ADD_REG (regnum
);
5571 case 0x8f: /* pop */
5572 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5573 ir
.ot
= ir
.dflag
? OT_QUAD
: OT_WORD
;
5575 ir
.ot
= ir
.dflag
+ OT_WORD
;
5576 if (i386_record_modrm (&ir
))
5579 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
5582 ir
.popl_esp_hack
= 1 << ir
.ot
;
5583 if (i386_record_lea_modrm (&ir
))
5586 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5589 case 0xc8: /* enter */
5590 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM
);
5591 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
5593 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
5597 case 0xc9: /* leave */
5598 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5599 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM
);
5602 case 0x07: /* pop es */
5603 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5608 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5609 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_ES_REGNUM
);
5610 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5613 case 0x17: /* pop ss */
5614 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5619 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5620 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_SS_REGNUM
);
5621 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5624 case 0x1f: /* pop ds */
5625 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5630 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5631 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_DS_REGNUM
);
5632 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5635 case 0x0fa1: /* pop fs */
5636 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5637 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_FS_REGNUM
);
5638 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5641 case 0x0fa9: /* pop gs */
5642 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
5643 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_GS_REGNUM
);
5644 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5647 case 0x88: /* mov */
5651 if ((opcode
& 1) == 0)
5654 ir
.ot
= ir
.dflag
+ OT_WORD
;
5656 if (i386_record_modrm (&ir
))
5661 if (opcode
== 0xc6 || opcode
== 0xc7)
5662 ir
.rip_offset
= (ir
.ot
> OT_LONG
) ? 4 : (1 << ir
.ot
);
5663 if (i386_record_lea_modrm (&ir
))
5668 if (opcode
== 0xc6 || opcode
== 0xc7)
5670 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5672 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5676 case 0x8a: /* mov */
5678 if ((opcode
& 1) == 0)
5681 ir
.ot
= ir
.dflag
+ OT_WORD
;
5682 if (i386_record_modrm (&ir
))
5685 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5687 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5690 case 0x8c: /* mov seg */
5691 if (i386_record_modrm (&ir
))
5696 opcode
= opcode
<< 8 | ir
.modrm
;
5701 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5705 if (i386_record_lea_modrm (&ir
))
5710 case 0x8e: /* mov seg */
5711 if (i386_record_modrm (&ir
))
5716 regnum
= X86_RECORD_ES_REGNUM
;
5719 regnum
= X86_RECORD_SS_REGNUM
;
5722 regnum
= X86_RECORD_DS_REGNUM
;
5725 regnum
= X86_RECORD_FS_REGNUM
;
5728 regnum
= X86_RECORD_GS_REGNUM
;
5732 opcode
= opcode
<< 8 | ir
.modrm
;
5736 I386_RECORD_FULL_ARCH_LIST_ADD_REG (regnum
);
5737 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5740 case 0x0fb6: /* movzbS */
5741 case 0x0fb7: /* movzwS */
5742 case 0x0fbe: /* movsbS */
5743 case 0x0fbf: /* movswS */
5744 if (i386_record_modrm (&ir
))
5746 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
5749 case 0x8d: /* lea */
5750 if (i386_record_modrm (&ir
))
5755 opcode
= opcode
<< 8 | ir
.modrm
;
5760 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5762 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5765 case 0xa0: /* mov EAX */
5768 case 0xd7: /* xlat */
5769 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5772 case 0xa2: /* mov EAX */
5774 if (ir
.override
>= 0)
5776 if (record_full_memory_query
)
5779 Process record ignores the memory change of instruction at address %s\n\
5780 because it can't get the value of the segment register.\n\
5781 Do you want to stop the program?"),
5782 paddress (gdbarch
, ir
.orig_addr
)))
5788 if ((opcode
& 1) == 0)
5791 ir
.ot
= ir
.dflag
+ OT_WORD
;
5794 if (record_read_memory (gdbarch
, ir
.addr
, buf
, 8))
5797 addr
= extract_unsigned_integer (buf
, 8, byte_order
);
5801 if (record_read_memory (gdbarch
, ir
.addr
, buf
, 4))
5804 addr
= extract_unsigned_integer (buf
, 4, byte_order
);
5808 if (record_read_memory (gdbarch
, ir
.addr
, buf
, 2))
5811 addr
= extract_unsigned_integer (buf
, 2, byte_order
);
5813 if (record_full_arch_list_add_mem (addr
, 1 << ir
.ot
))
5818 case 0xb0: /* mov R, Ib */
5826 I386_RECORD_FULL_ARCH_LIST_ADD_REG ((ir
.regmap
[X86_RECORD_R8_REGNUM
])
5827 ? ((opcode
& 0x7) | ir
.rex_b
)
5828 : ((opcode
& 0x7) & 0x3));
5831 case 0xb8: /* mov R, Iv */
5839 I386_RECORD_FULL_ARCH_LIST_ADD_REG ((opcode
& 0x7) | ir
.rex_b
);
5842 case 0x91: /* xchg R, EAX */
5849 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
5850 I386_RECORD_FULL_ARCH_LIST_ADD_REG (opcode
& 0x7);
5853 case 0x86: /* xchg Ev, Gv */
5855 if ((opcode
& 1) == 0)
5858 ir
.ot
= ir
.dflag
+ OT_WORD
;
5859 if (i386_record_modrm (&ir
))
5864 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5866 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5870 if (i386_record_lea_modrm (&ir
))
5874 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5876 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
5879 case 0xc4: /* les Gv */
5880 case 0xc5: /* lds Gv */
5881 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
5887 case 0x0fb2: /* lss Gv */
5888 case 0x0fb4: /* lfs Gv */
5889 case 0x0fb5: /* lgs Gv */
5890 if (i386_record_modrm (&ir
))
5898 opcode
= opcode
<< 8 | ir
.modrm
;
5903 case 0xc4: /* les Gv */
5904 regnum
= X86_RECORD_ES_REGNUM
;
5906 case 0xc5: /* lds Gv */
5907 regnum
= X86_RECORD_DS_REGNUM
;
5909 case 0x0fb2: /* lss Gv */
5910 regnum
= X86_RECORD_SS_REGNUM
;
5912 case 0x0fb4: /* lfs Gv */
5913 regnum
= X86_RECORD_FS_REGNUM
;
5915 case 0x0fb5: /* lgs Gv */
5916 regnum
= X86_RECORD_GS_REGNUM
;
5919 I386_RECORD_FULL_ARCH_LIST_ADD_REG (regnum
);
5920 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
5921 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5924 case 0xc0: /* shifts */
5930 if ((opcode
& 1) == 0)
5933 ir
.ot
= ir
.dflag
+ OT_WORD
;
5934 if (i386_record_modrm (&ir
))
5936 if (ir
.mod
!= 3 && (opcode
== 0xd2 || opcode
== 0xd3))
5938 if (i386_record_lea_modrm (&ir
))
5944 if (ir
.ot
== OT_BYTE
&& !ir
.regmap
[X86_RECORD_R8_REGNUM
])
5946 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
);
5948 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
5955 if (i386_record_modrm (&ir
))
5959 if (record_full_arch_list_add_reg (ir
.regcache
, ir
.rm
))
5964 if (i386_record_lea_modrm (&ir
))
5969 case 0xd8: /* Floats. */
5977 if (i386_record_modrm (&ir
))
5979 ir
.reg
|= ((opcode
& 7) << 3);
5985 if (i386_record_lea_modrm_addr (&ir
, &addr64
))
5993 /* For fcom, ficom nothing to do. */
5999 /* For fcomp, ficomp pop FPU stack, store all. */
6000 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6027 /* For fadd, fmul, fsub, fsubr, fdiv, fdivr, fiadd, fimul,
6028 fisub, fisubr, fidiv, fidivr, modR/M.reg is an extension
6029 of code, always affects st(0) register. */
6030 if (i386_record_floats (gdbarch
, &ir
, I387_ST0_REGNUM (tdep
)))
6054 /* Handling fld, fild. */
6055 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6059 switch (ir
.reg
>> 4)
6062 if (record_full_arch_list_add_mem (addr64
, 4))
6066 if (record_full_arch_list_add_mem (addr64
, 8))
6072 if (record_full_arch_list_add_mem (addr64
, 2))
6078 switch (ir
.reg
>> 4)
6081 if (record_full_arch_list_add_mem (addr64
, 4))
6083 if (3 == (ir
.reg
& 7))
6085 /* For fstp m32fp. */
6086 if (i386_record_floats (gdbarch
, &ir
,
6087 I386_SAVE_FPU_REGS
))
6092 if (record_full_arch_list_add_mem (addr64
, 4))
6094 if ((3 == (ir
.reg
& 7))
6095 || (5 == (ir
.reg
& 7))
6096 || (7 == (ir
.reg
& 7)))
6098 /* For fstp insn. */
6099 if (i386_record_floats (gdbarch
, &ir
,
6100 I386_SAVE_FPU_REGS
))
6105 if (record_full_arch_list_add_mem (addr64
, 8))
6107 if (3 == (ir
.reg
& 7))
6109 /* For fstp m64fp. */
6110 if (i386_record_floats (gdbarch
, &ir
,
6111 I386_SAVE_FPU_REGS
))
6116 if ((3 <= (ir
.reg
& 7)) && (6 <= (ir
.reg
& 7)))
6118 /* For fistp, fbld, fild, fbstp. */
6119 if (i386_record_floats (gdbarch
, &ir
,
6120 I386_SAVE_FPU_REGS
))
6125 if (record_full_arch_list_add_mem (addr64
, 2))
6134 if (i386_record_floats (gdbarch
, &ir
,
6135 I386_SAVE_FPU_ENV_REG_STACK
))
6140 if (i386_record_floats (gdbarch
, &ir
, I387_FCTRL_REGNUM (tdep
)))
6145 if (i386_record_floats (gdbarch
, &ir
,
6146 I386_SAVE_FPU_ENV_REG_STACK
))
6152 if (record_full_arch_list_add_mem (addr64
, 28))
6157 if (record_full_arch_list_add_mem (addr64
, 14))
6163 if (record_full_arch_list_add_mem (addr64
, 2))
6165 /* Insn fstp, fbstp. */
6166 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6171 if (record_full_arch_list_add_mem (addr64
, 10))
6177 if (record_full_arch_list_add_mem (addr64
, 28))
6183 if (record_full_arch_list_add_mem (addr64
, 14))
6187 if (record_full_arch_list_add_mem (addr64
, 80))
6190 if (i386_record_floats (gdbarch
, &ir
,
6191 I386_SAVE_FPU_ENV_REG_STACK
))
6195 if (record_full_arch_list_add_mem (addr64
, 8))
6198 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6203 opcode
= opcode
<< 8 | ir
.modrm
;
6208 /* Opcode is an extension of modR/M byte. */
6214 if (i386_record_floats (gdbarch
, &ir
, I387_ST0_REGNUM (tdep
)))
6218 if (0x0c == (ir
.modrm
>> 4))
6220 if ((ir
.modrm
& 0x0f) <= 7)
6222 if (i386_record_floats (gdbarch
, &ir
,
6223 I386_SAVE_FPU_REGS
))
6228 if (i386_record_floats (gdbarch
, &ir
,
6229 I387_ST0_REGNUM (tdep
)))
6231 /* If only st(0) is changing, then we have already
6233 if ((ir
.modrm
& 0x0f) - 0x08)
6235 if (i386_record_floats (gdbarch
, &ir
,
6236 I387_ST0_REGNUM (tdep
) +
6237 ((ir
.modrm
& 0x0f) - 0x08)))
6255 if (i386_record_floats (gdbarch
, &ir
,
6256 I387_ST0_REGNUM (tdep
)))
6274 if (i386_record_floats (gdbarch
, &ir
,
6275 I386_SAVE_FPU_REGS
))
6279 if (i386_record_floats (gdbarch
, &ir
,
6280 I387_ST0_REGNUM (tdep
)))
6282 if (i386_record_floats (gdbarch
, &ir
,
6283 I387_ST0_REGNUM (tdep
) + 1))
6290 if (0xe9 == ir
.modrm
)
6292 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6295 else if ((0x0c == ir
.modrm
>> 4) || (0x0d == ir
.modrm
>> 4))
6297 if (i386_record_floats (gdbarch
, &ir
,
6298 I387_ST0_REGNUM (tdep
)))
6300 if (((ir
.modrm
& 0x0f) > 0) && ((ir
.modrm
& 0x0f) <= 7))
6302 if (i386_record_floats (gdbarch
, &ir
,
6303 I387_ST0_REGNUM (tdep
) +
6307 else if ((ir
.modrm
& 0x0f) - 0x08)
6309 if (i386_record_floats (gdbarch
, &ir
,
6310 I387_ST0_REGNUM (tdep
) +
6311 ((ir
.modrm
& 0x0f) - 0x08)))
6317 if (0xe3 == ir
.modrm
)
6319 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_ENV
))
6322 else if ((0x0c == ir
.modrm
>> 4) || (0x0d == ir
.modrm
>> 4))
6324 if (i386_record_floats (gdbarch
, &ir
,
6325 I387_ST0_REGNUM (tdep
)))
6327 if (((ir
.modrm
& 0x0f) > 0) && ((ir
.modrm
& 0x0f) <= 7))
6329 if (i386_record_floats (gdbarch
, &ir
,
6330 I387_ST0_REGNUM (tdep
) +
6334 else if ((ir
.modrm
& 0x0f) - 0x08)
6336 if (i386_record_floats (gdbarch
, &ir
,
6337 I387_ST0_REGNUM (tdep
) +
6338 ((ir
.modrm
& 0x0f) - 0x08)))
6344 if ((0x0c == ir
.modrm
>> 4)
6345 || (0x0d == ir
.modrm
>> 4)
6346 || (0x0f == ir
.modrm
>> 4))
6348 if ((ir
.modrm
& 0x0f) <= 7)
6350 if (i386_record_floats (gdbarch
, &ir
,
6351 I387_ST0_REGNUM (tdep
) +
6357 if (i386_record_floats (gdbarch
, &ir
,
6358 I387_ST0_REGNUM (tdep
) +
6359 ((ir
.modrm
& 0x0f) - 0x08)))
6365 if (0x0c == ir
.modrm
>> 4)
6367 if (i386_record_floats (gdbarch
, &ir
,
6368 I387_FTAG_REGNUM (tdep
)))
6371 else if ((0x0d == ir
.modrm
>> 4) || (0x0e == ir
.modrm
>> 4))
6373 if ((ir
.modrm
& 0x0f) <= 7)
6375 if (i386_record_floats (gdbarch
, &ir
,
6376 I387_ST0_REGNUM (tdep
) +
6382 if (i386_record_floats (gdbarch
, &ir
,
6383 I386_SAVE_FPU_REGS
))
6389 if ((0x0c == ir
.modrm
>> 4)
6390 || (0x0e == ir
.modrm
>> 4)
6391 || (0x0f == ir
.modrm
>> 4)
6392 || (0xd9 == ir
.modrm
))
6394 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6399 if (0xe0 == ir
.modrm
)
6401 if (record_full_arch_list_add_reg (ir
.regcache
,
6405 else if ((0x0f == ir
.modrm
>> 4) || (0x0e == ir
.modrm
>> 4))
6407 if (i386_record_floats (gdbarch
, &ir
, I386_SAVE_FPU_REGS
))
6415 case 0xa4: /* movsS */
6417 case 0xaa: /* stosS */
6419 case 0x6c: /* insS */
6421 regcache_raw_read_unsigned (ir
.regcache
,
6422 ir
.regmap
[X86_RECORD_RECX_REGNUM
],
6428 if ((opcode
& 1) == 0)
6431 ir
.ot
= ir
.dflag
+ OT_WORD
;
6432 regcache_raw_read_unsigned (ir
.regcache
,
6433 ir
.regmap
[X86_RECORD_REDI_REGNUM
],
6436 regcache_raw_read_unsigned (ir
.regcache
,
6437 ir
.regmap
[X86_RECORD_ES_REGNUM
],
6439 regcache_raw_read_unsigned (ir
.regcache
,
6440 ir
.regmap
[X86_RECORD_DS_REGNUM
],
6442 if (ir
.aflag
&& (es
!= ds
))
6444 /* addr += ((uint32_t) read_register (I386_ES_REGNUM)) << 4; */
6445 if (record_full_memory_query
)
6448 Process record ignores the memory change of instruction at address %s\n\
6449 because it can't get the value of the segment register.\n\
6450 Do you want to stop the program?"),
6451 paddress (gdbarch
, ir
.orig_addr
)))
6457 if (record_full_arch_list_add_mem (addr
, 1 << ir
.ot
))
6461 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6462 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6463 if (opcode
== 0xa4 || opcode
== 0xa5)
6464 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
6465 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM
);
6466 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6470 case 0xa6: /* cmpsS */
6472 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM
);
6473 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
6474 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6475 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6476 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6479 case 0xac: /* lodsS */
6481 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6482 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
6483 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6484 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6485 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6488 case 0xae: /* scasS */
6490 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM
);
6491 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6492 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6493 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6496 case 0x6e: /* outsS */
6498 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
6499 if (prefixes
& (PREFIX_REPZ
| PREFIX_REPNZ
))
6500 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6501 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6504 case 0xe4: /* port I/O */
6508 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6509 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6519 case 0xc2: /* ret im */
6520 case 0xc3: /* ret */
6521 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
6522 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6525 case 0xca: /* lret im */
6526 case 0xcb: /* lret */
6527 case 0xcf: /* iret */
6528 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM
);
6529 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
6530 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6533 case 0xe8: /* call im */
6534 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
6536 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
6540 case 0x9a: /* lcall im */
6541 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6546 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_CS_REGNUM
);
6547 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
6551 case 0xe9: /* jmp im */
6552 case 0xea: /* ljmp im */
6553 case 0xeb: /* jmp Jb */
6554 case 0x70: /* jcc Jb */
6570 case 0x0f80: /* jcc Jv */
6588 case 0x0f90: /* setcc Gv */
6604 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6606 if (i386_record_modrm (&ir
))
6609 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rex_b
? (ir
.rm
| ir
.rex_b
)
6613 if (i386_record_lea_modrm (&ir
))
6618 case 0x0f40: /* cmov Gv, Ev */
6634 if (i386_record_modrm (&ir
))
6637 if (ir
.dflag
== OT_BYTE
)
6639 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
6643 case 0x9c: /* pushf */
6644 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6645 if (ir
.regmap
[X86_RECORD_R8_REGNUM
] && ir
.dflag
)
6647 if (i386_record_push (&ir
, 1 << (ir
.dflag
+ 1)))
6651 case 0x9d: /* popf */
6652 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
6653 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6656 case 0x9e: /* sahf */
6657 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6663 case 0xf5: /* cmc */
6664 case 0xf8: /* clc */
6665 case 0xf9: /* stc */
6666 case 0xfc: /* cld */
6667 case 0xfd: /* std */
6668 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6671 case 0x9f: /* lahf */
6672 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6677 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6678 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6681 /* bit operations */
6682 case 0x0fba: /* bt/bts/btr/btc Gv, im */
6683 ir
.ot
= ir
.dflag
+ OT_WORD
;
6684 if (i386_record_modrm (&ir
))
6689 opcode
= opcode
<< 8 | ir
.modrm
;
6695 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
6698 if (i386_record_lea_modrm (&ir
))
6702 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6705 case 0x0fa3: /* bt Gv, Ev */
6706 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6709 case 0x0fab: /* bts */
6710 case 0x0fb3: /* btr */
6711 case 0x0fbb: /* btc */
6712 ir
.ot
= ir
.dflag
+ OT_WORD
;
6713 if (i386_record_modrm (&ir
))
6716 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
6720 if (i386_record_lea_modrm_addr (&ir
, &addr64
))
6722 regcache_raw_read_unsigned (ir
.regcache
,
6723 ir
.regmap
[ir
.reg
| rex_r
],
6728 addr64
+= ((int16_t) addr
>> 4) << 4;
6731 addr64
+= ((int32_t) addr
>> 5) << 5;
6734 addr64
+= ((int64_t) addr
>> 6) << 6;
6737 if (record_full_arch_list_add_mem (addr64
, 1 << ir
.ot
))
6739 if (i386_record_lea_modrm (&ir
))
6742 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6745 case 0x0fbc: /* bsf */
6746 case 0x0fbd: /* bsr */
6747 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
6748 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6752 case 0x27: /* daa */
6753 case 0x2f: /* das */
6754 case 0x37: /* aaa */
6755 case 0x3f: /* aas */
6756 case 0xd4: /* aam */
6757 case 0xd5: /* aad */
6758 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6763 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6764 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6768 case 0x90: /* nop */
6769 if (prefixes
& PREFIX_LOCK
)
6776 case 0x9b: /* fwait */
6777 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
6779 opcode
= (uint32_t) opcode8
;
6785 case 0xcc: /* int3 */
6786 gdb_printf (gdb_stderr
,
6787 _("Process record does not support instruction "
6794 case 0xcd: /* int */
6798 if (record_read_memory (gdbarch
, ir
.addr
, &interrupt
, 1))
6801 if (interrupt
!= 0x80
6802 || tdep
->i386_intx80_record
== NULL
)
6804 gdb_printf (gdb_stderr
,
6805 _("Process record does not support "
6806 "instruction int 0x%02x.\n"),
6811 ret
= tdep
->i386_intx80_record (ir
.regcache
);
6818 case 0xce: /* into */
6819 gdb_printf (gdb_stderr
,
6820 _("Process record does not support "
6821 "instruction into.\n"));
6826 case 0xfa: /* cli */
6827 case 0xfb: /* sti */
6830 case 0x62: /* bound */
6831 gdb_printf (gdb_stderr
,
6832 _("Process record does not support "
6833 "instruction bound.\n"));
6838 case 0x0fc8: /* bswap reg */
6846 I386_RECORD_FULL_ARCH_LIST_ADD_REG ((opcode
& 7) | ir
.rex_b
);
6849 case 0xd6: /* salc */
6850 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6855 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6856 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6859 case 0xe0: /* loopnz */
6860 case 0xe1: /* loopz */
6861 case 0xe2: /* loop */
6862 case 0xe3: /* jecxz */
6863 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6864 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6867 case 0x0f30: /* wrmsr */
6868 gdb_printf (gdb_stderr
,
6869 _("Process record does not support "
6870 "instruction wrmsr.\n"));
6875 case 0x0f32: /* rdmsr */
6876 gdb_printf (gdb_stderr
,
6877 _("Process record does not support "
6878 "instruction rdmsr.\n"));
6883 case 0x0f01f9: /* rdtscp */
6884 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6886 case 0x0f31: /* rdtsc */
6887 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6888 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
6891 case 0x0f34: /* sysenter */
6894 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
6899 if (tdep
->i386_sysenter_record
== NULL
)
6901 gdb_printf (gdb_stderr
,
6902 _("Process record does not support "
6903 "instruction sysenter.\n"));
6907 ret
= tdep
->i386_sysenter_record (ir
.regcache
);
6913 case 0x0f35: /* sysexit */
6914 gdb_printf (gdb_stderr
,
6915 _("Process record does not support "
6916 "instruction sysexit.\n"));
6921 case 0x0f05: /* syscall */
6924 if (tdep
->i386_syscall_record
== NULL
)
6926 gdb_printf (gdb_stderr
,
6927 _("Process record does not support "
6928 "instruction syscall.\n"));
6932 ret
= tdep
->i386_syscall_record (ir
.regcache
);
6938 case 0x0f07: /* sysret */
6939 gdb_printf (gdb_stderr
,
6940 _("Process record does not support "
6941 "instruction sysret.\n"));
6946 case 0x0fa2: /* cpuid */
6947 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
6948 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
6949 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
6950 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM
);
6953 case 0xf4: /* hlt */
6954 gdb_printf (gdb_stderr
,
6955 _("Process record does not support "
6956 "instruction hlt.\n"));
6962 if (i386_record_modrm (&ir
))
6969 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
6973 if (i386_record_lea_modrm (&ir
))
6982 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
6986 opcode
= opcode
<< 8 | ir
.modrm
;
6993 if (i386_record_modrm (&ir
))
6995 if (ir
.modrm
== 0xf9)
6997 opcode
= (opcode
<< 8) | 0xf9;
7009 opcode
= opcode
<< 8 | ir
.modrm
;
7012 if (ir
.override
>= 0)
7014 if (record_full_memory_query
)
7017 Process record ignores the memory change of instruction at address %s\n\
7018 because it can't get the value of the segment register.\n\
7019 Do you want to stop the program?"),
7020 paddress (gdbarch
, ir
.orig_addr
)))
7026 if (i386_record_lea_modrm_addr (&ir
, &addr64
))
7028 if (record_full_arch_list_add_mem (addr64
, 2))
7031 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
7033 if (record_full_arch_list_add_mem (addr64
, 8))
7038 if (record_full_arch_list_add_mem (addr64
, 4))
7049 case 0: /* monitor */
7052 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7056 opcode
= opcode
<< 8 | ir
.modrm
;
7064 if (ir
.override
>= 0)
7066 if (record_full_memory_query
)
7069 Process record ignores the memory change of instruction at address %s\n\
7070 because it can't get the value of the segment register.\n\
7071 Do you want to stop the program?"),
7072 paddress (gdbarch
, ir
.orig_addr
)))
7080 if (i386_record_lea_modrm_addr (&ir
, &addr64
))
7082 if (record_full_arch_list_add_mem (addr64
, 2))
7085 if (ir
.regmap
[X86_RECORD_R8_REGNUM
])
7087 if (record_full_arch_list_add_mem (addr64
, 8))
7092 if (record_full_arch_list_add_mem (addr64
, 4))
7104 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
7105 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
7109 else if (ir
.rm
== 1)
7117 opcode
= opcode
<< 8 | ir
.modrm
;
7124 if (record_full_arch_list_add_reg (ir
.regcache
, ir
.rm
| ir
.rex_b
))
7130 if (i386_record_lea_modrm (&ir
))
7133 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7136 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7138 case 7: /* invlpg */
7141 if (ir
.rm
== 0 && ir
.regmap
[X86_RECORD_R8_REGNUM
])
7142 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_GS_REGNUM
);
7146 opcode
= opcode
<< 8 | ir
.modrm
;
7151 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7155 opcode
= opcode
<< 8 | ir
.modrm
;
7161 case 0x0f08: /* invd */
7162 case 0x0f09: /* wbinvd */
7165 case 0x63: /* arpl */
7166 if (i386_record_modrm (&ir
))
7168 if (ir
.mod
== 3 || ir
.regmap
[X86_RECORD_R8_REGNUM
])
7170 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.regmap
[X86_RECORD_R8_REGNUM
]
7171 ? (ir
.reg
| rex_r
) : ir
.rm
);
7175 ir
.ot
= ir
.dflag
? OT_LONG
: OT_WORD
;
7176 if (i386_record_lea_modrm (&ir
))
7179 if (!ir
.regmap
[X86_RECORD_R8_REGNUM
])
7180 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7183 case 0x0f02: /* lar */
7184 case 0x0f03: /* lsl */
7185 if (i386_record_modrm (&ir
))
7187 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
7188 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7192 if (i386_record_modrm (&ir
))
7194 if (ir
.mod
== 3 && ir
.reg
== 3)
7197 opcode
= opcode
<< 8 | ir
.modrm
;
7209 /* nop (multi byte) */
7212 case 0x0f20: /* mov reg, crN */
7213 case 0x0f22: /* mov crN, reg */
7214 if (i386_record_modrm (&ir
))
7216 if ((ir
.modrm
& 0xc0) != 0xc0)
7219 opcode
= opcode
<< 8 | ir
.modrm
;
7230 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7232 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
7236 opcode
= opcode
<< 8 | ir
.modrm
;
7242 case 0x0f21: /* mov reg, drN */
7243 case 0x0f23: /* mov drN, reg */
7244 if (i386_record_modrm (&ir
))
7246 if ((ir
.modrm
& 0xc0) != 0xc0 || ir
.reg
== 4
7247 || ir
.reg
== 5 || ir
.reg
>= 8)
7250 opcode
= opcode
<< 8 | ir
.modrm
;
7254 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7256 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
7259 case 0x0f06: /* clts */
7260 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7263 /* MMX 3DNow! SSE SSE2 SSE3 SSSE3 SSE4 */
7265 case 0x0f0d: /* 3DNow! prefetch */
7268 case 0x0f0e: /* 3DNow! femms */
7269 case 0x0f77: /* emms */
7270 if (i386_fpc_regnum_p (gdbarch
, I387_FTAG_REGNUM(tdep
)))
7272 record_full_arch_list_add_reg (ir
.regcache
, I387_FTAG_REGNUM(tdep
));
7275 case 0x0f0f: /* 3DNow! data */
7276 if (i386_record_modrm (&ir
))
7278 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
7283 case 0x0c: /* 3DNow! pi2fw */
7284 case 0x0d: /* 3DNow! pi2fd */
7285 case 0x1c: /* 3DNow! pf2iw */
7286 case 0x1d: /* 3DNow! pf2id */
7287 case 0x8a: /* 3DNow! pfnacc */
7288 case 0x8e: /* 3DNow! pfpnacc */
7289 case 0x90: /* 3DNow! pfcmpge */
7290 case 0x94: /* 3DNow! pfmin */
7291 case 0x96: /* 3DNow! pfrcp */
7292 case 0x97: /* 3DNow! pfrsqrt */
7293 case 0x9a: /* 3DNow! pfsub */
7294 case 0x9e: /* 3DNow! pfadd */
7295 case 0xa0: /* 3DNow! pfcmpgt */
7296 case 0xa4: /* 3DNow! pfmax */
7297 case 0xa6: /* 3DNow! pfrcpit1 */
7298 case 0xa7: /* 3DNow! pfrsqit1 */
7299 case 0xaa: /* 3DNow! pfsubr */
7300 case 0xae: /* 3DNow! pfacc */
7301 case 0xb0: /* 3DNow! pfcmpeq */
7302 case 0xb4: /* 3DNow! pfmul */
7303 case 0xb6: /* 3DNow! pfrcpit2 */
7304 case 0xb7: /* 3DNow! pmulhrw */
7305 case 0xbb: /* 3DNow! pswapd */
7306 case 0xbf: /* 3DNow! pavgusb */
7307 if (!i386_mmx_regnum_p (gdbarch
, I387_MM0_REGNUM (tdep
) + ir
.reg
))
7308 goto no_support_3dnow_data
;
7309 record_full_arch_list_add_reg (ir
.regcache
, ir
.reg
);
7313 no_support_3dnow_data
:
7314 opcode
= (opcode
<< 8) | opcode8
;
7320 case 0x0faa: /* rsm */
7321 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7322 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REAX_REGNUM
);
7323 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RECX_REGNUM
);
7324 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDX_REGNUM
);
7325 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBX_REGNUM
);
7326 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESP_REGNUM
);
7327 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REBP_REGNUM
);
7328 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_RESI_REGNUM
);
7329 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REDI_REGNUM
);
7333 if (i386_record_modrm (&ir
))
7337 case 0: /* fxsave */
7341 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7342 if (i386_record_lea_modrm_addr (&ir
, &tmpu64
))
7344 if (record_full_arch_list_add_mem (tmpu64
, 512))
7349 case 1: /* fxrstor */
7353 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7355 for (i
= I387_MM0_REGNUM (tdep
);
7356 i386_mmx_regnum_p (gdbarch
, i
); i
++)
7357 record_full_arch_list_add_reg (ir
.regcache
, i
);
7359 for (i
= I387_XMM0_REGNUM (tdep
);
7360 i386_xmm_regnum_p (gdbarch
, i
); i
++)
7361 record_full_arch_list_add_reg (ir
.regcache
, i
);
7363 if (i386_mxcsr_regnum_p (gdbarch
, I387_MXCSR_REGNUM(tdep
)))
7364 record_full_arch_list_add_reg (ir
.regcache
,
7365 I387_MXCSR_REGNUM(tdep
));
7367 for (i
= I387_ST0_REGNUM (tdep
);
7368 i386_fp_regnum_p (gdbarch
, i
); i
++)
7369 record_full_arch_list_add_reg (ir
.regcache
, i
);
7371 for (i
= I387_FCTRL_REGNUM (tdep
);
7372 i386_fpc_regnum_p (gdbarch
, i
); i
++)
7373 record_full_arch_list_add_reg (ir
.regcache
, i
);
7377 case 2: /* ldmxcsr */
7378 if (!i386_mxcsr_regnum_p (gdbarch
, I387_MXCSR_REGNUM(tdep
)))
7380 record_full_arch_list_add_reg (ir
.regcache
, I387_MXCSR_REGNUM(tdep
));
7383 case 3: /* stmxcsr */
7385 if (i386_record_lea_modrm (&ir
))
7389 case 5: /* lfence */
7390 case 6: /* mfence */
7391 case 7: /* sfence clflush */
7395 opcode
= (opcode
<< 8) | ir
.modrm
;
7401 case 0x0fc3: /* movnti */
7402 ir
.ot
= (ir
.dflag
== 2) ? OT_QUAD
: OT_LONG
;
7403 if (i386_record_modrm (&ir
))
7408 if (i386_record_lea_modrm (&ir
))
7412 /* Add prefix to opcode. */
7527 /* Mask out PREFIX_ADDR. */
7528 switch ((prefixes
& ~PREFIX_ADDR
))
7540 reswitch_prefix_add
:
7548 if (record_read_memory (gdbarch
, ir
.addr
, &opcode8
, 1))
7551 opcode
= (uint32_t) opcode8
| opcode
<< 8;
7552 goto reswitch_prefix_add
;
7555 case 0x0f10: /* movups */
7556 case 0x660f10: /* movupd */
7557 case 0xf30f10: /* movss */
7558 case 0xf20f10: /* movsd */
7559 case 0x0f12: /* movlps */
7560 case 0x660f12: /* movlpd */
7561 case 0xf30f12: /* movsldup */
7562 case 0xf20f12: /* movddup */
7563 case 0x0f14: /* unpcklps */
7564 case 0x660f14: /* unpcklpd */
7565 case 0x0f15: /* unpckhps */
7566 case 0x660f15: /* unpckhpd */
7567 case 0x0f16: /* movhps */
7568 case 0x660f16: /* movhpd */
7569 case 0xf30f16: /* movshdup */
7570 case 0x0f28: /* movaps */
7571 case 0x660f28: /* movapd */
7572 case 0x0f2a: /* cvtpi2ps */
7573 case 0x660f2a: /* cvtpi2pd */
7574 case 0xf30f2a: /* cvtsi2ss */
7575 case 0xf20f2a: /* cvtsi2sd */
7576 case 0x0f2c: /* cvttps2pi */
7577 case 0x660f2c: /* cvttpd2pi */
7578 case 0x0f2d: /* cvtps2pi */
7579 case 0x660f2d: /* cvtpd2pi */
7580 case 0x660f3800: /* pshufb */
7581 case 0x660f3801: /* phaddw */
7582 case 0x660f3802: /* phaddd */
7583 case 0x660f3803: /* phaddsw */
7584 case 0x660f3804: /* pmaddubsw */
7585 case 0x660f3805: /* phsubw */
7586 case 0x660f3806: /* phsubd */
7587 case 0x660f3807: /* phsubsw */
7588 case 0x660f3808: /* psignb */
7589 case 0x660f3809: /* psignw */
7590 case 0x660f380a: /* psignd */
7591 case 0x660f380b: /* pmulhrsw */
7592 case 0x660f3810: /* pblendvb */
7593 case 0x660f3814: /* blendvps */
7594 case 0x660f3815: /* blendvpd */
7595 case 0x660f381c: /* pabsb */
7596 case 0x660f381d: /* pabsw */
7597 case 0x660f381e: /* pabsd */
7598 case 0x660f3820: /* pmovsxbw */
7599 case 0x660f3821: /* pmovsxbd */
7600 case 0x660f3822: /* pmovsxbq */
7601 case 0x660f3823: /* pmovsxwd */
7602 case 0x660f3824: /* pmovsxwq */
7603 case 0x660f3825: /* pmovsxdq */
7604 case 0x660f3828: /* pmuldq */
7605 case 0x660f3829: /* pcmpeqq */
7606 case 0x660f382a: /* movntdqa */
7607 case 0x660f3a08: /* roundps */
7608 case 0x660f3a09: /* roundpd */
7609 case 0x660f3a0a: /* roundss */
7610 case 0x660f3a0b: /* roundsd */
7611 case 0x660f3a0c: /* blendps */
7612 case 0x660f3a0d: /* blendpd */
7613 case 0x660f3a0e: /* pblendw */
7614 case 0x660f3a0f: /* palignr */
7615 case 0x660f3a20: /* pinsrb */
7616 case 0x660f3a21: /* insertps */
7617 case 0x660f3a22: /* pinsrd pinsrq */
7618 case 0x660f3a40: /* dpps */
7619 case 0x660f3a41: /* dppd */
7620 case 0x660f3a42: /* mpsadbw */
7621 case 0x660f3a60: /* pcmpestrm */
7622 case 0x660f3a61: /* pcmpestri */
7623 case 0x660f3a62: /* pcmpistrm */
7624 case 0x660f3a63: /* pcmpistri */
7625 case 0x0f51: /* sqrtps */
7626 case 0x660f51: /* sqrtpd */
7627 case 0xf20f51: /* sqrtsd */
7628 case 0xf30f51: /* sqrtss */
7629 case 0x0f52: /* rsqrtps */
7630 case 0xf30f52: /* rsqrtss */
7631 case 0x0f53: /* rcpps */
7632 case 0xf30f53: /* rcpss */
7633 case 0x0f54: /* andps */
7634 case 0x660f54: /* andpd */
7635 case 0x0f55: /* andnps */
7636 case 0x660f55: /* andnpd */
7637 case 0x0f56: /* orps */
7638 case 0x660f56: /* orpd */
7639 case 0x0f57: /* xorps */
7640 case 0x660f57: /* xorpd */
7641 case 0x0f58: /* addps */
7642 case 0x660f58: /* addpd */
7643 case 0xf20f58: /* addsd */
7644 case 0xf30f58: /* addss */
7645 case 0x0f59: /* mulps */
7646 case 0x660f59: /* mulpd */
7647 case 0xf20f59: /* mulsd */
7648 case 0xf30f59: /* mulss */
7649 case 0x0f5a: /* cvtps2pd */
7650 case 0x660f5a: /* cvtpd2ps */
7651 case 0xf20f5a: /* cvtsd2ss */
7652 case 0xf30f5a: /* cvtss2sd */
7653 case 0x0f5b: /* cvtdq2ps */
7654 case 0x660f5b: /* cvtps2dq */
7655 case 0xf30f5b: /* cvttps2dq */
7656 case 0x0f5c: /* subps */
7657 case 0x660f5c: /* subpd */
7658 case 0xf20f5c: /* subsd */
7659 case 0xf30f5c: /* subss */
7660 case 0x0f5d: /* minps */
7661 case 0x660f5d: /* minpd */
7662 case 0xf20f5d: /* minsd */
7663 case 0xf30f5d: /* minss */
7664 case 0x0f5e: /* divps */
7665 case 0x660f5e: /* divpd */
7666 case 0xf20f5e: /* divsd */
7667 case 0xf30f5e: /* divss */
7668 case 0x0f5f: /* maxps */
7669 case 0x660f5f: /* maxpd */
7670 case 0xf20f5f: /* maxsd */
7671 case 0xf30f5f: /* maxss */
7672 case 0x660f60: /* punpcklbw */
7673 case 0x660f61: /* punpcklwd */
7674 case 0x660f62: /* punpckldq */
7675 case 0x660f63: /* packsswb */
7676 case 0x660f64: /* pcmpgtb */
7677 case 0x660f65: /* pcmpgtw */
7678 case 0x660f66: /* pcmpgtd */
7679 case 0x660f67: /* packuswb */
7680 case 0x660f68: /* punpckhbw */
7681 case 0x660f69: /* punpckhwd */
7682 case 0x660f6a: /* punpckhdq */
7683 case 0x660f6b: /* packssdw */
7684 case 0x660f6c: /* punpcklqdq */
7685 case 0x660f6d: /* punpckhqdq */
7686 case 0x660f6e: /* movd */
7687 case 0x660f6f: /* movdqa */
7688 case 0xf30f6f: /* movdqu */
7689 case 0x660f70: /* pshufd */
7690 case 0xf20f70: /* pshuflw */
7691 case 0xf30f70: /* pshufhw */
7692 case 0x660f74: /* pcmpeqb */
7693 case 0x660f75: /* pcmpeqw */
7694 case 0x660f76: /* pcmpeqd */
7695 case 0x660f7c: /* haddpd */
7696 case 0xf20f7c: /* haddps */
7697 case 0x660f7d: /* hsubpd */
7698 case 0xf20f7d: /* hsubps */
7699 case 0xf30f7e: /* movq */
7700 case 0x0fc2: /* cmpps */
7701 case 0x660fc2: /* cmppd */
7702 case 0xf20fc2: /* cmpsd */
7703 case 0xf30fc2: /* cmpss */
7704 case 0x660fc4: /* pinsrw */
7705 case 0x0fc6: /* shufps */
7706 case 0x660fc6: /* shufpd */
7707 case 0x660fd0: /* addsubpd */
7708 case 0xf20fd0: /* addsubps */
7709 case 0x660fd1: /* psrlw */
7710 case 0x660fd2: /* psrld */
7711 case 0x660fd3: /* psrlq */
7712 case 0x660fd4: /* paddq */
7713 case 0x660fd5: /* pmullw */
7714 case 0xf30fd6: /* movq2dq */
7715 case 0x660fd8: /* psubusb */
7716 case 0x660fd9: /* psubusw */
7717 case 0x660fda: /* pminub */
7718 case 0x660fdb: /* pand */
7719 case 0x660fdc: /* paddusb */
7720 case 0x660fdd: /* paddusw */
7721 case 0x660fde: /* pmaxub */
7722 case 0x660fdf: /* pandn */
7723 case 0x660fe0: /* pavgb */
7724 case 0x660fe1: /* psraw */
7725 case 0x660fe2: /* psrad */
7726 case 0x660fe3: /* pavgw */
7727 case 0x660fe4: /* pmulhuw */
7728 case 0x660fe5: /* pmulhw */
7729 case 0x660fe6: /* cvttpd2dq */
7730 case 0xf20fe6: /* cvtpd2dq */
7731 case 0xf30fe6: /* cvtdq2pd */
7732 case 0x660fe8: /* psubsb */
7733 case 0x660fe9: /* psubsw */
7734 case 0x660fea: /* pminsw */
7735 case 0x660feb: /* por */
7736 case 0x660fec: /* paddsb */
7737 case 0x660fed: /* paddsw */
7738 case 0x660fee: /* pmaxsw */
7739 case 0x660fef: /* pxor */
7740 case 0xf20ff0: /* lddqu */
7741 case 0x660ff1: /* psllw */
7742 case 0x660ff2: /* pslld */
7743 case 0x660ff3: /* psllq */
7744 case 0x660ff4: /* pmuludq */
7745 case 0x660ff5: /* pmaddwd */
7746 case 0x660ff6: /* psadbw */
7747 case 0x660ff8: /* psubb */
7748 case 0x660ff9: /* psubw */
7749 case 0x660ffa: /* psubd */
7750 case 0x660ffb: /* psubq */
7751 case 0x660ffc: /* paddb */
7752 case 0x660ffd: /* paddw */
7753 case 0x660ffe: /* paddd */
7754 if (i386_record_modrm (&ir
))
7757 if (!i386_xmm_regnum_p (gdbarch
, I387_XMM0_REGNUM (tdep
) + ir
.reg
))
7759 record_full_arch_list_add_reg (ir
.regcache
,
7760 I387_XMM0_REGNUM (tdep
) + ir
.reg
);
7761 if ((opcode
& 0xfffffffc) == 0x660f3a60)
7762 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
7765 case 0x0f11: /* movups */
7766 case 0x660f11: /* movupd */
7767 case 0xf30f11: /* movss */
7768 case 0xf20f11: /* movsd */
7769 case 0x0f13: /* movlps */
7770 case 0x660f13: /* movlpd */
7771 case 0x0f17: /* movhps */
7772 case 0x660f17: /* movhpd */
7773 case 0x0f29: /* movaps */
7774 case 0x660f29: /* movapd */
7775 case 0x660f3a14: /* pextrb */
7776 case 0x660f3a15: /* pextrw */
7777 case 0x660f3a16: /* pextrd pextrq */
7778 case 0x660f3a17: /* extractps */
7779 case 0x660f7f: /* movdqa */
7780 case 0xf30f7f: /* movdqu */
7781 if (i386_record_modrm (&ir
))
7785 if (opcode
== 0x0f13 || opcode
== 0x660f13
7786 || opcode
== 0x0f17 || opcode
== 0x660f17)
7789 if (!i386_xmm_regnum_p (gdbarch
,
7790 I387_XMM0_REGNUM (tdep
) + ir
.rm
))
7792 record_full_arch_list_add_reg (ir
.regcache
,
7793 I387_XMM0_REGNUM (tdep
) + ir
.rm
);
7815 if (i386_record_lea_modrm (&ir
))
7820 case 0x0f2b: /* movntps */
7821 case 0x660f2b: /* movntpd */
7822 case 0x0fe7: /* movntq */
7823 case 0x660fe7: /* movntdq */
7826 if (opcode
== 0x0fe7)
7830 if (i386_record_lea_modrm (&ir
))
7834 case 0xf30f2c: /* cvttss2si */
7835 case 0xf20f2c: /* cvttsd2si */
7836 case 0xf30f2d: /* cvtss2si */
7837 case 0xf20f2d: /* cvtsd2si */
7838 case 0xf20f38f0: /* crc32 */
7839 case 0xf20f38f1: /* crc32 */
7840 case 0x0f50: /* movmskps */
7841 case 0x660f50: /* movmskpd */
7842 case 0x0fc5: /* pextrw */
7843 case 0x660fc5: /* pextrw */
7844 case 0x0fd7: /* pmovmskb */
7845 case 0x660fd7: /* pmovmskb */
7846 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
| rex_r
);
7849 case 0x0f3800: /* pshufb */
7850 case 0x0f3801: /* phaddw */
7851 case 0x0f3802: /* phaddd */
7852 case 0x0f3803: /* phaddsw */
7853 case 0x0f3804: /* pmaddubsw */
7854 case 0x0f3805: /* phsubw */
7855 case 0x0f3806: /* phsubd */
7856 case 0x0f3807: /* phsubsw */
7857 case 0x0f3808: /* psignb */
7858 case 0x0f3809: /* psignw */
7859 case 0x0f380a: /* psignd */
7860 case 0x0f380b: /* pmulhrsw */
7861 case 0x0f381c: /* pabsb */
7862 case 0x0f381d: /* pabsw */
7863 case 0x0f381e: /* pabsd */
7864 case 0x0f382b: /* packusdw */
7865 case 0x0f3830: /* pmovzxbw */
7866 case 0x0f3831: /* pmovzxbd */
7867 case 0x0f3832: /* pmovzxbq */
7868 case 0x0f3833: /* pmovzxwd */
7869 case 0x0f3834: /* pmovzxwq */
7870 case 0x0f3835: /* pmovzxdq */
7871 case 0x0f3837: /* pcmpgtq */
7872 case 0x0f3838: /* pminsb */
7873 case 0x0f3839: /* pminsd */
7874 case 0x0f383a: /* pminuw */
7875 case 0x0f383b: /* pminud */
7876 case 0x0f383c: /* pmaxsb */
7877 case 0x0f383d: /* pmaxsd */
7878 case 0x0f383e: /* pmaxuw */
7879 case 0x0f383f: /* pmaxud */
7880 case 0x0f3840: /* pmulld */
7881 case 0x0f3841: /* phminposuw */
7882 case 0x0f3a0f: /* palignr */
7883 case 0x0f60: /* punpcklbw */
7884 case 0x0f61: /* punpcklwd */
7885 case 0x0f62: /* punpckldq */
7886 case 0x0f63: /* packsswb */
7887 case 0x0f64: /* pcmpgtb */
7888 case 0x0f65: /* pcmpgtw */
7889 case 0x0f66: /* pcmpgtd */
7890 case 0x0f67: /* packuswb */
7891 case 0x0f68: /* punpckhbw */
7892 case 0x0f69: /* punpckhwd */
7893 case 0x0f6a: /* punpckhdq */
7894 case 0x0f6b: /* packssdw */
7895 case 0x0f6e: /* movd */
7896 case 0x0f6f: /* movq */
7897 case 0x0f70: /* pshufw */
7898 case 0x0f74: /* pcmpeqb */
7899 case 0x0f75: /* pcmpeqw */
7900 case 0x0f76: /* pcmpeqd */
7901 case 0x0fc4: /* pinsrw */
7902 case 0x0fd1: /* psrlw */
7903 case 0x0fd2: /* psrld */
7904 case 0x0fd3: /* psrlq */
7905 case 0x0fd4: /* paddq */
7906 case 0x0fd5: /* pmullw */
7907 case 0xf20fd6: /* movdq2q */
7908 case 0x0fd8: /* psubusb */
7909 case 0x0fd9: /* psubusw */
7910 case 0x0fda: /* pminub */
7911 case 0x0fdb: /* pand */
7912 case 0x0fdc: /* paddusb */
7913 case 0x0fdd: /* paddusw */
7914 case 0x0fde: /* pmaxub */
7915 case 0x0fdf: /* pandn */
7916 case 0x0fe0: /* pavgb */
7917 case 0x0fe1: /* psraw */
7918 case 0x0fe2: /* psrad */
7919 case 0x0fe3: /* pavgw */
7920 case 0x0fe4: /* pmulhuw */
7921 case 0x0fe5: /* pmulhw */
7922 case 0x0fe8: /* psubsb */
7923 case 0x0fe9: /* psubsw */
7924 case 0x0fea: /* pminsw */
7925 case 0x0feb: /* por */
7926 case 0x0fec: /* paddsb */
7927 case 0x0fed: /* paddsw */
7928 case 0x0fee: /* pmaxsw */
7929 case 0x0fef: /* pxor */
7930 case 0x0ff1: /* psllw */
7931 case 0x0ff2: /* pslld */
7932 case 0x0ff3: /* psllq */
7933 case 0x0ff4: /* pmuludq */
7934 case 0x0ff5: /* pmaddwd */
7935 case 0x0ff6: /* psadbw */
7936 case 0x0ff8: /* psubb */
7937 case 0x0ff9: /* psubw */
7938 case 0x0ffa: /* psubd */
7939 case 0x0ffb: /* psubq */
7940 case 0x0ffc: /* paddb */
7941 case 0x0ffd: /* paddw */
7942 case 0x0ffe: /* paddd */
7943 if (i386_record_modrm (&ir
))
7945 if (!i386_mmx_regnum_p (gdbarch
, I387_MM0_REGNUM (tdep
) + ir
.reg
))
7947 record_full_arch_list_add_reg (ir
.regcache
,
7948 I387_MM0_REGNUM (tdep
) + ir
.reg
);
7951 case 0x0f71: /* psllw */
7952 case 0x0f72: /* pslld */
7953 case 0x0f73: /* psllq */
7954 if (i386_record_modrm (&ir
))
7956 if (!i386_mmx_regnum_p (gdbarch
, I387_MM0_REGNUM (tdep
) + ir
.rm
))
7958 record_full_arch_list_add_reg (ir
.regcache
,
7959 I387_MM0_REGNUM (tdep
) + ir
.rm
);
7962 case 0x660f71: /* psllw */
7963 case 0x660f72: /* pslld */
7964 case 0x660f73: /* psllq */
7965 if (i386_record_modrm (&ir
))
7968 if (!i386_xmm_regnum_p (gdbarch
, I387_XMM0_REGNUM (tdep
) + ir
.rm
))
7970 record_full_arch_list_add_reg (ir
.regcache
,
7971 I387_XMM0_REGNUM (tdep
) + ir
.rm
);
7974 case 0x0f7e: /* movd */
7975 case 0x660f7e: /* movd */
7976 if (i386_record_modrm (&ir
))
7979 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.rm
| ir
.rex_b
);
7986 if (i386_record_lea_modrm (&ir
))
7991 case 0x0f7f: /* movq */
7992 if (i386_record_modrm (&ir
))
7996 if (!i386_mmx_regnum_p (gdbarch
, I387_MM0_REGNUM (tdep
) + ir
.rm
))
7998 record_full_arch_list_add_reg (ir
.regcache
,
7999 I387_MM0_REGNUM (tdep
) + ir
.rm
);
8004 if (i386_record_lea_modrm (&ir
))
8009 case 0xf30fb8: /* popcnt */
8010 if (i386_record_modrm (&ir
))
8012 I386_RECORD_FULL_ARCH_LIST_ADD_REG (ir
.reg
);
8013 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
8016 case 0x660fd6: /* movq */
8017 if (i386_record_modrm (&ir
))
8022 if (!i386_xmm_regnum_p (gdbarch
,
8023 I387_XMM0_REGNUM (tdep
) + ir
.rm
))
8025 record_full_arch_list_add_reg (ir
.regcache
,
8026 I387_XMM0_REGNUM (tdep
) + ir
.rm
);
8031 if (i386_record_lea_modrm (&ir
))
8036 case 0x660f3817: /* ptest */
8037 case 0x0f2e: /* ucomiss */
8038 case 0x660f2e: /* ucomisd */
8039 case 0x0f2f: /* comiss */
8040 case 0x660f2f: /* comisd */
8041 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_EFLAGS_REGNUM
);
8044 case 0x0ff7: /* maskmovq */
8045 regcache_raw_read_unsigned (ir
.regcache
,
8046 ir
.regmap
[X86_RECORD_REDI_REGNUM
],
8048 if (record_full_arch_list_add_mem (addr
, 64))
8052 case 0x660ff7: /* maskmovdqu */
8053 regcache_raw_read_unsigned (ir
.regcache
,
8054 ir
.regmap
[X86_RECORD_REDI_REGNUM
],
8056 if (record_full_arch_list_add_mem (addr
, 128))
8071 /* In the future, maybe still need to deal with need_dasm. */
8072 I386_RECORD_FULL_ARCH_LIST_ADD_REG (X86_RECORD_REIP_REGNUM
);
8073 if (record_full_arch_list_add_end ())
8079 gdb_printf (gdb_stderr
,
8080 _("Process record does not support instruction 0x%02x "
8081 "at address %s.\n"),
8082 (unsigned int) (opcode
),
8083 paddress (gdbarch
, ir
.orig_addr
));
8087 static const int i386_record_regmap
[] =
8089 I386_EAX_REGNUM
, I386_ECX_REGNUM
, I386_EDX_REGNUM
, I386_EBX_REGNUM
,
8090 I386_ESP_REGNUM
, I386_EBP_REGNUM
, I386_ESI_REGNUM
, I386_EDI_REGNUM
,
8091 0, 0, 0, 0, 0, 0, 0, 0,
8092 I386_EIP_REGNUM
, I386_EFLAGS_REGNUM
, I386_CS_REGNUM
, I386_SS_REGNUM
,
8093 I386_DS_REGNUM
, I386_ES_REGNUM
, I386_FS_REGNUM
, I386_GS_REGNUM
8096 /* Check that the given address appears suitable for a fast
8097 tracepoint, which on x86-64 means that we need an instruction of at
8098 least 5 bytes, so that we can overwrite it with a 4-byte-offset
8099 jump and not have to worry about program jumps to an address in the
8100 middle of the tracepoint jump. On x86, it may be possible to use
8101 4-byte jumps with a 2-byte offset to a trampoline located in the
8102 bottom 64 KiB of memory. Returns 1 if OK, and writes a size
8103 of instruction to replace, and 0 if not, plus an explanatory
8107 i386_fast_tracepoint_valid_at (struct gdbarch
*gdbarch
, CORE_ADDR addr
,
8112 /* Ask the target for the minimum instruction length supported. */
8113 jumplen
= target_get_min_fast_tracepoint_insn_len ();
8117 /* If the target does not support the get_min_fast_tracepoint_insn_len
8118 operation, assume that fast tracepoints will always be implemented
8119 using 4-byte relative jumps on both x86 and x86-64. */
8122 else if (jumplen
== 0)
8124 /* If the target does support get_min_fast_tracepoint_insn_len but
8125 returns zero, then the IPA has not loaded yet. In this case,
8126 we optimistically assume that truncated 2-byte relative jumps
8127 will be available on x86, and compensate later if this assumption
8128 turns out to be incorrect. On x86-64 architectures, 4-byte relative
8129 jumps will always be used. */
8130 jumplen
= (register_size (gdbarch
, 0) == 8) ? 5 : 4;
8133 /* Check for fit. */
8134 len
= gdb_insn_length (gdbarch
, addr
);
8138 /* Return a bit of target-specific detail to add to the caller's
8139 generic failure message. */
8141 *msg
= string_printf (_("; instruction is only %d bytes long, "
8142 "need at least %d bytes for the jump"),
8154 /* Return a floating-point format for a floating-point variable of
8155 length LEN in bits. If non-NULL, NAME is the name of its type.
8156 If no suitable type is found, return NULL. */
8158 static const struct floatformat
**
8159 i386_floatformat_for_type (struct gdbarch
*gdbarch
,
8160 const char *name
, int len
)
8162 if (len
== 128 && name
)
8163 if (strcmp (name
, "__float128") == 0
8164 || strcmp (name
, "_Float128") == 0
8165 || strcmp (name
, "complex _Float128") == 0
8166 || strcmp (name
, "complex(kind=16)") == 0
8167 || strcmp (name
, "COMPLEX(16)") == 0
8168 || strcmp (name
, "complex*32") == 0
8169 || strcmp (name
, "COMPLEX*32") == 0
8170 || strcmp (name
, "quad complex") == 0
8171 || strcmp (name
, "real(kind=16)") == 0
8172 || strcmp (name
, "real*16") == 0
8173 || strcmp (name
, "REAL*16") == 0
8174 || strcmp (name
, "REAL(16)") == 0)
8175 return floatformats_ieee_quad
;
8177 return default_floatformat_for_type (gdbarch
, name
, len
);
8180 /* Compute an XCR0 mask based on a target description. */
8183 i386_xcr0_from_tdesc (const struct target_desc
*tdesc
)
8185 if (! tdesc_has_registers (tdesc
))
8188 const struct tdesc_feature
*feature_core
;
8190 const struct tdesc_feature
*feature_sse
, *feature_avx
, *feature_mpx
,
8191 *feature_avx512
, *feature_pkeys
;
8193 /* Get core registers. */
8194 feature_core
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.core");
8195 if (feature_core
== NULL
)
8198 /* Get SSE registers. */
8199 feature_sse
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.sse");
8201 /* Try AVX registers. */
8202 feature_avx
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.avx");
8204 /* Try MPX registers. */
8205 feature_mpx
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.mpx");
8207 /* Try AVX512 registers. */
8208 feature_avx512
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.avx512");
8211 feature_pkeys
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.pkeys");
8213 /* The XCR0 bits. */
8214 uint64_t xcr0
= X86_XSTATE_X87
;
8217 xcr0
|= X86_XSTATE_SSE
;
8221 /* AVX register description requires SSE register description. */
8225 xcr0
|= X86_XSTATE_AVX
;
8229 xcr0
|= X86_XSTATE_MPX_MASK
;
8233 /* AVX512 register description requires AVX register description. */
8237 xcr0
|= X86_XSTATE_AVX512
;
8241 xcr0
|= X86_XSTATE_PKRU
;
8247 i386_validate_tdesc_p (i386_gdbarch_tdep
*tdep
,
8248 struct tdesc_arch_data
*tdesc_data
)
8250 const struct target_desc
*tdesc
= tdep
->tdesc
;
8251 const struct tdesc_feature
*feature_core
;
8253 const struct tdesc_feature
*feature_sse
, *feature_avx
, *feature_mpx
,
8254 *feature_avx512
, *feature_pkeys
, *feature_segments
;
8255 int i
, num_regs
, valid_p
;
8257 if (! tdesc_has_registers (tdesc
))
8260 /* Get core registers. */
8261 feature_core
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.core");
8262 if (feature_core
== NULL
)
8265 /* Get SSE registers. */
8266 feature_sse
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.sse");
8268 /* Try AVX registers. */
8269 feature_avx
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.avx");
8271 /* Try MPX registers. */
8272 feature_mpx
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.mpx");
8274 /* Try AVX512 registers. */
8275 feature_avx512
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.avx512");
8277 /* Try segment base registers. */
8278 feature_segments
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.segments");
8281 feature_pkeys
= tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.pkeys");
8285 /* The XCR0 bits. */
8288 /* AVX512 register description requires AVX register description. */
8292 tdep
->xcr0
= X86_XSTATE_AVX_AVX512_MASK
;
8294 /* It may have been set by OSABI initialization function. */
8295 if (tdep
->k0_regnum
< 0)
8297 tdep
->k_register_names
= i386_k_names
;
8298 tdep
->k0_regnum
= I386_K0_REGNUM
;
8301 for (i
= 0; i
< I387_NUM_K_REGS
; i
++)
8302 valid_p
&= tdesc_numbered_register (feature_avx512
, tdesc_data
,
8303 tdep
->k0_regnum
+ i
,
8306 if (tdep
->num_zmm_regs
== 0)
8308 tdep
->zmmh_register_names
= i386_zmmh_names
;
8309 tdep
->num_zmm_regs
= 8;
8310 tdep
->zmm0h_regnum
= I386_ZMM0H_REGNUM
;
8313 for (i
= 0; i
< tdep
->num_zmm_regs
; i
++)
8314 valid_p
&= tdesc_numbered_register (feature_avx512
, tdesc_data
,
8315 tdep
->zmm0h_regnum
+ i
,
8316 tdep
->zmmh_register_names
[i
]);
8318 for (i
= 0; i
< tdep
->num_xmm_avx512_regs
; i
++)
8319 valid_p
&= tdesc_numbered_register (feature_avx512
, tdesc_data
,
8320 tdep
->xmm16_regnum
+ i
,
8321 tdep
->xmm_avx512_register_names
[i
]);
8323 for (i
= 0; i
< tdep
->num_ymm_avx512_regs
; i
++)
8324 valid_p
&= tdesc_numbered_register (feature_avx512
, tdesc_data
,
8325 tdep
->ymm16h_regnum
+ i
,
8326 tdep
->ymm16h_register_names
[i
]);
8330 /* AVX register description requires SSE register description. */
8334 if (!feature_avx512
)
8335 tdep
->xcr0
= X86_XSTATE_AVX_MASK
;
8337 /* It may have been set by OSABI initialization function. */
8338 if (tdep
->num_ymm_regs
== 0)
8340 tdep
->ymmh_register_names
= i386_ymmh_names
;
8341 tdep
->num_ymm_regs
= 8;
8342 tdep
->ymm0h_regnum
= I386_YMM0H_REGNUM
;
8345 for (i
= 0; i
< tdep
->num_ymm_regs
; i
++)
8346 valid_p
&= tdesc_numbered_register (feature_avx
, tdesc_data
,
8347 tdep
->ymm0h_regnum
+ i
,
8348 tdep
->ymmh_register_names
[i
]);
8350 else if (feature_sse
)
8351 tdep
->xcr0
= X86_XSTATE_SSE_MASK
;
8354 tdep
->xcr0
= X86_XSTATE_X87_MASK
;
8355 tdep
->num_xmm_regs
= 0;
8358 num_regs
= tdep
->num_core_regs
;
8359 for (i
= 0; i
< num_regs
; i
++)
8360 valid_p
&= tdesc_numbered_register (feature_core
, tdesc_data
, i
,
8361 tdep
->register_names
[i
]);
8365 /* Need to include %mxcsr, so add one. */
8366 num_regs
+= tdep
->num_xmm_regs
+ 1;
8367 for (; i
< num_regs
; i
++)
8368 valid_p
&= tdesc_numbered_register (feature_sse
, tdesc_data
, i
,
8369 tdep
->register_names
[i
]);
8374 tdep
->xcr0
|= X86_XSTATE_MPX_MASK
;
8376 if (tdep
->bnd0r_regnum
< 0)
8378 tdep
->mpx_register_names
= i386_mpx_names
;
8379 tdep
->bnd0r_regnum
= I386_BND0R_REGNUM
;
8380 tdep
->bndcfgu_regnum
= I386_BNDCFGU_REGNUM
;
8383 for (i
= 0; i
< I387_NUM_MPX_REGS
; i
++)
8384 valid_p
&= tdesc_numbered_register (feature_mpx
, tdesc_data
,
8385 I387_BND0R_REGNUM (tdep
) + i
,
8386 tdep
->mpx_register_names
[i
]);
8389 if (feature_segments
)
8391 if (tdep
->fsbase_regnum
< 0)
8392 tdep
->fsbase_regnum
= I386_FSBASE_REGNUM
;
8393 valid_p
&= tdesc_numbered_register (feature_segments
, tdesc_data
,
8394 tdep
->fsbase_regnum
, "fs_base");
8395 valid_p
&= tdesc_numbered_register (feature_segments
, tdesc_data
,
8396 tdep
->fsbase_regnum
+ 1, "gs_base");
8401 tdep
->xcr0
|= X86_XSTATE_PKRU
;
8402 if (tdep
->pkru_regnum
< 0)
8404 tdep
->pkeys_register_names
= i386_pkeys_names
;
8405 tdep
->pkru_regnum
= I386_PKRU_REGNUM
;
8406 tdep
->num_pkeys_regs
= 1;
8409 for (i
= 0; i
< I387_NUM_PKEYS_REGS
; i
++)
8410 valid_p
&= tdesc_numbered_register (feature_pkeys
, tdesc_data
,
8411 I387_PKRU_REGNUM (tdep
) + i
,
8412 tdep
->pkeys_register_names
[i
]);
8420 /* Implement the type_align gdbarch function. */
8423 i386_type_align (struct gdbarch
*gdbarch
, struct type
*type
)
8425 type
= check_typedef (type
);
8427 if (gdbarch_ptr_bit (gdbarch
) == 32)
8429 if ((type
->code () == TYPE_CODE_INT
8430 || type
->code () == TYPE_CODE_FLT
)
8431 && type
->length () > 4)
8434 /* Handle x86's funny long double. */
8435 if (type
->code () == TYPE_CODE_FLT
8436 && gdbarch_long_double_bit (gdbarch
) == type
->length () * 8)
8444 /* Note: This is called for both i386 and amd64. */
8446 static struct gdbarch
*
8447 i386_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
8449 const struct target_desc
*tdesc
;
8455 x86_xsave_layout xsave_layout
= target_fetch_x86_xsave_layout ();
8457 /* If the target did not provide an XSAVE layout but the target
8458 description includes registers from the XSAVE extended region,
8459 use a fallback XSAVE layout. Specifically, this fallback layout
8460 is used when writing out a local core dump for a remote
8462 if (xsave_layout
.sizeof_xsave
== 0)
8464 = i387_fallback_xsave_layout (i386_xcr0_from_tdesc (info
.target_desc
));
8466 /* If there is already a candidate, use it. */
8467 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
8469 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
8471 /* Check that the XSAVE layout of ARCHES matches the layout for
8472 the current target. */
8473 i386_gdbarch_tdep
*other_tdep
8474 = gdbarch_tdep
<i386_gdbarch_tdep
> (arches
->gdbarch
);
8476 if (other_tdep
->xsave_layout
== xsave_layout
)
8477 return arches
->gdbarch
;
8480 /* Allocate space for the new architecture. Assume i386 for now. */
8482 = gdbarch_alloc (&info
, gdbarch_tdep_up (new i386_gdbarch_tdep
));
8483 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (gdbarch
);
8485 /* General-purpose registers. */
8486 tdep
->gregset_reg_offset
= NULL
;
8487 tdep
->gregset_num_regs
= I386_NUM_GREGS
;
8488 tdep
->sizeof_gregset
= 0;
8490 /* Floating-point registers. */
8491 tdep
->sizeof_fpregset
= I387_SIZEOF_FSAVE
;
8492 tdep
->fpregset
= &i386_fpregset
;
8494 /* The default settings include the FPU registers, the MMX registers
8495 and the SSE registers. This can be overridden for a specific ABI
8496 by adjusting the members `st0_regnum', `mm0_regnum' and
8497 `num_xmm_regs' of `struct gdbarch_tdep', otherwise the registers
8498 will show up in the output of "info all-registers". */
8500 tdep
->st0_regnum
= I386_ST0_REGNUM
;
8502 /* I386_NUM_XREGS includes %mxcsr, so substract one. */
8503 tdep
->num_xmm_regs
= I386_NUM_XREGS
- 1;
8505 tdep
->jb_pc_offset
= -1;
8506 tdep
->struct_return
= pcc_struct_return
;
8507 tdep
->sigtramp_start
= 0;
8508 tdep
->sigtramp_end
= 0;
8509 tdep
->sigtramp_p
= i386_sigtramp_p
;
8510 tdep
->sigcontext_addr
= NULL
;
8511 tdep
->sc_reg_offset
= NULL
;
8512 tdep
->sc_pc_offset
= -1;
8513 tdep
->sc_sp_offset
= -1;
8515 tdep
->xsave_xcr0_offset
= -1;
8517 tdep
->record_regmap
= i386_record_regmap
;
8519 set_gdbarch_type_align (gdbarch
, i386_type_align
);
8521 /* The format used for `long double' on almost all i386 targets is
8522 the i387 extended floating-point format. In fact, of all targets
8523 in the GCC 2.95 tree, only OSF/1 does it different, and insists
8524 on having a `long double' that's not `long' at all. */
8525 set_gdbarch_long_double_format (gdbarch
, floatformats_i387_ext
);
8527 /* Although the i387 extended floating-point has only 80 significant
8528 bits, a `long double' actually takes up 96, probably to enforce
8530 set_gdbarch_long_double_bit (gdbarch
, 96);
8532 /* Support of bfloat16 format. */
8533 set_gdbarch_bfloat16_format (gdbarch
, floatformats_bfloat16
);
8535 /* Support for floating-point data type variants. */
8536 set_gdbarch_floatformat_for_type (gdbarch
, i386_floatformat_for_type
);
8538 /* Register numbers of various important registers. */
8539 set_gdbarch_sp_regnum (gdbarch
, I386_ESP_REGNUM
); /* %esp */
8540 set_gdbarch_pc_regnum (gdbarch
, I386_EIP_REGNUM
); /* %eip */
8541 set_gdbarch_ps_regnum (gdbarch
, I386_EFLAGS_REGNUM
); /* %eflags */
8542 set_gdbarch_fp0_regnum (gdbarch
, I386_ST0_REGNUM
); /* %st(0) */
8544 /* NOTE: kettenis/20040418: GCC does have two possible register
8545 numbering schemes on the i386: dbx and SVR4. These schemes
8546 differ in how they number %ebp, %esp, %eflags, and the
8547 floating-point registers, and are implemented by the arrays
8548 dbx_register_map[] and svr4_dbx_register_map in
8549 gcc/config/i386.c. GCC also defines a third numbering scheme in
8550 gcc/config/i386.c, which it designates as the "default" register
8551 map used in 64bit mode. This last register numbering scheme is
8552 implemented in dbx64_register_map, and is used for AMD64; see
8555 Currently, each GCC i386 target always uses the same register
8556 numbering scheme across all its supported debugging formats
8557 i.e. SDB (COFF), stabs and DWARF 2. This is because
8558 gcc/sdbout.c, gcc/dbxout.c and gcc/dwarf2out.c all use the
8559 DBX_REGISTER_NUMBER macro which is defined by each target's
8560 respective config header in a manner independent of the requested
8561 output debugging format.
8563 This does not match the arrangement below, which presumes that
8564 the SDB and stabs numbering schemes differ from the DWARF and
8565 DWARF 2 ones. The reason for this arrangement is that it is
8566 likely to get the numbering scheme for the target's
8567 default/native debug format right. For targets where GCC is the
8568 native compiler (FreeBSD, NetBSD, OpenBSD, GNU/Linux) or for
8569 targets where the native toolchain uses a different numbering
8570 scheme for a particular debug format (stabs-in-ELF on Solaris)
8571 the defaults below will have to be overridden, like
8572 i386_elf_init_abi() does. */
8574 /* Use the dbx register numbering scheme for stabs and COFF. */
8575 set_gdbarch_stab_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
8576 set_gdbarch_sdb_reg_to_regnum (gdbarch
, i386_dbx_reg_to_regnum
);
8578 /* Use the SVR4 register numbering scheme for DWARF 2. */
8579 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, i386_svr4_dwarf_reg_to_regnum
);
8581 /* We don't set gdbarch_stab_reg_to_regnum, since ECOFF doesn't seem to
8582 be in use on any of the supported i386 targets. */
8584 set_gdbarch_print_float_info (gdbarch
, i387_print_float_info
);
8586 set_gdbarch_get_longjmp_target (gdbarch
, i386_get_longjmp_target
);
8588 /* Call dummy code. */
8589 set_gdbarch_call_dummy_location (gdbarch
, ON_STACK
);
8590 set_gdbarch_push_dummy_code (gdbarch
, i386_push_dummy_code
);
8591 set_gdbarch_push_dummy_call (gdbarch
, i386_push_dummy_call
);
8592 set_gdbarch_frame_align (gdbarch
, i386_frame_align
);
8594 set_gdbarch_convert_register_p (gdbarch
, i386_convert_register_p
);
8595 set_gdbarch_register_to_value (gdbarch
, i386_register_to_value
);
8596 set_gdbarch_value_to_register (gdbarch
, i386_value_to_register
);
8598 set_gdbarch_return_value_as_value (gdbarch
, i386_return_value
);
8600 set_gdbarch_skip_prologue (gdbarch
, i386_skip_prologue
);
8602 /* Stack grows downward. */
8603 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
8605 set_gdbarch_breakpoint_kind_from_pc (gdbarch
, i386_breakpoint::kind_from_pc
);
8606 set_gdbarch_sw_breakpoint_from_kind (gdbarch
, i386_breakpoint::bp_from_kind
);
8608 set_gdbarch_decr_pc_after_break (gdbarch
, 1);
8609 set_gdbarch_max_insn_length (gdbarch
, I386_MAX_INSN_LEN
);
8611 set_gdbarch_frame_args_skip (gdbarch
, 8);
8613 set_gdbarch_print_insn (gdbarch
, i386_print_insn
);
8615 set_gdbarch_dummy_id (gdbarch
, i386_dummy_id
);
8617 set_gdbarch_unwind_pc (gdbarch
, i386_unwind_pc
);
8619 /* Add the i386 register groups. */
8620 i386_add_reggroups (gdbarch
);
8621 tdep
->register_reggroup_p
= i386_register_reggroup_p
;
8623 /* Helper for function argument information. */
8624 set_gdbarch_fetch_pointer_argument (gdbarch
, i386_fetch_pointer_argument
);
8626 /* Hook the function epilogue frame unwinder. This unwinder is
8627 appended to the list first, so that it supersedes the DWARF
8628 unwinder in function epilogues (where the DWARF unwinder
8629 currently fails). */
8630 if (info
.bfd_arch_info
->bits_per_word
== 32)
8631 frame_unwind_append_unwinder (gdbarch
, &i386_epilogue_override_frame_unwind
);
8633 /* Hook in the DWARF CFI frame unwinder. This unwinder is appended
8634 to the list before the prologue-based unwinders, so that DWARF
8635 CFI info will be used if it is available. */
8636 dwarf2_append_unwinders (gdbarch
);
8638 if (info
.bfd_arch_info
->bits_per_word
== 32)
8639 frame_unwind_append_unwinder (gdbarch
, &i386_epilogue_frame_unwind
);
8641 frame_base_set_default (gdbarch
, &i386_frame_base
);
8643 /* Pseudo registers may be changed by amd64_init_abi. */
8644 set_gdbarch_pseudo_register_read_value (gdbarch
,
8645 i386_pseudo_register_read_value
);
8646 set_gdbarch_pseudo_register_write (gdbarch
, i386_pseudo_register_write
);
8647 set_gdbarch_ax_pseudo_register_collect (gdbarch
,
8648 i386_ax_pseudo_register_collect
);
8650 set_tdesc_pseudo_register_type (gdbarch
, i386_pseudo_register_type
);
8651 set_tdesc_pseudo_register_name (gdbarch
, i386_pseudo_register_name
);
8653 /* Override the normal target description method to make the AVX
8654 upper halves anonymous. */
8655 set_gdbarch_register_name (gdbarch
, i386_register_name
);
8657 /* Even though the default ABI only includes general-purpose registers,
8658 floating-point registers and the SSE registers, we have to leave a
8659 gap for the upper AVX, MPX and AVX512 registers. */
8660 set_gdbarch_num_regs (gdbarch
, I386_NUM_REGS
);
8662 set_gdbarch_gnu_triplet_regexp (gdbarch
, i386_gnu_triplet_regexp
);
8664 /* Get the x86 target description from INFO. */
8665 tdesc
= info
.target_desc
;
8666 if (! tdesc_has_registers (tdesc
))
8667 tdesc
= i386_target_description (X86_XSTATE_SSE_MASK
, false);
8668 tdep
->tdesc
= tdesc
;
8670 tdep
->num_core_regs
= I386_NUM_GREGS
+ I387_NUM_REGS
;
8671 tdep
->register_names
= i386_register_names
;
8673 /* No upper YMM registers. */
8674 tdep
->ymmh_register_names
= NULL
;
8675 tdep
->ymm0h_regnum
= -1;
8677 /* No upper ZMM registers. */
8678 tdep
->zmmh_register_names
= NULL
;
8679 tdep
->zmm0h_regnum
= -1;
8681 /* No high XMM registers. */
8682 tdep
->xmm_avx512_register_names
= NULL
;
8683 tdep
->xmm16_regnum
= -1;
8685 /* No upper YMM16-31 registers. */
8686 tdep
->ymm16h_register_names
= NULL
;
8687 tdep
->ymm16h_regnum
= -1;
8689 tdep
->num_byte_regs
= 8;
8690 tdep
->num_word_regs
= 8;
8691 tdep
->num_dword_regs
= 0;
8692 tdep
->num_mmx_regs
= 8;
8693 tdep
->num_ymm_regs
= 0;
8695 /* No MPX registers. */
8696 tdep
->bnd0r_regnum
= -1;
8697 tdep
->bndcfgu_regnum
= -1;
8699 /* No AVX512 registers. */
8700 tdep
->k0_regnum
= -1;
8701 tdep
->num_zmm_regs
= 0;
8702 tdep
->num_ymm_avx512_regs
= 0;
8703 tdep
->num_xmm_avx512_regs
= 0;
8705 /* No PKEYS registers */
8706 tdep
->pkru_regnum
= -1;
8707 tdep
->num_pkeys_regs
= 0;
8709 /* No segment base registers. */
8710 tdep
->fsbase_regnum
= -1;
8712 tdesc_arch_data_up tdesc_data
= tdesc_data_alloc ();
8714 set_gdbarch_relocate_instruction (gdbarch
, i386_relocate_instruction
);
8716 set_gdbarch_gen_return_address (gdbarch
, i386_gen_return_address
);
8718 set_gdbarch_insn_is_call (gdbarch
, i386_insn_is_call
);
8719 set_gdbarch_insn_is_ret (gdbarch
, i386_insn_is_ret
);
8720 set_gdbarch_insn_is_jump (gdbarch
, i386_insn_is_jump
);
8722 /* Hook in ABI-specific overrides, if they have been registered.
8723 Note: If INFO specifies a 64 bit arch, this is where we turn
8724 a 32-bit i386 into a 64-bit amd64. */
8725 info
.tdesc_data
= tdesc_data
.get ();
8726 gdbarch_init_osabi (info
, gdbarch
);
8728 if (!i386_validate_tdesc_p (tdep
, tdesc_data
.get ()))
8730 gdbarch_free (gdbarch
);
8733 tdep
->xsave_layout
= xsave_layout
;
8735 num_bnd_cooked
= (tdep
->bnd0r_regnum
> 0 ? I387_NUM_BND_REGS
: 0);
8737 /* Wire in pseudo registers. Number of pseudo registers may be
8739 set_gdbarch_num_pseudo_regs (gdbarch
, (tdep
->num_byte_regs
8740 + tdep
->num_word_regs
8741 + tdep
->num_dword_regs
8742 + tdep
->num_mmx_regs
8743 + tdep
->num_ymm_regs
8745 + tdep
->num_ymm_avx512_regs
8746 + tdep
->num_zmm_regs
));
8748 /* Target description may be changed. */
8749 tdesc
= tdep
->tdesc
;
8751 tdesc_use_registers (gdbarch
, tdesc
, std::move (tdesc_data
));
8753 /* Override gdbarch_register_reggroup_p set in tdesc_use_registers. */
8754 set_gdbarch_register_reggroup_p (gdbarch
, tdep
->register_reggroup_p
);
8756 /* Make %al the first pseudo-register. */
8757 tdep
->al_regnum
= gdbarch_num_regs (gdbarch
);
8758 tdep
->ax_regnum
= tdep
->al_regnum
+ tdep
->num_byte_regs
;
8760 ymm0_regnum
= tdep
->ax_regnum
+ tdep
->num_word_regs
;
8761 if (tdep
->num_dword_regs
)
8763 /* Support dword pseudo-register if it hasn't been disabled. */
8764 tdep
->eax_regnum
= ymm0_regnum
;
8765 ymm0_regnum
+= tdep
->num_dword_regs
;
8768 tdep
->eax_regnum
= -1;
8770 mm0_regnum
= ymm0_regnum
;
8771 if (tdep
->num_ymm_regs
)
8773 /* Support YMM pseudo-register if it is available. */
8774 tdep
->ymm0_regnum
= ymm0_regnum
;
8775 mm0_regnum
+= tdep
->num_ymm_regs
;
8778 tdep
->ymm0_regnum
= -1;
8780 if (tdep
->num_ymm_avx512_regs
)
8782 /* Support YMM16-31 pseudo registers if available. */
8783 tdep
->ymm16_regnum
= mm0_regnum
;
8784 mm0_regnum
+= tdep
->num_ymm_avx512_regs
;
8787 tdep
->ymm16_regnum
= -1;
8789 if (tdep
->num_zmm_regs
)
8791 /* Support ZMM pseudo-register if it is available. */
8792 tdep
->zmm0_regnum
= mm0_regnum
;
8793 mm0_regnum
+= tdep
->num_zmm_regs
;
8796 tdep
->zmm0_regnum
= -1;
8798 bnd0_regnum
= mm0_regnum
;
8799 if (tdep
->num_mmx_regs
!= 0)
8801 /* Support MMX pseudo-register if MMX hasn't been disabled. */
8802 tdep
->mm0_regnum
= mm0_regnum
;
8803 bnd0_regnum
+= tdep
->num_mmx_regs
;
8806 tdep
->mm0_regnum
= -1;
8808 if (tdep
->bnd0r_regnum
> 0)
8809 tdep
->bnd0_regnum
= bnd0_regnum
;
8811 tdep
-> bnd0_regnum
= -1;
8813 /* Hook in the legacy prologue-based unwinders last (fallback). */
8814 if (info
.bfd_arch_info
->bits_per_word
== 32)
8816 frame_unwind_append_unwinder (gdbarch
, &i386_stack_tramp_frame_unwind
);
8817 frame_unwind_append_unwinder (gdbarch
, &i386_sigtramp_frame_unwind
);
8818 frame_unwind_append_unwinder (gdbarch
, &i386_frame_unwind
);
8821 /* If we have a register mapping, enable the generic core file
8822 support, unless it has already been enabled. */
8823 if (tdep
->gregset_reg_offset
8824 && !gdbarch_iterate_over_regset_sections_p (gdbarch
))
8825 set_gdbarch_iterate_over_regset_sections
8826 (gdbarch
, i386_iterate_over_regset_sections
);
8828 set_gdbarch_fast_tracepoint_valid_at (gdbarch
,
8829 i386_fast_tracepoint_valid_at
);
8836 /* Return the target description for a specified XSAVE feature mask. */
8838 const struct target_desc
*
8839 i386_target_description (uint64_t xcr0
, bool segments
)
8841 static target_desc
*i386_tdescs \
8842 [2/*SSE*/][2/*AVX*/][2/*MPX*/][2/*AVX512*/][2/*PKRU*/][2/*segments*/] = {};
8843 target_desc
**tdesc
;
8845 tdesc
= &i386_tdescs
[(xcr0
& X86_XSTATE_SSE
) ? 1 : 0]
8846 [(xcr0
& X86_XSTATE_AVX
) ? 1 : 0]
8847 [(xcr0
& X86_XSTATE_MPX
) ? 1 : 0]
8848 [(xcr0
& X86_XSTATE_AVX512
) ? 1 : 0]
8849 [(xcr0
& X86_XSTATE_PKRU
) ? 1 : 0]
8853 *tdesc
= i386_create_target_description (xcr0
, false, segments
);
8858 #define MPX_BASE_MASK (~(ULONGEST) 0xfff)
8860 /* Find the bound directory base address. */
8862 static unsigned long
8863 i386_mpx_bd_base (void)
8866 enum register_status regstatus
;
8868 regcache
*rcache
= get_thread_regcache (inferior_thread ());
8869 gdbarch
*arch
= rcache
->arch ();
8870 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (arch
);
8872 regstatus
= regcache_raw_read_unsigned (rcache
, tdep
->bndcfgu_regnum
, &ret
);
8874 if (regstatus
!= REG_VALID
)
8875 error (_("BNDCFGU register invalid, read status %d."), regstatus
);
8877 return ret
& MPX_BASE_MASK
;
8881 i386_mpx_enabled (void)
8883 gdbarch
*arch
= get_current_arch ();
8884 i386_gdbarch_tdep
*tdep
= gdbarch_tdep
<i386_gdbarch_tdep
> (arch
);
8885 const struct target_desc
*tdesc
= tdep
->tdesc
;
8887 return (tdesc_find_feature (tdesc
, "org.gnu.gdb.i386.mpx") != NULL
);
8890 #define MPX_BD_MASK 0xfffffff00000ULL /* select bits [47:20] */
8891 #define MPX_BT_MASK 0x0000000ffff8 /* select bits [19:3] */
8892 #define MPX_BD_MASK_32 0xfffff000 /* select bits [31:12] */
8893 #define MPX_BT_MASK_32 0x00000ffc /* select bits [11:2] */
8895 /* Find the bound table entry given the pointer location and the base
8896 address of the table. */
8899 i386_mpx_get_bt_entry (CORE_ADDR ptr
, CORE_ADDR bd_base
)
8903 CORE_ADDR mpx_bd_mask
, bd_ptr_r_shift
, bd_ptr_l_shift
;
8904 CORE_ADDR bt_mask
, bt_select_r_shift
, bt_select_l_shift
;
8905 CORE_ADDR bd_entry_addr
;
8908 struct gdbarch
*gdbarch
= get_current_arch ();
8909 struct type
*data_ptr_type
= builtin_type (gdbarch
)->builtin_data_ptr
;
8912 if (gdbarch_ptr_bit (gdbarch
) == 64)
8914 mpx_bd_mask
= (CORE_ADDR
) MPX_BD_MASK
;
8915 bd_ptr_r_shift
= 20;
8917 bt_select_r_shift
= 3;
8918 bt_select_l_shift
= 5;
8919 bt_mask
= (CORE_ADDR
) MPX_BT_MASK
;
8921 if ( sizeof (CORE_ADDR
) == 4)
8922 error (_("bound table examination not supported\
8923 for 64-bit process with 32-bit GDB"));
8927 mpx_bd_mask
= MPX_BD_MASK_32
;
8928 bd_ptr_r_shift
= 12;
8930 bt_select_r_shift
= 2;
8931 bt_select_l_shift
= 4;
8932 bt_mask
= MPX_BT_MASK_32
;
8935 offset1
= ((ptr
& mpx_bd_mask
) >> bd_ptr_r_shift
) << bd_ptr_l_shift
;
8936 bd_entry_addr
= bd_base
+ offset1
;
8937 bd_entry
= read_memory_typed_address (bd_entry_addr
, data_ptr_type
);
8939 if ((bd_entry
& 0x1) == 0)
8940 error (_("Invalid bounds directory entry at %s."),
8941 paddress (get_current_arch (), bd_entry_addr
));
8943 /* Clearing status bit. */
8945 bt_addr
= bd_entry
& ~bt_select_r_shift
;
8946 offset2
= ((ptr
& bt_mask
) >> bt_select_r_shift
) << bt_select_l_shift
;
8948 return bt_addr
+ offset2
;
8951 /* Print routine for the mpx bounds. */
8954 i386_mpx_print_bounds (const CORE_ADDR bt_entry
[4])
8956 struct ui_out
*uiout
= current_uiout
;
8958 struct gdbarch
*gdbarch
= get_current_arch ();
8959 CORE_ADDR onecompl
= ~((CORE_ADDR
) 0);
8960 int bounds_in_map
= ((~bt_entry
[1] == 0 && bt_entry
[0] == onecompl
) ? 1 : 0);
8962 if (bounds_in_map
== 1)
8964 uiout
->text ("Null bounds on map:");
8965 uiout
->text (" pointer value = ");
8966 uiout
->field_core_addr ("pointer-value", gdbarch
, bt_entry
[2]);
8972 uiout
->text ("{lbound = ");
8973 uiout
->field_core_addr ("lower-bound", gdbarch
, bt_entry
[0]);
8974 uiout
->text (", ubound = ");
8976 /* The upper bound is stored in 1's complement. */
8977 uiout
->field_core_addr ("upper-bound", gdbarch
, ~bt_entry
[1]);
8978 uiout
->text ("}: pointer value = ");
8979 uiout
->field_core_addr ("pointer-value", gdbarch
, bt_entry
[2]);
8981 if (gdbarch_ptr_bit (gdbarch
) == 64)
8982 size
= ( (~(int64_t) bt_entry
[1]) - (int64_t) bt_entry
[0]);
8984 size
= ( ~((int32_t) bt_entry
[1]) - (int32_t) bt_entry
[0]);
8986 /* In case the bounds are 0x0 and 0xffff... the difference will be -1.
8987 -1 represents in this sense full memory access, and there is no need
8990 size
= (size
> -1 ? size
+ 1 : size
);
8991 uiout
->text (", size = ");
8992 uiout
->field_string ("size", plongest (size
));
8994 uiout
->text (", metadata = ");
8995 uiout
->field_core_addr ("metadata", gdbarch
, bt_entry
[3]);
9000 /* Implement the command "show mpx bound". */
9003 i386_mpx_info_bounds (const char *args
, int from_tty
)
9005 CORE_ADDR bd_base
= 0;
9007 CORE_ADDR bt_entry_addr
= 0;
9008 CORE_ADDR bt_entry
[4];
9010 struct gdbarch
*gdbarch
= get_current_arch ();
9011 struct type
*data_ptr_type
= builtin_type (gdbarch
)->builtin_data_ptr
;
9013 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_i386
9014 || !i386_mpx_enabled ())
9016 gdb_printf (_("Intel Memory Protection Extensions not "
9017 "supported on this target.\n"));
9023 gdb_printf (_("Address of pointer variable expected.\n"));
9027 addr
= parse_and_eval_address (args
);
9029 bd_base
= i386_mpx_bd_base ();
9030 bt_entry_addr
= i386_mpx_get_bt_entry (addr
, bd_base
);
9032 memset (bt_entry
, 0, sizeof (bt_entry
));
9034 for (i
= 0; i
< 4; i
++)
9035 bt_entry
[i
] = read_memory_typed_address (bt_entry_addr
9036 + i
* data_ptr_type
->length (),
9039 i386_mpx_print_bounds (bt_entry
);
9042 /* Implement the command "set mpx bound". */
9045 i386_mpx_set_bounds (const char *args
, int from_tty
)
9047 CORE_ADDR bd_base
= 0;
9048 CORE_ADDR addr
, lower
, upper
;
9049 CORE_ADDR bt_entry_addr
= 0;
9050 CORE_ADDR bt_entry
[2];
9051 const char *input
= args
;
9053 struct gdbarch
*gdbarch
= get_current_arch ();
9054 enum bfd_endian byte_order
= gdbarch_byte_order (gdbarch
);
9055 struct type
*data_ptr_type
= builtin_type (gdbarch
)->builtin_data_ptr
;
9057 if (gdbarch_bfd_arch_info (gdbarch
)->arch
!= bfd_arch_i386
9058 || !i386_mpx_enabled ())
9059 error (_("Intel Memory Protection Extensions not supported\
9063 error (_("Pointer value expected."));
9065 addr
= value_as_address (parse_to_comma_and_eval (&input
));
9067 if (input
[0] == ',')
9069 if (input
[0] == '\0')
9070 error (_("wrong number of arguments: missing lower and upper bound."));
9071 lower
= value_as_address (parse_to_comma_and_eval (&input
));
9073 if (input
[0] == ',')
9075 if (input
[0] == '\0')
9076 error (_("Wrong number of arguments; Missing upper bound."));
9077 upper
= value_as_address (parse_to_comma_and_eval (&input
));
9079 bd_base
= i386_mpx_bd_base ();
9080 bt_entry_addr
= i386_mpx_get_bt_entry (addr
, bd_base
);
9081 for (i
= 0; i
< 2; i
++)
9082 bt_entry
[i
] = read_memory_typed_address (bt_entry_addr
9083 + i
* data_ptr_type
->length (),
9085 bt_entry
[0] = (uint64_t) lower
;
9086 bt_entry
[1] = ~(uint64_t) upper
;
9088 for (i
= 0; i
< 2; i
++)
9089 write_memory_unsigned_integer (bt_entry_addr
9090 + i
* data_ptr_type
->length (),
9091 data_ptr_type
->length (), byte_order
,
9095 static struct cmd_list_element
*mpx_set_cmdlist
, *mpx_show_cmdlist
;
9097 void _initialize_i386_tdep ();
9099 _initialize_i386_tdep ()
9101 gdbarch_register (bfd_arch_i386
, i386_gdbarch_init
);
9103 /* Add the variable that controls the disassembly flavor. */
9104 add_setshow_enum_cmd ("disassembly-flavor", no_class
, valid_flavors
,
9105 &disassembly_flavor
, _("\
9106 Set the disassembly flavor."), _("\
9107 Show the disassembly flavor."), _("\
9108 The valid values are \"att\" and \"intel\", and the default value is \"att\"."),
9110 NULL
, /* FIXME: i18n: */
9111 &setlist
, &showlist
);
9113 /* Add the variable that controls the convention for returning
9115 add_setshow_enum_cmd ("struct-convention", no_class
, valid_conventions
,
9116 &struct_convention
, _("\
9117 Set the convention for returning small structs."), _("\
9118 Show the convention for returning small structs."), _("\
9119 Valid values are \"default\", \"pcc\" and \"reg\", and the default value\n\
9122 NULL
, /* FIXME: i18n: */
9123 &setlist
, &showlist
);
9125 /* Add "mpx" prefix for the set and show commands. */
9127 add_setshow_prefix_cmd
9128 ("mpx", class_support
,
9129 _("Set Intel Memory Protection Extensions specific variables."),
9130 _("Show Intel Memory Protection Extensions specific variables."),
9131 &mpx_set_cmdlist
, &mpx_show_cmdlist
, &setlist
, &showlist
);
9133 /* Add "bound" command for the show mpx commands list. */
9135 add_cmd ("bound", no_class
, i386_mpx_info_bounds
,
9136 "Show the memory bounds for a given array/pointer storage\
9137 in the bound table.",
9140 /* Add "bound" command for the set mpx commands list. */
9142 add_cmd ("bound", no_class
, i386_mpx_set_bounds
,
9143 "Set the memory bounds for a given array/pointer storage\
9144 in the bound table.",
9147 gdbarch_register_osabi (bfd_arch_i386
, 0, GDB_OSABI_SVR4
,
9148 i386_svr4_init_abi
);
9150 /* Initialize the i386-specific register groups. */
9151 i386_init_reggroups ();
9153 /* Tell remote stub that we support XML target description. */
9154 register_remote_support_xml ("i386");