1 /* Target-dependent code for the LoongArch architecture, for GDB.
3 Copyright (C) 2022-2023 Free Software Foundation, Inc.
5 This file is part of GDB.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program. If not, see <http://www.gnu.org/licenses/>. */
21 #include "arch-utils.h"
22 #include "dwarf2/frame.h"
24 #include "frame-unwind.h"
26 #include "loongarch-tdep.h"
27 #include "reggroups.h"
29 #include "target-descriptions.h"
30 #include "trad-frame.h"
31 #include "user-regs.h"
33 /* Fetch the instruction at PC. */
36 loongarch_fetch_instruction (CORE_ADDR pc
)
38 size_t insn_len
= loongarch_insn_length (0);
39 gdb_byte buf
[insn_len
];
42 err
= target_read_memory (pc
, buf
, insn_len
);
44 memory_error (TARGET_XFER_E_IO
, pc
);
46 return extract_unsigned_integer (buf
, insn_len
, BFD_ENDIAN_LITTLE
);
49 /* Return TRUE if INSN is a unconditional branch instruction, otherwise return FALSE. */
52 loongarch_insn_is_uncond_branch (insn_t insn
)
54 if ((insn
& 0xfc000000) == 0x4c000000 /* jirl */
55 || (insn
& 0xfc000000) == 0x50000000 /* b */
56 || (insn
& 0xfc000000) == 0x54000000) /* bl */
61 /* Return TRUE if INSN is a conditional branch instruction, otherwise return FALSE. */
64 loongarch_insn_is_cond_branch (insn_t insn
)
66 if ((insn
& 0xfc000000) == 0x58000000 /* beq */
67 || (insn
& 0xfc000000) == 0x5c000000 /* bne */
68 || (insn
& 0xfc000000) == 0x60000000 /* blt */
69 || (insn
& 0xfc000000) == 0x64000000 /* bge */
70 || (insn
& 0xfc000000) == 0x68000000 /* bltu */
71 || (insn
& 0xfc000000) == 0x6c000000 /* bgeu */
72 || (insn
& 0xfc000000) == 0x40000000 /* beqz */
73 || (insn
& 0xfc000000) == 0x44000000) /* bnez */
78 /* Return TRUE if INSN is a branch instruction, otherwise return FALSE. */
81 loongarch_insn_is_branch (insn_t insn
)
83 bool is_uncond
= loongarch_insn_is_uncond_branch (insn
);
84 bool is_cond
= loongarch_insn_is_cond_branch (insn
);
86 return (is_uncond
|| is_cond
);
89 /* Return TRUE if INSN is a Load Linked instruction, otherwise return FALSE. */
92 loongarch_insn_is_ll (insn_t insn
)
94 if ((insn
& 0xff000000) == 0x20000000 /* ll.w */
95 || (insn
& 0xff000000) == 0x22000000) /* ll.d */
100 /* Return TRUE if INSN is a Store Conditional instruction, otherwise return FALSE. */
103 loongarch_insn_is_sc (insn_t insn
)
105 if ((insn
& 0xff000000) == 0x21000000 /* sc.w */
106 || (insn
& 0xff000000) == 0x23000000) /* sc.d */
111 /* Analyze the function prologue from START_PC to LIMIT_PC.
112 Return the address of the first instruction past the prologue. */
115 loongarch_scan_prologue (struct gdbarch
*gdbarch
, CORE_ADDR start_pc
,
116 CORE_ADDR limit_pc
, frame_info_ptr this_frame
,
117 struct trad_frame_cache
*this_cache
)
119 CORE_ADDR cur_pc
= start_pc
, prologue_end
= 0;
120 int32_t sp
= LOONGARCH_SP_REGNUM
;
121 int32_t fp
= LOONGARCH_FP_REGNUM
;
122 int32_t reg_value
[32] = {0};
123 int32_t reg_used
[32] = {1, 0};
125 while (cur_pc
< limit_pc
)
127 insn_t insn
= loongarch_fetch_instruction (cur_pc
);
128 size_t insn_len
= loongarch_insn_length (insn
);
129 int32_t rd
= loongarch_decode_imm ("0:5", insn
, 0);
130 int32_t rj
= loongarch_decode_imm ("5:5", insn
, 0);
131 int32_t rk
= loongarch_decode_imm ("10:5", insn
, 0);
132 int32_t si12
= loongarch_decode_imm ("10:12", insn
, 1);
133 int32_t si20
= loongarch_decode_imm ("5:20", insn
, 1);
135 if ((insn
& 0xffc00000) == 0x02c00000 /* addi.d sp,sp,si12 */
136 && rd
== sp
&& rj
== sp
&& si12
< 0)
138 prologue_end
= cur_pc
+ insn_len
;
140 else if ((insn
& 0xffc00000) == 0x02c00000 /* addi.d fp,sp,si12 */
141 && rd
== fp
&& rj
== sp
&& si12
> 0)
143 prologue_end
= cur_pc
+ insn_len
;
145 else if ((insn
& 0xffc00000) == 0x29c00000 /* st.d rd,sp,si12 */
148 prologue_end
= cur_pc
+ insn_len
;
150 else if ((insn
& 0xff000000) == 0x27000000 /* stptr.d rd,sp,si14 */
153 prologue_end
= cur_pc
+ insn_len
;
155 else if ((insn
& 0xfe000000) == 0x14000000) /* lu12i.w rd,si20 */
157 reg_value
[rd
] = si20
<< 12;
160 else if ((insn
& 0xffc00000) == 0x03800000) /* ori rd,rj,si12 */
164 reg_value
[rd
] = reg_value
[rj
] | (si12
& 0xfff);
168 else if ((insn
& 0xffff8000) == 0x00108000 /* add.d sp,sp,rk */
169 && rd
== sp
&& rj
== sp
)
171 if (reg_used
[rk
] == 1 && reg_value
[rk
] < 0)
173 prologue_end
= cur_pc
+ insn_len
;
177 else if (loongarch_insn_is_branch (insn
))
185 if (prologue_end
== 0)
186 prologue_end
= cur_pc
;
191 /* Implement the loongarch_skip_prologue gdbarch method. */
194 loongarch_skip_prologue (struct gdbarch
*gdbarch
, CORE_ADDR pc
)
198 /* See if we can determine the end of the prologue via the symbol table.
199 If so, then return either PC, or the PC after the prologue, whichever
201 if (find_pc_partial_function (pc
, nullptr, &func_addr
, nullptr))
203 CORE_ADDR post_prologue_pc
204 = skip_prologue_using_sal (gdbarch
, func_addr
);
205 if (post_prologue_pc
!= 0)
206 return std::max (pc
, post_prologue_pc
);
209 /* Can't determine prologue from the symbol table, need to examine
212 /* Find an upper limit on the function prologue using the debug
213 information. If the debug information could not be used to provide
214 that bound, then use an arbitrary large number as the upper bound. */
215 CORE_ADDR limit_pc
= skip_prologue_using_sal (gdbarch
, pc
);
217 limit_pc
= pc
+ 100; /* Arbitrary large number. */
219 return loongarch_scan_prologue (gdbarch
, pc
, limit_pc
, nullptr, nullptr);
222 /* Decode the current instruction and determine the address of the
226 loongarch_next_pc (struct regcache
*regcache
, CORE_ADDR cur_pc
)
228 struct gdbarch
*gdbarch
= regcache
->arch ();
229 loongarch_gdbarch_tdep
*tdep
= gdbarch_tdep
<loongarch_gdbarch_tdep
> (gdbarch
);
230 insn_t insn
= loongarch_fetch_instruction (cur_pc
);
231 size_t insn_len
= loongarch_insn_length (insn
);
232 CORE_ADDR next_pc
= cur_pc
+ insn_len
;
234 if ((insn
& 0xfc000000) == 0x4c000000) /* jirl rd, rj, offs16 */
236 LONGEST rj
= regcache_raw_get_signed (regcache
,
237 loongarch_decode_imm ("5:5", insn
, 0));
238 next_pc
= rj
+ loongarch_decode_imm ("10:16<<2", insn
, 1);
240 else if ((insn
& 0xfc000000) == 0x50000000 /* b offs26 */
241 || (insn
& 0xfc000000) == 0x54000000) /* bl offs26 */
243 next_pc
= cur_pc
+ loongarch_decode_imm ("0:10|10:16<<2", insn
, 1);
245 else if ((insn
& 0xfc000000) == 0x58000000) /* beq rj, rd, offs16 */
247 LONGEST rj
= regcache_raw_get_signed (regcache
,
248 loongarch_decode_imm ("5:5", insn
, 0));
249 LONGEST rd
= regcache_raw_get_signed (regcache
,
250 loongarch_decode_imm ("0:5", insn
, 0));
252 next_pc
= cur_pc
+ loongarch_decode_imm ("10:16<<2", insn
, 1);
254 else if ((insn
& 0xfc000000) == 0x5c000000) /* bne rj, rd, offs16 */
256 LONGEST rj
= regcache_raw_get_signed (regcache
,
257 loongarch_decode_imm ("5:5", insn
, 0));
258 LONGEST rd
= regcache_raw_get_signed (regcache
,
259 loongarch_decode_imm ("0:5", insn
, 0));
261 next_pc
= cur_pc
+ loongarch_decode_imm ("10:16<<2", insn
, 1);
263 else if ((insn
& 0xfc000000) == 0x60000000) /* blt rj, rd, offs16 */
265 LONGEST rj
= regcache_raw_get_signed (regcache
,
266 loongarch_decode_imm ("5:5", insn
, 0));
267 LONGEST rd
= regcache_raw_get_signed (regcache
,
268 loongarch_decode_imm ("0:5", insn
, 0));
270 next_pc
= cur_pc
+ loongarch_decode_imm ("10:16<<2", insn
, 1);
272 else if ((insn
& 0xfc000000) == 0x64000000) /* bge rj, rd, offs16 */
274 LONGEST rj
= regcache_raw_get_signed (regcache
,
275 loongarch_decode_imm ("5:5", insn
, 0));
276 LONGEST rd
= regcache_raw_get_signed (regcache
,
277 loongarch_decode_imm ("0:5", insn
, 0));
279 next_pc
= cur_pc
+ loongarch_decode_imm ("10:16<<2", insn
, 1);
281 else if ((insn
& 0xfc000000) == 0x68000000) /* bltu rj, rd, offs16 */
283 ULONGEST rj
= regcache_raw_get_unsigned (regcache
,
284 loongarch_decode_imm ("5:5", insn
, 0));
285 ULONGEST rd
= regcache_raw_get_unsigned (regcache
,
286 loongarch_decode_imm ("0:5", insn
, 0));
288 next_pc
= cur_pc
+ loongarch_decode_imm ("10:16<<2", insn
, 1);
290 else if ((insn
& 0xfc000000) == 0x6c000000) /* bgeu rj, rd, offs16 */
292 ULONGEST rj
= regcache_raw_get_unsigned (regcache
,
293 loongarch_decode_imm ("5:5", insn
, 0));
294 ULONGEST rd
= regcache_raw_get_unsigned (regcache
,
295 loongarch_decode_imm ("0:5", insn
, 0));
297 next_pc
= cur_pc
+ loongarch_decode_imm ("10:16<<2", insn
, 1);
299 else if ((insn
& 0xfc000000) == 0x40000000) /* beqz rj, offs21 */
301 LONGEST rj
= regcache_raw_get_signed (regcache
,
302 loongarch_decode_imm ("5:5", insn
, 0));
304 next_pc
= cur_pc
+ loongarch_decode_imm ("0:5|10:16<<2", insn
, 1);
306 else if ((insn
& 0xfc000000) == 0x44000000) /* bnez rj, offs21 */
308 LONGEST rj
= regcache_raw_get_signed (regcache
,
309 loongarch_decode_imm ("5:5", insn
, 0));
311 next_pc
= cur_pc
+ loongarch_decode_imm ("0:5|10:16<<2", insn
, 1);
313 else if ((insn
& 0xffff8000) == 0x002b0000) /* syscall */
315 if (tdep
->syscall_next_pc
!= nullptr)
316 next_pc
= tdep
->syscall_next_pc (get_current_frame ());
322 /* We can't put a breakpoint in the middle of a ll/sc atomic sequence,
323 so look for the end of the sequence and put the breakpoint there. */
325 static std::vector
<CORE_ADDR
>
326 loongarch_deal_with_atomic_sequence (struct regcache
*regcache
, CORE_ADDR cur_pc
)
329 std::vector
<CORE_ADDR
> next_pcs
;
330 insn_t insn
= loongarch_fetch_instruction (cur_pc
);
331 size_t insn_len
= loongarch_insn_length (insn
);
332 const int atomic_sequence_length
= 16;
333 bool found_atomic_sequence_endpoint
= false;
335 /* Look for a Load Linked instruction which begins the atomic sequence. */
336 if (!loongarch_insn_is_ll (insn
))
339 /* Assume that no atomic sequence is longer than "atomic_sequence_length" instructions. */
340 for (int insn_count
= 0; insn_count
< atomic_sequence_length
; ++insn_count
)
343 insn
= loongarch_fetch_instruction (cur_pc
);
345 /* Look for a unconditional branch instruction, fallback to the standard code. */
346 if (loongarch_insn_is_uncond_branch (insn
))
350 /* Look for a conditional branch instruction, put a breakpoint in its destination address. */
351 else if (loongarch_insn_is_cond_branch (insn
))
353 next_pc
= loongarch_next_pc (regcache
, cur_pc
);
354 next_pcs
.push_back (next_pc
);
356 /* Look for a Store Conditional instruction which closes the atomic sequence. */
357 else if (loongarch_insn_is_sc (insn
))
359 found_atomic_sequence_endpoint
= true;
360 next_pc
= cur_pc
+ insn_len
;
361 next_pcs
.push_back (next_pc
);
366 /* We didn't find a closing Store Conditional instruction, fallback to the standard code. */
367 if (!found_atomic_sequence_endpoint
)
373 /* Implement the software_single_step gdbarch method */
375 static std::vector
<CORE_ADDR
>
376 loongarch_software_single_step (struct regcache
*regcache
)
378 CORE_ADDR cur_pc
= regcache_read_pc (regcache
);
379 std::vector
<CORE_ADDR
> next_pcs
380 = loongarch_deal_with_atomic_sequence (regcache
, cur_pc
);
382 if (!next_pcs
.empty ())
385 CORE_ADDR next_pc
= loongarch_next_pc (regcache
, cur_pc
);
390 /* Callback function for user_reg_add. */
392 static struct value
*
393 value_of_loongarch_user_reg (frame_info_ptr frame
, const void *baton
)
395 return value_of_register ((long long) baton
, frame
);
398 /* Implement the frame_align gdbarch method. */
401 loongarch_frame_align (struct gdbarch
*gdbarch
, CORE_ADDR addr
)
403 return align_down (addr
, 16);
406 /* Generate, or return the cached frame cache for frame unwinder. */
408 static struct trad_frame_cache
*
409 loongarch_frame_cache (frame_info_ptr this_frame
, void **this_cache
)
411 struct trad_frame_cache
*cache
;
414 if (*this_cache
!= nullptr)
415 return (struct trad_frame_cache
*) *this_cache
;
417 cache
= trad_frame_cache_zalloc (this_frame
);
420 trad_frame_set_reg_realreg (cache
, LOONGARCH_PC_REGNUM
, LOONGARCH_RA_REGNUM
);
422 pc
= get_frame_address_in_block (this_frame
);
423 trad_frame_set_id (cache
, frame_id_build_unavailable_stack (pc
));
428 /* Implement the this_id callback for frame unwinder. */
431 loongarch_frame_this_id (frame_info_ptr this_frame
, void **prologue_cache
,
432 struct frame_id
*this_id
)
434 struct trad_frame_cache
*info
;
436 info
= loongarch_frame_cache (this_frame
, prologue_cache
);
437 trad_frame_get_id (info
, this_id
);
440 /* Implement the prev_register callback for frame unwinder. */
442 static struct value
*
443 loongarch_frame_prev_register (frame_info_ptr this_frame
,
444 void **prologue_cache
, int regnum
)
446 struct trad_frame_cache
*info
;
448 info
= loongarch_frame_cache (this_frame
, prologue_cache
);
449 return trad_frame_get_register (info
, this_frame
, regnum
);
452 static const struct frame_unwind loongarch_frame_unwind
= {
453 "loongarch prologue",
454 /*.type =*/NORMAL_FRAME
,
455 /*.stop_reason =*/default_frame_unwind_stop_reason
,
456 /*.this_id =*/loongarch_frame_this_id
,
457 /*.prev_register =*/loongarch_frame_prev_register
,
458 /*.unwind_data =*/nullptr,
459 /*.sniffer =*/default_frame_sniffer
,
460 /*.dealloc_cache =*/nullptr,
461 /*.prev_arch =*/nullptr,
464 /* Write the contents of buffer VAL into the general-purpose argument
465 register defined by GAR in REGCACHE. GAR indicates the available
466 general-purpose argument registers which should be a value in the
467 range 1 to 8 (LOONGARCH_ARG_REGNUM), which correspond to registers
468 a7 and a0 respectively, that is to say, regnum is a7 if GAR is 1,
469 regnum is a6 if GAR is 2, regnum is a5 if GAR is 3, regnum is a4
470 if GAR is 4, regnum is a3 if GAR is 5, regnum is a2 if GAR is 6,
471 regnum is a1 if GAR is 7, regnum is a0 if GAR is 8. */
474 pass_in_gar (struct regcache
*regcache
, unsigned int gar
, const gdb_byte
*val
)
476 unsigned int regnum
= LOONGARCH_ARG_REGNUM
- gar
+ LOONGARCH_A0_REGNUM
;
477 regcache
->cooked_write (regnum
, val
);
480 /* Write the contents of buffer VAL into the floating-point argument
481 register defined by FAR in REGCACHE. FAR indicates the available
482 floating-point argument registers which should be a value in the
483 range 1 to 8 (LOONGARCH_ARG_REGNUM), which correspond to registers
484 f7 and f0 respectively, that is to say, regnum is f7 if FAR is 1,
485 regnum is f6 if FAR is 2, regnum is f5 if FAR is 3, regnum is f4
486 if FAR is 4, regnum is f3 if FAR is 5, regnum is f2 if FAR is 6,
487 regnum is f1 if FAR is 7, regnum is f0 if FAR is 8. */
490 pass_in_far (struct regcache
*regcache
, unsigned int far
, const gdb_byte
*val
)
492 unsigned int regnum
= LOONGARCH_ARG_REGNUM
- far
+ LOONGARCH_FIRST_FP_REGNUM
;
493 regcache
->cooked_write (regnum
, val
);
496 /* Pass a value on the stack. */
499 pass_on_stack (struct regcache
*regcache
, const gdb_byte
*val
,
500 size_t len
, int align
, gdb_byte
**addr
)
502 align
= align_up (align
, 8);
506 CORE_ADDR align_addr
= (CORE_ADDR
) (*addr
);
507 align_addr
= align_up (align_addr
, align
);
508 *addr
= (gdb_byte
*) align_addr
;
509 memcpy (*addr
, val
, len
);
513 /* Compute the numbers of struct member. */
516 compute_struct_member (struct type
*type
,
517 unsigned int *fixed_point_members
,
518 unsigned int *floating_point_members
,
519 bool *first_member_is_fixed_point
)
521 for (int i
= 0; i
< type
->num_fields (); i
++)
523 /* Ignore any static fields. */
524 if (type
->field (i
).is_static ())
527 struct type
*field_type
= check_typedef (type
->field (i
).type ());
529 if (field_type
->code () == TYPE_CODE_INT
530 || field_type
->code () == TYPE_CODE_BOOL
531 || field_type
->code () == TYPE_CODE_CHAR
532 || field_type
->code () == TYPE_CODE_RANGE
533 || field_type
->code () == TYPE_CODE_ENUM
534 || field_type
->code () == TYPE_CODE_PTR
)
536 (*fixed_point_members
)++;
538 if (*floating_point_members
== 0)
539 *first_member_is_fixed_point
= true;
541 else if (field_type
->code () == TYPE_CODE_FLT
)
542 (*floating_point_members
)++;
543 else if (field_type
->code () == TYPE_CODE_STRUCT
)
544 compute_struct_member (field_type
,
546 floating_point_members
,
547 first_member_is_fixed_point
);
548 else if (field_type
->code () == TYPE_CODE_COMPLEX
)
549 (*floating_point_members
) += 2;
553 /* Implement the push_dummy_call gdbarch method. */
556 loongarch_push_dummy_call (struct gdbarch
*gdbarch
,
557 struct value
*function
,
558 struct regcache
*regcache
,
563 function_call_return_method return_method
,
564 CORE_ADDR struct_addr
)
566 int regsize
= register_size (gdbarch
, 0);
567 unsigned int gar
= LOONGARCH_ARG_REGNUM
;
568 unsigned int far
= LOONGARCH_ARG_REGNUM
;
569 unsigned int fixed_point_members
;
570 unsigned int floating_point_members
;
571 bool first_member_is_fixed_point
;
572 gdb_byte buf
[1024] = { 0 };
573 gdb_byte
*addr
= buf
;
575 if (return_method
!= return_method_normal
)
576 pass_in_gar (regcache
, gar
--, (gdb_byte
*) &struct_addr
);
578 for (int i
= 0; i
< nargs
; i
++)
580 struct value
*arg
= args
[i
];
581 const gdb_byte
*val
= arg
->contents ().data ();
582 struct type
*type
= check_typedef (arg
->type ());
583 size_t len
= type
->length ();
584 int align
= type_align (type
);
585 enum type_code code
= type
->code ();
586 struct type
*func_type
= check_typedef (function
->type ());
587 bool varargs
= (func_type
->has_varargs () && i
>= func_type
->num_fields ());
594 case TYPE_CODE_RANGE
:
598 /* integer or pointer type is passed in GAR.
599 If no GAR is available, it's passed on the stack.
600 When passed in registers or on the stack,
601 the unsigned integer scalars are zero-extended to GRLEN bits,
602 and the signed integer scalars are sign-extended. */
603 if (type
->is_unsigned ())
605 ULONGEST data
= extract_unsigned_integer (val
, len
, BFD_ENDIAN_LITTLE
);
607 pass_in_gar (regcache
, gar
--, (gdb_byte
*) &data
);
609 pass_on_stack (regcache
, (gdb_byte
*) &data
, len
, align
, &addr
);
613 LONGEST data
= extract_signed_integer (val
, len
, BFD_ENDIAN_LITTLE
);
615 pass_in_gar (regcache
, gar
--, (gdb_byte
*) &data
);
617 pass_on_stack (regcache
, (gdb_byte
*) &data
, len
, align
, &addr
);
622 if (len
== 2 * regsize
)
626 /* long double type is passed in a pair of GAR,
627 with the low-order GRLEN bits in the lower-numbered register
628 and the high-order GRLEN bits in the higher-numbered register.
629 If exactly one register is available,
630 the low-order GRLEN bits are passed in the register
631 and the high-order GRLEN bits are passed on the stack.
632 If no GAR is available, it's passed on the stack. */
635 pass_in_gar (regcache
, gar
--, val
);
636 pass_in_gar (regcache
, gar
--, val
+ regsize
);
640 pass_in_gar (regcache
, gar
--, val
);
641 pass_on_stack (regcache
, val
+ regsize
, len
- regsize
, align
, &addr
);
645 pass_on_stack (regcache
, val
, len
, align
, &addr
);
650 /* Variadic arguments are passed in GARs
651 in the same manner as named arguments.
652 And after a variadic argument has been passed on the stack,
653 all future arguments will also be passed on the stack,
654 i.e., the last argument register may be left unused
655 due to the aligned register pair rule.
656 long double data type is passed in an aligned GAR pair,
657 the first register in the pair is even-numbered. */
662 pass_in_gar (regcache
, gar
--, val
);
663 pass_in_gar (regcache
, gar
--, val
+ regsize
);
668 pass_in_gar (regcache
, gar
--, val
);
669 pass_in_gar (regcache
, gar
--, val
+ regsize
);
675 pass_on_stack (regcache
, val
, len
, align
, &addr
);
679 pass_on_stack (regcache
, val
, len
, align
, &addr
);
685 /* The other floating-point type is passed in FAR.
686 If no FAR is available, it's passed in GAR.
687 If no GAR is available, it's passed on the stack. */
688 if (!varargs
&& far
> 0)
689 pass_in_far (regcache
, far
--, val
);
691 pass_in_gar (regcache
, gar
--, val
);
693 pass_on_stack (regcache
, val
, len
, align
, &addr
);
696 case TYPE_CODE_STRUCT
:
698 fixed_point_members
= 0;
699 floating_point_members
= 0;
700 first_member_is_fixed_point
= false;
701 compute_struct_member (type
,
702 &fixed_point_members
,
703 &floating_point_members
,
704 &first_member_is_fixed_point
);
706 if (len
> 0 && len
<= regsize
)
708 /* The structure has only fixed-point members. */
709 if (fixed_point_members
> 0 && floating_point_members
== 0)
711 /* If there is an available GAR,
712 the structure is passed through the GAR by value passing;
713 If no GAR is available, it's passed on the stack. */
715 pass_in_gar (regcache
, gar
--, val
);
717 pass_on_stack (regcache
, val
, len
, align
, &addr
);
719 /* The structure has only floating-point members. */
720 else if (fixed_point_members
== 0 && floating_point_members
> 0)
722 /* The structure has one floating-point member.
723 The argument is passed in a FAR.
724 If no FAR is available, the value is passed in a GAR.
725 if no GAR is available, the value is passed on the stack. */
726 if (floating_point_members
== 1)
728 if (!varargs
&& far
> 0)
729 pass_in_far (regcache
, far
--, val
);
731 pass_in_gar (regcache
, gar
--, val
);
733 pass_on_stack (regcache
, val
, len
, align
, &addr
);
735 /* The structure has two floating-point members.
736 The argument is passed in a pair of available FAR,
737 with the low-order float member bits in the lower-numbered FAR
738 and the high-order float member bits in the higher-numbered FAR.
739 If the number of available FAR is less than 2, it's passed in a GAR,
740 and passed on the stack if no GAR is available. */
741 else if (floating_point_members
== 2)
743 if (!varargs
&& far
>= 2)
745 pass_in_far (regcache
, far
--, val
);
746 pass_in_far (regcache
, far
--, val
+ align
);
750 pass_in_gar (regcache
, gar
--, val
);
754 pass_on_stack (regcache
, val
, len
, align
, &addr
);
758 /* The structure has both fixed-point and floating-point members. */
759 else if (fixed_point_members
> 0 && floating_point_members
> 0)
761 /* The structure has one float member and multiple fixed-point members.
762 If there are available GAR, the structure is passed in a GAR,
763 and passed on the stack if no GAR is available. */
764 if (floating_point_members
== 1 && fixed_point_members
> 1)
767 pass_in_gar (regcache
, gar
--, val
);
769 pass_on_stack (regcache
, val
, len
, align
, &addr
);
771 /* The structure has one float member and one fixed-point member.
772 If one FAR and one GAR are available,
773 the floating-point member of the structure is passed in the FAR,
774 and the fixed-point member of the structure is passed in the GAR.
775 If no floating-point register but one GAR is available, it's passed in GAR;
776 If no GAR is available, it's passed on the stack. */
777 else if (floating_point_members
== 1 && fixed_point_members
== 1)
779 if (!varargs
&& far
> 0 && gar
> 0)
781 if (first_member_is_fixed_point
== false)
783 pass_in_far (regcache
, far
--, val
);
784 pass_in_gar (regcache
, gar
--, val
+ align
);
788 pass_in_gar (regcache
, gar
--, val
);
789 pass_in_far (regcache
, far
--, val
+ align
);
795 pass_in_gar (regcache
, gar
--, val
);
797 pass_on_stack (regcache
, val
, len
, align
, &addr
);
802 else if (len
> regsize
&& len
<= 2 * regsize
)
804 /* The structure has only fixed-point members. */
805 if (fixed_point_members
> 0 && floating_point_members
== 0)
807 /* The argument is passed in a pair of available GAR,
808 with the low-order bits in the lower-numbered GAR
809 and the high-order bits in the higher-numbered GAR.
810 If only one GAR is available,
811 the low-order bits are in the GAR
812 and the high-order bits are on the stack,
813 and passed on the stack if no GAR is available. */
816 pass_in_gar (regcache
, gar
--, val
);
817 pass_in_gar (regcache
, gar
--, val
+ regsize
);
821 pass_in_gar (regcache
, gar
--, val
);
822 pass_on_stack (regcache
, val
+ regsize
, len
- regsize
, align
, &addr
);
826 pass_on_stack (regcache
, val
, len
, align
, &addr
);
829 /* The structure has only floating-point members. */
830 else if (fixed_point_members
== 0 && floating_point_members
> 0)
832 /* The structure has one long double member
833 or one double member and two adjacent float members
834 or 3-4 float members.
835 The argument is passed in a pair of available GAR,
836 with the low-order bits in the lower-numbered GAR
837 and the high-order bits in the higher-numbered GAR.
838 If only one GAR is available,
839 the low-order bits are in the GAR
840 and the high-order bits are on the stack,
841 and passed on the stack if no GAR is available. */
842 if ((len
== 16 && floating_point_members
== 1)
843 || (len
== 16 && floating_point_members
== 3)
844 || (len
== 12 && floating_point_members
== 3)
845 || (len
== 16 && floating_point_members
== 4))
849 pass_in_gar (regcache
, gar
--, val
);
850 pass_in_gar (regcache
, gar
--, val
+ regsize
);
856 pass_in_gar (regcache
, gar
--, val
);
857 pass_on_stack (regcache
, val
+ regsize
, len
- regsize
, align
, &addr
);
862 pass_on_stack (regcache
, val
, len
, align
, &addr
);
867 pass_on_stack (regcache
, val
, len
, align
, &addr
);
870 /* The structure has two double members
871 or one double member and one float member.
872 The argument is passed in a pair of available FAR,
873 with the low-order bits in the lower-numbered FAR
874 and the high-order bits in the higher-numbered FAR.
875 If no a pair of available FAR,
876 it's passed in a pair of available GAR,
877 with the low-order bits in the lower-numbered GAR
878 and the high-order bits in the higher-numbered GAR.
879 If only one GAR is available,
880 the low-order bits are in the GAR
881 and the high-order bits are on stack,
882 and passed on the stack if no GAR is available. */
883 else if ((len
== 16 && floating_point_members
== 2)
884 || (len
== 12 && floating_point_members
== 2))
886 if (!varargs
&& far
>= 2)
888 pass_in_far (regcache
, far
--, val
);
889 pass_in_far (regcache
, far
--, val
+ regsize
);
893 pass_in_gar (regcache
, gar
--, val
);
894 pass_in_gar (regcache
, gar
--, val
+ regsize
);
898 pass_in_gar (regcache
, gar
--, val
);
899 pass_on_stack (regcache
, val
+ regsize
, len
- regsize
, align
, &addr
);
903 pass_on_stack (regcache
, val
, len
, align
, &addr
);
907 /* The structure has both fixed-point and floating-point members. */
908 else if (fixed_point_members
> 0 && floating_point_members
> 0)
910 /* The structure has one floating-point member and one fixed-point member. */
911 if (floating_point_members
== 1 && fixed_point_members
== 1)
913 /* If one FAR and one GAR are available,
914 the floating-point member of the structure is passed in the FAR,
915 and the fixed-point member of the structure is passed in the GAR;
916 If no floating-point registers but two GARs are available,
917 it's passed in the two GARs;
918 If only one GAR is available,
919 the low-order bits are in the GAR
920 and the high-order bits are on the stack;
921 And it's passed on the stack if no GAR is available. */
922 if (!varargs
&& far
> 0 && gar
> 0)
924 if (first_member_is_fixed_point
== false)
926 pass_in_far (regcache
, far
--, val
);
927 pass_in_gar (regcache
, gar
--, val
+ regsize
);
931 pass_in_gar (regcache
, gar
--, val
);
932 pass_in_far (regcache
, far
--, val
+ regsize
);
935 else if ((!varargs
&& far
== 0 && gar
>= 2) || (varargs
&& gar
>= 2))
937 pass_in_gar (regcache
, gar
--, val
);
938 pass_in_gar (regcache
, gar
--, val
+ regsize
);
940 else if ((!varargs
&& far
== 0 && gar
== 1) || (varargs
&& gar
== 1))
942 pass_in_gar (regcache
, gar
--, val
);
943 pass_on_stack (regcache
, val
+ regsize
, len
- regsize
, align
, &addr
);
945 else if ((!varargs
&& far
== 0 && gar
== 0) || (varargs
&& gar
== 0))
947 pass_on_stack (regcache
, val
, len
, align
, &addr
);
952 /* The argument is passed in a pair of available GAR,
953 with the low-order bits in the lower-numbered GAR
954 and the high-order bits in the higher-numbered GAR.
955 If only one GAR is available,
956 the low-order bits are in the GAR
957 and the high-order bits are on the stack,
958 and passed on the stack if no GAR is available. */
961 pass_in_gar (regcache
, gar
--, val
);
962 pass_in_gar (regcache
, gar
--, val
+ regsize
);
966 pass_in_gar (regcache
, gar
--, val
);
967 pass_on_stack (regcache
, val
+ regsize
, len
- regsize
, align
, &addr
);
971 pass_on_stack (regcache
, val
, len
, align
, &addr
);
976 else if (len
> 2 * regsize
)
978 /* It's passed by reference and are replaced in the argument list with the address.
979 If there is an available GAR, the reference is passed in the GAR,
980 and passed on the stack if no GAR is available. */
981 sp
= align_down (sp
- len
, 16);
982 write_memory (sp
, val
, len
);
985 pass_in_gar (regcache
, gar
--, (const gdb_byte
*) &sp
);
987 pass_on_stack (regcache
, (const gdb_byte
*) &sp
, len
, regsize
, &addr
);
991 case TYPE_CODE_UNION
:
992 /* Union is passed in GAR or stack. */
993 if (len
> 0 && len
<= regsize
)
995 /* The argument is passed in a GAR,
996 or on the stack by value if no GAR is available. */
998 pass_in_gar (regcache
, gar
--, val
);
1000 pass_on_stack (regcache
, val
, len
, align
, &addr
);
1002 else if (len
> regsize
&& len
<= 2 * regsize
)
1004 /* The argument is passed in a pair of available GAR,
1005 with the low-order bits in the lower-numbered GAR
1006 and the high-order bits in the higher-numbered GAR.
1007 If only one GAR is available,
1008 the low-order bits are in the GAR
1009 and the high-order bits are on the stack.
1010 The arguments are passed on the stack when no GAR is available. */
1013 pass_in_gar (regcache
, gar
--, val
);
1014 pass_in_gar (regcache
, gar
--, val
+ regsize
);
1018 pass_in_gar (regcache
, gar
--, val
);
1019 pass_on_stack (regcache
, val
+ regsize
, len
- regsize
, align
, &addr
);
1023 pass_on_stack (regcache
, val
, len
, align
, &addr
);
1026 else if (len
> 2 * regsize
)
1028 /* It's passed by reference and are replaced in the argument list with the address.
1029 If there is an available GAR, the reference is passed in the GAR,
1030 and passed on the stack if no GAR is available. */
1031 sp
= align_down (sp
- len
, 16);
1032 write_memory (sp
, val
, len
);
1035 pass_in_gar (regcache
, gar
--, (const gdb_byte
*) &sp
);
1037 pass_on_stack (regcache
, (const gdb_byte
*) &sp
, len
, regsize
, &addr
);
1040 case TYPE_CODE_COMPLEX
:
1042 struct type
*target_type
= check_typedef (type
->target_type ());
1043 size_t target_len
= target_type
->length ();
1045 if (target_len
< regsize
)
1047 /* The complex with two float members
1048 is passed in a pair of available FAR,
1049 with the low-order float member bits in the lower-numbered FAR
1050 and the high-order float member bits in the higher-numbered FAR.
1051 If the number of available FAR is less than 2, it's passed in a GAR,
1052 and passed on the stack if no GAR is available. */
1053 if (!varargs
&& far
>= 2)
1055 pass_in_far (regcache
, far
--, val
);
1056 pass_in_far (regcache
, far
--, val
+ align
);
1060 pass_in_gar (regcache
, gar
--, val
);
1064 pass_on_stack (regcache
, val
, len
, align
, &addr
);
1067 else if (target_len
== regsize
)
1069 /* The complex with two double members
1070 is passed in a pair of available FAR,
1071 with the low-order bits in the lower-numbered FAR
1072 and the high-order bits in the higher-numbered FAR.
1073 If no a pair of available FAR,
1074 it's passed in a pair of available GAR,
1075 with the low-order bits in the lower-numbered GAR
1076 and the high-order bits in the higher-numbered GAR.
1077 If only one GAR is available,
1078 the low-order bits are in the GAR
1079 and the high-order bits are on stack,
1080 and passed on the stack if no GAR is available. */
1082 if (!varargs
&& far
>= 2)
1084 pass_in_far (regcache
, far
--, val
);
1085 pass_in_far (regcache
, far
--, val
+ align
);
1089 pass_in_gar (regcache
, gar
--, val
);
1090 pass_in_gar (regcache
, gar
--, val
+ align
);
1094 pass_in_gar (regcache
, gar
--, val
);
1095 pass_on_stack (regcache
, val
+ align
, len
- align
, align
, &addr
);
1099 pass_on_stack (regcache
, val
, len
, align
, &addr
);
1103 else if (target_len
== 2 * regsize
)
1105 /* The complex with two long double members
1106 is passed by reference and are replaced in the argument list with the address.
1107 If there is an available GAR, the reference is passed in the GAR,
1108 and passed on the stack if no GAR is available. */
1109 sp
= align_down (sp
- len
, 16);
1110 write_memory (sp
, val
, len
);
1113 pass_in_gar (regcache
, gar
--, (const gdb_byte
*) &sp
);
1115 pass_on_stack (regcache
, (const gdb_byte
*) &sp
, regsize
, regsize
, &addr
);
1127 sp
= align_down (sp
, 16);
1128 write_memory (sp
, buf
, addr
- buf
);
1131 regcache_cooked_write_unsigned (regcache
, LOONGARCH_RA_REGNUM
, bp_addr
);
1132 regcache_cooked_write_unsigned (regcache
, LOONGARCH_SP_REGNUM
, sp
);
1137 /* Partial transfer of a cooked register. */
1140 loongarch_xfer_reg (struct regcache
*regcache
,
1141 int regnum
, int len
, gdb_byte
*readbuf
,
1142 const gdb_byte
*writebuf
, size_t offset
)
1145 regcache
->cooked_read_part (regnum
, 0, len
, readbuf
+ offset
);
1147 regcache
->cooked_write_part (regnum
, 0, len
, writebuf
+ offset
);
1150 /* Implement the return_value gdbarch method. */
1152 static enum return_value_convention
1153 loongarch_return_value (struct gdbarch
*gdbarch
, struct value
*function
,
1154 struct type
*type
, struct regcache
*regcache
,
1155 gdb_byte
*readbuf
, const gdb_byte
*writebuf
)
1157 int regsize
= register_size (gdbarch
, 0);
1158 enum type_code code
= type
->code ();
1159 size_t len
= type
->length ();
1160 unsigned int fixed_point_members
;
1161 unsigned int floating_point_members
;
1162 bool first_member_is_fixed_point
;
1163 int a0
= LOONGARCH_A0_REGNUM
;
1164 int a1
= LOONGARCH_A0_REGNUM
+ 1;
1165 int f0
= LOONGARCH_FIRST_FP_REGNUM
;
1166 int f1
= LOONGARCH_FIRST_FP_REGNUM
+ 1;
1168 if (len
> 2 * regsize
)
1169 return RETURN_VALUE_STRUCT_CONVENTION
;
1174 case TYPE_CODE_BOOL
:
1175 case TYPE_CODE_CHAR
:
1176 case TYPE_CODE_RANGE
:
1177 case TYPE_CODE_ENUM
:
1180 /* integer or pointer type.
1181 The return value is passed in a0,
1182 the unsigned integer scalars are zero-extended to GRLEN bits,
1183 and the signed integer scalars are sign-extended. */
1186 gdb_byte buf
[regsize
];
1187 if (type
->is_unsigned ())
1189 ULONGEST data
= extract_unsigned_integer (writebuf
, len
, BFD_ENDIAN_LITTLE
);
1190 store_unsigned_integer (buf
, regsize
, BFD_ENDIAN_LITTLE
, data
);
1194 LONGEST data
= extract_signed_integer (writebuf
, len
, BFD_ENDIAN_LITTLE
);
1195 store_signed_integer (buf
, regsize
, BFD_ENDIAN_LITTLE
, data
);
1197 loongarch_xfer_reg (regcache
, a0
, regsize
, nullptr, buf
, 0);
1200 loongarch_xfer_reg (regcache
, a0
, len
, readbuf
, nullptr, 0);
1204 /* long double type.
1205 The return value is passed in a0 and a1. */
1206 if (len
== 2 * regsize
)
1208 loongarch_xfer_reg (regcache
, a0
, regsize
, readbuf
, writebuf
, 0);
1209 loongarch_xfer_reg (regcache
, a1
, len
- regsize
, readbuf
, writebuf
, regsize
);
1211 /* float or double type.
1212 The return value is passed in f0. */
1215 loongarch_xfer_reg (regcache
, f0
, len
, readbuf
, writebuf
, 0);
1218 case TYPE_CODE_STRUCT
:
1220 fixed_point_members
= 0;
1221 floating_point_members
= 0;
1222 first_member_is_fixed_point
= false;
1223 compute_struct_member (type
,
1224 &fixed_point_members
,
1225 &floating_point_members
,
1226 &first_member_is_fixed_point
);
1228 if (len
> 0 && len
<= regsize
)
1230 /* The structure has only fixed-point members. */
1231 if (fixed_point_members
> 0 && floating_point_members
== 0)
1233 /* The return value is passed in a0. */
1234 loongarch_xfer_reg (regcache
, a0
, len
, readbuf
, writebuf
, 0);
1236 /* The structure has only floating-point members. */
1237 else if (fixed_point_members
== 0 && floating_point_members
> 0)
1239 /* The structure has one floating-point member.
1240 The return value is passed in f0. */
1241 if (floating_point_members
== 1)
1243 loongarch_xfer_reg (regcache
, f0
, len
, readbuf
, writebuf
, 0);
1245 /* The structure has two floating-point members.
1246 The return value is passed in f0 and f1. */
1247 else if (floating_point_members
== 2)
1249 loongarch_xfer_reg (regcache
, f0
, len
/ 2, readbuf
, writebuf
, 0);
1250 loongarch_xfer_reg (regcache
, f1
, len
/ 2, readbuf
, writebuf
, len
/ 2);
1253 /* The structure has both fixed-point and floating-point members. */
1254 else if (fixed_point_members
> 0 && floating_point_members
> 0)
1256 /* The structure has one float member and multiple fixed-point members.
1257 The return value is passed in a0. */
1258 if (floating_point_members
== 1 && fixed_point_members
> 1)
1260 loongarch_xfer_reg (regcache
, a0
, len
, readbuf
, writebuf
, 0);
1262 /* The structure has one float member and one fixed-point member. */
1263 else if (floating_point_members
== 1 && fixed_point_members
== 1)
1265 /* The return value is passed in f0 and a0 if the first member is floating-point. */
1266 if (first_member_is_fixed_point
== false)
1268 loongarch_xfer_reg (regcache
, f0
, regsize
/ 2, readbuf
, writebuf
, 0);
1269 loongarch_xfer_reg (regcache
, a0
, regsize
/ 2, readbuf
, writebuf
, regsize
/ 2);
1271 /* The return value is passed in a0 and f0 if the first member is fixed-point. */
1274 loongarch_xfer_reg (regcache
, a0
, regsize
/ 2, readbuf
, writebuf
, 0);
1275 loongarch_xfer_reg (regcache
, f0
, regsize
/ 2, readbuf
, writebuf
, regsize
/ 2);
1280 else if (len
> regsize
&& len
<= 2 * regsize
)
1282 /* The structure has only fixed-point members. */
1283 if (fixed_point_members
> 0 && floating_point_members
== 0)
1285 /* The return value is passed in a0 and a1. */
1286 loongarch_xfer_reg (regcache
, a0
, regsize
, readbuf
, writebuf
, 0);
1287 loongarch_xfer_reg (regcache
, a1
, len
- regsize
, readbuf
, writebuf
, regsize
);
1289 /* The structure has only floating-point members. */
1290 else if (fixed_point_members
== 0 && floating_point_members
> 0)
1292 /* The structure has one long double member
1293 or one double member and two adjacent float members
1294 or 3-4 float members.
1295 The return value is passed in a0 and a1. */
1296 if ((len
== 16 && floating_point_members
== 1)
1297 || (len
== 16 && floating_point_members
== 3)
1298 || (len
== 12 && floating_point_members
== 3)
1299 || (len
== 16 && floating_point_members
== 4))
1301 loongarch_xfer_reg (regcache
, a0
, regsize
, readbuf
, writebuf
, 0);
1302 loongarch_xfer_reg (regcache
, a1
, len
- regsize
, readbuf
, writebuf
, regsize
);
1304 /* The structure has two double members
1305 or one double member and one float member.
1306 The return value is passed in f0 and f1. */
1307 else if ((len
== 16 && floating_point_members
== 2)
1308 || (len
== 12 && floating_point_members
== 2))
1310 loongarch_xfer_reg (regcache
, f0
, regsize
, readbuf
, writebuf
, 0);
1311 loongarch_xfer_reg (regcache
, f1
, len
- regsize
, readbuf
, writebuf
, regsize
);
1314 /* The structure has both fixed-point and floating-point members. */
1315 else if (fixed_point_members
> 0 && floating_point_members
> 0)
1317 /* The structure has one floating-point member and one fixed-point member. */
1318 if (floating_point_members
== 1 && fixed_point_members
== 1)
1320 /* The return value is passed in f0 and a0 if the first member is floating-point. */
1321 if (first_member_is_fixed_point
== false)
1323 loongarch_xfer_reg (regcache
, f0
, regsize
, readbuf
, writebuf
, 0);
1324 loongarch_xfer_reg (regcache
, a0
, len
- regsize
, readbuf
, writebuf
, regsize
);
1326 /* The return value is passed in a0 and f0 if the first member is fixed-point. */
1329 loongarch_xfer_reg (regcache
, a0
, regsize
, readbuf
, writebuf
, 0);
1330 loongarch_xfer_reg (regcache
, f0
, len
- regsize
, readbuf
, writebuf
, regsize
);
1335 /* The return value is passed in a0 and a1. */
1336 loongarch_xfer_reg (regcache
, a0
, regsize
, readbuf
, writebuf
, 0);
1337 loongarch_xfer_reg (regcache
, a1
, len
- regsize
, readbuf
, writebuf
, regsize
);
1343 case TYPE_CODE_UNION
:
1344 if (len
> 0 && len
<= regsize
)
1346 /* The return value is passed in a0. */
1347 loongarch_xfer_reg (regcache
, a0
, len
, readbuf
, writebuf
, 0);
1349 else if (len
> regsize
&& len
<= 2 * regsize
)
1351 /* The return value is passed in a0 and a1. */
1352 loongarch_xfer_reg (regcache
, a0
, regsize
, readbuf
, writebuf
, 0);
1353 loongarch_xfer_reg (regcache
, a1
, len
- regsize
, readbuf
, writebuf
, regsize
);
1356 case TYPE_CODE_COMPLEX
:
1358 /* The return value is passed in f0 and f1. */
1359 loongarch_xfer_reg (regcache
, f0
, len
/ 2, readbuf
, writebuf
, 0);
1360 loongarch_xfer_reg (regcache
, f1
, len
/ 2, readbuf
, writebuf
, len
/ 2);
1367 return RETURN_VALUE_REGISTER_CONVENTION
;
1370 /* Implement the dwarf2_reg_to_regnum gdbarch method. */
1373 loongarch_dwarf2_reg_to_regnum (struct gdbarch
*gdbarch
, int regnum
)
1375 if (regnum
>= 0 && regnum
< 32)
1377 else if (regnum
>= 32 && regnum
< 66)
1378 return LOONGARCH_FIRST_FP_REGNUM
+ regnum
- 32;
1383 static constexpr gdb_byte loongarch_default_breakpoint
[] = {0x05, 0x00, 0x2a, 0x00};
1384 typedef BP_MANIPULATION (loongarch_default_breakpoint
) loongarch_breakpoint
;
1386 /* Extract a set of required target features out of ABFD. If ABFD is nullptr
1387 then a LOONGARCH_GDBARCH_FEATURES is returned in its default state. */
1389 static struct loongarch_gdbarch_features
1390 loongarch_features_from_bfd (const bfd
*abfd
)
1392 struct loongarch_gdbarch_features features
;
1394 /* Now try to improve on the defaults by looking at the binary we are
1395 going to execute. We assume the user knows what they are doing and
1396 that the target will match the binary. Remember, this code path is
1397 only used at all if the target hasn't given us a description, so this
1398 is really a last ditched effort to do something sane before giving
1400 if (abfd
!= nullptr && bfd_get_flavour (abfd
) == bfd_target_elf_flavour
)
1402 unsigned char eclass
= elf_elfheader (abfd
)->e_ident
[EI_CLASS
];
1403 int e_flags
= elf_elfheader (abfd
)->e_flags
;
1405 if (eclass
== ELFCLASS32
)
1407 else if (eclass
== ELFCLASS64
)
1410 internal_error (_("unknown ELF header class %d"), eclass
);
1412 if (EF_LOONGARCH_IS_SINGLE_FLOAT (e_flags
))
1413 features
.fputype
= SINGLE_FLOAT
;
1414 else if (EF_LOONGARCH_IS_DOUBLE_FLOAT (e_flags
))
1415 features
.fputype
= DOUBLE_FLOAT
;
1421 /* Find a suitable default target description. Use the contents of INFO,
1422 specifically the bfd object being executed, to guide the selection of a
1423 suitable default target description. */
1425 static const struct target_desc
*
1426 loongarch_find_default_target_description (const struct gdbarch_info info
)
1428 /* Extract desired feature set from INFO. */
1429 struct loongarch_gdbarch_features features
1430 = loongarch_features_from_bfd (info
.abfd
);
1432 /* If the XLEN field is still 0 then we got nothing useful from INFO.BFD,
1433 maybe there was no bfd object. In this case we fall back to a minimal
1434 useful target, the x-register size is selected based on the architecture
1436 if (features
.xlen
== 0)
1437 features
.xlen
= info
.bfd_arch_info
->bits_per_address
== 32 ? 4 : 8;
1439 /* If the FPUTYPE field is still 0 then we got nothing useful from INFO.BFD,
1440 maybe there was no bfd object. In this case we fall back to a usual useful
1441 target with double float. */
1442 if (features
.fputype
== 0)
1443 features
.fputype
= DOUBLE_FLOAT
;
1445 /* Now build a target description based on the feature set. */
1446 return loongarch_lookup_target_description (features
);
1450 loongarch_register_reggroup_p (struct gdbarch
*gdbarch
, int regnum
,
1451 const struct reggroup
*group
)
1453 if (gdbarch_register_name (gdbarch
, regnum
) == NULL
1454 || *gdbarch_register_name (gdbarch
, regnum
) == '\0')
1457 int raw_p
= regnum
< gdbarch_num_regs (gdbarch
);
1459 if (group
== save_reggroup
|| group
== restore_reggroup
)
1462 if (group
== all_reggroup
)
1465 if (0 <= regnum
&& regnum
<= LOONGARCH_BADV_REGNUM
)
1466 return group
== general_reggroup
;
1468 /* Only ORIG_A0, PC, BADV in general_reggroup */
1469 if (group
== general_reggroup
)
1472 if (LOONGARCH_FIRST_FP_REGNUM
<= regnum
&& regnum
<= LOONGARCH_FCSR_REGNUM
)
1473 return group
== float_reggroup
;
1475 /* Only $fx / $fccx / $fcsr in float_reggroup */
1476 if (group
== float_reggroup
)
1479 int ret
= tdesc_register_in_reggroup_p (gdbarch
, regnum
, group
);
1483 return default_register_reggroup_p (gdbarch
, regnum
, group
);
1486 /* Initialize the current architecture based on INFO */
1488 static struct gdbarch
*
1489 loongarch_gdbarch_init (struct gdbarch_info info
, struct gdbarch_list
*arches
)
1492 struct loongarch_gdbarch_features features
;
1493 tdesc_arch_data_up tdesc_data
= tdesc_data_alloc ();
1494 const struct target_desc
*tdesc
= info
.target_desc
;
1496 /* Ensure we always have a target description. */
1497 if (!tdesc_has_registers (tdesc
))
1498 tdesc
= loongarch_find_default_target_description (info
);
1500 const struct tdesc_feature
*feature_cpu
1501 = tdesc_find_feature (tdesc
, "org.gnu.gdb.loongarch.base");
1502 if (feature_cpu
== nullptr)
1506 /* Validate the description provides the mandatory base registers
1507 and allocate their numbers. */
1508 bool valid_p
= true;
1509 for (int i
= 0; i
< 32; i
++)
1510 valid_p
&= tdesc_numbered_register (feature_cpu
, tdesc_data
.get (), regnum
++,
1511 loongarch_r_normal_name
[i
] + 1);
1512 valid_p
&= tdesc_numbered_register (feature_cpu
, tdesc_data
.get (), regnum
++, "orig_a0");
1513 valid_p
&= tdesc_numbered_register (feature_cpu
, tdesc_data
.get (), regnum
++, "pc");
1514 valid_p
&= tdesc_numbered_register (feature_cpu
, tdesc_data
.get (), regnum
++, "badv");
1518 const struct tdesc_feature
*feature_fpu
1519 = tdesc_find_feature (tdesc
, "org.gnu.gdb.loongarch.fpu");
1520 if (feature_fpu
== nullptr)
1523 /* Validate the description provides the fpu registers and
1524 allocate their numbers. */
1525 regnum
= LOONGARCH_FIRST_FP_REGNUM
;
1526 for (int i
= 0; i
< LOONGARCH_LINUX_NUM_FPREGSET
; i
++)
1527 valid_p
&= tdesc_numbered_register (feature_fpu
, tdesc_data
.get (), regnum
++,
1528 loongarch_f_normal_name
[i
] + 1);
1529 for (int i
= 0; i
< LOONGARCH_LINUX_NUM_FCC
; i
++)
1530 valid_p
&= tdesc_numbered_register (feature_fpu
, tdesc_data
.get (), regnum
++,
1531 loongarch_c_normal_name
[i
] + 1);
1532 valid_p
&= tdesc_numbered_register (feature_fpu
, tdesc_data
.get (), regnum
++, "fcsr");
1536 /* LoongArch code is always little-endian. */
1537 info
.byte_order_for_code
= BFD_ENDIAN_LITTLE
;
1539 /* Have a look at what the supplied (if any) bfd object requires of the
1540 target, then check that this matches with what the target is
1542 struct loongarch_gdbarch_features abi_features
1543 = loongarch_features_from_bfd (info
.abfd
);
1545 /* If the ABI_FEATURES xlen or fputype is 0 then this indicates we got
1546 no useful abi features from the INFO object. In this case we just
1547 treat the hardware features as defining the abi. */
1548 if (abi_features
.xlen
== 0)
1550 int xlen_bitsize
= tdesc_register_bitsize (feature_cpu
, "pc");
1551 features
.xlen
= (xlen_bitsize
/ 8);
1552 features
.fputype
= abi_features
.fputype
;
1553 abi_features
= features
;
1555 if (abi_features
.fputype
== 0)
1557 features
.xlen
= abi_features
.xlen
;
1558 features
.fputype
= DOUBLE_FLOAT
;
1559 abi_features
= features
;
1562 /* Find a candidate among the list of pre-declared architectures. */
1563 for (arches
= gdbarch_list_lookup_by_info (arches
, &info
);
1565 arches
= gdbarch_list_lookup_by_info (arches
->next
, &info
))
1567 /* Check that the feature set of the ARCHES matches the feature set
1568 we are looking for. If it doesn't then we can't reuse this
1570 loongarch_gdbarch_tdep
*candidate_tdep
1571 = gdbarch_tdep
<loongarch_gdbarch_tdep
> (arches
->gdbarch
);
1573 if (candidate_tdep
->abi_features
!= abi_features
)
1579 if (arches
!= nullptr)
1580 return arches
->gdbarch
;
1582 /* None found, so create a new architecture from the information provided. */
1584 = gdbarch_alloc (&info
, gdbarch_tdep_up (new loongarch_gdbarch_tdep
));
1585 loongarch_gdbarch_tdep
*tdep
= gdbarch_tdep
<loongarch_gdbarch_tdep
> (gdbarch
);
1587 tdep
->abi_features
= abi_features
;
1589 /* Target data types. */
1590 set_gdbarch_short_bit (gdbarch
, 16);
1591 set_gdbarch_int_bit (gdbarch
, 32);
1592 set_gdbarch_long_bit (gdbarch
, info
.bfd_arch_info
->bits_per_address
);
1593 set_gdbarch_long_long_bit (gdbarch
, 64);
1594 set_gdbarch_float_bit (gdbarch
, 32);
1595 set_gdbarch_double_bit (gdbarch
, 64);
1596 set_gdbarch_long_double_bit (gdbarch
, 128);
1597 set_gdbarch_long_double_format (gdbarch
, floatformats_ieee_quad
);
1598 set_gdbarch_ptr_bit (gdbarch
, info
.bfd_arch_info
->bits_per_address
);
1599 set_gdbarch_char_signed (gdbarch
, 0);
1601 info
.target_desc
= tdesc
;
1602 info
.tdesc_data
= tdesc_data
.get ();
1604 for (int i
= 0; i
< ARRAY_SIZE (loongarch_r_lp64_name
); ++i
)
1605 if (loongarch_r_lp64_name
[i
][0] != '\0')
1606 user_reg_add (gdbarch
, loongarch_r_lp64_name
[i
] + 1,
1607 value_of_loongarch_user_reg
, (void *) (size_t) i
);
1609 for (int i
= 0; i
< ARRAY_SIZE (loongarch_f_lp64_name
); ++i
)
1611 if (loongarch_f_lp64_name
[i
][0] != '\0')
1612 user_reg_add (gdbarch
, loongarch_f_lp64_name
[i
] + 1,
1613 value_of_loongarch_user_reg
,
1614 (void *) (size_t) (LOONGARCH_FIRST_FP_REGNUM
+ i
));
1617 /* Information about registers. */
1618 set_gdbarch_num_regs (gdbarch
, regnum
);
1619 set_gdbarch_sp_regnum (gdbarch
, LOONGARCH_SP_REGNUM
);
1620 set_gdbarch_pc_regnum (gdbarch
, LOONGARCH_PC_REGNUM
);
1622 /* Finalise the target description registers. */
1623 tdesc_use_registers (gdbarch
, tdesc
, std::move (tdesc_data
));
1625 /* Functions handling dummy frames. */
1626 set_gdbarch_push_dummy_call (gdbarch
, loongarch_push_dummy_call
);
1628 /* Return value info */
1629 set_gdbarch_return_value (gdbarch
, loongarch_return_value
);
1631 /* Advance PC across function entry code. */
1632 set_gdbarch_skip_prologue (gdbarch
, loongarch_skip_prologue
);
1634 /* Stack grows downward. */
1635 set_gdbarch_inner_than (gdbarch
, core_addr_lessthan
);
1638 set_gdbarch_frame_align (gdbarch
, loongarch_frame_align
);
1640 /* Breakpoint manipulation. */
1641 set_gdbarch_software_single_step (gdbarch
, loongarch_software_single_step
);
1642 set_gdbarch_breakpoint_kind_from_pc (gdbarch
, loongarch_breakpoint::kind_from_pc
);
1643 set_gdbarch_sw_breakpoint_from_kind (gdbarch
, loongarch_breakpoint::bp_from_kind
);
1645 /* Frame unwinders. Use DWARF debug info if available, otherwise use our own unwinder. */
1646 set_gdbarch_dwarf2_reg_to_regnum (gdbarch
, loongarch_dwarf2_reg_to_regnum
);
1647 dwarf2_append_unwinders (gdbarch
);
1648 frame_unwind_append_unwinder (gdbarch
, &loongarch_frame_unwind
);
1650 /* Hook in OS ABI-specific overrides, if they have been registered. */
1651 gdbarch_init_osabi (info
, gdbarch
);
1652 set_gdbarch_register_reggroup_p (gdbarch
, loongarch_register_reggroup_p
);
1657 void _initialize_loongarch_tdep ();
1659 _initialize_loongarch_tdep ()
1661 gdbarch_register (bfd_arch_loongarch
, loongarch_gdbarch_init
, nullptr);