Fix whitespace snafu in tc-riscv.c
[binutils-gdb.git] / sim / common / sim-config.h
blob652e83cd60c8fdea6d749907b1effbcfe4c69104
1 /* The common simulator framework for GDB, the GNU Debugger.
3 Copyright 2002-2023 Free Software Foundation, Inc.
5 Contributed by Andrew Cagney and Red Hat.
7 This file is part of GDB.
9 This program is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3 of the License, or
12 (at your option) any later version.
14 This program is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with this program. If not, see <http://www.gnu.org/licenses/>. */
23 #ifndef SIM_CONFIG_H
24 #define SIM_CONFIG_H
26 #ifdef SIM_COMMON_BUILD
27 #error "This header is unusable in common builds due to reliance on SIM_AC_OPTION_BITSIZE"
28 #endif
30 /* Host dependant:
32 The CPP below defines information about the compilation host. In
33 particular it defines the macro's:
35 HOST_BYTE_ORDER The byte order of the host. Could be BFD_ENDIAN_LITTLE
36 or BFD_ENDIAN_BIG.
40 #ifdef WORDS_BIGENDIAN
41 # define HOST_BYTE_ORDER BFD_ENDIAN_BIG
42 #else
43 # define HOST_BYTE_ORDER BFD_ENDIAN_LITTLE
44 #endif
47 /* Until devices and tree properties are sorted out, tell sim-config.c
48 not to call the tree_find_foo fns. */
49 #define WITH_TREE_PROPERTIES 0
52 /* Endianness of the target.
54 Possible values are BFD_ENDIAN_UNKNOWN, BFD_ENDIAN_LITTLE, or BFD_ENDIAN_BIG. */
56 extern enum bfd_endian current_target_byte_order;
57 #define CURRENT_TARGET_BYTE_ORDER \
58 (WITH_TARGET_BYTE_ORDER != BFD_ENDIAN_UNKNOWN \
59 ? WITH_TARGET_BYTE_ORDER : current_target_byte_order)
63 /* XOR endian.
65 In addition to the above, the simulator can support the horrible
66 XOR endian mode (as found in the PowerPC and MIPS ISA). See
67 sim-core for more information.
69 If WITH_XOR_ENDIAN is non-zero, it specifies the number of bytes
70 potentially involved in the XOR munge. A typical value is 8. */
72 #ifndef WITH_XOR_ENDIAN
73 #define WITH_XOR_ENDIAN 0
74 #endif
78 /* SMP support:
80 Sets a limit on the number of processors that can be simulated. If
81 WITH_SMP is set to zero (0), the simulator is restricted to
82 suporting only one processor (and as a consequence leaves the SMP
83 code out of the build process).
85 The actual number of processors is taken from the device
86 /options/smp@<nr-cpu> */
88 #if defined (WITH_SMP) && (WITH_SMP > 0)
89 #define MAX_NR_PROCESSORS WITH_SMP
90 #endif
92 #ifndef MAX_NR_PROCESSORS
93 #define MAX_NR_PROCESSORS 1
94 #endif
97 /* Size of target word, address and OpenFirmware Cell:
99 The target word size is determined by the natural size of its
100 reginsters.
102 On most hosts, the address and cell are the same size as a target
103 word. */
105 #ifndef WITH_TARGET_WORD_BITSIZE
106 #define WITH_TARGET_WORD_BITSIZE 32
107 #endif
109 #ifndef WITH_TARGET_ADDRESS_BITSIZE
110 #define WITH_TARGET_ADDRESS_BITSIZE WITH_TARGET_WORD_BITSIZE
111 #endif
113 #ifndef WITH_TARGET_CELL_BITSIZE
114 #define WITH_TARGET_CELL_BITSIZE WITH_TARGET_WORD_BITSIZE
115 #endif
117 #ifndef WITH_TARGET_FLOATING_POINT_BITSIZE
118 #define WITH_TARGET_FLOATING_POINT_BITSIZE 64
119 #endif
123 /* Most significant bit of target:
125 Set this according to your target's bit numbering convention. For
126 the PowerPC it is zero, for many other targets it is 31 or 63.
128 For targets that can both have either 32 or 64 bit words and number
129 MSB as 31, 63. Define this to be (WITH_TARGET_WORD_BITSIZE - 1) */
131 #ifndef WITH_TARGET_WORD_MSB
132 #define WITH_TARGET_WORD_MSB 0
133 #endif
137 /* Program environment:
139 Three environments are available - UEA (user), VEA (virtual) and
140 OEA (perating). The former two are environment that users would
141 expect to see (VEA includes things like coherency and the time
142 base) while OEA is what an operating system expects to see. By
143 setting these to specific values, the build process is able to
144 eliminate non relevent environment code.
146 STATE_ENVIRONMENT(sd) specifies which of vea or oea is required for
147 the current runtime.
149 ALL_ENVIRONMENT is used during configuration as a value for
150 WITH_ENVIRONMENT to indicate the choice is runtime selectable.
151 The default is then USER_ENVIRONMENT [since allowing the user to choose
152 the default at configure time seems like featuritis and since people using
153 OPERATING_ENVIRONMENT have more to worry about than selecting the
154 default].
155 ALL_ENVIRONMENT is also used to set STATE_ENVIRONMENT to the
156 "uninitialized" state. */
158 enum sim_environment {
159 ALL_ENVIRONMENT,
160 USER_ENVIRONMENT,
161 VIRTUAL_ENVIRONMENT,
162 OPERATING_ENVIRONMENT
165 /* To be prepended to simulator calls with absolute file paths and
166 chdir:ed at startup. */
167 extern char *simulator_sysroot;
169 /* Callback & Modulo Memory.
171 Core includes a builtin memory type (raw_memory) that is
172 implemented using an array. raw_memory does not require any
173 additional functions etc.
175 Callback memory is where the core calls a core device for the data
176 it requires. Callback memory can be layered using priorities.
178 Modulo memory is a variation on raw_memory where ADDRESS & (MODULO
179 - 1) is used as the index into the memory array.
181 The OEA model uses callback memory for devices.
183 The VEA model uses callback memory to capture `page faults'.
185 BTW, while raw_memory could have been implemented as a callback,
186 profiling has shown that there is a biger win (at least for the
187 x86) in eliminating a function call for the most common
188 (raw_memory) case. */
191 /* Alignment:
193 A processor architecture may or may not handle misaligned
194 transfers.
196 As alternatives: both little and big endian modes take an exception
197 (STRICT_ALIGNMENT); big and little endian models handle misaligned
198 transfers (NONSTRICT_ALIGNMENT); or the address is forced into
199 alignment using a mask (FORCED_ALIGNMENT).
201 Mixed alignment should be specified when the simulator needs to be
202 able to change the alignment requirements on the fly (eg for
203 bi-endian support). */
205 enum sim_alignments {
206 MIXED_ALIGNMENT,
207 NONSTRICT_ALIGNMENT,
208 STRICT_ALIGNMENT,
209 FORCED_ALIGNMENT,
212 extern enum sim_alignments current_alignment;
214 #if !defined (WITH_ALIGNMENT)
215 #define WITH_ALIGNMENT 0
216 #endif
218 #define CURRENT_ALIGNMENT (WITH_ALIGNMENT \
219 ? WITH_ALIGNMENT \
220 : current_alignment)
224 /* Floating point suport:
226 Should the processor trap for all floating point instructions (as
227 if the hardware wasn't implemented) or implement the floating point
228 instructions directly. */
230 #if defined (WITH_FLOATING_POINT)
232 #define SOFT_FLOATING_POINT 1
233 #define HARD_FLOATING_POINT 2
235 extern int current_floating_point;
236 #define CURRENT_FLOATING_POINT (WITH_FLOATING_POINT \
237 ? WITH_FLOATING_POINT \
238 : current_floating_point)
240 #endif
243 /* Whether to check instructions for reserved bits being set */
245 /* #define WITH_RESERVED_BITS 1 */
249 /* include monitoring code */
251 #define MONITOR_INSTRUCTION_ISSUE 1
252 #define MONITOR_LOAD_STORE_UNIT 2
253 /* do not define WITH_MON by default */
254 #define DEFAULT_WITH_MON (MONITOR_LOAD_STORE_UNIT \
255 | MONITOR_INSTRUCTION_ISSUE)
258 /* Whether or not input/output just uses stdio, or uses printf_filtered for
259 output, and polling input for input. */
261 #define DONT_USE_STDIO 2
262 #define DO_USE_STDIO 1
264 extern int current_stdio;
265 #define CURRENT_STDIO (WITH_STDIO \
266 ? WITH_STDIO \
267 : current_stdio)
271 /* Set the default state configuration, before parsing argv. */
273 extern void sim_config_default (SIM_DESC sd);
275 /* Complete and verify the simulator configuration. */
277 extern SIM_RC sim_config (SIM_DESC sd);
279 /* Print the simulator configuration. */
281 extern void sim_config_print (SIM_DESC sd);
284 #endif