sim/ppc/igen.h

   1 /*  This file is part of the program psim.
   2
   3     Copyright (C) 1994,1995,1996, Andrew Cagney <cagney@highland.com.au>
   4
   5     This program is free software; you can redistribute it and/or modify
   6     it under the terms of the GNU General Public License as published by
   7     the Free Software Foundation; either version 3 of the License, or
   8     (at your option) any later version.
   9
  10     This program is distributed in the hope that it will be useful,
  11     but WITHOUT ANY WARRANTY; without even the implied warranty of
  12     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  13     GNU General Public License for more details.
  14
  15     You should have received a copy of the GNU General Public License
  16     along with this program; if not, see <http://www.gnu.org/licenses/>.
  17
  18     */
  19
  20
  21 /* What does the instruction look like - bit ordering and size */
  22 extern int hi_bit_nr;
  23 extern int insn_bit_size;
  24
  25
  26 /* generation options: */
  27
  28
  29 enum {
  30   generate_with_direct_access = 0x1,
  31   generate_with_icache = 0x2,
  32   generate_with_semantic_icache = 0x4,
  33   generate_with_insn_in_icache = 0x8,
  34 };
  35
  36
  37 typedef enum {
  38
  39   /* Transfer control to an instructions semantic code using the the
  40      standard call/return mechanism */
  41
  42   generate_calls = 0x100,
  43
  44   /* In addition, when refering to fields access them directly instead
  45      of via variables */
  46
  47   generate_calls_with_direct_access
  48     = generate_calls | generate_with_direct_access,
  49
  50   /* In addition, pre-decode an instructions opcode fields (entering
  51      them into an icache) so that semantic code can avoid the need to
  52      re-decode fields each time it is executed */
  53
  54   generate_calls_with_icache
  55     = generate_calls | generate_with_icache,
  56
  57   /* In addition, the instruction decode code includes a duplicated
  58      copy of the instructions semantic code.  This avoids the need to
  59      perform two calls (one to decode an instructions opcode fields
  60      and one to execute the instruction) when there is a miss of the
  61      icache */
  62
  63   generate_calls_with_semantic_icache
  64     = generate_calls_with_icache | generate_with_semantic_icache,
  65
  66   /* In addition, the semantic function refers to icache entries
  67      directly instead of first moving them into local variables */
  68
  69   generate_calls_with_direct_access_icache
  70     = generate_calls_with_icache | generate_with_direct_access,
  71
  72   generate_calls_with_direct_access_semantic_icache
  73     = generate_calls_with_direct_access_icache | generate_with_semantic_icache,
  74
  75
  76   /* Transfer control to an instructions semantic code using
  77      (computed) goto's instead of the more conventional call/return
  78      mechanism */
  79
  80   generate_jumps = 0x200,
  81
  82   /* As for generate jumps but with instruction fields accessed
  83      directly */
  84
  85   generate_jumps_with_direct_access
  86     = generate_jumps | generate_with_direct_access,
  87
  88   /* As for generate_calls_with_icache but applies to jumping code */
  89
  90   generate_jumps_with_icache
  91     = generate_jumps | generate_with_icache,
  92
  93   /* As for generate_calls_with_semantic_icache but applies to jumping
  94      code */
  95
  96   generate_jumps_with_semantic_icache
  97     = generate_jumps_with_icache | generate_with_semantic_icache,
  98
  99   /* As for generate_calls_with_direct_access */
 100
 101   generate_jumps_with_direct_access_icache
 102     = generate_jumps_with_icache | generate_with_direct_access,
 103
 104   generate_jumps_with_direct_access_semantic_icache
 105     = generate_jumps_with_direct_access_icache | generate_with_semantic_icache,
 106
 107 } igen_code;
 108
 109 extern igen_code code;
 110
 111
 112
 113
 114 extern int icache_size;
 115
 116
 117 /* Instruction expansion?
 118
 119    Should the semantic code for each instruction, when the oportunity
 120    arrises, be expanded according to the variable opcode files that
 121    the instruction decode process renders constant */
 122
 123 extern int generate_expanded_instructions;
 124
 125
 126 /* SMP?
 127
 128    Should the generated code include SMP support (>0) and if so, for
 129    how many processors? */
 130
 131 extern int generate_smp;
 132
 133
 134
 135
 136 /* Misc junk */
 137
 138
 139
 140 /* Function header definitions */
 141
 142
 143 /* Cache functions: */
 144
 145 #define ICACHE_FUNCTION_FORMAL \
 146 "cpu *processor,\n\
 147  instruction_word instruction,\n\
 148  unsigned_word cia,\n\
 149  idecode_cache *cache_entry"
 150
 151 #define ICACHE_FUNCTION_ACTUAL "processor, instruction, cia, cache_entry"
 152
 153 #define ICACHE_FUNCTION_TYPE \
 154 ((code & generate_with_semantic_icache) \
 155  ? SEMANTIC_FUNCTION_TYPE \
 156  : "idecode_semantic *")
 157
 158
 159 /* Semantic functions: */
 160
 161 #define SEMANTIC_FUNCTION_FORMAL \
 162 ((code & generate_with_icache) \
 163  ? "cpu *processor,\n idecode_cache *cache_entry,\n unsigned_word cia" \
 164  : "cpu *processor,\n instruction_word instruction,\n unsigned_word cia")
 165
 166 #define SEMANTIC_FUNCTION_ACTUAL \
 167 ((code & generate_with_icache) \
 168  ? "processor, instruction, cia, cache_entry" \
 169  : "processor, instruction, cia")
 170
 171 #define SEMANTIC_FUNCTION_TYPE "unsigned_word"
 172
 173
 174
 175 extern void print_my_defines
 176 (lf *file,
 177  insn_bits *expanded_bits,
 178  table_entry *file_entry);
 179
 180 extern void print_itrace
 181 (lf *file,
 182  table_entry *file_entry,
 183  int idecode);
 184
 185
 186 typedef enum {
 187   function_name_prefix_semantics,
 188   function_name_prefix_idecode,
 189   function_name_prefix_itable,
 190   function_name_prefix_icache,
 191   function_name_prefix_none
 192 } lf_function_name_prefixes;
 193
 194 extern int print_function_name
 195 (lf *file,
 196  const char *basename,
 197  insn_bits *expanded_bits,
 198  lf_function_name_prefixes prefix);