| blob | 68e17c8babbaab31689377048664ef2260614615 |
1 /* PowerPC-specific support for 32-bit ELF
2 Copyright (C) 1994-2024 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
5 This file is part of BFD, the Binary File Descriptor library.
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the
19 Free Software Foundation, Inc., 51 Franklin Street - Fifth Floor,
20 Boston, MA 02110-1301, USA. */
22 /* The assembler should generate a full set of section symbols even
23 when they appear unused. The linux kernel build tool recordmcount
24 needs them. */
25 #define TARGET_KEEP_UNUSED_SECTION_SYMBOLS true
28 #include <stdarg.h>
39 /* All users of this file have bfd_octets_per_byte (abfd, sec) == 1. */
40 #define OCTETS_PER_BYTE(ABFD, SEC) 1
43 {
45 split16d_type
46 }
47 split16_format_type;
49 /* RELA relocations are used here. */
51 static bfd_reloc_status_type ppc_elf_addr16_ha_reloc
53 static bfd_reloc_status_type ppc_elf_unhandled_reloc
56 /* Branch prediction bit for branch taken relocs. */
57 #define BRANCH_PREDICT_BIT 0x200000
58 /* Mask to set RA in memory instructions. */
59 #define RA_REGISTER_MASK 0x001f0000
60 /* Value to shift register by to insert RA. */
61 #define RA_REGISTER_SHIFT 16
63 /* The name of the dynamic interpreter. This is put in the .interp
64 section. */
67 /* For old-style PLT. */
68 /* The number of single-slot PLT entries (the rest use two slots). */
69 #define PLT_NUM_SINGLE_ENTRIES 8192
71 /* For new-style .glink and .plt. */
72 #define GLINK_PLTRESOLVE 16*4
73 #define GLINK_ENTRY_SIZE(htab, h) \
74 ((4*4 \
75 + (h != NULL \
76 && h == htab->tls_get_addr \
77 && !htab->params->no_tls_get_addr_opt ? 8*4 : 0) \
78 + (1u << htab->params->plt_stub_align) - 1) \
79 & -(1u << htab->params->plt_stub_align))
81 /* VxWorks uses its own plt layout, filled in by the static linker. */
83 /* The standard VxWorks PLT entry. */
84 #define VXWORKS_PLT_ENTRY_SIZE 32
85 static const bfd_vma ppc_elf_vxworks_plt_entry
87 {
96 };
97 static const bfd_vma ppc_elf_vxworks_pic_plt_entry
99 {
108 };
110 /* The initial VxWorks PLT entry. */
111 #define VXWORKS_PLT_INITIAL_ENTRY_SIZE 32
112 static const bfd_vma ppc_elf_vxworks_plt0_entry
114 {
123 };
124 static const bfd_vma ppc_elf_vxworks_pic_plt0_entry
126 {
135 };
137 /* For executables, we have some additional relocations in
138 .rela.plt.unloaded, for the kernel loader. */
140 /* The number of non-JMP_SLOT relocations per PLT0 slot. */
141 #define VXWORKS_PLT_NON_JMP_SLOT_RELOCS 3
142 /* The number of relocations in the PLTResolve slot. */
143 #define VXWORKS_PLTRESOLVE_RELOCS 2
144 /* The number of relocations in the PLTResolve slot when creating
145 a shared library. */
146 #define VXWORKS_PLTRESOLVE_RELOCS_SHLIB 0
148 /* Some instructions. */
149 #define ADDIS_11_11 0x3d6b0000
150 #define ADDIS_11_30 0x3d7e0000
151 #define ADDIS_12_12 0x3d8c0000
152 #define ADDI_11_11 0x396b0000
153 #define ADD_0_11_11 0x7c0b5a14
154 #define ADD_3_12_2 0x7c6c1214
155 #define ADD_11_0_11 0x7d605a14
156 #define B 0x48000000
157 #define BA 0x48000002
158 #define BCL_20_31 0x429f0005
159 #define BCTR 0x4e800420
160 #define BEQLR 0x4d820020
161 #define CMPWI_11_0 0x2c0b0000
162 #define LIS_11 0x3d600000
163 #define LIS_12 0x3d800000
164 #define LWZU_0_12 0x840c0000
165 #define LWZ_0_12 0x800c0000
166 #define LWZ_11_3 0x81630000
167 #define LWZ_11_11 0x816b0000
168 #define LWZ_11_30 0x817e0000
169 #define LWZ_12_3 0x81830000
170 #define LWZ_12_12 0x818c0000
171 #define MR_0_3 0x7c601b78
172 #define MR_3_0 0x7c030378
173 #define MFLR_0 0x7c0802a6
174 #define MFLR_12 0x7d8802a6
175 #define MTCTR_0 0x7c0903a6
176 #define MTCTR_11 0x7d6903a6
177 #define MTLR_0 0x7c0803a6
178 #define NOP 0x60000000
179 #define SUB_11_11_12 0x7d6c5850
181 /* Offset of tp and dtp pointers from start of TLS block. */
182 #define TP_OFFSET 0x7000
183 #define DTP_OFFSET 0x8000
185 /* The value of a defined global symbol. */
186 #define SYM_VAL(SYM) \
187 ((SYM)->root.u.def.section->output_section->vma \
188 + (SYM)->root.u.def.section->output_offset \
189 + (SYM)->root.u.def.value)
190 \f
191 /* Relocation HOWTO's. */
192 /* Like other ELF RELA targets that don't apply multiple
193 field-altering relocations to the same localation, src_mask is
194 always zero and pcrel_offset is the same as pc_relative.
195 PowerPC can always use a zero bitpos, even when the field is not at
196 the LSB. For example, a REL24 could use rightshift=2, bisize=24
197 and bitpos=2 which matches the ABI description, or as we do here,
198 rightshift=0, bitsize=26 and bitpos=0. */
199 #define HOW(type, size, bitsize, mask, rightshift, pc_relative, \
200 complain, special_func) \
201 HOWTO (type, rightshift, size, bitsize, pc_relative, 0, \
202 complain_overflow_ ## complain, special_func, \
203 #type, false, 0, mask, pc_relative)
208 /* This reloc does nothing. */
210 bfd_elf_generic_reloc),
212 /* A standard 32 bit relocation. */
214 bfd_elf_generic_reloc),
216 /* An absolute 26 bit branch; the lower two bits must be zero.
217 FIXME: we don't check that, we just clear them. */
219 bfd_elf_generic_reloc),
221 /* A standard 16 bit relocation. */
223 bfd_elf_generic_reloc),
225 /* A 16 bit relocation without overflow. */
227 bfd_elf_generic_reloc),
229 /* The high order 16 bits of an address. */
231 bfd_elf_generic_reloc),
233 /* The high order 16 bits of an address, plus 1 if the contents of
234 the low 16 bits, treated as a signed number, is negative. */
236 ppc_elf_addr16_ha_reloc),
238 /* An absolute 16 bit branch; the lower two bits must be zero.
239 FIXME: we don't check that, we just clear them. */
241 bfd_elf_generic_reloc),
243 /* An absolute 16 bit branch, for which bit 10 should be set to
244 indicate that the branch is expected to be taken. The lower two
245 bits must be zero. */
247 bfd_elf_generic_reloc),
249 /* An absolute 16 bit branch, for which bit 10 should be set to
250 indicate that the branch is not expected to be taken. The lower
251 two bits must be zero. */
253 bfd_elf_generic_reloc),
255 /* A relative 26 bit branch; the lower two bits must be zero. */
257 bfd_elf_generic_reloc),
259 /* A relative 16 bit branch; the lower two bits must be zero. */
261 bfd_elf_generic_reloc),
263 /* A relative 16 bit branch. Bit 10 should be set to indicate that
264 the branch is expected to be taken. The lower two bits must be
265 zero. */
267 bfd_elf_generic_reloc),
269 /* A relative 16 bit branch. Bit 10 should be set to indicate that
270 the branch is not expected to be taken. The lower two bits must
271 be zero. */
273 bfd_elf_generic_reloc),
275 /* Like R_PPC_ADDR16, but referring to the GOT table entry for the
276 symbol. */
278 ppc_elf_unhandled_reloc),
280 /* Like R_PPC_ADDR16_LO, but referring to the GOT table entry for
281 the symbol. */
283 ppc_elf_unhandled_reloc),
285 /* Like R_PPC_ADDR16_HI, but referring to the GOT table entry for
286 the symbol. */
288 ppc_elf_unhandled_reloc),
290 /* Like R_PPC_ADDR16_HA, but referring to the GOT table entry for
291 the symbol. */
293 ppc_elf_unhandled_reloc),
295 /* Like R_PPC_REL24, but referring to the procedure linkage table
296 entry for the symbol. */
298 ppc_elf_unhandled_reloc),
300 /* This is used only by the dynamic linker. The symbol should exist
301 both in the object being run and in some shared library. The
302 dynamic linker copies the data addressed by the symbol from the
303 shared library into the object, because the object being
304 run has to have the data at some particular address. */
306 ppc_elf_unhandled_reloc),
308 /* Like R_PPC_ADDR32, but used when setting global offset table
309 entries. */
311 ppc_elf_unhandled_reloc),
313 /* Marks a procedure linkage table entry for a symbol. */
315 ppc_elf_unhandled_reloc),
317 /* Used only by the dynamic linker. When the object is run, this
318 longword is set to the load address of the object, plus the
319 addend. */
321 bfd_elf_generic_reloc),
323 /* Like R_PPC_REL24, but uses the value of the symbol within the
324 object rather than the final value. Normally used for
325 _GLOBAL_OFFSET_TABLE_. */
327 bfd_elf_generic_reloc),
329 /* Like R_PPC_ADDR32, but may be unaligned. */
331 bfd_elf_generic_reloc),
333 /* Like R_PPC_ADDR16, but may be unaligned. */
335 bfd_elf_generic_reloc),
337 /* 32-bit PC relative */
339 bfd_elf_generic_reloc),
341 /* 32-bit relocation to the symbol's procedure linkage table.
342 FIXME: not supported. */
344 ppc_elf_unhandled_reloc),
346 /* 32-bit PC relative relocation to the symbol's procedure linkage table.
347 FIXME: not supported. */
349 ppc_elf_unhandled_reloc),
351 /* Like R_PPC_ADDR16_LO, but referring to the PLT table entry for
352 the symbol. */
354 ppc_elf_unhandled_reloc),
356 /* Like R_PPC_ADDR16_HI, but referring to the PLT table entry for
357 the symbol. */
359 ppc_elf_unhandled_reloc),
361 /* Like R_PPC_ADDR16_HA, but referring to the PLT table entry for
362 the symbol. */
364 ppc_elf_unhandled_reloc),
366 /* A sign-extended 16 bit value relative to _SDA_BASE_, for use with
367 small data items. */
369 ppc_elf_unhandled_reloc),
371 /* 16-bit section relative relocation. */
373 ppc_elf_unhandled_reloc),
375 /* 16-bit lower half section relative relocation. */
377 ppc_elf_unhandled_reloc),
379 /* 16-bit upper half section relative relocation. */
381 ppc_elf_unhandled_reloc),
383 /* 16-bit upper half adjusted section relative relocation. */
385 ppc_elf_unhandled_reloc),
387 /* Marker relocs for TLS. */
389 bfd_elf_generic_reloc),
392 bfd_elf_generic_reloc),
395 bfd_elf_generic_reloc),
397 /* Marker relocs on inline plt call instructions. */
399 bfd_elf_generic_reloc),
402 bfd_elf_generic_reloc),
404 /* Computes the load module index of the load module that contains the
405 definition of its TLS sym. */
407 ppc_elf_unhandled_reloc),
409 /* Computes a dtv-relative displacement, the difference between the value
410 of sym+add and the base address of the thread-local storage block that
411 contains the definition of sym, minus 0x8000. */
413 ppc_elf_unhandled_reloc),
415 /* A 16 bit dtprel reloc. */
417 ppc_elf_unhandled_reloc),
419 /* Like DTPREL16, but no overflow. */
421 ppc_elf_unhandled_reloc),
423 /* Like DTPREL16_LO, but next higher group of 16 bits. */
425 ppc_elf_unhandled_reloc),
427 /* Like DTPREL16_HI, but adjust for low 16 bits. */
429 ppc_elf_unhandled_reloc),
431 /* Computes a tp-relative displacement, the difference between the value of
432 sym+add and the value of the thread pointer (r13). */
434 ppc_elf_unhandled_reloc),
436 /* A 16 bit tprel reloc. */
438 ppc_elf_unhandled_reloc),
440 /* Like TPREL16, but no overflow. */
442 ppc_elf_unhandled_reloc),
444 /* Like TPREL16_LO, but next higher group of 16 bits. */
446 ppc_elf_unhandled_reloc),
448 /* Like TPREL16_HI, but adjust for low 16 bits. */
450 ppc_elf_unhandled_reloc),
452 /* Allocates two contiguous entries in the GOT to hold a tls_index structure,
453 with values (sym+add)@dtpmod and (sym+add)@dtprel, and computes the offset
454 to the first entry. */
456 ppc_elf_unhandled_reloc),
458 /* Like GOT_TLSGD16, but no overflow. */
460 ppc_elf_unhandled_reloc),
462 /* Like GOT_TLSGD16_LO, but next higher group of 16 bits. */
464 ppc_elf_unhandled_reloc),
466 /* Like GOT_TLSGD16_HI, but adjust for low 16 bits. */
468 ppc_elf_unhandled_reloc),
470 /* Allocates two contiguous entries in the GOT to hold a tls_index structure,
471 with values (sym+add)@dtpmod and zero, and computes the offset to the
472 first entry. */
474 ppc_elf_unhandled_reloc),
476 /* Like GOT_TLSLD16, but no overflow. */
478 ppc_elf_unhandled_reloc),
480 /* Like GOT_TLSLD16_LO, but next higher group of 16 bits. */
482 ppc_elf_unhandled_reloc),
484 /* Like GOT_TLSLD16_HI, but adjust for low 16 bits. */
486 ppc_elf_unhandled_reloc),
488 /* Allocates an entry in the GOT with value (sym+add)@dtprel, and computes
489 the offset to the entry. */
491 ppc_elf_unhandled_reloc),
493 /* Like GOT_DTPREL16, but no overflow. */
495 ppc_elf_unhandled_reloc),
497 /* Like GOT_DTPREL16_LO, but next higher group of 16 bits. */
499 ppc_elf_unhandled_reloc),
501 /* Like GOT_DTPREL16_HI, but adjust for low 16 bits. */
503 ppc_elf_unhandled_reloc),
505 /* Allocates an entry in the GOT with value (sym+add)@tprel, and computes the
506 offset to the entry. */
508 ppc_elf_unhandled_reloc),
510 /* Like GOT_TPREL16, but no overflow. */
512 ppc_elf_unhandled_reloc),
514 /* Like GOT_TPREL16_LO, but next higher group of 16 bits. */
516 ppc_elf_unhandled_reloc),
518 /* Like GOT_TPREL16_HI, but adjust for low 16 bits. */
520 ppc_elf_unhandled_reloc),
522 /* The remaining relocs are from the Embedded ELF ABI, and are not
523 in the SVR4 ELF ABI. */
525 /* 32 bit value resulting from the addend minus the symbol. */
527 ppc_elf_unhandled_reloc),
529 /* 16 bit value resulting from the addend minus the symbol. */
531 ppc_elf_unhandled_reloc),
533 /* 16 bit value resulting from the addend minus the symbol. */
535 ppc_elf_unhandled_reloc),
537 /* The high order 16 bits of the addend minus the symbol. */
539 ppc_elf_unhandled_reloc),
541 /* The high order 16 bits of the result of the addend minus the address,
542 plus 1 if the contents of the low 16 bits, treated as a signed number,
543 is negative. */
545 ppc_elf_unhandled_reloc),
547 /* 16 bit value resulting from allocating a 4 byte word to hold an
548 address in the .sdata section, and returning the offset from
549 _SDA_BASE_ for that relocation. */
551 ppc_elf_unhandled_reloc),
553 /* 16 bit value resulting from allocating a 4 byte word to hold an
554 address in the .sdata2 section, and returning the offset from
555 _SDA2_BASE_ for that relocation. */
557 ppc_elf_unhandled_reloc),
559 /* A sign-extended 16 bit value relative to _SDA2_BASE_, for use with
560 small data items. */
562 ppc_elf_unhandled_reloc),
564 /* Relocate against either _SDA_BASE_ or _SDA2_BASE_, filling in the 16 bit
565 signed offset from the appropriate base, and filling in the register
566 field with the appropriate register (0, 2, or 13). */
568 ppc_elf_unhandled_reloc),
570 /* Relocation not handled: R_PPC_EMB_MRKREF */
571 /* Relocation not handled: R_PPC_EMB_RELSEC16 */
572 /* Relocation not handled: R_PPC_EMB_RELST_LO */
573 /* Relocation not handled: R_PPC_EMB_RELST_HI */
574 /* Relocation not handled: R_PPC_EMB_RELST_HA */
575 /* Relocation not handled: R_PPC_EMB_BIT_FLD */
577 /* PC relative relocation against either _SDA_BASE_ or _SDA2_BASE_, filling
578 in the 16 bit signed offset from the appropriate base, and filling in the
579 register field with the appropriate register (0, 2, or 13). */
581 ppc_elf_unhandled_reloc),
583 /* A relative 8 bit branch. */
585 bfd_elf_generic_reloc),
587 /* A relative 15 bit branch. */
589 bfd_elf_generic_reloc),
591 /* A relative 24 bit branch. */
593 bfd_elf_generic_reloc),
595 /* The 16 LSBS in split16a format. */
597 ppc_elf_unhandled_reloc),
599 /* The 16 LSBS in split16d format. */
601 ppc_elf_unhandled_reloc),
603 /* Bits 16-31 split16a format. */
605 ppc_elf_unhandled_reloc),
607 /* Bits 16-31 split16d format. */
609 ppc_elf_unhandled_reloc),
611 /* Bits 16-31 (High Adjusted) in split16a format. */
613 ppc_elf_unhandled_reloc),
615 /* Bits 16-31 (High Adjusted) in split16d format. */
617 ppc_elf_unhandled_reloc),
619 /* This reloc is like R_PPC_EMB_SDA21 but only applies to e_add16i
620 instructions. If the register base is 0 then the linker changes
621 the e_add16i to an e_li instruction. */
623 ppc_elf_unhandled_reloc),
625 /* Like R_PPC_VLE_SDA21 but ignore overflow. */
627 ppc_elf_unhandled_reloc),
629 /* The 16 LSBS relative to _SDA_BASE_ in split16a format. */
631 ppc_elf_unhandled_reloc),
633 /* The 16 LSBS relative to _SDA_BASE_ in split16d format. */
635 ppc_elf_unhandled_reloc),
637 /* Bits 16-31 relative to _SDA_BASE_ in split16a format. */
639 ppc_elf_unhandled_reloc),
641 /* Bits 16-31 relative to _SDA_BASE_ in split16d format. */
643 ppc_elf_unhandled_reloc),
645 /* Bits 16-31 (HA) relative to _SDA_BASE split16a format. */
647 ppc_elf_unhandled_reloc),
649 /* Bits 16-31 (HA) relative to _SDA_BASE split16d format. */
651 ppc_elf_unhandled_reloc),
653 /* e_li split20 format. */
655 ppc_elf_unhandled_reloc),
658 ppc_elf_unhandled_reloc),
660 /* A 16 bit relative relocation. */
662 bfd_elf_generic_reloc),
664 /* A 16 bit relative relocation without overflow. */
666 bfd_elf_generic_reloc),
668 /* The high order 16 bits of a relative address. */
670 bfd_elf_generic_reloc),
672 /* The high order 16 bits of a relative address, plus 1 if the contents of
673 the low 16 bits, treated as a signed number, is negative. */
675 ppc_elf_addr16_ha_reloc),
677 /* Like R_PPC_REL16_HA but for split field in addpcis. */
679 ppc_elf_addr16_ha_reloc),
681 /* A split-field reloc for addpcis, non-relative (gas internal use only). */
683 ppc_elf_addr16_ha_reloc),
685 /* GNU extension to record C++ vtable hierarchy. */
687 NULL),
689 /* GNU extension to record C++ vtable member usage. */
691 NULL),
693 /* Phony reloc to handle AIX style TOC entries. */
695 ppc_elf_unhandled_reloc),
696 };
697 \f
698 /* Initialize the ppc_elf_howto_table, so that linear accesses can be done. */
700 static void
702 {
707 i++)
708 {
714 }
715 }
719 bfd_reloc_code_real_type code)
720 {
723 /* Initialize howto table if not already done. */
728 {
862 }
865 };
870 {
875 i++)
881 }
883 /* Set the howto pointer for a PowerPC ELF reloc. */
885 static bool
889 {
892 /* Initialize howto table if not already done. */
898 {
899 /* xgettext:c-format */
904 }
908 /* Just because the above assert didn't trigger doesn't mean that
909 ELF32_R_TYPE (dst->r_info) is necessarily a valid relocation. */
911 {
912 /* xgettext:c-format */
918 }
921 }
923 /* Handle the R_PPC_ADDR16_HA and R_PPC_REL16_HA relocs. */
925 static bfd_reloc_status_type
933 {
936 bfd_size_type octets;
937 bfd_vma value;
940 {
943 }
971 }
973 static bfd_reloc_status_type
981 {
982 /* If this is a relocatable link (output_bfd test tells us), just
983 call the generic function. Any adjustment will be done at final
984 link time. */
993 }
994 \f
995 /* Sections created by the linker. */
998 {
999 /* Pointer to the bfd section. */
1001 /* Section name. */
1003 /* Associated bss section name. */
1005 /* Associated symbol name. */
1007 /* Associated symbol. */
1011 /* Linked list of allocated pointer entries. This hangs off of the
1012 symbol lists, and provides allows us to return different pointers,
1013 based on different addend's. */
1016 {
1017 /* next allocated pointer for this symbol */
1019 /* offset of pointer from beginning of section */
1020 bfd_vma offset;
1021 /* addend used */
1022 bfd_vma addend;
1023 /* which linker section this is */
1027 struct ppc_elf_obj_tdata
1028 {
1031 /* A mapping from local symbols to offsets into the various linker
1032 sections added. This is index by the symbol index. */
1035 /* Flags used to auto-detect plt type. */
1038 };
1040 #define ppc_elf_tdata(bfd) \
1041 ((struct ppc_elf_obj_tdata *) (bfd)->tdata.any)
1043 #define elf_local_ptr_offsets(bfd) \
1044 (ppc_elf_tdata (bfd)->linker_section_pointers)
1046 #define is_ppc_elf(bfd) \
1047 (bfd_get_flavour (bfd) == bfd_target_elf_flavour \
1048 && elf_object_id (bfd) == PPC32_ELF_DATA)
1050 /* Override the generic function because we store some extras. */
1052 static bool
1054 {
1056 PPC32_ELF_DATA);
1057 }
1059 /* When defaulting arch/mach, decode apuinfo to find a better match. */
1061 bool
1063 {
1070 {
1077 }
1080 {
1086 {
1091 {
1094 {
1120 }
1121 }
1123 }
1124 }
1127 {
1132 {
1135 }
1136 }
1138 }
1140 /* Fix bad default arch selected for a 32 bit input bfd when the
1141 default is 64 bit. Also select arch based on apuinfo. */
1143 static bool
1145 {
1150 {
1154 {
1155 /* Relies on arch after 64 bit default being 32 bit default. */
1158 }
1159 }
1161 }
1163 /* Function to set whether a module needs the -mrelocatable bit set. */
1165 static bool
1167 {
1174 }
1176 /* Support for core dump NOTE sections. */
1178 static bool
1180 {
1185 {
1190 /* pr_cursig */
1193 /* pr_pid */
1196 /* pr_reg */
1201 }
1203 /* Make a ".reg/999" section. */
1206 }
1208 static bool
1210 {
1212 {
1223 }
1225 /* Note that for some reason, a spurious space is tacked
1226 onto the end of the args in some (at least one anyway)
1227 implementations, so strip it off if it exists. */
1229 {
1235 }
1238 }
1242 {
1244 {
1249 {
1256 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
1257 DIAGNOSTIC_PUSH;
1258 /* GCC 8.0 and 8.1 warn about 80 equals destination size with
1259 -Wstringop-truncation:
1260 https://gcc.gnu.org/bugzilla/show_bug.cgi?id=85643
1261 */
1262 DIAGNOSTIC_IGNORE_STRINGOP_TRUNCATION;
1263 #endif
1265 #if GCC_VERSION == 8000 || GCC_VERSION == 8001
1266 DIAGNOSTIC_POP;
1267 #endif
1271 }
1274 {
1293 }
1294 }
1295 }
1297 static flagword
1299 {
1305 }
1307 /* Return address for Ith PLT stub in section PLT, for relocation REL
1308 or (bfd_vma) -1 if it should not be included. */
1310 static bfd_vma
1314 {
1316 }
1318 /* Handle a PowerPC specific section when reading an object file. This
1319 is called when bfd_section_from_shdr finds a section with an unknown
1320 type. */
1322 static bool
1327 {
1329 flagword flags;
1350 }
1352 /* Set up any other section flags and such that may be necessary. */
1354 static bool
1358 {
1363 }
1365 /* If we have .sbss2 or .PPC.EMB.sbss0 output sections, we
1366 need to bump up the number of section headers. */
1368 static int
1371 {
1384 }
1386 /* Modify the segment map for VLE executables. */
1388 bool
1391 {
1394 /* At this point in the link, output sections have already been sorted by
1395 LMA and assigned to segments. All that is left to do is to ensure
1396 there is no mixing of VLE & non-VLE sections in a text segment.
1397 If we find that case, we split the segment.
1398 We maintain the original output section order. */
1401 {
1411 {
1415 {
1420 }
1421 }
1424 {
1430 {
1436 }
1438 }
1439 /* If we're splitting a segment which originally contained rw
1440 sections then those sections might now only be in one of the
1441 two parts. So always set p_flags if splitting, even if we
1442 are being called for objcopy with p_flags_valid set. */
1444 {
1447 }
1451 /* Sections 0..j-1 stay in this (current) segment,
1452 the remainder are put in a new segment.
1453 The scan resumes with the new segment. */
1469 }
1472 }
1474 /* Add extra PPC sections -- Note, for now, make .sbss2 and
1475 .PPC.EMB.sbss0 a normal section, and not a bss section so
1476 that the linker doesn't crater when trying to make more than
1477 2 sections. */
1480 {
1491 };
1493 /* This is what we want for new plt/got. */
1499 {
1502 /* See if this is one of the special sections. */
1509 {
1513 }
1516 }
1517 \f
1518 /* Very simple linked list structure for recording apuinfo values. */
1520 {
1523 }
1524 apuinfo_list;
1529 static void
1531 {
1534 }
1536 static void
1538 {
1542 {
1546 }
1555 }
1557 static unsigned
1559 {
1564 entry;
1569 }
1573 {
1579 ;
1582 }
1584 static void
1586 {
1590 {
1594 }
1597 }
1599 /* Scan the input BFDs and create a linked list of
1600 the APUinfo values that will need to be emitted. */
1602 static void
1604 {
1618 /* Read in the input sections contents. */
1620 {
1627 /* xgettext:c-format */
1635 {
1641 }
1645 {
1646 /* xgettext:c-format */
1649 }
1651 /* Verify the contents of the header. Note - we have to
1652 extract the values this way in order to allow for a
1653 host whose endian-ness is different from the target. */
1665 /* Get the number of bytes used for apuinfo entries. */
1670 /* Scan the apuinfo section, building a list of apuinfo numbers. */
1673 }
1678 {
1679 /* Compute the size of the output section. */
1682 /* Set the output section size, if it exists. */
1686 {
1688 /* xgettext:c-format */
1690 }
1691 }
1693 fail:
1698 }
1700 /* Prevent the output section from accumulating the input sections'
1701 contents. We have already stored this in our linked list structure. */
1703 static bool
1708 {
1710 }
1712 /* Finally we can generate the output section. */
1714 static void
1716 {
1721 bfd_size_type length;
1736 {
1737 _bfd_error_handler
1740 }
1742 /* Create the apuinfo header. */
1751 {
1754 }
1765 }
1767 static bool
1769 {
1772 }
1773 \f
1774 static bool
1776 {
1786 }
1788 static bool
1790 {
1795 }
1797 static long
1801 {
1806 bfd_vma stub_off;
1830 /* Call common code to handle old-style executable PLTs. */
1835 /* If this object was prelinked, the prelinker stored the address
1836 of .glink at got[1]. If it wasn't prelinked, got[1] will be zero. */
1840 {
1854 {
1855 Elf_Internal_Dyn dyn;
1862 {
1870 }
1871 }
1873 }
1875 /* Otherwise we read the first plt entry. */
1877 {
1880 }
1885 /* The .glink section usually does not survive the final
1886 link; search for the section (usually .text) where the
1887 glink stubs now reside. */
1892 /* Determine glink PLT resolver by reading the relative branch
1893 from the first glink stub. */
1896 {
1899 /* The first glink stub may either branch to the resolver ... */
1904 /* ... or fall through a bunch of NOPs. */
1911 {
1914 }
1915 }
1918 /* If the stubs are those for -shared/-pie then we might have
1919 multiple stubs for each plt entry. If that is the case then
1920 there is no way to associate stubs with their plt entries short
1921 of figuring out the GOT pointer value used in the stub.
1922 The offsets tested here need to cover all possible values of
1923 GLINK_ENTRY_SIZE for other than __tls_get_addr_opt. */
1938 {
1942 }
1957 {
1964 /* Undefined syms won't have BSF_LOCAL or BSF_GLOBAL set. Since
1965 we are defining a symbol, ensure one of them is set. */
1977 {
1982 }
1987 }
1989 /* Add a symbol at the start of the glink branch table. */
1998 s++;
1999 count++;
2002 {
2003 /* Add a symbol for the glink PLT resolver. */
2012 s++;
2013 count++;
2014 }
2017 }
2018 \f
2019 /* The following functions are specific to the ELF linker, while
2020 functions above are used generally. They appear in this file more
2021 or less in the order in which they are called. eg.
2022 ppc_elf_check_relocs is called early in the link process,
2023 ppc_elf_finish_dynamic_sections is one of the last functions
2024 called. */
2026 /* Track PLT entries needed for a given symbol. We might need more
2027 than one glink entry per symbol when generating a pic binary. */
2028 struct plt_entry
2029 {
2032 /* -fPIC uses multiple GOT sections, one per file, called ".got2".
2033 This field stores the offset into .got2 used to initialise the
2034 GOT pointer reg. It will always be at least 32768. (Current
2035 gcc always uses an offset of 32768, but ld -r will pack .got2
2036 sections together resulting in larger offsets). */
2037 bfd_vma addend;
2039 /* The .got2 section. */
2042 /* PLT refcount or offset. */
2043 union
2044 {
2045 bfd_signed_vma refcount;
2046 bfd_vma offset;
2049 /* .glink stub offset. */
2050 bfd_vma glink_offset;
2051 };
2053 /* Of those relocs that might be copied as dynamic relocs, this
2054 function selects those that must be copied when linking a shared
2055 library or PIE, even when the symbol is local. */
2057 static int
2060 {
2062 {
2064 /* Only relative relocs can be resolved when the object load
2065 address isn't fixed. DTPREL32 is excluded because the
2066 dynamic linker needs to differentiate global dynamic from
2067 local dynamic __tls_index pairs when PPC_OPT_TLS is set. */
2082 /* These relocations are relative but in a shared library the
2083 linker doesn't know the thread pointer base. */
2085 }
2086 }
2088 /* If ELIMINATE_COPY_RELOCS is non-zero, the linker will try to avoid
2089 copying dynamic variables from a shared lib into an app's dynbss
2090 section, and instead use a dynamic relocation to point into the
2091 shared lib. */
2092 #define ELIMINATE_COPY_RELOCS 1
2094 /* Used to track dynamic relocations for local symbols. */
2095 struct ppc_dyn_relocs
2096 {
2099 /* The input section of the reloc. */
2102 /* Total number of relocs copied for the input section. */
2105 /* Whether this entry is for STT_GNU_IFUNC symbols. */
2107 };
2109 /* PPC ELF linker hash entry. */
2111 struct ppc_elf_link_hash_entry
2112 {
2115 /* If this symbol is used in the linker created sections, the processor
2116 specific backend uses this field to map the field into the offset
2117 from the beginning of the section. */
2120 /* Contexts in which symbol is used in the GOT.
2121 Bits are or'd into the mask as the corresponding relocs are
2122 encountered during check_relocs, with TLS_TLS being set when any
2123 of the other TLS bits are set. tls_optimize clears bits when
2124 optimizing to indicate the corresponding GOT entry type is not
2125 needed. If set, TLS_TLS is never cleared. tls_optimize may also
2126 set TLS_GDIE when a GD reloc turns into an IE one.
2127 These flags are also kept for local symbols. */
2137 /* The above field is also used to mark function symbols. In which
2138 case TLS_TLS will be 0. */
2143 /* Nonzero if we have seen a small data relocation referring to this
2144 symbol. */
2147 /* Flag use of given relocations. */
2150 };
2152 #define ppc_elf_hash_entry(ent) ((struct ppc_elf_link_hash_entry *) (ent))
2154 /* PPC ELF linker hash table. */
2156 struct ppc_elf_link_hash_table
2157 {
2160 /* Various options passed from the linker. */
2163 /* Short-cuts to get to dynamic linker sections. */
2173 /* The (unloaded but important) .rela.plt.unloaded on VxWorks. */
2176 /* Shortcut to __tls_get_addr. */
2179 /* The bfd that forced an old-style PLT. */
2182 /* TLS local dynamic got entry handling. */
2184 bfd_signed_vma refcount;
2185 bfd_vma offset;
2188 /* Offset of branch table to PltResolve function in glink. */
2189 bfd_vma glink_pltresolve;
2191 /* Size of reserved GOT entries. */
2193 /* Non-zero if allocating the header left a gap. */
2196 /* The type of PLT we have chosen to use. */
2199 /* Whether there exist local gnu indirect function resolvers,
2200 referenced by dynamic relocations. */
2204 /* Set if tls optimization is enabled. */
2207 /* Set if inline plt calls should be converted to direct calls. */
2210 /* The size of PLT entries. */
2212 /* The distance between adjacent PLT slots. */
2214 /* The size of the first PLT entry. */
2216 };
2218 /* Rename some of the generic section flags to better document how they
2219 are used for ppc32. The flags are only valid for ppc32 elf objects. */
2221 /* Nonzero if this section has TLS related relocations. */
2222 #define has_tls_reloc sec_flg0
2224 /* Nonzero if this section has a call to __tls_get_addr lacking marker
2225 relocs. */
2226 #define nomark_tls_get_addr sec_flg1
2228 /* Flag set when PLTCALL relocs are detected. */
2229 #define has_pltcall sec_flg2
2231 /* Get the PPC ELF linker hash table from a link_info structure. */
2233 #define ppc_elf_hash_table(p) \
2234 ((is_elf_hash_table ((p)->hash) \
2235 && elf_hash_table_id (elf_hash_table (p)) == PPC32_ELF_DATA) \
2236 ? (struct ppc_elf_link_hash_table *) (p)->hash : NULL)
2238 /* Create an entry in a PPC ELF linker hash table. */
2244 {
2245 /* Allocate the structure if it has not already been allocated by a
2246 subclass. */
2248 {
2253 }
2255 /* Call the allocation method of the superclass. */
2258 {
2262 }
2265 }
2267 /* Create a PPC ELF linker hash table. */
2271 {
2273 static struct ppc_elf_params default_params
2281 ppc_elf_link_hash_newfunc,
2283 PPC32_ELF_DATA))
2284 {
2287 }
2309 }
2311 /* Hook linker params into hash table. */
2313 void
2315 {
2321 }
2323 /* Create .got and the related sections. */
2325 static bool
2327 {
2335 {
2336 /* The powerpc .got has a blrl instruction in it. Mark it
2337 executable. */
2342 }
2345 }
2347 /* Create a special linker section, used for R_PPC_EMB_SDAI16 and
2348 R_PPC_EMB_SDA2I16 pointers. These sections become part of .sdata
2349 and .sdata2. Create _SDA_BASE_ and _SDA2_BASE too. */
2351 static bool
2354 flagword flags,
2356 {
2367 /* Define the sym on the first section of this name. */
2375 }
2377 static bool
2379 {
2382 flagword flags;
2397 {
2405 }
2422 /* Local plt entries. */
2426 flags);
2432 {
2435 htab->relpltlocal
2440 }
2451 }
2453 /* We have to create .dynsbss and .rela.sbss here so that they get mapped
2454 to output sections (just like _bfd_elf_create_dynamic_sections has
2455 to create .dynbss and .rela.bss). */
2457 static bool
2459 {
2462 flagword flags;
2484 {
2492 }
2501 /* The VxWorks PLT is a loaded section with contents. */
2504 }
2506 /* Copy the extra info we tack onto an elf_link_hash_entry. */
2508 static void
2512 {
2529 /* If we were called to copy over info for a weak sym, that's all. */
2534 {
2536 {
2540 /* Add reloc counts against the indirect sym to the direct sym
2541 list. Merge any entries against the same section. */
2543 {
2548 {
2553 }
2556 }
2558 }
2562 }
2564 /* Copy over the GOT refcount entries that we may have already seen to
2565 the symbol which just became indirect. */
2569 /* And plt entries. */
2571 {
2573 {
2578 {
2583 {
2587 }
2590 }
2592 }
2596 }
2599 {
2607 }
2608 }
2610 /* Hook called by the linker routine which adds symbols from an object
2611 file. We use it to put .comm items in .sbss, and not .bss. */
2613 static bool
2621 {
2626 {
2627 /* Common symbols less than or equal to -G nn bytes are automatically
2628 put into .sbss. */
2633 {
2641 flags);
2644 }
2648 }
2651 }
2652 \f
2653 /* Find a linker generated pointer with a given addend and type. */
2656 elf_find_pointer_linker_section
2658 bfd_vma addend,
2660 {
2666 }
2668 /* Allocate a pointer to live in a linker created section. */
2670 static bool
2675 {
2679 bfd_size_type amt;
2683 /* Is this a global symbol? */
2685 {
2688 /* Has this symbol already been allocated? If so, our work is done. */
2692 lsect))
2696 }
2697 else
2698 {
2701 /* Allocation of a pointer to a local symbol. */
2704 /* Allocate a table to hold the local symbols if first time. */
2706 {
2717 }
2719 /* Has this symbol already been allocated? If so, our work is done. */
2722 lsect))
2726 }
2728 /* Allocate space for a pointer in the linker section, and allocate
2729 a new pointer record from internal memory. */
2747 #ifdef DEBUG
2752 #endif
2755 }
2762 {
2768 {
2778 }
2786 }
2788 static bool
2791 {
2800 {
2810 }
2813 }
2817 {
2826 }
2828 static bool
2830 {
2842 }
2844 /* Relocs on inline plt call sequence insns prior to the call. */
2846 static bool
2848 {
2853 }
2855 /* Like bfd_reloc_offset_in_range but without a howto. Return true
2856 iff a field of SIZE bytes at OFFSET is within SEC limits. */
2858 static bool
2860 {
2862 }
2864 static void
2866 {
2867 _bfd_error_handler
2868 /* xgettext:c-format */
2870 abfd,
2873 }
2875 /* Look through the relocs for a section during the first phase, and
2876 allocate space in the global offset table or procedure linkage
2877 table. */
2879 static bool
2884 {
2896 #ifdef DEBUG
2899 #endif
2903 /* Initialize howto table if not already done. */
2909 {
2914 }
2924 {
2932 bfd_vma addend;
2936 {
2941 }
2942 else
2943 {
2949 }
2951 /* If a relocation refers to _GLOBAL_OFFSET_TABLE_, create the .got.
2952 This shows up in particular in an R_PPC_ADDR32 in the eabi
2953 startup code. */
2957 {
2963 }
2969 {
2971 {
2974 }
2975 }
2977 {
2979 {
2980 /* Set PLT_IFUNC flag for this sym, no GOT entry yet. */
2986 /* STT_GNU_IFUNC symbols must have a PLT entry;
2987 In a non-pie executable even when there are
2988 no plt calls. */
2994 {
3006 }
3007 }
3008 }
3014 {
3018 /* We have a new-style __tls_get_addr call with a marker
3019 reloc. */
3020 ;
3021 else
3022 /* Mark this section as having an old-style call. */
3024 }
3027 {
3030 /* These special tls relocs tie a call to __tls_get_addr with
3031 its parameter symbol. */
3034 else
3071 dogottls:
3073 /* Fall through. */
3075 /* GOT16 relocations */
3080 /* This symbol requires a global offset table entry. */
3082 {
3087 }
3089 {
3092 }
3093 else
3094 /* This is a global offset table entry for a local symbol. */
3098 /* We may also need a plt entry if the symbol turns out to be
3099 an ifunc. */
3101 {
3104 }
3107 /* Indirect .sdata relocation. */
3114 {
3117 }
3120 /* Indirect .sdata2 relocation. */
3123 {
3126 }
3132 {
3135 }
3140 /* Fall through. */
3149 {
3152 }
3169 {
3172 }
3175 {
3178 }
3186 {
3189 }
3209 /* Fall through. */
3216 pltentry:
3217 #ifdef DEBUG
3219 #endif
3220 /* This symbol requires a procedure linkage table entry. */
3222 {
3227 }
3228 else
3229 {
3234 }
3246 /* The following relocations don't need to propagate the
3247 relocation if linking a shared object since they are
3248 section relative. */
3268 /* These are just markers. */
3279 /* These should only appear in dynamic objects. */
3287 /* These aren't handled yet. We'll report an error later. */
3296 /* This refers only to functions defined in the shared library. */
3299 {
3302 }
3309 /* This relocation describes the C++ object vtable hierarchy.
3310 Reconstruct it for later use during GC. */
3316 /* This relocation describes which C++ vtable entries are actually
3317 used. Record for later use during GC. */
3326 /* Fall through. */
3327 /* We shouldn't really be seeing TPREL32. */
3335 /* Nor these. */
3346 {
3347 /* Old -fPIC gcc code has .long LCTOC1-LCFx just before
3348 the start of a function, which assembles to a REL32
3349 reference to .got2. If we detect one of these, then
3350 force the old PLT layout because the linker cannot
3351 reliably deduce the GOT pointer value needed for
3352 PLT call stubs. */
3357 {
3360 }
3361 }
3364 /* fall through */
3374 {
3375 /* We may need a plt entry if the symbol turns out to be
3376 a function defined in a dynamic object. */
3380 /* We may need a copy reloc too. */
3387 }
3397 {
3399 {
3402 }
3404 }
3405 /* fall through */
3412 {
3413 /* We may need a plt entry if the symbol turns out to be
3414 a function defined in a dynamic object. */
3419 }
3421 dodyn:
3422 /* Set up information for symbols that might need dynamic
3423 relocations. At this point in linking we have read all
3424 the input files and resolved most symbols, but have not
3425 yet decided whether symbols are dynamic or finalized
3426 symbol flags. In some cases we might be setting dynamic
3427 reloc info for symbols that do not end up needing such.
3428 That's OK, adjust_dynamic_symbol and allocate_dynrelocs
3429 work together with this code. */
3437 {
3438 #ifdef DEBUG
3440 "ppc_elf_check_relocs needs to "
3444 #endif
3446 {
3450 sreloc = _bfd_elf_make_dynamic_reloc_section
3455 }
3457 /* If this is a global symbol, we count the number of
3458 relocations we need for this symbol. */
3460 {
3467 {
3476 }
3480 }
3481 else
3482 {
3483 /* Track dynamic relocs needed for local syms too.
3484 We really need local syms available to do this
3485 easily. Oh well. */
3503 {
3512 }
3514 }
3515 }
3518 }
3519 }
3522 }
3523 \f
3524 /* Warn for conflicting Tag_GNU_Power_ABI_FP attributes between IBFD
3525 and OBFD, and merge non-conflicting ones. */
3526 bool
3528 {
3535 /* We only warn about shared library mismatches, because common
3536 libraries advertise support for a particular long double variant
3537 but actually support more than one variant. For example, glibc
3538 typically supports 128-bit IBM long double in the shared library
3539 but has a compatibility static archive for 64-bit long double.
3540 The linker doesn't have the smarts to see that an app using
3541 object files marked as 64-bit long double call the compatibility
3542 layer objects and only from there call into the shared library. */
3552 {
3558 ;
3560 {
3562 {
3566 }
3567 }
3569 {
3570 _bfd_error_handler
3571 /* xgettext:c-format */
3575 }
3577 {
3578 _bfd_error_handler
3579 /* xgettext:c-format */
3583 }
3585 {
3586 _bfd_error_handler
3587 /* xgettext:c-format */
3591 }
3593 {
3594 _bfd_error_handler
3595 /* xgettext:c-format */
3599 }
3604 ;
3606 {
3608 {
3612 }
3613 }
3615 {
3616 _bfd_error_handler
3617 /* xgettext:c-format */
3621 }
3623 {
3624 _bfd_error_handler
3625 /* xgettext:c-format */
3629 }
3631 {
3632 _bfd_error_handler
3633 /* xgettext:c-format */
3637 }
3639 {
3640 _bfd_error_handler
3641 /* xgettext:c-format */
3645 }
3646 }
3649 {
3652 }
3654 }
3656 /* Merge object attributes from IBFD into OBFD. Warn if
3657 there are conflicting attributes. */
3658 static bool
3660 {
3673 /* Check for conflicting Tag_GNU_Power_ABI_Vector attributes and
3674 merge non-conflicting ones. */
3679 {
3685 ;
3687 {
3691 }
3692 /* For now, allow generic to transition to AltiVec or SPE
3693 without a warning. If GCC marked files with their stack
3694 alignment and used don't-care markings for files which are
3695 not affected by the vector ABI, we could warn about this
3696 case too. */
3698 ;
3700 {
3704 }
3706 {
3707 _bfd_error_handler
3708 /* xgettext:c-format */
3713 }
3715 {
3716 _bfd_error_handler
3717 /* xgettext:c-format */
3722 }
3723 }
3725 /* Check for conflicting Tag_GNU_Power_ABI_Struct_Return attributes
3726 and merge non-conflicting ones. */
3730 {
3736 ;
3738 {
3742 }
3744 {
3745 _bfd_error_handler
3746 /* xgettext:c-format */
3751 }
3753 {
3754 _bfd_error_handler
3755 /* xgettext:c-format */
3760 }
3761 }
3763 {
3766 }
3768 /* Merge Tag_compatibility attributes and any common GNU ones. */
3770 }
3772 /* Merge backend specific data from an object file to the output
3773 object file when linking. */
3775 static bool
3777 {
3779 flagword old_flags;
3780 flagword new_flags;
3786 /* Check if we have the same endianness. */
3799 {
3800 /* First call, no flags set. */
3803 }
3805 /* Compatible flags are ok. */
3807 ;
3809 /* Incompatible flags. */
3810 else
3811 {
3812 /* Warn about -mrelocatable mismatch. Allow -mrelocatable-lib
3813 to be linked with either. */
3817 {
3819 _bfd_error_handler
3822 }
3825 {
3827 _bfd_error_handler
3830 }
3832 /* The output is -mrelocatable-lib iff both the input files are. */
3836 /* The output is -mrelocatable iff it can't be -mrelocatable-lib,
3837 but each input file is either -mrelocatable or -mrelocatable-lib. */
3843 /* Do not warn about eabi vs. V.4 mismatch, just or in the bit if
3844 any module uses it. */
3850 /* Warn about any other mismatches. */
3852 {
3854 _bfd_error_handler
3855 /* xgettext:c-format */
3859 }
3862 {
3865 }
3866 }
3869 }
3871 static bfd_reloc_status_type
3876 bfd_vma value,
3877 split16_format_type split16_format,
3879 {
3891 {
3893 {
3896 else
3897 _bfd_error_handler
3898 /* xgettext:c-format */
3901 }
3902 }
3910 {
3912 {
3915 else
3916 _bfd_error_handler
3917 /* xgettext:c-format */
3920 }
3921 }
3923 {
3927 {
3928 /* Hack for e_li. Extend sign. */
3931 }
3932 }
3933 else
3934 {
3937 }
3941 }
3943 static void
3945 {
3949 /* We have an li20 field, bits 17..20, 11..15, 21..31. */
3950 /* Top 4 bits of value to 17..20. */
3952 /* Next 5 bits of the value to 11..15. */
3954 /* And the final 11 bits of the value to bits 21 to 31. */
3957 }
3959 \f
3960 /* Choose which PLT scheme to use, and set .plt flags appropriately.
3961 Returns -1 on error, 0 for old PLT, 1 for new PLT. */
3962 int
3965 {
3967 flagword flags;
3972 {
3986 {
3987 /* Profiling of shared libs (and pies) is not supported with
3988 secure plt, because ppc32 does profiling before a
3989 function prologue and a secure plt pic call stubs needs
3990 r30 to be set up. */
3992 }
3993 else
3994 {
3998 /* Look through the reloc flags left by ppc_elf_check_relocs.
3999 Use the old style bss plt if a file makes plt calls
4000 without using the new relocs, and if ld isn't given
4001 --secure-plt and we never see REL16 relocs. */
4006 {
4010 {
4014 }
4015 }
4017 }
4018 }
4020 {
4026 {
4029 else
4031 }
4032 }
4037 {
4041 /* The new PLT is a loaded section. */
4046 /* The new GOT is not executable. */
4050 }
4051 else
4052 {
4053 /* Stop an unused .glink section from affecting .text alignment. */
4057 }
4059 }
4060 \f
4061 /* Return the section that should be marked against GC for a given
4062 relocation. */
4070 {
4073 {
4077 }
4080 }
4082 static bool
4090 {
4094 {
4110 {
4116 }
4120 }
4121 else
4122 {
4127 {
4136 }
4149 {
4156 {
4162 }
4164 }
4165 }
4167 }
4168 \f
4169 /* Analyze inline PLT call relocations to see whether calls to locally
4170 defined functions can be converted to direct calls. */
4172 bool
4174 {
4184 /* A bl insn can reach -0x2000000 to 0x1fffffc. The limit is
4185 reduced somewhat to cater for possible stubs that might be added
4186 between the call and its destination. */
4192 {
4197 }
4199 /* If a "bl" can reach anywhere in local code sections, then we can
4200 convert all inline PLT sequences to direct calls when the symbol
4201 is local. */
4203 {
4206 }
4208 /* Otherwise, go looking through relocs for cases where a direct
4209 call won't reach. Mark the symbol on any such reloc to disable
4210 the optimization and keep the PLT entry as it seems likely that
4211 this will be better than creating trampolines. Note that this
4212 will disable the optimization for all inline PLT calls to a
4213 particular symbol, not just those that won't reach. The
4214 difficulty in doing a more precise optimization is that the
4215 linker needs to make a decision depending on whether a
4216 particular R_PPC_PLTCALL insn can be turned into a direct
4217 call, for each of the R_PPC_PLTSEQ and R_PPC_PLT16* insns in
4218 the sequence, and there is nothing that ties those relocs
4219 together except their symbol. */
4222 {
4235 {
4238 /* Read the relocations. */
4246 {
4261 {
4267 }
4270 {
4274 else
4284 }
4285 }
4288 }
4292 {
4295 else
4297 }
4298 }
4301 }
4303 /* Set plt output section type, htab->tls_get_addr, and call the
4304 generic ELF tls_setup function. */
4306 asection *
4308 {
4318 {
4325 {
4326 /* If glibc supports an optimized __tls_get_addr call stub,
4327 signalled by the presence of __tls_get_addr_opt, and we'll
4328 be calling __tls_get_addr via a plt call stub, then
4329 make __tls_get_addr point to __tls_get_addr_opt. */
4337 {
4343 {
4349 {
4350 /* Use __tls_get_addr_opt in dynamic relocations. */
4356 }
4358 }
4359 }
4360 }
4361 else
4363 }
4367 {
4370 }
4373 }
4375 /* Return TRUE iff REL is a branch reloc with a global symbol matching
4376 HASH. */
4378 static bool
4382 {
4388 {
4398 }
4400 }
4402 /* Run through all the TLS relocs looking for optimization
4403 opportunities. */
4405 bool
4408 {
4423 /* Make two passes through the relocs. First time check that tls
4424 relocs involved in setting up a tls_get_addr call are indeed
4425 followed by such a call. If they are not, don't do any tls
4426 optimization. On the second pass twiddle tls_mask flags to
4427 notify relocate_section that optimization can be done, and
4428 adjust got and plt refcounts. */
4431 {
4437 {
4441 /* Read the relocations. */
4449 {
4460 {
4468 }
4472 /* If this section has old-style __tls_get_addr calls
4473 without marker relocs, then check that each
4474 __tls_get_addr call reloc is preceded by a reloc
4475 that conceivably belongs to the __tls_get_addr arg
4476 setup insn. If we don't find matching arg setup
4477 relocs, don't do any tls optimization. */
4482 && !expecting_tls_get_addr
4484 {
4491 }
4495 {
4499 /* Fall through. */
4503 /* These relocs should never be against a symbol
4504 defined in a shared lib. Leave them alone if
4505 that turns out to be the case. */
4509 /* LD -> LE */
4517 /* Fall through. */
4522 /* GD -> LE */
4524 else
4525 /* GD -> IE */
4535 {
4536 /* IE -> LE */
4540 }
4541 else
4547 /* Fall through. */
4551 {
4554 {
4558 {
4567 {
4578 }
4579 }
4580 }
4582 }
4590 {
4596 {
4600 }
4602 /* addis rt,2,imm */
4605 {
4606 /* xgettext:c-format */
4611 }
4612 }
4621 }
4624 {
4634 /* Uh oh, we didn't find the expected call. We
4635 could just mark this symbol to exclude it
4636 from tls optimization but it's safer to skip
4637 the entire optimization. */
4644 }
4647 {
4650 }
4651 else
4652 {
4666 }
4668 /* If we don't have old-style __tls_get_addr calls
4669 without TLSGD/TLSLD marker relocs, and we haven't
4670 found a new-style __tls_get_addr call with a
4671 marker for this symbol, then we either have a
4672 broken object file or an -mlongcall style
4673 indirect call to __tls_get_addr without a marker.
4674 Disable optimization in this case. */
4682 {
4694 }
4699 {
4700 /* We managed to get rid of a got entry. */
4703 }
4707 }
4711 }
4712 }
4714 }
4715 \f
4716 /* Return true if we have dynamic relocs against H or any of its weak
4717 aliases, that apply to read-only sections. Cannot be used after
4718 size_dynamic_sections. */
4720 static bool
4722 {
4724 do
4725 {
4732 }
4734 /* Return whether H has pc-relative dynamic relocs. */
4736 static bool
4738 {
4745 }
4747 /* Adjust a symbol defined by a dynamic object and referenced by a
4748 regular object. The current definition is in some section of the
4749 dynamic object, but we're not including those sections. We have to
4750 change the definition to something the rest of the link can
4751 understand. */
4753 static bool
4756 {
4760 #ifdef DEBUG
4763 #endif
4765 /* Make sure we know what is going on here. */
4775 /* Deal with function syms. */
4779 {
4782 /* Discard dyn_relocs when non-pic if we've decided that a
4783 function symbol is local. */
4787 /* Clear procedure linkage table information for any symbol that
4788 won't need a .plt entry. */
4795 && local
4799 {
4800 /* A PLT entry is not required/allowed when:
4802 1. We are not using ld.so; because then the PLT entry
4803 can't be set up, so we can't use one. In this case,
4804 ppc_elf_adjust_dynamic_symbol won't even be called.
4806 2. GC has rendered the entry unused.
4808 3. We know for certain that a call to this symbol
4809 will go to this object, or will remain undefined. */
4813 }
4814 else
4815 {
4816 /* Taking a function's address in a read/write section
4817 doesn't require us to define the function symbol in the
4818 executable on a plt call stub. A dynamic reloc can
4819 be used instead, giving better runtime performance.
4820 (Calls via that function pointer don't need to bounce
4821 through the plt call stub.) Similarly, use a dynamic
4822 reloc for a weak reference when possible, allowing the
4823 resolution of the symbol to be set at load time rather
4824 than link time. */
4832 {
4834 /* If we haven't seen a branch reloc and the symbol
4835 isn't an ifunc then we don't need a plt entry. */
4838 }
4840 /* We are going to be defining the function symbol on the
4841 plt stub, so no dyn_relocs needed when non-pic. */
4843 }
4845 /* Function symbols can't have copy relocs. */
4847 }
4848 else
4851 /* If this is a weak symbol, and there is a real definition, the
4852 processor independent code will have arranged for us to see the
4853 real definition first, and we can just use the same value. */
4855 {
4865 }
4867 /* This is a reference to a symbol defined by a dynamic object which
4868 is not a function. */
4870 /* If we are creating a shared library, we must presume that the
4871 only references to the symbol are via the global offset table.
4872 For such cases we need not do anything here; the relocations will
4873 be handled correctly by relocate_section. */
4875 {
4878 }
4880 /* If there are no references to this symbol that do not use the
4881 GOT, we don't need to generate a copy reloc. */
4883 {
4886 }
4888 /* Protected variables do not work with .dynbss. The copy in
4889 .dynbss won't be used by the shared library with the protected
4890 definition for the variable. Editing to PIC, or text relocations
4891 are preferable to an incorrect program. */
4893 {
4901 }
4903 /* If -z nocopyreloc was given, we won't generate them either. */
4907 /* If we don't find any dynamic relocs in read-only sections, then
4908 we'll be keeping the dynamic relocs and avoiding the copy reloc.
4909 We can't do this if there are any small data relocations. This
4910 doesn't work on VxWorks, where we can not have dynamic
4911 relocations (other than copy and jump slot relocations) in an
4912 executable. */
4920 /* We must allocate the symbol in our .dynbss section, which will
4921 become part of the .bss section of the executable. There will be
4922 an entry for this symbol in the .dynsym section. The dynamic
4923 object will contain position independent code, so all references
4924 from the dynamic object to this symbol will go through the global
4925 offset table. The dynamic linker will use the .dynsym entry to
4926 determine the address it must put in the global offset table, so
4927 both the dynamic object and the regular object will refer to the
4928 same memory location for the variable.
4930 Of course, if the symbol is referenced using SDAREL relocs, we
4931 must instead allocate it in .sbss. */
4936 else
4941 {
4944 /* We must generate a R_PPC_COPY reloc to tell the dynamic
4945 linker to copy the initial value out of the dynamic object
4946 and into the runtime process image. */
4951 else
4956 }
4958 /* We no longer want dyn_relocs. */
4961 }
4962 \f
4963 /* Generate a symbol to mark plt call stubs. For non-PIC code the sym is
4964 xxxxxxxx.plt_call32.<callee> where xxxxxxxx is a hex number, usually 0,
4965 specifying the addend on the plt relocation. For -fpic code, the sym
4966 is xxxxxxxx.plt_pic32.<callee>, and for -fPIC
4967 xxxxxxxx.got2.plt_pic32.<callee>. */
4969 static bool
4973 {
4982 else
5002 {
5012 }
5014 }
5016 /* Allocate NEED contiguous space in .got, and return the offset.
5017 Handles allocation of the got header when crossing 32k. */
5019 static bfd_vma
5021 {
5022 bfd_vma where;
5026 {
5029 }
5030 else
5031 {
5034 {
5037 }
5038 else
5039 {
5042 {
5045 }
5048 }
5049 }
5051 }
5053 /* Calculate size of GOT entries for symbol given its TLS_MASK.
5054 TLS_LD is excluded because those go in a special GOT slot. */
5058 {
5062 else
5063 {
5071 }
5073 }
5075 /* If H is undefined, make it dynamic if that makes sense. */
5077 static bool
5080 {
5092 }
5094 /* Choose whether to use htab->iplt or htab->pltlocal rather than the
5095 usual htab->elf.splt section for a PLT entry. */
5100 {
5104 }
5106 /* Allocate space in associated reloc sections for dynamic relocs. */
5108 static bool
5110 {
5122 || (ELIMINATE_COPY_RELOCS
5128 {
5129 /* Make sure this symbol is output as a dynamic symbol. */
5136 {
5138 /* We'll just use htab->tlsld_got.offset. This should
5139 always be the case. It's a little odd if we have
5140 a local dynamic reloc against a non-local symbol. */
5142 else
5143 {
5146 }
5147 }
5150 else
5151 {
5162 {
5169 }
5170 }
5171 }
5172 else
5175 /* If no dynamic sections we can't have dynamic relocs, except for
5176 IFUNCs which are handled even in static executables. */
5181 /* Discard relocs on undefined symbols that must be local. */
5186 /* Also discard relocs on undefined weak syms with non-default
5187 visibility, or when dynamic_undefined_weak says so. */
5192 ;
5194 /* In the shared -Bsymbolic case, discard space allocated for
5195 dynamic pc-relative relocs against symbols which turn out to be
5196 defined in regular objects. For the normal shared case, discard
5197 space for relocs that have become local due to symbol visibility
5198 changes. */
5200 {
5201 /* Relocs that use pc_count are those that appear on a call insn,
5202 or certain REL relocs (see must_be_dyn_reloc) that can be
5203 generated via assembly. We want calls to protected symbols to
5204 resolve directly to the function rather than going via the plt.
5205 If people want function pointer comparisons to work as expected
5206 then they should avoid writing weird assembly. */
5208 {
5212 {
5217 else
5219 }
5220 }
5223 {
5227 {
5230 else
5232 }
5233 }
5236 {
5237 /* Make sure this symbol is output as a dynamic symbol. */
5240 }
5241 }
5243 {
5244 /* For the non-pic case, discard space for relocs against
5245 symbols which turn out to need copy relocs or are not
5246 dynamic. */
5258 {
5259 /* Make sure this symbol is output as a dynamic symbol. */
5265 }
5266 else
5268 }
5270 /* Allocate space. */
5273 {
5278 }
5280 /* Handle PLT relocs. Done last, after dynindx has settled.
5281 We might need a PLT entry when the symbol
5282 a) is dynamic, or
5283 b) is an ifunc, or
5284 c) has plt16 relocs and has been processed by adjust_dynamic_symbol, or
5285 d) has plt16 relocs and we are linking statically. */
5295 {
5302 {
5312 {
5315 else
5317 }
5320 {
5322 {
5325 }
5330 else
5331 {
5334 {
5337 }
5342 {
5345 }
5351 }
5352 }
5353 else
5354 {
5356 {
5357 /* If this is the first .plt entry, make room
5358 for the special first entry. */
5362 /* The PowerPC PLT is actually composed of two
5363 parts, the first part is 2 words (for a load
5364 and a jump), and then there is a remaining
5365 word available at the end. */
5372 /* If this symbol is not defined in a regular
5373 file, and we are not generating a shared
5374 library, then set the symbol to this location
5375 in the .plt. This is to avoid text
5376 relocations, and is required to make
5377 function pointers compare as equal between
5378 the normal executable and the shared library. */
5382 {
5385 }
5387 /* Make room for this entry. */
5389 /* After the 8192nd entry, room for two entries
5390 is allocated. */
5396 }
5398 }
5400 /* We also need to make an entry in the .rela.plt section. */
5402 {
5404 {
5406 {
5409 }
5411 {
5414 }
5415 }
5416 else
5417 {
5421 {
5422 /* Allocate space for the unloaded relocations. */
5425 {
5428 {
5432 }
5437 }
5439 /* Every PLT entry has an associated GOT entry in
5440 .got.plt. */
5442 }
5443 }
5445 }
5446 }
5447 else
5451 {
5454 }
5455 }
5456 else
5457 {
5460 }
5463 }
5466 {
5477 };
5479 /* Set the sizes of the dynamic sections. */
5481 static bool
5484 {
5490 #ifdef DEBUG
5492 #endif
5498 {
5499 /* Set the contents of the .interp section to the interpreter. */
5501 {
5506 }
5507 }
5514 /* Set up .got offsets for local syms, and space for local dynamic
5515 relocs. */
5517 {
5523 bfd_size_type locsymcount;
5532 {
5539 {
5541 {
5542 /* Input section has been discarded, either because
5543 it is a copy of a linkonce section or due to
5544 linker script /DISCARD/, so we'll be discarding
5545 the relocs too. */
5546 }
5550 {
5551 /* Relocations in vxworks .tls_vars sections are
5552 handled specially by the loader. */
5553 }
5555 {
5563 {
5567 }
5568 }
5569 }
5570 }
5584 {
5589 }
5595 {
5602 else
5603 {
5609 {
5617 }
5618 }
5619 }
5620 else
5626 /* Allocate space for calls to local STT_GNU_IFUNC syms in .iplt. */
5629 {
5636 {
5641 {
5644 }
5645 else
5649 {
5652 }
5656 {
5660 }
5664 {
5666 {
5669 }
5671 {
5674 }
5676 }
5677 }
5678 else
5680 }
5684 {
5687 else
5689 }
5690 }
5692 /* Allocate space for global sym dynamic relocs. */
5696 {
5700 }
5701 else
5705 {
5708 /* If we haven't allocated the header, do so now. When we get here,
5709 for old plt/got the got size will be 0 to 32764 (not allocated),
5710 or 32780 to 65536 (header allocated). For new plt/got, the
5711 corresponding ranges are 0 to 32768 and 32780 to 65536. */
5713 {
5718 }
5721 }
5723 {
5728 }
5730 {
5738 }
5743 {
5745 /* Space for the branch table. */
5748 /* Pad out to align the start of PLTresolve. */
5754 {
5761 {
5771 }
5777 {
5787 }
5788 }
5789 }
5796 {
5800 {
5804 }
5805 }
5807 /* We've now determined the sizes of the various dynamic sections.
5808 Allocate memory for them. */
5811 {
5819 {
5820 /* We'd like to strip these sections if they aren't needed, but if
5821 we've exported dynamic symbols from them we must leave them.
5822 It's too late to tell BFD to get rid of the symbols. */
5825 /* Strip this section if we don't need it; see the
5826 comment below. */
5827 }
5837 {
5838 /* Strip these too. */
5839 }
5842 {
5844 }
5846 {
5848 {
5849 /* Remember whether there are any relocation sections. */
5852 /* We use the reloc_count field as a counter if we need
5853 to copy relocs into the output file. */
5855 }
5856 }
5857 else
5858 {
5859 /* It's not one of our sections, so don't allocate space. */
5861 }
5864 {
5865 /* If we don't need this section, strip it from the
5866 output file. This is mostly to handle .rela.bss and
5867 .rela.plt. We must create both sections in
5868 create_dynamic_sections, because they must be created
5869 before the linker maps input sections to output
5870 sections. The linker does that before
5871 adjust_dynamic_symbol is called, and it is that
5872 function which decides whether anything needs to go
5873 into these sections. */
5876 }
5881 /* Allocate memory for the section contents. */
5885 }
5888 {
5889 /* Add some entries to the .dynamic section. We fill in the
5890 values later, in ppc_elf_finish_dynamic_sections, but we
5891 must add the entries now so that we get the correct size for
5892 the .dynamic section. The DT_DEBUG entry is filled in by the
5893 dynamic linker and used by the debugger. */
5894 #define add_dynamic_entry(TAG, VAL) \
5895 _bfd_elf_add_dynamic_entry (info, TAG, VAL)
5898 relocs))
5904 {
5912 }
5913 }
5914 #undef add_dynamic_entry
5918 {
5920 bfd_vma val;
5923 /* CIE length (rewrite in case little-endian). */
5926 /* FDE length. */
5930 /* CIE pointer. */
5934 /* Offset to .glink. Set later. */
5936 /* .glink size. */
5939 /* Augmentation. */
5944 {
5949 {
5952 }
5954 {
5958 }
5959 else
5960 {
5964 }
5967 p++;
5971 }
5974 }
5977 }
5979 /* Arrange to have _SDA_BASE_ or _SDA2_BASE_ stripped from the output
5980 if it looks like nothing is using them. */
5982 static void
5984 {
5988 {
5993 {
5996 {
5998 /* This is somewhat magic. See elf_link_output_extsym. */
6001 }
6002 }
6003 }
6004 }
6006 void
6008 {
6012 {
6015 }
6016 }
6019 /* Return TRUE if symbol should be hashed in the `.gnu.hash' section. */
6021 static bool
6023 {
6031 }
6032 \f
6033 #define ARRAY_SIZE(a) (sizeof (a) / sizeof ((a)[0]))
6035 /* Relaxation trampolines. r12 is available for clobbering (r11, is
6036 used for some functions that are allowed to break the ABI). */
6038 {
6047 };
6050 {
6055 };
6057 struct ppc_elf_relax_info
6058 {
6061 };
6063 /* This function implements long branch trampolines, and the ppc476
6064 icache bug workaround. Any section needing trampolines or patch
6065 space for the workaround has its size extended so that we can
6066 add trampolines at the end of the section. */
6068 static bool
6073 {
6074 struct one_branch_fixup
6075 {
6078 /* Final link, can use the symbol offset. For a
6079 relocatable link we use the symbol's index. */
6080 bfd_vma toff;
6081 bfd_vma trampoff;
6082 };
6100 /* No need to do anything with non-alloc or non-code sections. */
6108 /* We cannot represent the required PIC relocs in the output, so don't
6109 do anything. The linker doesn't support mixing -shared and -r
6110 anyway. */
6129 {
6131 {
6136 }
6139 }
6143 /* Space for a branch around any trampolines. */
6152 {
6153 /* Get a copy of the native relocations. */
6155 {
6160 }
6166 {
6181 {
6202 }
6204 /* Get the value of the symbol referred to by the reloc. */
6210 {
6212 ;
6215 else
6220 }
6221 else
6222 {
6227 {
6233 }
6234 else
6237 /* If this branch is to __tls_get_addr then we may later
6238 optimise away the call. We won't be needing a long-
6239 branch stub in that case. */
6243 {
6248 /* The previous reloc should be one of R_PPC_TLSGD or
6249 R_PPC_TLSLD, or for older object files, a reloc
6250 on the __tls_get_addr arg setup insn. Get tls
6251 mask bits from the symbol on that reloc. */
6253 {
6257 {
6263 }
6264 }
6265 else
6266 {
6274 tls_mask
6276 }
6278 /* The mask bits tell us if the call will be
6279 optimised away. */
6290 }
6293 }
6296 {
6304 }
6306 /* The condition here under which we call find_plt_ent must
6307 match that in relocate_section. If we call find_plt_ent here
6308 but not in relocate_section, or vice versa, then the branch
6309 destination used here may be incorrect. */
6312 {
6313 /* We know is_branch_reloc (r_type) is true. */
6317 }
6320 {
6325 }
6327 {
6335 {
6340 {
6343 }
6344 else
6345 {
6348 }
6349 }
6350 }
6352 /* If the branch and target are in the same section, you have
6353 no hope of adding stubs. We'll error out later should the
6354 branch overflow. */
6358 /* toff is used for the symbol index when the symbol is
6359 undefined and we're doing a relocatable link, so we can't
6360 support addends. It would be possible to do so by
6361 putting the addend in one_branch_fixup but addends on
6362 branches are rare so it hardly seems worth supporting. */
6369 /* There probably isn't any reason to handle symbols in
6370 SEC_MERGE sections; SEC_MERGE doesn't seem a likely
6371 attribute for a code section, and we are only looking at
6372 branches. However, implement it correctly here as a
6373 reference for other target relax_section functions. */
6375 {
6376 /* At this stage in linking, no SEC_MERGE symbol has been
6377 adjusted, so all references to such symbols need to be
6378 passed through _bfd_merged_section_offset. (Later, in
6379 relocate_section, all SEC_MERGE symbols *except* for
6380 section symbols have been adjusted.)
6382 gas may reduce relocations against symbols in SEC_MERGE
6383 sections to a relocation against the section symbol when
6384 the original addend was zero. When the reloc is against
6385 a section symbol we should include the addend in the
6386 offset passed to _bfd_merged_section_offset, since the
6387 location of interest is the original symbol. On the
6388 other hand, an access to "sym+addend" where "sym" is not
6389 a section symbol should not include the addend; Such an
6390 access is presumed to be an offset from "sym"; The
6391 location of interest is just "sym". */
6396 toff
6399 toff);
6404 }
6405 /* PLTREL24 addends are special. */
6409 /* Attempted -shared link of non-pic code loses. */
6420 /* Avoid creating a lot of unnecessary fixups when
6421 relocatable if the output section size is such that a
6422 fixup can be created at final link.
6423 The max_branch_offset adjustment allows for some number
6424 of other fixups being needed at final link. */
6430 /* If the branch is in range, no need to do anything. */
6433 /* A relocatable link may have sections moved during
6434 final link, so do not presume they remain in range. */
6436 {
6437 bfd_vma symaddr;
6443 }
6445 /* Look for an existing fixup to this address. */
6451 {
6457 /* Oh dear, we can't reach a trampoline. Don't try to add
6458 one. We'll report an error later. */
6462 {
6465 }
6466 else
6467 {
6470 }
6474 {
6478 }
6480 /* Hijack the old relocation. Since we need two
6481 relocations for this use a "composite" reloc. */
6483 stub_rtype);
6489 /* Record the fixup so we don't do it again this section. */
6498 changes++;
6499 }
6500 else
6501 {
6506 /* Nop out the reloc, since we're finalizing things here. */
6508 }
6516 /* Get the section contents. */
6518 {
6519 /* Get cached copy if it exists. */
6522 /* Go get them off disk. */
6525 }
6527 /* Fix up the existing branch to hit the trampoline. */
6530 {
6548 }
6549 }
6552 {
6556 }
6557 }
6564 {
6574 {
6575 /* Keep space aligned, to ensure the patch code itself does
6576 not cross a page. Don't decrease size calculated on a
6577 previous pass as otherwise we might never settle on a layout. */
6581 {
6584 }
6585 /* Ensure relocate_section is called. */
6587 }
6589 }
6592 {
6597 }
6604 {
6607 else
6608 {
6609 /* Cache the symbols for elf_link_input_bfd. */
6611 }
6612 }
6616 {
6619 else
6620 {
6621 /* Cache the section contents for elf_link_input_bfd. */
6623 }
6624 }
6628 {
6629 /* Append sufficient NOP relocs so we can write out relocation
6630 information for the trampolines. */
6641 {
6645 }
6652 }
6659 error_return:
6661 {
6665 }
6673 }
6674 \f
6675 /* What to do when ld finds relocations against symbols defined in
6676 discarded sections. */
6678 static unsigned int
6680 {
6688 }
6689 \f
6690 /* Fill in the address for a pointer generated in a linker section. */
6692 static bfd_vma
6696 bfd_vma relocation,
6698 {
6704 {
6705 /* Handle global symbol. */
6711 }
6712 else
6713 {
6714 /* Handle local symbol. */
6720 }
6724 lsect);
6727 /* Offset will always be a multiple of four, so use the bottom bit
6728 as a "written" flag. */
6730 {
6735 }
6742 #ifdef DEBUG
6746 #endif
6749 }
6751 #define PPC_LO(v) ((v) & 0xffff)
6752 #define PPC_HI(v) (((v) >> 16) & 0xffff)
6753 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
6755 static void
6759 {
6762 bfd_vma plt;
6768 {
6785 }
6792 {
6806 else
6807 {
6811 }
6812 }
6813 else
6814 {
6818 }
6825 {
6828 }
6829 }
6831 /* Return true if symbol is defined statically. */
6833 static bool
6835 {
6840 }
6842 /* If INSN is an opcode that may be used with an @tls operand, return
6843 the transformed insn for TLS optimisation, otherwise return 0. If
6844 REG is non-zero only match an insn with RB or RA equal to REG. */
6846 unsigned int
6848 {
6858 else
6862 /* add -> addi. */
6868 /* load and store indexed -> dform. */
6871 /* ldx, ldux, stdx, stdux -> ld, ldu, std, stdu. */
6874 /* lwax -> lwa. */
6876 else
6880 }
6882 /* If INSN is an opcode that may be used with an @tprel operand, return
6883 the transformed insn for an undefined weak symbol, ie. with the
6884 thread pointer REG operand removed. Otherwise return 0. */
6886 unsigned int
6888 {
6909 {
6911 }
6916 {
6921 }
6922 else
6925 }
6927 static bool
6929 {
6934 }
6936 static bool
6938 {
6942 }
6944 static bool
6946 {
6951 }
6953 static bool
6955 {
6959 }
6961 /* The RELOCATE_SECTION function is called by the ELF backend linker
6962 to handle the relocations for a section.
6964 The relocs are always passed as Rela structures; if the section
6965 actually uses Rel structures, the r_addend field will always be
6966 zero.
6968 This function is responsible for adjust the section contents as
6969 necessary, and (if using Rela relocs and generating a
6970 relocatable output file) adjusting the reloc addend as
6971 necessary.
6973 This function does not have to worry about setting the reloc
6974 address or the reloc symbol index.
6976 LOCAL_SYMS is a pointer to the swapped in local symbols.
6978 LOCAL_SECTIONS is an array giving the section in the input file
6979 corresponding to the st_shndx field of each local symbol.
6981 The global hash table entry for the global symbols can be found
6982 via elf_sym_hashes (input_bfd).
6984 When generating relocatable output, this function must handle
6985 STB_LOCAL/STT_SECTION symbols specially. The output symbol is
6986 going to be the section symbol corresponding to the output
6987 section, which means that the addend must be adjusted
6988 accordingly. */
6990 static int
6999 {
7006 Elf_Internal_Rela outrel;
7015 #ifdef DEBUG
7021 #endif
7024 {
7027 }
7031 /* Initialize howto table if not already done. */
7039 /* We have to handle relocations in vxworks .tls_vars sections
7040 specially, because the dynamic loader is 'weird'. */
7049 {
7051 bfd_vma addend;
7052 bfd_reloc_status_type r;
7059 bfd_vma relocation;
7067 again:
7077 {
7083 }
7084 else
7085 {
7094 }
7097 {
7098 /* For relocs against symbols from removed linkonce sections,
7099 or sections discarded by a linker script, we just want the
7100 section contents zeroed. Avoid any special processing. */
7111 /* For ld -r, remove relocations in debug sections against
7112 symbols defined in discarded sections. Not done for
7113 non-debug to preserve relocs in .eh_frame which the
7114 eh_frame editing code expects to be present. */
7117 wrel--;
7120 }
7123 {
7127 {
7128 /* R_PPC_PLTREL24 is rather special. If non-zero, the
7129 addend specifies the GOT pointer offset within .got2. */
7131 }
7136 }
7138 /* TLS optimizations. Replace instruction sequences and relocs
7139 based on information we collected in tls_optimize. We edit
7140 RELOCS so that --emit-relocs will output something sensible
7141 for the final instruction stream. */
7147 {
7150 local_plt
7154 }
7156 /* Ensure reloc mapping code below stays sane. */
7167 {
7176 {
7177 bfd_vma insn;
7187 }
7194 {
7195 bfd_vma insn;
7205 /* Was PPC_TLS which sits on insn boundary, now
7206 PPC_TPREL16_LO which is at low-order half-word. */
7208 }
7223 {
7224 tls_gdld_hi:
7228 else
7229 {
7233 }
7235 }
7250 {
7252 bfd_vma offset;
7254 tls_ldgd_opt:
7256 /* If not using the newer R_PPC_TLSGD/LD to mark
7257 __tls_get_addr calls, we must trust that the call
7258 stays with its arg setup insns, ie. that the next
7259 reloc is the __tls_get_addr call associated with
7260 the current reloc. Edit both insns. */
7266 /* We read the low GOT_TLS insn because we need to keep
7267 the destination reg. It may be something other than
7268 the usual r3, and moved to r3 before the call by
7269 intervening code. */
7273 {
7274 /* IE */
7279 {
7283 }
7287 }
7288 else
7289 {
7290 /* LE */
7294 {
7295 /* Was an LD reloc. */
7298 r_symndx++)
7308 }
7313 {
7319 }
7320 }
7324 {
7325 /* We changed the symbol on an LD reloc. Start over
7326 in order to get h, sym, sec etc. right. */
7328 }
7329 }
7336 {
7341 {
7345 }
7348 {
7349 /* IE */
7352 }
7353 else
7354 {
7355 /* LE */
7359 }
7362 /* Zap the reloc on the _tls_get_addr call too. */
7365 }
7372 {
7376 {
7380 }
7384 r_symndx++)
7400 /* Zap the reloc on the _tls_get_addr call too. */
7404 }
7406 }
7408 /* Handle other relocations that tweak non-addend part of insn. */
7411 {
7415 /* Branch taken prediction relocations. */
7419 /* Fall through. */
7421 /* Branch not taken prediction relocations. */
7425 {
7436 /* Invert 'y' bit if not the default. */
7441 }
7446 {
7453 {
7455 {
7456 /* Convert addis to lis. */
7460 }
7461 }
7467 }
7469 }
7478 {
7479 /* Convert lis;addi or lis;load/store accessing a protected
7480 variable defined in a shared library to PIC. */
7485 {
7490 {
7492 bfd_vma off;
7493 bfd_vma got_addr;
7517 /* Convert lis to lwz, loading address from GOT. */
7527 /* Use one of the spare relocs, so --emit-relocs
7528 output is reasonable. */
7535 /* Continue on as if we had a got reloc, to output
7536 dynamic reloc. */
7538 }
7539 else
7540 _bfd_error_handler
7541 /* xgettext:c-format */
7546 }
7550 {
7571 {
7572 /* Arrange to apply the reloc addend, if any. */
7576 }
7577 else
7578 _bfd_error_handler
7579 /* xgettext:c-format */
7584 }
7585 }
7589 {
7593 {
7596 }
7599 {
7605 }
7614 {
7623 }
7625 {
7632 {
7633 /* Uh oh, we are going to create a pic glink stub
7634 for an ifunc (here for h == NULL and later in
7635 finish_dynamic_symbol for h != NULL), and
7636 apparently are using code compiled with
7637 -mbss-plt. The difficulty is that -mbss-plt code
7638 gives no indication via a magic PLTREL24 addend
7639 whether r30 is equal to _GLOBAL_OFFSET_TABLE_ or
7640 is pointing into a .got2 section (and how far
7641 into .got2). */
7643 /* xgettext:c-format */
7646 }
7656 else
7660 }
7661 }
7671 {
7673 de_fault:
7675 /* xgettext:c-format */
7678 else
7679 /* xgettext:c-format */
7696 /* GOT16 relocations. Like an ADDR16 using the symbol's
7697 address in the GOT as relocation value instead of the
7698 symbol's value itself. Also, create a GOT entry for the
7699 symbol and put the symbol value there. */
7733 dogot:
7734 {
7735 /* Relocation is to the entry for this symbol in the global
7736 offset table. */
7737 bfd_vma off;
7749 {
7754 /* This is actually a static link, or it is a
7755 -Bsymbolic link and the symbol is defined
7756 locally, or the symbol was forced to be local
7757 because of a version file. */
7758 ;
7759 else
7760 {
7763 }
7765 }
7766 else
7767 {
7771 }
7773 /* The offset must always be a multiple of 4. We use the
7774 least significant bit to record whether we have already
7775 processed this entry. */
7779 else
7780 {
7792 /* We might have multiple got entries for this sym.
7793 Initialize them all. */
7794 do
7795 {
7799 {
7802 }
7804 {
7807 }
7809 {
7812 }
7814 {
7817 }
7819 /* Generate relocs for the dynamic linker. */
7830 {
7834 {
7840 }
7846 {
7849 {
7852 rsec));
7854 outrel.r_info
7856 }
7857 }
7866 else
7869 {
7872 {
7875 else
7877 }
7878 }
7881 }
7883 /* Init the .got section contents if we're not
7884 emitting a reloc. */
7885 else
7886 {
7890 {
7893 else
7894 {
7897 else
7901 }
7904 {
7908 }
7909 }
7912 }
7917 }
7922 }
7928 {
7930 {
7935 {
7939 {
7942 }
7943 }
7944 }
7945 }
7947 /* If here for a picfixup, we're done. */
7953 + off
7956 /* Addends on got relocations don't make much sense.
7957 x+off@got is actually x@got+off, and since the got is
7958 generated by a hash table traversal, the value in the
7959 got at entry m+n bears little relation to the entry m. */
7962 /* xgettext:c-format */
7966 sym_name);
7967 }
7970 /* Relocations that need no special processing. */
7972 /* It makes no sense to point a local relocation
7973 at a symbol not in this object. */
7975 {
7978 input_bfd,
7979 input_section,
7983 }
7985 {
7986 /* @local on an ifunc does not really make sense since
7987 the ifunc resolver can take you anywhere. More
7988 seriously, calls to ifuncs must go through a plt call
7989 stub, and for pic the plt call stubs uses r30 to
7990 access the PLT. The problem is that a call that is
7991 local won't have the +32k reloc addend trick marking
7992 -fPIC code, so the linker won't know whether r30 is
7993 _GLOBAL_OFFSET_TABLE_ or pointing into a .got2 section. */
7994 /* xgettext:c-format */
7998 }
8009 /* Relocations that may need to be propagated if this is a shared
8010 object. */
8019 {
8020 /* Make this relocation against an undefined weak symbol
8021 resolve to zero. This is really just a tweak, since
8022 code using weak externs ought to check that they are
8023 defined before using them. */
8030 }
8033 /* The TPREL16 relocs shouldn't really be used in shared
8034 libs or with non-local symbols as that will result in
8035 DT_TEXTREL being set, but support them anyway. */
8063 /* fall through */
8081 /* If these relocations are not to a named symbol, they can be
8082 handled right here, no need to bother the dynamic linker. */
8086 /* fall through */
8094 /* fall through */
8096 dodyn:
8108 {
8113 #ifdef DEBUG
8118 #endif
8120 /* When generating a shared object, these relocations
8121 are copied into the output file to be resolved at run
8122 time. */
8125 input_section,
8133 /* Optimize unaligned reloc use. */
8144 {
8150 }
8151 else
8152 {
8156 {
8158 {
8159 /* If we get here when building a static
8160 executable, then the libc startup function
8161 responsible for applying indirect function
8162 relocations is going to complain about
8163 the reloc type.
8164 If we get here when building a dynamic
8165 executable, it will be because we have
8166 a text relocation. The dynamic loader
8167 will set the text segment writable and
8168 non-executable to apply text relocations.
8169 So we'll segfault when trying to run the
8170 indirection function to resolve the reloc. */
8172 /* xgettext:c-format */
8177 sym_name);
8179 }
8181 ;
8183 {
8186 }
8187 else
8188 {
8191 /* We are turning this relocation into one
8192 against a section symbol. It would be
8193 proper to subtract the symbol's value,
8194 osec->vma, from the emitted reloc addend,
8195 but ld.so expects buggy relocs.
8196 FIXME: Why not always use a zero index? */
8199 {
8202 }
8203 else
8204 {
8207 {
8210 }
8212 }
8214 /* ld.so doesn't expect buggy TLS relocs.
8215 Don't leave the symbol value in the
8216 addend for them. */
8219 }
8222 }
8225 else
8227 }
8231 {
8237 }
8242 sreloc));
8247 /* This reloc will be computed at runtime. Clear the memory
8248 so that it contains a predictable value for prelink. */
8250 {
8254 }
8255 }
8261 {
8266 {
8270 }
8276 else
8280 }
8281 /* Fall through. */
8289 {
8296 {
8306 }
8307 else
8308 {
8311 }
8317 /* First insn is HA, second is LO. */
8330 {
8335 }
8337 /* Rewrite the reloc and convert one of the trailing nop
8338 relocs to describe this relocation. */
8340 /* The relocs are at the bottom 2 bytes */
8348 }
8349 else
8353 /* Indirect .sdata relocation. */
8357 {
8360 }
8361 relocation
8367 /* Indirect .sdata2 relocation. */
8371 {
8374 }
8375 relocation
8381 /* Handle the TOC16 reloc. We want to use the offset within the .got
8382 section, not the actual VMA. This is appropriate when generating
8383 an embedded ELF object, for which the .got section acts like the
8384 AIX .toc section. */
8387 {
8390 }
8399 {
8406 {
8407 /* We didn't make a PLT entry for this symbol. This
8408 happens when statically linking PIC code, or when
8409 using -Bsymbolic. */
8410 }
8411 else
8412 {
8413 /* Relocation is to the entry for this symbol in the
8414 procedure linkage table. */
8420 else
8424 }
8425 }
8427 /* R_PPC_PLTREL24 is rather special. If non-zero, the
8428 addend specifies the GOT pointer offset within .got2.
8429 Don't apply it to the relocation field. */
8444 {
8449 }
8452 {
8458 {
8464 {
8467 else
8469 }
8474 {
8481 else
8484 }
8485 }
8486 }
8490 /* Relocate against _SDA_BASE_. */
8492 {
8499 {
8502 }
8508 {
8509 _bfd_error_handler
8510 /* xgettext:c-format */
8513 input_bfd,
8514 sym_name,
8516 name);
8517 }
8518 }
8521 /* Relocate against _SDA2_BASE_. */
8523 {
8530 {
8533 }
8539 {
8540 _bfd_error_handler
8541 /* xgettext:c-format */
8544 input_bfd,
8545 sym_name,
8547 name);
8548 }
8549 }
8556 split16a_type,
8564 split16d_type,
8572 split16a_type,
8580 split16d_type,
8588 split16a_type,
8596 split16d_type,
8600 /* Relocate against either _SDA_BASE_, _SDA2_BASE_, or 0. */
8606 {
8609 }
8610 else
8611 {
8618 {
8621 }
8626 {
8629 }
8632 {
8635 }
8638 {
8640 }
8641 else
8642 {
8643 _bfd_error_handler
8644 /* xgettext:c-format */
8647 input_bfd,
8648 sym_name,
8650 name);
8655 }
8658 {
8660 {
8663 }
8665 }
8670 /* The PowerPC Embedded Application Binary Interface
8671 version 1.0 insanely chose to specify R_PPC_EMB_SDA21
8672 operating on a 24-bit field at r_offset. GNU as and
8673 GNU ld have always assumed R_PPC_EMB_SDA21 operates on
8674 a 32-bit bit insn at r_offset. Cope with object file
8675 producers that possibly comply with the EABI in
8676 generating an odd r_offset for big-endian objects. */
8684 {
8688 /* Force e_li insn, keeping RT from original insn. */
8692 /* We have an li20 field, bits 17..20, 11..15, 21..31. */
8693 /* Top 4 bits of value to 17..20. */
8695 /* Next 5 bits of the value to 11..15. */
8697 /* And the final 11 bits of the value to bits 21 to 31. */
8707 }
8708 /* Fill in register field. */
8711 }
8722 else
8723 {
8724 bfd_vma value;
8729 {
8732 }
8741 else
8742 {
8743 _bfd_error_handler
8744 /* xgettext:c-format */
8747 input_bfd,
8748 sym_name,
8750 name);
8755 }
8758 {
8761 }
8768 split16a_type,
8774 split16d_type,
8777 {
8782 split16a_type,
8784 }
8786 {
8791 split16d_type,
8793 }
8795 {
8800 split16a_type,
8802 }
8804 {
8809 split16d_type,
8811 }
8812 else
8814 }
8820 else
8821 {
8823 relocation);
8825 }
8828 /* Relocate against the beginning of the section. */
8834 {
8837 }
8841 /* Negative relocations. */
8863 /* xgettext:c-format */
8870 }
8873 {
8882 {
8885 }
8892 {
8898 }
8900 }
8903 {
8909 {
8911 {
8919 }
8920 }
8932 {
8934 {
8940 }
8941 }
8948 }
8950 /* Do any further special processing. */
8952 {
8964 /* It's just possible that this symbol is a weak symbol
8965 that's not actually defined anywhere. In that case,
8966 'sec' would be NULL, and we should leave the symbol
8967 alone (it will be set to zero elsewhere in the link). */
8970 /* Fall through. */
8978 /* Add 0x10000 if sign bit in 0:15 is set.
8979 Bits 0:15 are not used. */
9003 {
9004 /* The 32-bit ABI lacks proper relocations to deal with
9005 certain 64-bit instructions. Prevent damage to bits
9006 that make up part of the insn opcode. */
9016 else
9022 {
9025 /* xgettext:c-format */
9031 }
9032 }
9034 }
9036 #ifdef DEBUG
9041 sym_name,
9042 r_symndx,
9045 #endif
9052 {
9054 /* xgettext:c-format */
9058 sym_name);
9060 }
9062 /* 16-bit fields in insns mostly have signed values, but a
9063 few insns have 16-bit unsigned values. Really, we should
9064 have different reloc types. */
9069 {
9073 {
9083 }
9085 {
9089 }
9090 }
9093 {
9094 /* Split field reloc isn't handled by _bfd_final_link_relocate. */
9097 else
9098 {
9111 }
9112 }
9113 else
9117 report_reloc:
9119 {
9121 {
9122 /* On code like "if (foo) foo();" don't report overflow
9123 on a branch to zero when foo is undefined. */
9132 }
9133 else
9134 {
9136 /* xgettext:c-format */
9141 }
9142 }
9143 copy_reloc:
9146 }
9149 {
9156 {
9157 /* It is too late to remove an empty reloc section. Leave
9158 one NONE reloc.
9159 ??? What is wrong with an empty section??? */
9162 wrel++;
9163 }
9168 }
9170 #ifdef DEBUG
9172 #endif
9178 {
9179 /* Branch around the trampolines. */
9182 }
9189 {
9194 {
9203 {
9206 }
9207 }
9209 /* The idea is: Replace the last instruction on a page with a
9210 branch to a patch area. Put the insn there followed by a
9211 branch back to the next page. Complicated a little by
9212 needing to handle moved conditional branches, and by not
9213 wanting to touch data-in-text. */
9222 {
9229 /* Do we have a data reloc at this offset? If so, leave
9230 the word alone. */
9236 {
9242 else
9243 {
9245 {
9254 }
9256 }
9257 }
9261 /* Some instructions can be left alone too. Unconditional
9262 branches, except for bcctr with BO=0x14 (bctr, bctrl),
9263 avoid the icache failure.
9265 The problem occurs due to prefetch across a page boundary
9266 where stale instructions can be fetched from the next
9267 page, and the mechanism for flushing these bad
9268 instructions fails under certain circumstances. The
9269 unconditional branches:
9270 1) Branch: b, bl, ba, bla,
9271 2) Branch Conditional: bc, bca, bcl, bcla,
9272 3) Branch Conditional to Link Register: bclr, bclrl,
9273 where (2) and (3) have BO=0x14 making them unconditional,
9274 prevent the bad prefetch because the prefetch itself is
9275 affected by these instructions. This happens even if the
9276 instruction is not executed.
9278 A bctr example:
9279 .
9280 . lis 9,new_page@ha
9281 . addi 9,9,new_page@l
9282 . mtctr 9
9283 . bctr
9284 . nop
9285 . nop
9286 . new_page:
9287 .
9288 The bctr is not predicted taken due to ctr not being
9289 ready, so prefetch continues on past the bctr into the
9290 new page which might have stale instructions. If they
9291 fail to be flushed, then they will be executed after the
9292 bctr executes. Either of the following modifications
9293 prevent the bad prefetch from happening in the first
9294 place:
9295 .
9296 . lis 9,new_page@ha lis 9,new_page@ha
9297 . addi 9,9,new_page@l addi 9,9,new_page@l
9298 . mtctr 9 mtctr 9
9299 . bctr bctr
9300 . nop b somewhere_else
9301 . b somewhere_else nop
9302 . new_page: new_page:
9303 . */
9322 {
9325 /* If the insn we are patching had a reloc, adjust the
9326 reloc r_offset so that the reloc applies to the moved
9327 location. This matters for -r and --emit-relocs. */
9329 {
9332 /* Keep the relocs sorted by r_offset. */
9335 }
9338 /* Adjust REL16 addends too. */
9340 {
9349 }
9351 /* If we are building a PIE or shared library with
9352 non-PIC objects, perhaps we had a dynamic reloc too?
9353 If so, the dynamic reloc must move with the insn. */
9356 {
9358 bfd_vma soffset;
9365 {
9373 else
9374 {
9376 {
9380 }
9385 }
9386 }
9387 }
9388 }
9389 else
9394 {
9401 {
9409 else
9417 }
9419 {
9428 }
9429 else
9430 {
9432 {
9437 }
9450 }
9451 }
9452 else
9453 {
9460 }
9463 }
9464 }
9467 }
9468 \f
9469 /* Write out the PLT relocs and entries for H. */
9471 static bool
9473 {
9482 {
9486 {
9487 Elf_Internal_Rela rela;
9489 bfd_vma reloc_index;
9495 else
9496 {
9502 }
9504 /* This symbol has an entry in the procedure linkage table.
9505 Set it up. */
9507 {
9508 bfd_vma got_offset;
9511 /* The first three entries in .got.plt are reserved. */
9514 /* Use the right PLT. */
9518 /* Fill in the .plt on VxWorks. */
9520 {
9527 }
9528 else
9529 {
9538 }
9545 /* This instruction is an immediate load. The value loaded is
9546 the byte offset of the R_PPC_JMP_SLOT relocation from the
9547 start of the .rela.plt section. The value is stored in the
9548 low-order 16 bits of the load instruction. */
9549 /* NOTE: It appears that this is now an index rather than a
9550 prescaled offset. */
9554 /* This instruction is a PC-relative branch whose target is
9555 the start of the PLT section. The address of this branch
9556 instruction is 20 bytes beyond the start of this PLT entry.
9557 The address is encoded in bits 6-29, inclusive. The value
9558 stored is right-shifted by two bits, permitting a 26-bit
9559 offset. */
9569 /* Fill in the GOT entry corresponding to this PLT slot with
9570 the address immediately after the "bctr" instruction
9571 in this PLT entry. */
9578 {
9579 /* Fill in a couple of entries in .rela.plt.unloaded. */
9585 /* Provide the @ha relocation for the first instruction. */
9590 R_PPC_ADDR16_HA);
9596 /* Provide the @l relocation for the second instruction. */
9601 R_PPC_ADDR16_LO);
9607 /* Provide a relocation for the GOT entry corresponding to this
9608 PLT slot. Point it at the middle of the .plt entry. */
9613 R_PPC_ADDR32);
9617 }
9619 /* VxWorks uses non-standard semantics for R_PPC_JMP_SLOT.
9620 In particular, the offset for the relocation is not the
9621 address of the PLT entry for this function, as specified
9622 by the ABI. Instead, the offset is set to the address of
9623 the GOT slot for this function. See EABI 4.4.4.1. */
9628 }
9629 else
9630 {
9633 {
9635 {
9638 }
9639 else
9640 {
9643 }
9648 }
9651 {
9654 }
9655 else
9656 {
9662 {
9663 /* We don't need to fill in the .plt. The ppc dynamic
9664 linker will fill it in. */
9665 }
9666 else
9667 {
9673 }
9674 }
9675 }
9678 {
9679 /* Fill in the entry in the .rela.plt section. */
9681 {
9684 else
9689 }
9690 else
9691 {
9697 }
9700 }
9702 }
9705 {
9710 {
9713 else
9715 }
9721 /* We only need one non-PIC glink stub. */
9723 }
9724 else
9726 }
9728 }
9730 /* Finish up PLT handling. */
9732 bool
9734 {
9744 {
9748 bfd_size_type locsymcount;
9766 {
9768 {
9773 bfd_vma val;
9774 Elf_Internal_Rela rela;
9779 {
9783 }
9790 {
9795 }
9796 else
9797 {
9800 {
9803 }
9804 else
9805 {
9809 }
9810 }
9817 relplt));
9821 }
9822 }
9826 {
9829 else
9831 }
9832 }
9834 }
9836 /* Finish up dynamic symbol handling. We set the contents of various
9837 dynamic sections here. */
9839 static bool
9844 {
9848 #ifdef DEBUG
9851 #endif
9857 {
9859 {
9860 /* Mark the symbol as undefined, rather than as
9861 defined in the .plt section. Leave the value if
9862 there were any relocations where pointer equality
9863 matters (this is a clue for the dynamic linker, to
9864 make function pointer comparisons work between an
9865 application and shared library), otherwise set it
9866 to zero. */
9871 {
9872 /* This breaks function pointer comparisons, but
9873 that is better than breaking tests for a NULL
9874 function pointer. */
9876 }
9877 }
9878 else
9879 {
9880 /* Set the value of ifunc symbols in a non-pie
9881 executable to the glink entry. This is to avoid
9882 text relocations. We can't do this for ifunc in
9883 allocate_dynrelocs, as we do for normal dynamic
9884 function symbols with plt entries, because we need
9885 to keep the original value around for the ifunc
9886 relocation. */
9887 sym->st_shndx
9888 = (_bfd_elf_section_from_bfd_section
9893 }
9895 }
9898 {
9900 Elf_Internal_Rela rela;
9902 /* This symbols needs a copy reloc. Set it up. */
9904 #ifdef DEBUG
9906 #endif
9914 else
9922 }
9924 #ifdef DEBUG
9926 #endif
9929 }
9930 \f
9931 static enum elf_reloc_type_class
9935 {
9942 {
9951 }
9952 }
9953 \f
9954 /* Finish up the dynamic sections. */
9956 static bool
9959 {
9962 bfd_vma got;
9966 #ifdef DEBUG
9968 #endif
9979 {
9987 {
9988 Elf_Internal_Dyn dyn;
9994 {
9998 else
10032 }
10035 }
10036 }
10040 {
10043 {
10048 {
10049 /* Add a blrl instruction at _GLOBAL_OFFSET_TABLE_-4
10050 so that a function can easily find the address of
10051 _GLOBAL_OFFSET_TABLE_. */
10055 }
10058 {
10063 }
10064 }
10065 else
10066 {
10067 /* xgettext:c-format */
10074 }
10077 }
10079 /* Fill in the first entry in the VxWorks procedure linkage table. */
10084 {
10086 /* Use the right PLT. */
10088 ? ppc_elf_vxworks_pic_plt0_entry
10092 {
10099 }
10100 else
10101 {
10104 }
10113 {
10114 Elf_Internal_Rela rela;
10119 /* Output the @ha relocation for the first instruction. */
10128 /* Output the @l relocation for the second instruction. */
10137 /* Fix up the remaining relocations. They may have the wrong
10138 symbol index for _G_O_T_ or _P_L_T_ depending on the order
10139 in which symbols were output. */
10141 {
10142 Elf_Internal_Rela rel;
10158 }
10159 }
10160 }
10165 {
10168 bfd_vma res0;
10170 /*
10171 * PIC glink code is the following:
10172 *
10173 * # ith PLT code stub.
10174 * addis 11,30,(plt+(i-1)*4-got)@ha
10175 * lwz 11,(plt+(i-1)*4-got)@l(11)
10176 * mtctr 11
10177 * bctr
10178 *
10179 * # A table of branches, one for each plt entry.
10180 * # The idea is that the plt call stub loads ctr and r11 with these
10181 * # addresses, so (r11 - res_0) gives the plt index * 4.
10182 * res_0: b PLTresolve
10183 * res_1: b PLTresolve
10184 * .
10185 * # Some number of entries towards the end can be nops
10186 * res_n_m3: nop
10187 * res_n_m2: nop
10188 * res_n_m1:
10189 *
10190 * PLTresolve:
10191 * addis 11,11,(1f-res_0)@ha
10192 * mflr 0
10193 * bcl 20,31,1f
10194 * 1: addi 11,11,(1b-res_0)@l
10195 * mflr 12
10196 * mtlr 0
10197 * sub 11,11,12 # r11 = index * 4
10198 * addis 12,12,(got+4-1b)@ha
10199 * lwz 0,(got+4-1b)@l(12) # got[1] address of dl_runtime_resolve
10200 * lwz 12,(got+8-1b)@l(12) # got[2] contains the map address
10201 * mtctr 0
10202 * add 0,11,11
10203 * add 11,0,11 # r11 = index * 12 = reloc offset.
10204 * bctr
10205 *
10206 * Non-PIC glink code is a little simpler.
10207 *
10208 * # ith PLT code stub.
10209 * lis 11,(plt+(i-1)*4)@ha
10210 * lwz 11,(plt+(i-1)*4)@l(11)
10211 * mtctr 11
10212 * bctr
10213 *
10214 * The branch table is the same, then comes
10215 *
10216 * PLTresolve:
10217 * lis 12,(got+4)@ha
10218 * addis 11,11,(-res_0)@ha
10219 * lwz 0,(got+4)@l(12) # got[1] address of dl_runtime_resolve
10220 * addi 11,11,(-res_0)@l # r11 = index * 4
10221 * mtctr 0
10222 * add 0,11,11
10223 * lwz 12,(got+8)@l(12) # got[2] contains the map address
10224 * add 11,0,11 # r11 = index * 12 = reloc offset.
10225 * bctr
10226 */
10228 /* Build the branch table, one for each plt entry (less one),
10229 and perhaps some padding. */
10235 {
10238 }
10240 {
10243 }
10250 {
10251 /* Ensure that a call stub at the end of a page doesn't
10252 result in prefetch over the end of the page into the
10253 glink branch table. */
10255 bfd_vma page_addr;
10262 {
10263 /* We have a plt call stub that may need fixing. */
10270 {
10271 /* By alignment, we know that there must be at least
10272 one other call stub before this one. */
10276 else
10278 }
10279 }
10280 }
10282 /* Last comes the PLTresolve stub. */
10285 {
10286 bfd_vma bcl;
10309 {
10314 }
10315 else
10316 {
10321 }
10325 }
10326 else
10327 {
10334 else
10345 else
10347 }
10354 {
10358 }
10360 }
10364 {
10366 bfd_vma val;
10369 /* FDE length. */
10371 /* CIE pointer. */
10373 /* Offset to .glink. */
10386 }
10389 }
10390 \f
10391 #define TARGET_LITTLE_SYM powerpc_elf32_le_vec
10393 #define TARGET_BIG_SYM powerpc_elf32_vec
10395 #define ELF_ARCH bfd_arch_powerpc
10396 #define ELF_TARGET_ID PPC32_ELF_DATA
10397 #define ELF_MACHINE_CODE EM_PPC
10398 #define ELF_MAXPAGESIZE 0x10000
10399 #define ELF_COMMONPAGESIZE 0x1000
10400 #define elf_info_to_howto ppc_elf_info_to_howto
10402 #ifdef EM_CYGNUS_POWERPC
10403 #define ELF_MACHINE_ALT1 EM_CYGNUS_POWERPC
10404 #endif
10406 #ifdef EM_PPC_OLD
10407 #define ELF_MACHINE_ALT2 EM_PPC_OLD
10408 #endif
10410 #define elf_backend_plt_not_loaded 1
10411 #define elf_backend_want_dynrelro 1
10412 #define elf_backend_can_gc_sections 1
10413 #define elf_backend_can_refcount 1
10414 #define elf_backend_rela_normal 1
10415 #define elf_backend_caches_rawsize 1
10417 #define bfd_elf32_mkobject ppc_elf_mkobject
10418 #define bfd_elf32_bfd_merge_private_bfd_data ppc_elf_merge_private_bfd_data
10419 #define bfd_elf32_bfd_relax_section ppc_elf_relax_section
10420 #define bfd_elf32_bfd_reloc_type_lookup ppc_elf_reloc_type_lookup
10421 #define bfd_elf32_bfd_reloc_name_lookup ppc_elf_reloc_name_lookup
10422 #define bfd_elf32_bfd_set_private_flags ppc_elf_set_private_flags
10423 #define bfd_elf32_bfd_link_hash_table_create ppc_elf_link_hash_table_create
10424 #define bfd_elf32_get_synthetic_symtab ppc_elf_get_synthetic_symtab
10426 #define elf_backend_object_p ppc_elf_object_p
10427 #define elf_backend_gc_mark_hook ppc_elf_gc_mark_hook
10428 #define elf_backend_section_from_shdr ppc_elf_section_from_shdr
10429 #define elf_backend_relocate_section ppc_elf_relocate_section
10430 #define elf_backend_create_dynamic_sections ppc_elf_create_dynamic_sections
10431 #define elf_backend_check_relocs ppc_elf_check_relocs
10432 #define elf_backend_relocs_compatible _bfd_elf_relocs_compatible
10433 #define elf_backend_copy_indirect_symbol ppc_elf_copy_indirect_symbol
10434 #define elf_backend_adjust_dynamic_symbol ppc_elf_adjust_dynamic_symbol
10435 #define elf_backend_add_symbol_hook ppc_elf_add_symbol_hook
10436 #define elf_backend_size_dynamic_sections ppc_elf_size_dynamic_sections
10437 #define elf_backend_hash_symbol ppc_elf_hash_symbol
10438 #define elf_backend_finish_dynamic_symbol ppc_elf_finish_dynamic_symbol
10439 #define elf_backend_finish_dynamic_sections ppc_elf_finish_dynamic_sections
10440 #define elf_backend_fake_sections ppc_elf_fake_sections
10441 #define elf_backend_additional_program_headers ppc_elf_additional_program_headers
10442 #define elf_backend_modify_segment_map ppc_elf_modify_segment_map
10443 #define elf_backend_grok_prstatus ppc_elf_grok_prstatus
10444 #define elf_backend_grok_psinfo ppc_elf_grok_psinfo
10445 #define elf_backend_write_core_note ppc_elf_write_core_note
10446 #define elf_backend_reloc_type_class ppc_elf_reloc_type_class
10447 #define elf_backend_begin_write_processing ppc_elf_begin_write_processing
10448 #define elf_backend_final_write_processing ppc_elf_final_write_processing
10449 #define elf_backend_write_section ppc_elf_write_section
10450 #define elf_backend_get_sec_type_attr ppc_elf_get_sec_type_attr
10451 #define elf_backend_plt_sym_val ppc_elf_plt_sym_val
10452 #define elf_backend_action_discarded ppc_elf_action_discarded
10453 #define elf_backend_init_index_section _bfd_elf_init_1_index_section
10454 #define elf_backend_lookup_section_flags_hook ppc_elf_lookup_section_flags
10458 /* FreeBSD Target */
10460 #undef TARGET_LITTLE_SYM
10461 #undef TARGET_LITTLE_NAME
10463 #undef TARGET_BIG_SYM
10464 #define TARGET_BIG_SYM powerpc_elf32_fbsd_vec
10465 #undef TARGET_BIG_NAME
10468 #undef ELF_OSABI
10469 #define ELF_OSABI ELFOSABI_FREEBSD
10471 #undef elf32_bed
10472 #define elf32_bed elf32_powerpc_fbsd_bed
10476 /* VxWorks Target */
10478 #undef TARGET_LITTLE_SYM
10479 #undef TARGET_LITTLE_NAME
10481 #undef TARGET_BIG_SYM
10482 #define TARGET_BIG_SYM powerpc_elf32_vxworks_vec
10483 #undef TARGET_BIG_NAME
10486 #undef ELF_OSABI
10488 #undef ELF_TARGET_OS
10489 #define ELF_TARGET_OS is_vxworks
10491 /* VxWorks uses the elf default section flags for .plt. */
10494 {
10502 }
10504 /* Like ppc_elf_link_hash_table_create, but overrides
10505 appropriately for VxWorks. */
10508 {
10513 {
10520 }
10522 }
10524 /* Tweak magic VxWorks symbols as they are loaded. */
10525 static bool
10533 {
10535 valp))
10539 }
10541 static bool
10543 {
10546 }
10548 /* On VxWorks, we emit relocations against _PROCEDURE_LINKAGE_TABLE_, so
10549 define it. */
10550 #undef elf_backend_want_plt_sym
10551 #define elf_backend_want_plt_sym 1
10552 #undef elf_backend_want_got_plt
10553 #define elf_backend_want_got_plt 1
10554 #undef elf_backend_got_symbol_offset
10555 #define elf_backend_got_symbol_offset 0
10556 #undef elf_backend_plt_not_loaded
10557 #define elf_backend_plt_not_loaded 0
10558 #undef elf_backend_plt_readonly
10559 #define elf_backend_plt_readonly 1
10560 #undef elf_backend_got_header_size
10561 #define elf_backend_got_header_size 12
10562 #undef elf_backend_dtrel_excludes_plt
10563 #define elf_backend_dtrel_excludes_plt 1
10565 #undef bfd_elf32_get_synthetic_symtab
10567 #undef bfd_elf32_bfd_link_hash_table_create
10568 #define bfd_elf32_bfd_link_hash_table_create \
10569 ppc_elf_vxworks_link_hash_table_create
10570 #undef elf_backend_add_symbol_hook
10571 #define elf_backend_add_symbol_hook \
10572 ppc_elf_vxworks_add_symbol_hook
10573 #undef elf_backend_link_output_symbol_hook
10574 #define elf_backend_link_output_symbol_hook \
10575 elf_vxworks_link_output_symbol_hook
10576 #undef elf_backend_final_write_processing
10577 #define elf_backend_final_write_processing \
10578 ppc_elf_vxworks_final_write_processing
10579 #undef elf_backend_get_sec_type_attr
10580 #define elf_backend_get_sec_type_attr \
10581 ppc_elf_vxworks_get_sec_type_attr
10582 #undef elf_backend_emit_relocs
10583 #define elf_backend_emit_relocs \
10584 elf_vxworks_emit_relocs
10586 #undef elf32_bed
10587 #define elf32_bed ppc_elf_vxworks_bed