2 ******************************************************************************
3 * @file startup_stm32f10x_md.s
4 * @author MCD Application Team
7 * @brief STM32F10x Medium Density Devices vector table for Atollic toolchain.
8 * This module performs:
10 * - Set the initial PC == Reset_Handler,
11 * - Set the vector table entries with the exceptions ISR address
12 * - Configure the clock system
13 * - Branches to main in the C library (which eventually
15 * After Reset the Cortex-M3 processor is in Thread mode,
16 * priority is Privileged, and the Stack is set to Main.
17 ******************************************************************************
20 * THE PRESENT FIRMWARE WHICH IS FOR GUIDANCE ONLY AIMS AT PROVIDING CUSTOMERS
21 * WITH CODING INFORMATION REGARDING THEIR PRODUCTS IN ORDER FOR THEM TO SAVE
22 * TIME. AS A RESULT, STMICROELECTRONICS SHALL NOT BE HELD LIABLE FOR ANY
23 * DIRECT, INDIRECT OR CONSEQUENTIAL DAMAGES WITH RESPECT TO ANY CLAIMS ARISING
24 * FROM THE CONTENT OF SUCH FIRMWARE AND/OR THE USE MADE BY CUSTOMERS OF THE
25 * CODING INFORMATION CONTAINED HEREIN IN CONNECTION WITH THEIR PRODUCTS.
27 * <h2><center>© COPYRIGHT 2011 STMicroelectronics</center></h2>
28 ******************************************************************************
37 .global Default_Handler
39 /* start address for the initialization values of the .data section.
40 defined in linker script */
42 /* start address for the .data section. defined in linker script */
44 /* end address for the .data section. defined in linker script */
46 /* start address for the .bss section. defined in linker script */
48 /* end address for the .bss section. defined in linker script */
51 .equ BootRAM, 0xF108F85F
53 * @brief This is the code that gets called when the processor first
54 * starts execution following a reset event. Only the absolutely
55 * necessary set is performed, after which the application
56 * supplied main() routine is called.
61 .section .text.Reset_Handler
63 .type Reset_Handler, %function
65 ldr r0, =0x20004FF0 // HJI - TC bootloader entry on reset mod
66 ldr r1, =0xDEADBEEF // HJI - TC bootloader entry on reset mod
67 ldr r2, [r0, #0] // HJI - TC bootloader entry on reset mod
68 str r0, [r0, #0] // HJI - TC bootloader entry on reset mod
69 cmp r2, r1 // HJI - TC bootloader entry on reset mod
70 beq Reboot_Loader // HJI - TC bootloader entry on reset mod
72 /* Copy the data segment initializers from flash to SRAM */
90 /* Zero fill the bss segment. */
100 /* Call the clock system intitialization function.*/
102 /* Call the application's entry point.*/
104 /* Atollic update, branch LoopForever */
108 .equ RCC_APB2ENR, 0x40021018 // HJI - TC bootloader entry on reset mod
109 .equ GPIO_AFIO_MASK, 0x00000009 // HJI - TC bootloader entry on reset mod
110 .equ GPIOB_CRL, 0x40010C00 // HJI - TC bootloader entry on reset mod
111 .equ GPIOB_BRR, 0x40010C14 // HJI - TC bootloader entry on reset mod
112 .equ AFIO_MAPR, 0x40010004 // HJI - TC bootloader entry on reset mod
114 Reboot_Loader: // HJI - TC bootloader entry on reset mod
115 // RCC Enable GPIOB+AFIO // HJI - TC bootloader entry on reset mod
116 ldr r6, =RCC_APB2ENR // HJI - TC bootloader entry on reset mod
117 ldr r0, =GPIO_AFIO_MASK // HJI - TC bootloader entry on reset mod
118 str R0, [r6]; // HJI - TC bootloader entry on reset mod
120 // MAPR pt1 // HJI - TC bootloader entry on reset mod
121 ldr r0, =AFIO_MAPR // HJI - TC bootloader entry on reset mod
122 ldr r1, [r0] // HJI - TC bootloader entry on reset mod
123 bic r1, r1, #0x0F000000 // HJI - TC bootloader entry on reset mod
124 str r1, [r0] // HJI - TC bootloader entry on reset mod
126 // MAPR pt2 // HJI - TC bootloader entry on reset mod
127 lsls r1, r0, #9 // HJI - TC bootloader entry on reset mod
128 str r1, [r0] // HJI - TC bootloader entry on reset mod
130 // BRR // HJI - TC bootloader entry on reset mod
131 ldr r4, =GPIOB_BRR // HJI - TC bootloader entry on reset mod
132 movs r0, #0x18 // HJI - TC bootloader entry on reset mod
133 str r0, [r4] // HJI - TC bootloader entry on reset mod
135 // CRL // HJI - TC bootloader entry on reset mod
136 ldr r1, =GPIOB_CRL // HJI - TC bootloader entry on reset mod
137 ldr r0, =0x44433444 // HJI - TC bootloader entry on reset mod
138 str r0, [r1] // HJI - TC bootloader entry on reset mod
140 // Reboot to ROM // HJI - TC bootloader entry on reset mod
141 ldr r0, =0x1FFFF000 // HJI - TC bootloader entry on reset mod
142 ldr sp,[r0, #0] // HJI - TC bootloader entry on reset mod
143 ldr r0,[r0, #4] // HJI - TC bootloader entry on reset mod
144 bx r0 // HJI - TC bootloader entry on reset mod
146 .size Reset_Handler, .-Reset_Handler
149 * @brief This is the code that gets called when the processor receives an
150 * unexpected interrupt. This simply enters an infinite loop, preserving
151 * the system state for examination by a debugger.
156 .section .text.Default_Handler,"ax",%progbits
160 .size Default_Handler, .-Default_Handler
161 /******************************************************************************
163 * The minimal vector table for a Cortex M3. Note that the proper constructs
164 * must be placed on this to ensure that it ends up at physical address
167 ******************************************************************************/
168 .section .isr_vector,"a",%progbits
169 .type g_pfnVectors, %object
170 .size g_pfnVectors, .-g_pfnVectors
177 .word HardFault_Handler
178 .word MemManage_Handler
179 .word BusFault_Handler
180 .word UsageFault_Handler
186 .word DebugMon_Handler
189 .word SysTick_Handler
190 .word WWDG_IRQHandler
192 .word TAMPER_IRQHandler
194 .word FLASH_IRQHandler
196 .word EXTI0_IRQHandler
197 .word EXTI1_IRQHandler
198 .word EXTI2_IRQHandler
199 .word EXTI3_IRQHandler
200 .word EXTI4_IRQHandler
201 .word DMA1_Channel1_IRQHandler
202 .word DMA1_Channel2_IRQHandler
203 .word DMA1_Channel3_IRQHandler
204 .word DMA1_Channel4_IRQHandler
205 .word DMA1_Channel5_IRQHandler
206 .word DMA1_Channel6_IRQHandler
207 .word DMA1_Channel7_IRQHandler
208 .word ADC1_2_IRQHandler
209 .word USB_HP_CAN1_TX_IRQHandler
210 .word USB_LP_CAN1_RX0_IRQHandler
211 .word CAN1_RX1_IRQHandler
212 .word CAN1_SCE_IRQHandler
213 .word EXTI9_5_IRQHandler
214 .word TIM1_BRK_IRQHandler
215 .word TIM1_UP_IRQHandler
216 .word TIM1_TRG_COM_IRQHandler
217 .word TIM1_CC_IRQHandler
218 .word TIM2_IRQHandler
219 .word TIM3_IRQHandler
220 .word TIM4_IRQHandler
221 .word I2C1_EV_IRQHandler
222 .word I2C1_ER_IRQHandler
223 .word I2C2_EV_IRQHandler
224 .word I2C2_ER_IRQHandler
225 .word SPI1_IRQHandler
226 .word SPI2_IRQHandler
227 .word USART1_IRQHandler
228 .word USART2_IRQHandler
229 .word USART3_IRQHandler
230 .word EXTI15_10_IRQHandler
231 .word RTCAlarm_IRQHandler
232 .word USBWakeUp_IRQHandler
240 .word BootRAM /* @0x108. This is for boot in RAM mode for
241 STM32F10x Medium Density devices. */
243 /*******************************************************************************
245 * Provide weak aliases for each Exception handler to the Default_Handler.
246 * As they are weak aliases, any function with the same name will override
249 *******************************************************************************/
252 .thumb_set NMI_Handler,Default_Handler
254 .weak HardFault_Handler
255 .thumb_set HardFault_Handler,Default_Handler
257 .weak MemManage_Handler
258 .thumb_set MemManage_Handler,Default_Handler
260 .weak BusFault_Handler
261 .thumb_set BusFault_Handler,Default_Handler
263 .weak UsageFault_Handler
264 .thumb_set UsageFault_Handler,Default_Handler
267 .thumb_set SVC_Handler,Default_Handler
269 .weak DebugMon_Handler
270 .thumb_set DebugMon_Handler,Default_Handler
273 .thumb_set PendSV_Handler,Default_Handler
275 .weak SysTick_Handler
276 .thumb_set SysTick_Handler,Default_Handler
278 .weak WWDG_IRQHandler
279 .thumb_set WWDG_IRQHandler,Default_Handler
282 .thumb_set PVD_IRQHandler,Default_Handler
284 .weak TAMPER_IRQHandler
285 .thumb_set TAMPER_IRQHandler,Default_Handler
288 .thumb_set RTC_IRQHandler,Default_Handler
290 .weak FLASH_IRQHandler
291 .thumb_set FLASH_IRQHandler,Default_Handler
294 .thumb_set RCC_IRQHandler,Default_Handler
296 .weak EXTI0_IRQHandler
297 .thumb_set EXTI0_IRQHandler,Default_Handler
299 .weak EXTI1_IRQHandler
300 .thumb_set EXTI1_IRQHandler,Default_Handler
302 .weak EXTI2_IRQHandler
303 .thumb_set EXTI2_IRQHandler,Default_Handler
305 .weak EXTI3_IRQHandler
306 .thumb_set EXTI3_IRQHandler,Default_Handler
308 .weak EXTI4_IRQHandler
309 .thumb_set EXTI4_IRQHandler,Default_Handler
311 .weak DMA1_Channel1_IRQHandler
312 .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
314 .weak DMA1_Channel2_IRQHandler
315 .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
317 .weak DMA1_Channel3_IRQHandler
318 .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
320 .weak DMA1_Channel4_IRQHandler
321 .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
323 .weak DMA1_Channel5_IRQHandler
324 .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
326 .weak DMA1_Channel6_IRQHandler
327 .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
329 .weak DMA1_Channel7_IRQHandler
330 .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
332 .weak ADC1_2_IRQHandler
333 .thumb_set ADC1_2_IRQHandler,Default_Handler
335 .weak USB_HP_CAN1_TX_IRQHandler
336 .thumb_set USB_HP_CAN1_TX_IRQHandler,Default_Handler
338 .weak USB_LP_CAN1_RX0_IRQHandler
339 .thumb_set USB_LP_CAN1_RX0_IRQHandler,Default_Handler
341 .weak CAN1_RX1_IRQHandler
342 .thumb_set CAN1_RX1_IRQHandler,Default_Handler
344 .weak CAN1_SCE_IRQHandler
345 .thumb_set CAN1_SCE_IRQHandler,Default_Handler
347 .weak EXTI9_5_IRQHandler
348 .thumb_set EXTI9_5_IRQHandler,Default_Handler
350 .weak TIM1_BRK_IRQHandler
351 .thumb_set TIM1_BRK_IRQHandler,Default_Handler
353 .weak TIM1_UP_IRQHandler
354 .thumb_set TIM1_UP_IRQHandler,Default_Handler
356 .weak TIM1_TRG_COM_IRQHandler
357 .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
359 .weak TIM1_CC_IRQHandler
360 .thumb_set TIM1_CC_IRQHandler,Default_Handler
362 .weak TIM2_IRQHandler
363 .thumb_set TIM2_IRQHandler,Default_Handler
365 .weak TIM3_IRQHandler
366 .thumb_set TIM3_IRQHandler,Default_Handler
368 .weak TIM4_IRQHandler
369 .thumb_set TIM4_IRQHandler,Default_Handler
371 .weak I2C1_EV_IRQHandler
372 .thumb_set I2C1_EV_IRQHandler,Default_Handler
374 .weak I2C1_ER_IRQHandler
375 .thumb_set I2C1_ER_IRQHandler,Default_Handler
377 .weak I2C2_EV_IRQHandler
378 .thumb_set I2C2_EV_IRQHandler,Default_Handler
380 .weak I2C2_ER_IRQHandler
381 .thumb_set I2C2_ER_IRQHandler,Default_Handler
383 .weak SPI1_IRQHandler
384 .thumb_set SPI1_IRQHandler,Default_Handler
386 .weak SPI2_IRQHandler
387 .thumb_set SPI2_IRQHandler,Default_Handler
389 .weak USART1_IRQHandler
390 .thumb_set USART1_IRQHandler,Default_Handler
392 .weak USART2_IRQHandler
393 .thumb_set USART2_IRQHandler,Default_Handler
395 .weak USART3_IRQHandler
396 .thumb_set USART3_IRQHandler,Default_Handler
398 .weak EXTI15_10_IRQHandler
399 .thumb_set EXTI15_10_IRQHandler,Default_Handler
401 .weak RTCAlarm_IRQHandler
402 .thumb_set RTCAlarm_IRQHandler,Default_Handler
404 .weak USBWakeUp_IRQHandler
405 .thumb_set USBWakeUp_IRQHandler,Default_Handler
407 /******************* (C) COPYRIGHT 2011 STMicroelectronics *****END OF FILE****/