src/main/target/NUCLEOH725ZG/target.h

   1 /*
   2  * This file is part of Cleanflight and Betaflight.
   3  *
   4  * Cleanflight and Betaflight are free software. You can redistribute
   5  * this software and/or modify this software under the terms of the
   6  * GNU General Public License as published by the Free Software
   7  * Foundation, either version 3 of the License, or (at your option)
   8  * any later version.
   9  *
  10  * Cleanflight and Betaflight are distributed in the hope that they
  11  * will be useful, but WITHOUT ANY WARRANTY; without even the implied
  12  * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  13  * See the GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this software.
  17  *
  18  * If not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 /*
  22  * Note about "Nucleo-H725ZG"
  23  *
  24  * Nucleo-H725ZG is Nucleo-H7A3ZI-Q board transplanted with STM32H725ZG.
  25  * STM32H7A3ZI and STM32H725ZG are drop-in compatible, except for pin 119;
  26  * VDDMMC (supply) on H723 and VDD (supply) on H725. Since Nucleo-H723ZG connects
  27  * VDD to pin 119, the board is fully compatible with H725ZG.
  28  */
  29
  30 #pragma once
  31
  32 #define TARGET_BOARD_IDENTIFIER "H725"
  33 #define USBD_PRODUCT_STRING "Nucleo-H725"
  34
  35 #define USE_TARGET_CONFIG
  36
  37 #define LED0_PIN                PB0
  38 #define LED1_PIN                PB7 // PE1 on NUCLEO-H743ZI2 (may collide with UART8_TX) XXX How about H7A3 case?
  39 //#define LED2_PIN                PB14 // SDMMC2_D0
  40
  41 // Nucleo-H7A3 has one button (The blue USER button).
  42 // Force two buttons to look at the single button so config reset on button works
  43 #define USE_BUTTONS
  44 #define BUTTON_A_PIN            PC13
  45 #define BUTTON_A_PIN_INVERTED // Active high
  46 #define BUTTON_B_PIN            PC13
  47 #define BUTTON_B_PIN_INVERTED // Active high
  48
  49 #define USE_BEEPER
  50 #define BEEPER_PIN              PE3
  51 #define BEEPER_INVERTED
  52
  53 #define USE_UART
  54
  55 #define USE_UART1
  56 #define UART1_RX_PIN            PA10
  57 #define UART1_TX_PIN            PA9
  58
  59 #define USE_UART2
  60 #define UART2_RX_PIN            NONE // PD6, collide with SDMMC2_CK
  61 #define UART2_TX_PIN            PD5
  62
  63 #define USE_UART3
  64 #define UART3_RX_PIN            PD9 // Virtual COM port on NUCLEO-H7A3ZI-Q
  65 #define UART3_TX_PIN            PD8 // Virtual COM port on NUCLEO-H7A3ZI-Q
  66
  67 #define USE_UART4
  68 #define UART4_RX_PIN            PC11
  69 #define UART4_TX_PIN            PC10
  70
  71 #define USE_UART5
  72 #define UART5_RX_PIN            PD2
  73 #define UART5_TX_PIN            PC12
  74
  75 #define USE_UART6
  76 #define UART6_RX_PIN            PC7
  77 #define UART6_TX_PIN            PC6
  78
  79 #define USE_UART7
  80 #define UART7_RX_PIN            PE7
  81 #define UART7_TX_PIN            PE8
  82
  83 #define USE_UART8
  84 #define UART8_RX_PIN            PE0
  85 #define UART8_TX_PIN            PE1
  86
  87 #define USE_LPUART1
  88 #define LPUART1_RX_PIN          PB7 // PA10 (Shared with UART1)
  89 #define LPUART1_TX_PIN          PB6 // PA9 (Shared with UART1)
  90
  91 #define USE_VCP
  92
  93 #define USE_SOFTSERIAL1
  94 #define USE_SOFTSERIAL2
  95
  96 #define SERIAL_PORT_COUNT       12
  97
  98 #define USE_SPI
  99
 100 #define USE_SPI_DEVICE_1
 101 #define SPI1_SCK_PIN            PB3
 102 #define SPI1_MISO_PIN           PB4
 103 #define SPI1_MOSI_PIN           PB5
 104
 105 #define USE_SPI_DEVICE_2
 106 #define SPI2_SCK_PIN            NONE
 107 #define SPI2_MISO_PIN           NONE
 108 #define SPI2_MOSI_PIN           NONE
 109
 110 #define USE_SPI_DEVICE_3
 111 #define SPI3_SCK_PIN            PC10 // PC10
 112 #define SPI3_MISO_PIN           PC11 // PC11
 113 #define SPI3_MOSI_PIN           PC12 // PC12
 114
 115 #define USE_SPI_DEVICE_4
 116 #define SPI4_SCK_PIN            NONE
 117 #define SPI4_MISO_PIN           NONE
 118 #define SPI4_MOSI_PIN           NONE
 119
 120 #define USE_SPI_DEVICE_5
 121 #define SPI5_SCK_PIN            NONE
 122 #define SPI5_MISO_PIN           NONE
 123 #define SPI5_MOSI_PIN           NONE
 124
 125 #define USE_SPI_DEVICE_6
 126 #define SPI6_SCK_PIN            NONE
 127 #define SPI6_MISO_PIN           NONE
 128 #define SPI6_MOSI_PIN           NONE
 129
 130 // #define USE_QUADSPI
 131 //#define USE_QUADSPI_DEVICE_1
 132
 133 #define QUADSPI1_SCK_PIN        NONE // PB2
 134
 135 #define QUADSPI1_BK1_IO0_PIN    NONE // PD11
 136 #define QUADSPI1_BK1_IO1_PIN    NONE // PD12
 137 #define QUADSPI1_BK1_IO2_PIN    NONE // PE2
 138 #define QUADSPI1_BK1_IO3_PIN    NONE // PD13
 139 #define QUADSPI1_BK1_CS_PIN     NONE // PB10
 140
 141 #define QUADSPI1_BK2_IO0_PIN    NONE // PE7
 142 #define QUADSPI1_BK2_IO1_PIN    NONE // PE8
 143 #define QUADSPI1_BK2_IO2_PIN    NONE // PE9
 144 #define QUADSPI1_BK2_IO3_PIN    NONE // PE10
 145 #define QUADSPI1_BK2_CS_PIN     NONE // NONE
 146
 147 #define QUADSPI1_MODE QUADSPI_MODE_BK1_ONLY
 148 #define QUADSPI1_CS_FLAGS (QUADSPI_BK1_CS_HARDWARE | QUADSPI_BK2_CS_NONE | QUADSPI_CS_MODE_LINKED)
 149
 150 #if !defined(NUCLEOH7A3_RAMBASED)
 151
 152 #define USE_SDCARD
 153 #define USE_SDCARD_SDIO
 154 #define SDCARD_DETECT_PIN       NONE
 155
 156 // SDMMC1
 157 // CK  PC12
 158 // CMD PD2
 159 // D0  PC8
 160 // D1  PC9
 161 // D2  PC10
 162 // D3  PC11
 163
 164 // SDIO configuration for SDMMC1, 1-bit width
 165 #define SDIO_DEVICE             SDIODEV_2 // SDIODEV_1 (for SDMMC1) or SDIODEV_2 (for SDMMC2) (or SDIOINVALID)
 166 #define SDIO_USE_4BIT           false
 167 #define SDIO_CK_PIN             PD6       // SDMMC1: PC12  SDMMC2: PC1 or PD6
 168 #define SDIO_CMD_PIN            PD7       // SDMMC1: PD2   SDMMC2: PA0 or PD7
 169 #define SDIO_D0_PIN             PB14      // SDMMC1: PC8   SDMMC2: PB14
 170 #define SDIO_D1_PIN             NONE      // SDMMC1: PC9   SDMMC2: PB15
 171 #define SDIO_D2_PIN             NONE      // SDMMC1: PC10  SDMMC2: PB3
 172 #define SDIO_D3_PIN             NONE      // SDMMC2: PC11  SDMMC2: PB4
 173
 174 #define USE_BLACKBOX
 175 #define ENABLE_BLACKBOX_LOGGING_ON_SDCARD_BY_DEFAULT
 176 #endif
 177
 178 #define USE_I2C
 179 #define USE_I2C_DEVICE_1
 180 #define I2C1_SCL                PB8
 181 #define I2C1_SDA                PB9
 182 #define I2C_DEVICE (I2CDEV_1)
 183
 184 #define USE_MAG
 185 #define USE_MAG_HMC5883
 186 #define USE_MAG_SPI_HMC5883
 187 #define HMC5883_SPI_INSTANCE    NULL
 188 #define HMC5883_CS_PIN          NONE
 189
 190 #define USE_BARO
 191 #define USE_BARO_LPS
 192 #define USE_BARO_BMP085
 193 #define USE_BARO_BMP280
 194 #define USE_BARO_BMP388
 195 #define USE_BARO_MS5611
 196 #define USE_BARO_SPI_BMP280
 197 #define BMP280_SPI_INSTANCE     NULL
 198 #define BMP280_CS_PIN           NONE
 199
 200 #define USE_GYRO
 201 #define USE_MULTI_GYRO
 202 #define USE_ACC
 203
 204 #define USE_FAKE_GYRO
 205 #define USE_FAKE_ACC
 206 #define USE_GYRO_SPI_MPU6000
 207 #define USE_ACC_SPI_MPU6000
 208 #define USE_GYRO_SPI_MPU6500
 209 #define USE_ACC_SPI_MPU6500
 210 #define USE_GYRO_SPI_MPU9250
 211 #define USE_ACC_SPI_MPU9250
 212 #define USE_GYRO_SPI_ICM42605
 213 #define USE_ACC_SPI_ICM42605
 214 #define USE_GYRO_SPI_ICM42688P
 215 #define USE_ACC_SPI_ICM42688P
 216
 217 #define GYRO_1_CS_PIN           PD15
 218 #define GYRO_1_SPI_INSTANCE     SPI1
 219
 220 // I2C acc/gyro test, may require to activate
 221 // set gyro_x_bustype = I2C
 222 // set gyro_x_i2cBus = <Bus ordinal of I2C_DEVICE>
 223 //#define USE_GYRO_MPU6050
 224 //#define USE_ACC_MPU6050
 225
 226 #define USE_FLASH_CHIP
 227 #define USE_FLASH_M25P16
 228 #define USE_FLASH_W25M
 229 #define FLASH_SPI_INSTANCE      NULL
 230 #define FLASH_CS_PIN            NONE
 231 #define USE_FLASHFS
 232
 233 #define USE_BRUSHED_ESC_AUTODETECT  // Detect if brushed motors are connected and set defaults appropriately to avoid motors spinning on boot
 234 #define USE_GYRO_REGISTER_DUMP  // Adds gyroregisters command to cli to dump configured register values
 235 #define USE_TIMER
 236 #define USE_PWM_OUTPUT
 237 #define USE_MOTOR
 238 #define USE_EXTI
 239
 240 #define USE_RANGEFINDER
 241 #define USE_RANGEFINDER_HCSR04
 242 #define USE_RANGEFINDER_TF
 243
 244 #define USE_TRANSPONDER
 245
 246 #define USE_MAX7456
 247 #define MAX7456_SPI_INSTANCE    NULL // SPI3
 248 #define MAX7456_SPI_CS_PIN      NONE // PC9
 249
 250 #define USE_I2C_OLED_DISPLAY
 251
 252 #define USE_ADC
 253
 254 #define ADC1_INSTANCE ADC1
 255 #define ADC2_INSTANCE ADC2
 256 #define ADC3_INSTANCE ADC3
 257
 258 // DMA stream assignmnets
 259 #define VBAT_ADC_PIN            PB1  // ADC1
 260 #define CURRENT_METER_ADC_PIN   PC0  // ADC1
 261 #define RSSI_ADC_PIN            PF14 // ADC2
 262 #define EXTERNAL1_ADC_PIN       PC3  // ADC3
 263
 264 #define DEFAULT_VOLTAGE_METER_SOURCE VOLTAGE_METER_ADC
 265 #define DEFAULT_CURRENT_METER_SOURCE CURRENT_METER_ADC
 266
 267 #define USE_DSHOT
 268 #define USE_DSHOT_DMAR
 269
 270 #define USE_DMA
 271
 272 // Thanks to DMAMUX, H7 does not have limitations on DMA stream assignments to devices (except for collisions among them).
 273 //#define UART1_TX_DMA_OPT        0
 274 //#define UART2_TX_DMA_OPT        1
 275 //#define UART3_TX_DMA_OPT        2
 276 //#define UART4_TX_DMA_OPT        3
 277 //#define UART5_TX_DMA_OPT        4
 278 //#define UART6_TX_DMA_OPT        5
 279 //#define UART7_TX_DMA_OPT        6
 280 //#define UART8_TX_DMA_OPT        7
 281 #define ADC1_DMA_OPT 8
 282 #define ADC2_DMA_OPT 9
 283 #define ADC3_DMA_OPT 10
 284
 285 #define DEFAULT_FEATURE (FEATURE_OSD)
 286
 287 #define TARGET_IO_PORTA 0xffff
 288 #define TARGET_IO_PORTB 0xffff
 289 #define TARGET_IO_PORTC 0xffff
 290 #define TARGET_IO_PORTD 0xffff
 291 #define TARGET_IO_PORTE 0xffff
 292 #define TARGET_IO_PORTF 0xffff
 293 #define TARGET_IO_PORTG 0xffff
 294
 295 #define USABLE_TIMER_CHANNEL_COUNT 14
 296
 297 #define USED_TIMERS  ( TIM_N(1) | TIM_N(2) | TIM_N(3) | TIM_N(5) | TIM_N(8) | TIM_N(12) )