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[H7][LIB][SDMMC] Workaround for SDMMC Errata 2.11.4
[betaflight.git] / lib / main / STM32H7 / Drivers / STM32H7xx_HAL_Driver / Src / stm32h7xx_ll_sdmmc.c
blobf929d481fef37a50c3ed2b1c0198ed446ac266c3
1 /**
2 ******************************************************************************
3 * @file stm32h7xx_ll_sdmmc.c
4 * @author MCD Application Team
5 * @brief SDMMC Low Layer HAL module driver.
6 *
7 * This file provides firmware functions to manage the following
8 * functionalities of the SDMMC peripheral:
9 * + Initialization/de-initialization functions
10 * + I/O operation functions
11 * + Peripheral Control functions
12 * + Peripheral State functions
13 *
14 @verbatim
15 ==============================================================================
16 ##### SDMMC peripheral features #####
17 ==============================================================================
18 [..] The SD/SDMMC MMC card host interface (SDMMC) provides an interface between the AHB
19 peripheral bus and MultiMedia cards (MMCs), SD memory cards, SDMMC cards and CE-ATA
20 devices.
21
22 [..] The SDMMC features include the following:
23 (+) Full compliance with MultiMediaCard System Specification Version 4.51. Card support
24 for three different databus modes: 1-bit (default), 4-bit and 8-bit.
25 (+) Full compatibility with previous versions of MultiMediaCards (backward compatibility).
26 (+) Full compliance with SD memory card specifications version 4.1.
27 (SDR104 SDMMC_CK speed limited to maximum allowed IO speed, SPI mode and
28 UHS-II mode not supported).
29 (+) Full compliance with SDIO card specification version 4.0. Card support
30 for two different databus modes: 1-bit (default) and 4-bit.
31 (SDR104 SDMMC_CK speed limited to maximum allowed IO speed, SPI mode and
32 UHS-II mode not supported).
33 (+) Data transfer up to 208 Mbyte/s for the 8 bit mode. (depending maximum allowed IO speed).
34 (+) Data and command output enable signals to control external bidirectional drivers
35
36 ##### How to use this driver #####
37 ==============================================================================
38 [..]
39 This driver is a considered as a driver of service for external devices drivers
40 that interfaces with the SDMMC peripheral.
41 According to the device used (SD card/ MMC card / SDMMC card ...), a set of APIs
42 is used in the device's driver to perform SDMMC operations and functionalities.
43
44 This driver is almost transparent for the final user, it is only used to implement other
45 functionalities of the external device.
46
47 [..]
48 (+) The SDMMC clock is coming from output of PLL1_Q or PLL2_R.
49 Before start working with SDMMC peripheral make sure that the PLL is well configured.
50 The SDMMC peripheral uses two clock signals:
51 (++) PLL1_Q bus clock (default after reset)
52 (++) PLL2_R bus clock
53
54 (+) Enable/Disable peripheral clock using RCC peripheral macros related to SDMMC
55 peripheral.
56
57 (+) Enable the Power ON State using the SDMMC_PowerState_ON(SDMMCx)
58 function and disable it using the function SDMMC_PowerState_OFF(SDMMCx).
59
60 (+) Enable/Disable the peripheral interrupts using the macros __SDMMC_ENABLE_IT(hSDMMC, IT)
61 and __SDMMC_DISABLE_IT(hSDMMC, IT) if you need to use interrupt mode.
62
63 (+) When using the DMA mode
64 (++) Configure the IDMA mode (Single buffer or double)
65 (++) Configure the buffer address
66 (++) Configure Data Path State Machine
67
68 (+) To control the CPSM (Command Path State Machine) and send
69 commands to the card use the SDMMC_SendCommand(SDMMCx),
70 SDMMC_GetCommandResponse() and SDMMC_GetResponse() functions. First, user has
71 to fill the command structure (pointer to SDMMC_CmdInitTypeDef) according
72 to the selected command to be sent.
73 The parameters that should be filled are:
74 (++) Command Argument
75 (++) Command Index
76 (++) Command Response type
77 (++) Command Wait
78 (++) CPSM Status (Enable or Disable).
79
80 -@@- To check if the command is well received, read the SDMMC_CMDRESP
81 register using the SDMMC_GetCommandResponse().
82 The SDMMC responses registers (SDMMC_RESP1 to SDMMC_RESP2), use the
83 SDMMC_GetResponse() function.
84
85 (+) To control the DPSM (Data Path State Machine) and send/receive
86 data to/from the card use the SDMMC_DataConfig(), SDMMC_GetDataCounter(),
87 SDMMC_ReadFIFO(), SDMMC_WriteFIFO() and SDMMC_GetFIFOCount() functions.
88
89 *** Read Operations ***
90 =======================
91 [..]
92 (#) First, user has to fill the data structure (pointer to
93 SDMMC_DataInitTypeDef) according to the selected data type to be received.
94 The parameters that should be filled are:
95 (++) Data TimeOut
96 (++) Data Length
97 (++) Data Block size
98 (++) Data Transfer direction: should be from card (To SDMMC)
99 (++) Data Transfer mode
100 (++) DPSM Status (Enable or Disable)
101
102 (#) Configure the SDMMC resources to receive the data from the card
103 according to selected transfer mode (Refer to Step 8, 9 and 10).
104
105 (#) Send the selected Read command (refer to step 11).
106
107 (#) Use the SDMMC flags/interrupts to check the transfer status.
108
109 *** Write Operations ***
110 ========================
111 [..]
112 (#) First, user has to fill the data structure (pointer to
113 SDMMC_DataInitTypeDef) according to the selected data type to be received.
114 The parameters that should be filled are:
115 (++) Data TimeOut
116 (++) Data Length
117 (++) Data Block size
118 (++) Data Transfer direction: should be to card (To CARD)
119 (++) Data Transfer mode
120 (++) DPSM Status (Enable or Disable)
121
122 (#) Configure the SDMMC resources to send the data to the card according to
123 selected transfer mode.
124
125 (#) Send the selected Write command.
126
127 (#) Use the SDMMC flags/interrupts to check the transfer status.
128
129 *** Command management operations ***
130 =====================================
131 [..]
132 (#) The commands used for Read/Write/Erase operations are managed in
133 separate functions.
134 Each function allows to send the needed command with the related argument,
135 then check the response.
136 By the same approach, you could implement a command and check the response.
137
138 @endverbatim
139 ******************************************************************************
140 * @attention
141 *
142 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
143 * All rights reserved.</center></h2>
144 *
145 * This software component is licensed by ST under BSD 3-Clause license,
146 * the "License"; You may not use this file except in compliance with the
147 * License. You may obtain a copy of the License at:
148 * opensource.org/licenses/BSD-3-Clause
149 *
150 ******************************************************************************
151 */
152
153 /* Includes ------------------------------------------------------------------*/
154 #include "stm32h7xx_hal.h"
155
156 /** @addtogroup STM32H7xx_HAL_Driver
157 * @{
158 */
159
160 /** @defgroup SDMMC_LL SDMMC Low Layer
161 * @brief Low layer module for SD
162 * @{
163 */
164
165 #if defined (HAL_SD_MODULE_ENABLED) || defined (HAL_MMC_MODULE_ENABLED)
166
167 /* Private typedef -----------------------------------------------------------*/
168 /* Private define ------------------------------------------------------------*/
169 /* Private macro -------------------------------------------------------------*/
170 /* Private variables ---------------------------------------------------------*/
171 /* Private function prototypes -----------------------------------------------*/
172 static uint32_t SDMMC_GetCmdError(SDMMC_TypeDef *SDMMCx);
173 static uint32_t SDMMC_GetCmdResp1(SDMMC_TypeDef *SDMMCx, uint8_t SD_CMD, uint32_t Timeout);
174 static uint32_t SDMMC_GetCmdResp2(SDMMC_TypeDef *SDMMCx);
175 static uint32_t SDMMC_GetCmdResp3(SDMMC_TypeDef *SDMMCx);
176 static uint32_t SDMMC_GetCmdResp7(SDMMC_TypeDef *SDMMCx);
177 static uint32_t SDMMC_GetCmdResp6(SDMMC_TypeDef *SDMMCx, uint8_t SD_CMD, uint16_t *pRCA);
178
179 /* Exported functions --------------------------------------------------------*/
180
181 /** @defgroup SDMMC_LL_Exported_Functions SDMMC Low Layer Exported Functions
182 * @{
183 */
184
185 /** @defgroup HAL_SDMMC_LL_Group1 Initialization de-initialization functions
186 * @brief Initialization and Configuration functions
187 *
188 @verbatim
189 ===============================================================================
190 ##### Initialization/de-initialization functions #####
191 ===============================================================================
192 [..] This section provides functions allowing to:
193
194 @endverbatim
195 * @{
196 */
197
198 /**
199 * @brief Initializes the SDMMC according to the specified
200 * parameters in the SDMMC_InitTypeDef and create the associated handle.
201 * @param SDMMCx: Pointer to SDMMC register base
202 * @param Init: SDMMC initialization structure
203 * @retval HAL status
204 */
205 HAL_StatusTypeDef SDMMC_Init(SDMMC_TypeDef *SDMMCx, SDMMC_InitTypeDef Init)
206 {
207 uint32_t tmpreg = 0;
208
209 /* Check the parameters */
210 assert_param(IS_SDMMC_ALL_INSTANCE(SDMMCx));
211 assert_param(IS_SDMMC_CLOCK_EDGE(Init.ClockEdge));
212 assert_param(IS_SDMMC_CLOCK_POWER_SAVE(Init.ClockPowerSave));
213 assert_param(IS_SDMMC_BUS_WIDE(Init.BusWide));
214 assert_param(IS_SDMMC_HARDWARE_FLOW_CONTROL(Init.HardwareFlowControl));
215 assert_param(IS_SDMMC_CLKDIV(Init.ClockDiv));
216
217 /* Set SDMMC configuration parameters */
218 tmpreg |= (Init.ClockEdge |\
219 Init.ClockPowerSave |\
220 Init.BusWide |\
221 Init.HardwareFlowControl |\
222 Init.ClockDiv
223 );
224
225 /* Write to SDMMC CLKCR */
226 MODIFY_REG(SDMMCx->CLKCR, CLKCR_CLEAR_MASK, tmpreg);
227
228 return HAL_OK;
229 }
230
231
232 /**
233 * @}
234 */
235
236 /** @defgroup HAL_SDMMC_LL_Group2 IO operation functions
237 * @brief Data transfers functions
238 *
239 @verbatim
240 ===============================================================================
241 ##### I/O operation functions #####
242 ===============================================================================
243 [..]
244 This subsection provides a set of functions allowing to manage the SDMMC data
245 transfers.
246
247 @endverbatim
248 * @{
249 */
250
251 /**
252 * @brief Read data (word) from Rx FIFO in blocking mode (polling)
253 * @param SDMMCx: Pointer to SDMMC register base
254 * @retval HAL status
255 */
256 uint32_t SDMMC_ReadFIFO(SDMMC_TypeDef *SDMMCx)
257 {
258 /* Read data from Rx FIFO */
259 return (SDMMCx->FIFO);
260 }
261
262 /**
263 * @brief Write data (word) to Tx FIFO in blocking mode (polling)
264 * @param SDMMCx: Pointer to SDMMC register base
265 * @param pWriteData: pointer to data to write
266 * @retval HAL status
267 */
268 HAL_StatusTypeDef SDMMC_WriteFIFO(SDMMC_TypeDef *SDMMCx, uint32_t *pWriteData)
269 {
270 /* Write data to FIFO */
271 SDMMCx->FIFO = *pWriteData;
272
273 return HAL_OK;
274 }
275
276 /**
277 * @}
278 */
279
280 /** @defgroup HAL_SDMMC_LL_Group3 Peripheral Control functions
281 * @brief management functions
282 *
283 @verbatim
284 ===============================================================================
285 ##### Peripheral Control functions #####
286 ===============================================================================
287 [..]
288 This subsection provides a set of functions allowing to control the SDMMC data
289 transfers.
290
291 @endverbatim
292 * @{
293 */
294
295 /**
296 * @brief Set SDMMC Power state to ON.
297 * @param SDMMCx: Pointer to SDMMC register base
298 * @retval HAL status
299 */
300 HAL_StatusTypeDef SDMMC_PowerState_ON(SDMMC_TypeDef *SDMMCx)
301 {
302 /* Set power state to ON */
303 SDMMCx->POWER |= SDMMC_POWER_PWRCTRL;
304
305 return HAL_OK;
306 }
307
308 /**
309 * @brief Set SDMMC Power state to Power-Cycle.
310 * @param SDMMCx: Pointer to SDMMC register base
311 * @retval HAL status
312 */
313 HAL_StatusTypeDef SDMMC_PowerState_Cycle(SDMMC_TypeDef *SDMMCx)
314 {
315 /* Set power state to Power Cycle*/
316 SDMMCx->POWER |= SDMMC_POWER_PWRCTRL_1;
317
318 return HAL_OK;
319 }
320
321 /**
322 * @brief Set SDMMC Power state to OFF.
323 * @param SDMMCx: Pointer to SDMMC register base
324 * @retval HAL status
325 */
326 HAL_StatusTypeDef SDMMC_PowerState_OFF(SDMMC_TypeDef *SDMMCx)
327 {
328 /* Set power state to OFF */
329 SDMMCx->POWER &= ~(SDMMC_POWER_PWRCTRL);
330
331 return HAL_OK;
332 }
333
334 /**
335 * @brief Get SDMMC Power state.
336 * @param SDMMCx: Pointer to SDMMC register base
337 * @retval Power status of the controller. The returned value can be one of the
338 * following values:
339 * - 0x00: Power OFF
340 * - 0x02: Power UP
341 * - 0x03: Power ON
342 */
343 uint32_t SDMMC_GetPowerState(SDMMC_TypeDef *SDMMCx)
344 {
345 return (SDMMCx->POWER & SDMMC_POWER_PWRCTRL);
346 }
347
348 /**
349 * @brief Configure the SDMMC command path according to the specified parameters in
350 * SDMMC_CmdInitTypeDef structure and send the command
351 * @param SDMMCx: Pointer to SDMMC register base
352 * @param Command: pointer to a SDMMC_CmdInitTypeDef structure that contains
353 * the configuration information for the SDMMC command
354 * @retval HAL status
355 */
356 HAL_StatusTypeDef SDMMC_SendCommand(SDMMC_TypeDef *SDMMCx, SDMMC_CmdInitTypeDef *Command)
357 {
358 uint32_t tmpreg = 0;
359
360 /* Check the parameters */
361 assert_param(IS_SDMMC_CMD_INDEX(Command->CmdIndex));
362 assert_param(IS_SDMMC_RESPONSE(Command->Response));
363 assert_param(IS_SDMMC_WAIT(Command->WaitForInterrupt));
364 assert_param(IS_SDMMC_CPSM(Command->CPSM));
365
366 /* Set the SDMMC Argument value */
367 SDMMCx->ARG = Command->Argument;
368
369 /* Set SDMMC command parameters */
370 tmpreg |= (uint32_t)(Command->CmdIndex |\
371 Command->Response |\
372 Command->WaitForInterrupt |\
373 Command->CPSM);
374
375 /* Write to SDMMC CMD register */
376 MODIFY_REG(SDMMCx->CMD, CMD_CLEAR_MASK, tmpreg);
377
378 return HAL_OK;
379 }
380
381 /**
382 * @brief Return the command index of last command for which response received
383 * @param SDMMCx: Pointer to SDMMC register base
384 * @retval Command index of the last command response received
385 */
386 uint8_t SDMMC_GetCommandResponse(SDMMC_TypeDef *SDMMCx)
387 {
388 return (uint8_t)(SDMMCx->RESPCMD);
389 }
390
391
392 /**
393 * @brief Return the response received from the card for the last command
394 * @param SDMMCx: Pointer to SDMMC register base
395 * @param Response: Specifies the SDMMC response register.
396 * This parameter can be one of the following values:
397 * @arg SDMMC_RESP1: Response Register 1
398 * @arg SDMMC_RESP2: Response Register 2
399 * @arg SDMMC_RESP3: Response Register 3
400 * @arg SDMMC_RESP4: Response Register 4
401 * @retval The Corresponding response register value
402 */
403 uint32_t SDMMC_GetResponse(SDMMC_TypeDef *SDMMCx, uint32_t Response)
404 {
405 uint32_t tmp;
406
407 /* Check the parameters */
408 assert_param(IS_SDMMC_RESP(Response));
409
410 /* Get the response */
411 tmp = (uint32_t)(&(SDMMCx->RESP1)) + Response;
412
413 return (*(__IO uint32_t *) tmp);
414 }
415
416 /**
417 * @brief Configure the SDMMC data path according to the specified
418 * parameters in the SDMMC_DataInitTypeDef.
419 * @param SDMMCx: Pointer to SDMMC register base
420 * @param Data : pointer to a SDMMC_DataInitTypeDef structure
421 * that contains the configuration information for the SDMMC data.
422 * @retval HAL status
423 */
424 HAL_StatusTypeDef SDMMC_ConfigData(SDMMC_TypeDef *SDMMCx, SDMMC_DataInitTypeDef* Data)
425 {
426 uint32_t tmpreg = 0;
427
428 /* Check the parameters */
429 assert_param(IS_SDMMC_DATA_LENGTH(Data->DataLength));
430 assert_param(IS_SDMMC_BLOCK_SIZE(Data->DataBlockSize));
431 assert_param(IS_SDMMC_TRANSFER_DIR(Data->TransferDir));
432 assert_param(IS_SDMMC_TRANSFER_MODE(Data->TransferMode));
433 assert_param(IS_SDMMC_DPSM(Data->DPSM));
434
435 /* Set the SDMMC Data TimeOut value */
436 SDMMCx->DTIMER = Data->DataTimeOut;
437
438 /* Set the SDMMC DataLength value */
439 SDMMCx->DLEN = Data->DataLength;
440
441 /* Set the SDMMC data configuration parameters */
442 tmpreg |= (uint32_t)(Data->DataBlockSize |\
443 Data->TransferDir |\
444 Data->TransferMode |\
445 Data->DPSM);
446
447 // DC - See errata 2.11.4 - 8 SDMMC clock cycles must elapse before DTEN can be set.
448 // 32U below is used as a VERY rough guess that the SDMMC clock is 1/4 of the sytem clock, 8 * 4 = 32 and that the
449 // assembly below only takes 1 CPU cycle to run. All of which will be wrong, but right enough most of the time, especially
450 // when considering other processing overheads.
451 register uint32_t count = 32U;
452 do
453 {
454 count--;
455 } while(count > 0);
456 // DC - See errata 2.11.4
457
458 /* Write to SDMMC DCTRL */
459 MODIFY_REG(SDMMCx->DCTRL, DCTRL_CLEAR_MASK, tmpreg);
460
461 return HAL_OK;
462
463 }
464
465 /**
466 * @brief Returns number of remaining data bytes to be transferred.
467 * @param SDMMCx: Pointer to SDMMC register base
468 * @retval Number of remaining data bytes to be transferred
469 */
470 uint32_t SDMMC_GetDataCounter(SDMMC_TypeDef *SDMMCx)
471 {
472 return (SDMMCx->DCOUNT);
473 }
474
475 /**
476 * @brief Get the FIFO data
477 * @param SDMMCx: Pointer to SDMMC register base
478 * @retval Data received
479 */
480 uint32_t SDMMC_GetFIFOCount(SDMMC_TypeDef *SDMMCx)
481 {
482 return (SDMMCx->FIFO);
483 }
484
485 /**
486 * @brief Sets one of the two options of inserting read wait interval.
487 * @param SDMMCx: Pointer to SDMMC register base
488 * @param SDMMC_ReadWaitMode: SDMMC Read Wait operation mode.
489 * This parameter can be:
490 * @arg SDMMC_READ_WAIT_MODE_CLK: Read Wait control by stopping SDMMCCLK
491 * @arg SDMMC_READ_WAIT_MODE_DATA2: Read Wait control using SDMMC_DATA2
492 * @retval None
493 */
494 HAL_StatusTypeDef SDMMC_SetSDMMCReadWaitMode(SDMMC_TypeDef *SDMMCx, uint32_t SDMMC_ReadWaitMode)
495 {
496 /* Check the parameters */
497 assert_param(IS_SDMMC_READWAIT_MODE(SDMMC_ReadWaitMode));
498
499 /* Set SDMMC read wait mode */
500 MODIFY_REG(SDMMCx->DCTRL, SDMMC_DCTRL_RWMOD, SDMMC_ReadWaitMode);
501
502 return HAL_OK;
503 }
504
505 /**
506 * @}
507 */
508
509
510 /** @defgroup HAL_SDMMC_LL_Group4 Command management functions
511 * @brief Data transfers functions
512 *
513 @verbatim
514 ===============================================================================
515 ##### Commands management functions #####
516 ===============================================================================
517 [..]
518 This subsection provides a set of functions allowing to manage the needed commands.
519
520 @endverbatim
521 * @{
522 */
523
524 /**
525 * @brief Send the Data Block Lenght command and check the response
526 * @param SDMMCx: Pointer to SDMMC register base
527 * @retval HAL status
528 */
529 uint32_t SDMMC_CmdBlockLength(SDMMC_TypeDef *SDMMCx, uint32_t BlockSize)
530 {
531 SDMMC_CmdInitTypeDef sdmmc_cmdinit;
532 uint32_t errorstate;
533
534 /* Set Block Size for Card */
535 sdmmc_cmdinit.Argument = (uint32_t)BlockSize;
536 sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SET_BLOCKLEN;
537 sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
538 sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
539 sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
540 (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
541
542 /* Check for error conditions */
543 errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_SET_BLOCKLEN, SDMMC_CMDTIMEOUT);
544
545 return errorstate;
546 }
547
548 /**
549 * @brief Send the Read Single Block command and check the response
550 * @param SDMMCx: Pointer to SDMMC register base
551 * @retval HAL status
552 */
553 uint32_t SDMMC_CmdReadSingleBlock(SDMMC_TypeDef *SDMMCx, uint32_t ReadAdd)
554 {
555 SDMMC_CmdInitTypeDef sdmmc_cmdinit;
556 uint32_t errorstate;
557
558 /* Set Block Size for Card */
559 sdmmc_cmdinit.Argument = (uint32_t)ReadAdd;
560 sdmmc_cmdinit.CmdIndex = SDMMC_CMD_READ_SINGLE_BLOCK;
561 sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
562 sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
563 sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
564 (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
565
566 /* Check for error conditions */
567 errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_READ_SINGLE_BLOCK, SDMMC_CMDTIMEOUT);
568
569 return errorstate;
570 }
571
572 /**
573 * @brief Send the Read Multi Block command and check the response
574 * @param SDMMCx: Pointer to SDMMC register base
575 * @retval HAL status
576 */
577 uint32_t SDMMC_CmdReadMultiBlock(SDMMC_TypeDef *SDMMCx, uint32_t ReadAdd)
578 {
579 SDMMC_CmdInitTypeDef sdmmc_cmdinit;
580 uint32_t errorstate;
581
582 /* Set Block Size for Card */
583 sdmmc_cmdinit.Argument = (uint32_t)ReadAdd;
584 sdmmc_cmdinit.CmdIndex = SDMMC_CMD_READ_MULT_BLOCK;
585 sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
586 sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
587 sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
588 (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
589
590 /* Check for error conditions */
591 errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_READ_MULT_BLOCK, SDMMC_CMDTIMEOUT);
592
593 return errorstate;
594 }
595
596 /**
597 * @brief Send the Write Single Block command and check the response
598 * @param SDMMCx: Pointer to SDMMC register base
599 * @retval HAL status
600 */
601 uint32_t SDMMC_CmdWriteSingleBlock(SDMMC_TypeDef *SDMMCx, uint32_t WriteAdd)
602 {
603 SDMMC_CmdInitTypeDef sdmmc_cmdinit;
604 uint32_t errorstate;
605
606 /* Set Block Size for Card */
607 sdmmc_cmdinit.Argument = (uint32_t)WriteAdd;
608 sdmmc_cmdinit.CmdIndex = SDMMC_CMD_WRITE_SINGLE_BLOCK;
609 sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
610 sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
611 sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
612 (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
613
614 /* Check for error conditions */
615 errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_WRITE_SINGLE_BLOCK, SDMMC_CMDTIMEOUT);
616
617 return errorstate;
618 }
619
620 /**
621 * @brief Send the Write Multi Block command and check the response
622 * @param SDMMCx: Pointer to SDMMC register base
623 * @retval HAL status
624 */
625 uint32_t SDMMC_CmdWriteMultiBlock(SDMMC_TypeDef *SDMMCx, uint32_t WriteAdd)
626 {
627 SDMMC_CmdInitTypeDef sdmmc_cmdinit;
628 uint32_t errorstate;
629
630 /* Set Block Size for Card */
631 sdmmc_cmdinit.Argument = (uint32_t)WriteAdd;
632 sdmmc_cmdinit.CmdIndex = SDMMC_CMD_WRITE_MULT_BLOCK;
633 sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
634 sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
635 sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
636 (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
637
638 /* Check for error conditions */
639 errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_WRITE_MULT_BLOCK, SDMMC_CMDTIMEOUT);
640
641 return errorstate;
642 }
643
644 /**
645 * @brief Send the Start Address Erase command for SD and check the response
646 * @param SDMMCx: Pointer to SDMMC register base
647 * @retval HAL status
648 */
649 uint32_t SDMMC_CmdSDEraseStartAdd(SDMMC_TypeDef *SDMMCx, uint32_t StartAdd)
650 {
651 SDMMC_CmdInitTypeDef sdmmc_cmdinit;
652 uint32_t errorstate;
653
654 /* Set Block Size for Card */
655 sdmmc_cmdinit.Argument = (uint32_t)StartAdd;
656 sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_ERASE_GRP_START;
657 sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
658 sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
659 sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
660 (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
661
662 /* Check for error conditions */
663 errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_SD_ERASE_GRP_START, SDMMC_CMDTIMEOUT);
664
665 return errorstate;
666 }
667
668 /**
669 * @brief Send the End Address Erase command for SD and check the response
670 * @param SDMMCx: Pointer to SDMMC register base
671 * @retval HAL status
672 */
673 uint32_t SDMMC_CmdSDEraseEndAdd(SDMMC_TypeDef *SDMMCx, uint32_t EndAdd)
674 {
675 SDMMC_CmdInitTypeDef sdmmc_cmdinit;
676 uint32_t errorstate;
677
678 /* Set Block Size for Card */
679 sdmmc_cmdinit.Argument = (uint32_t)EndAdd;
680 sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_ERASE_GRP_END;
681 sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
682 sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
683 sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
684 (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
685
686 /* Check for error conditions */
687 errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_SD_ERASE_GRP_END, SDMMC_CMDTIMEOUT);
688
689 return errorstate;
690 }
691
692 /**
693 * @brief Send the Start Address Erase command and check the response
694 * @param SDMMCx: Pointer to SDMMC register base
695 * @retval HAL status
696 */
697 uint32_t SDMMC_CmdEraseStartAdd(SDMMC_TypeDef *SDMMCx, uint32_t StartAdd)
698 {
699 SDMMC_CmdInitTypeDef sdmmc_cmdinit;
700 uint32_t errorstate;
701
702 /* Set Block Size for Card */
703 sdmmc_cmdinit.Argument = (uint32_t)StartAdd;
704 sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE_GRP_START;
705 sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
706 sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
707 sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
708 (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
709
710 /* Check for error conditions */
711 errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_ERASE_GRP_START, SDMMC_CMDTIMEOUT);
712
713 return errorstate;
714 }
715
716 /**
717 * @brief Send the End Address Erase command and check the response
718 * @param SDMMCx: Pointer to SDMMC register base
719 * @retval HAL status
720 */
721 uint32_t SDMMC_CmdEraseEndAdd(SDMMC_TypeDef *SDMMCx, uint32_t EndAdd)
722 {
723 SDMMC_CmdInitTypeDef sdmmc_cmdinit;
724 uint32_t errorstate;
725
726 /* Set Block Size for Card */
727 sdmmc_cmdinit.Argument = (uint32_t)EndAdd;
728 sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE_GRP_END;
729 sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
730 sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
731 sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
732 (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
733
734 /* Check for error conditions */
735 errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_ERASE_GRP_END, SDMMC_CMDTIMEOUT);
736
737 return errorstate;
738 }
739
740 /**
741 * @brief Send the Erase command and check the response
742 * @param SDMMCx: Pointer to SDMMC register base
743 * @retval HAL status
744 */
745 uint32_t SDMMC_CmdErase(SDMMC_TypeDef *SDMMCx)
746 {
747 SDMMC_CmdInitTypeDef sdmmc_cmdinit;
748 uint32_t errorstate;
749
750 /* Set Block Size for Card */
751 sdmmc_cmdinit.Argument = 0U;
752 sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ERASE;
753 sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
754 sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
755 sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
756 (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
757
758 /* Check for error conditions */
759 errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_ERASE, SDMMC_MAXERASETIMEOUT);
760
761 return errorstate;
762 }
763
764 /**
765 * @brief Send the Stop Transfer command and check the response.
766 * @param SDMMCx: Pointer to SDMMC register base
767 * @retval HAL status
768 */
769 uint32_t SDMMC_CmdStopTransfer(SDMMC_TypeDef *SDMMCx)
770 {
771 SDMMC_CmdInitTypeDef sdmmc_cmdinit;
772 uint32_t errorstate;
773
774 /* Send CMD12 STOP_TRANSMISSION */
775 sdmmc_cmdinit.Argument = 0U;
776 sdmmc_cmdinit.CmdIndex = SDMMC_CMD_STOP_TRANSMISSION;
777 sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
778 sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
779 sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
780
781 __SDMMC_CMDSTOP_ENABLE(SDMMCx);
782 __SDMMC_CMDTRANS_DISABLE(SDMMCx);
783
784 (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
785
786 /* Check for error conditions */
787 errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_STOP_TRANSMISSION, SDMMC_STOPTRANSFERTIMEOUT);
788
789 __SDMMC_CMDSTOP_DISABLE(SDMMCx);
790
791 /* Ignore Address Out Of Range Error, Not relevant at end of memory */
792 if (errorstate == SDMMC_ERROR_ADDR_OUT_OF_RANGE)
793 {
794 errorstate = SDMMC_ERROR_NONE;
795 }
796
797 return errorstate;
798 }
799
800 /**
801 * @brief Send the Select Deselect command and check the response.
802 * @param SDMMCx: Pointer to SDMMC register base
803 * @param addr: Address of the card to be selected
804 * @retval HAL status
805 */
806 uint32_t SDMMC_CmdSelDesel(SDMMC_TypeDef *SDMMCx, uint64_t Addr)
807 {
808 SDMMC_CmdInitTypeDef sdmmc_cmdinit;
809 uint32_t errorstate;
810
811 /* Send CMD7 SDMMC_SEL_DESEL_CARD */
812 sdmmc_cmdinit.Argument = (uint32_t)Addr;
813 sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEL_DESEL_CARD;
814 sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
815 sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
816 sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
817 (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
818
819 /* Check for error conditions */
820 errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_SEL_DESEL_CARD, SDMMC_CMDTIMEOUT);
821
822 return errorstate;
823 }
824
825 /**
826 * @brief Send the Go Idle State command and check the response.
827 * @param SDMMCx: Pointer to SDMMC register base
828 * @retval HAL status
829 */
830 uint32_t SDMMC_CmdGoIdleState(SDMMC_TypeDef *SDMMCx)
831 {
832 SDMMC_CmdInitTypeDef sdmmc_cmdinit;
833 uint32_t errorstate;
834
835 sdmmc_cmdinit.Argument = 0U;
836 sdmmc_cmdinit.CmdIndex = SDMMC_CMD_GO_IDLE_STATE;
837 sdmmc_cmdinit.Response = SDMMC_RESPONSE_NO;
838 sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
839 sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
840 (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
841
842 /* Check for error conditions */
843 errorstate = SDMMC_GetCmdError(SDMMCx);
844
845 return errorstate;
846 }
847
848 /**
849 * @brief Send the Operating Condition command and check the response.
850 * @param SDMMCx: Pointer to SDMMC register base
851 * @retval HAL status
852 */
853 uint32_t SDMMC_CmdOperCond(SDMMC_TypeDef *SDMMCx)
854 {
855 SDMMC_CmdInitTypeDef sdmmc_cmdinit;
856 uint32_t errorstate;
857
858 /* Send CMD8 to verify SD card interface operating condition */
859 /* Argument: - [31:12]: Reserved (shall be set to '0')
860 - [11:8]: Supply Voltage (VHS) 0x1 (Range: 2.7-3.6 V)
861 - [7:0]: Check Pattern (recommended 0xAA) */
862 /* CMD Response: R7 */
863 sdmmc_cmdinit.Argument = SDMMC_CHECK_PATTERN;
864 sdmmc_cmdinit.CmdIndex = SDMMC_CMD_HS_SEND_EXT_CSD;
865 sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
866 sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
867 sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
868 (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
869
870 /* Check for error conditions */
871 errorstate = SDMMC_GetCmdResp7(SDMMCx);
872
873 return errorstate;
874 }
875
876 /**
877 * @brief Send the Application command to verify that that the next command
878 * is an application specific com-mand rather than a standard command
879 * and check the response.
880 * @param SDMMCx: Pointer to SDMMC register base
881 * @param Argument: Command Argument
882 * @retval HAL status
883 */
884 uint32_t SDMMC_CmdAppCommand(SDMMC_TypeDef *SDMMCx, uint32_t Argument)
885 {
886 SDMMC_CmdInitTypeDef sdmmc_cmdinit;
887 uint32_t errorstate;
888
889 sdmmc_cmdinit.Argument = (uint32_t)Argument;
890 sdmmc_cmdinit.CmdIndex = SDMMC_CMD_APP_CMD;
891 sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
892 sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
893 sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
894 (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
895
896 /* Check for error conditions */
897 /* If there is a HAL_ERROR, it is a MMC card, else
898 it is a SD card: SD card 2.0 (voltage range mismatch)
899 or SD card 1.x */
900 errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_APP_CMD, SDMMC_CMDTIMEOUT);
901
902 return errorstate;
903 }
904
905 /**
906 * @brief Send the command asking the accessed card to send its operating
907 * condition register (OCR)
908 * @param SDMMCx: Pointer to SDMMC register base
909 * @param Argument: Command Argument
910 * @retval HAL status
911 */
912 uint32_t SDMMC_CmdAppOperCommand(SDMMC_TypeDef *SDMMCx, uint32_t Argument)
913 {
914 SDMMC_CmdInitTypeDef sdmmc_cmdinit;
915 uint32_t errorstate;
916
917 sdmmc_cmdinit.Argument = Argument;
918 sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_OP_COND;
919 sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
920 sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
921 sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
922 (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
923
924 /* Check for error conditions */
925 errorstate = SDMMC_GetCmdResp3(SDMMCx);
926
927 return errorstate;
928 }
929
930 /**
931 * @brief Send the Bus Width command and check the response.
932 * @param SDMMCx: Pointer to SDMMC register base
933 * @param BusWidth: BusWidth
934 * @retval HAL status
935 */
936 uint32_t SDMMC_CmdBusWidth(SDMMC_TypeDef *SDMMCx, uint32_t BusWidth)
937 {
938 SDMMC_CmdInitTypeDef sdmmc_cmdinit;
939 uint32_t errorstate;
940
941 sdmmc_cmdinit.Argument = (uint32_t)BusWidth;
942 sdmmc_cmdinit.CmdIndex = SDMMC_CMD_APP_SD_SET_BUSWIDTH;
943 sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
944 sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
945 sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
946 (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
947
948 /* Check for error conditions */
949 errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_APP_SD_SET_BUSWIDTH, SDMMC_CMDTIMEOUT);
950
951 return errorstate;
952 }
953
954 /**
955 * @brief Send the Send SCR command and check the response.
956 * @param SDMMCx: Pointer to SDMMC register base
957 * @retval HAL status
958 */
959 uint32_t SDMMC_CmdSendSCR(SDMMC_TypeDef *SDMMCx)
960 {
961 SDMMC_CmdInitTypeDef sdmmc_cmdinit;
962 uint32_t errorstate;
963
964 /* Send CMD51 SD_APP_SEND_SCR */
965 sdmmc_cmdinit.Argument = 0U;
966 sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_SEND_SCR;
967 sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
968 sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
969 sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
970 (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
971
972 /* Check for error conditions */
973 errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_SD_APP_SEND_SCR, SDMMC_CMDTIMEOUT);
974
975 return errorstate;
976 }
977
978 /**
979 * @brief Send the Send CID command and check the response.
980 * @param SDMMCx: Pointer to SDMMC register base
981 * @retval HAL status
982 */
983 uint32_t SDMMC_CmdSendCID(SDMMC_TypeDef *SDMMCx)
984 {
985 SDMMC_CmdInitTypeDef sdmmc_cmdinit;
986 uint32_t errorstate;
987
988 /* Send CMD2 ALL_SEND_CID */
989 sdmmc_cmdinit.Argument = 0U;
990 sdmmc_cmdinit.CmdIndex = SDMMC_CMD_ALL_SEND_CID;
991 sdmmc_cmdinit.Response = SDMMC_RESPONSE_LONG;
992 sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
993 sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
994 (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
995
996 /* Check for error conditions */
997 errorstate = SDMMC_GetCmdResp2(SDMMCx);
998
999 return errorstate;
1000 }
1001
1002 /**
1003 * @brief Send the Send CSD command and check the response.
1004 * @param SDMMCx: Pointer to SDMMC register base
1005 * @param Argument: Command Argument
1006 * @retval HAL status
1007 */
1008 uint32_t SDMMC_CmdSendCSD(SDMMC_TypeDef *SDMMCx, uint32_t Argument)
1009 {
1010 SDMMC_CmdInitTypeDef sdmmc_cmdinit;
1011 uint32_t errorstate;
1012
1013 /* Send CMD9 SEND_CSD */
1014 sdmmc_cmdinit.Argument = Argument;
1015 sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_CSD;
1016 sdmmc_cmdinit.Response = SDMMC_RESPONSE_LONG;
1017 sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
1018 sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
1019 (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
1020
1021 /* Check for error conditions */
1022 errorstate = SDMMC_GetCmdResp2(SDMMCx);
1023
1024 return errorstate;
1025 }
1026
1027 /**
1028 * @brief Send the Send CSD command and check the response.
1029 * @param SDMMCx: Pointer to SDMMC register base
1030 * @param pRCA: Card RCA
1031 * @retval HAL status
1032 */
1033 uint32_t SDMMC_CmdSetRelAdd(SDMMC_TypeDef *SDMMCx, uint16_t *pRCA)
1034 {
1035 SDMMC_CmdInitTypeDef sdmmc_cmdinit;
1036 uint32_t errorstate;
1037
1038 /* Send CMD3 SD_CMD_SET_REL_ADDR */
1039 sdmmc_cmdinit.Argument = 0U;
1040 sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SET_REL_ADDR;
1041 sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
1042 sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
1043 sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
1044 (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
1045
1046 /* Check for error conditions */
1047 errorstate = SDMMC_GetCmdResp6(SDMMCx, SDMMC_CMD_SET_REL_ADDR, pRCA);
1048
1049 return errorstate;
1050 }
1051
1052 /**
1053 * @brief Send the Status command and check the response.
1054 * @param SDMMCx: Pointer to SDMMC register base
1055 * @param Argument: Command Argument
1056 * @retval HAL status
1057 */
1058 uint32_t SDMMC_CmdSendStatus(SDMMC_TypeDef *SDMMCx, uint32_t Argument)
1059 {
1060 SDMMC_CmdInitTypeDef sdmmc_cmdinit;
1061 uint32_t errorstate;
1062
1063 sdmmc_cmdinit.Argument = Argument;
1064 sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_STATUS;
1065 sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
1066 sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
1067 sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
1068 (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
1069
1070 /* Check for error conditions */
1071 errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_SEND_STATUS, SDMMC_CMDTIMEOUT);
1072
1073 return errorstate;
1074 }
1075
1076 /**
1077 * @brief Send the Status register command and check the response.
1078 * @param SDMMCx: Pointer to SDMMC register base
1079 * @retval HAL status
1080 */
1081 uint32_t SDMMC_CmdStatusRegister(SDMMC_TypeDef *SDMMCx)
1082 {
1083 SDMMC_CmdInitTypeDef sdmmc_cmdinit;
1084 uint32_t errorstate;
1085
1086 sdmmc_cmdinit.Argument = 0U;
1087 sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SD_APP_STATUS;
1088 sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
1089 sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
1090 sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
1091 (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
1092
1093 /* Check for error conditions */
1094 errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_SD_APP_STATUS, SDMMC_CMDTIMEOUT);
1095
1096 return errorstate;
1097 }
1098
1099 /**
1100 * @brief Sends host capacity support information and activates the card's
1101 * initialization process. Send SDMMC_CMD_SEND_OP_COND command
1102 * @param SDMMCx: Pointer to SDMMC register base
1103 * @parame Argument: Argument used for the command
1104 * @retval HAL status
1105 */
1106 uint32_t SDMMC_CmdOpCondition(SDMMC_TypeDef *SDMMCx, uint32_t Argument)
1107 {
1108 SDMMC_CmdInitTypeDef sdmmc_cmdinit;
1109 uint32_t errorstate;
1110
1111 sdmmc_cmdinit.Argument = Argument;
1112 sdmmc_cmdinit.CmdIndex = SDMMC_CMD_SEND_OP_COND;
1113 sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
1114 sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
1115 sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
1116 (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
1117
1118 /* Check for error conditions */
1119 errorstate = SDMMC_GetCmdResp3(SDMMCx);
1120
1121 return errorstate;
1122 }
1123
1124 /**
1125 * @brief Checks switchable function and switch card function. SDMMC_CMD_HS_SWITCH comand
1126 * @param SDMMCx: Pointer to SDMMC register base
1127 * @parame Argument: Argument used for the command
1128 * @retval HAL status
1129 */
1130 uint32_t SDMMC_CmdSwitch(SDMMC_TypeDef *SDMMCx, uint32_t Argument)
1131 {
1132 SDMMC_CmdInitTypeDef sdmmc_cmdinit;
1133 uint32_t errorstate;
1134
1135 /* Send CMD6 to activate SDR50 Mode and Power Limit 1.44W */
1136 /* CMD Response: R1 */
1137 sdmmc_cmdinit.Argument = Argument; /* SDMMC_SDR25_SWITCH_PATTERN;*/
1138 sdmmc_cmdinit.CmdIndex = SDMMC_CMD_HS_SWITCH;
1139 sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
1140 sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
1141 sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
1142 (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
1143
1144 /* Check for error conditions */
1145 errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_HS_SWITCH, SDMMC_CMDTIMEOUT);
1146
1147 return errorstate;
1148 }
1149
1150 /**
1151 * @brief Send the command asking the accessed card to send its operating
1152 * condition register (OCR)
1153 * @param None
1154 * @retval HAL status
1155 */
1156 uint32_t SDMMC_CmdVoltageSwitch(SDMMC_TypeDef *SDMMCx)
1157 {
1158 SDMMC_CmdInitTypeDef sdmmc_cmdinit;
1159 uint32_t errorstate;
1160
1161 sdmmc_cmdinit.Argument = 0x00000000;
1162 sdmmc_cmdinit.CmdIndex = SDMMC_CMD_VOLTAGE_SWITCH;
1163 sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
1164 sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
1165 sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
1166 (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
1167
1168 /* Check for error conditions */
1169 errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_VOLTAGE_SWITCH, SDMMC_CMDTIMEOUT);
1170
1171 return errorstate;
1172 }
1173
1174 /**
1175 * @brief Send the Send EXT_CSD command and check the response.
1176 * @param SDMMCx: Pointer to SDMMC register base
1177 * @param Argument: Command Argument
1178 * @retval HAL status
1179 */
1180 uint32_t SDMMC_CmdSendEXTCSD(SDMMC_TypeDef *SDMMCx, uint32_t Argument)
1181 {
1182 SDMMC_CmdInitTypeDef sdmmc_cmdinit;
1183 uint32_t errorstate;
1184
1185 /* Send CMD9 SEND_CSD */
1186 sdmmc_cmdinit.Argument = Argument;
1187 sdmmc_cmdinit.CmdIndex = SDMMC_CMD_HS_SEND_EXT_CSD;
1188 sdmmc_cmdinit.Response = SDMMC_RESPONSE_SHORT;
1189 sdmmc_cmdinit.WaitForInterrupt = SDMMC_WAIT_NO;
1190 sdmmc_cmdinit.CPSM = SDMMC_CPSM_ENABLE;
1191 (void)SDMMC_SendCommand(SDMMCx, &sdmmc_cmdinit);
1192
1193 /* Check for error conditions */
1194 errorstate = SDMMC_GetCmdResp1(SDMMCx, SDMMC_CMD_HS_SEND_EXT_CSD,SDMMC_CMDTIMEOUT);
1195
1196 return errorstate;
1197 }
1198
1199
1200 /**
1201 * @}
1202 */
1203
1204 /* Private function ----------------------------------------------------------*/
1205 /** @addtogroup SD_Private_Functions
1206 * @{
1207 */
1208
1209 /**
1210 * @brief Checks for error conditions for CMD0.
1211 * @param hsd: SD handle
1212 * @retval SD Card error state
1213 */
1214 static uint32_t SDMMC_GetCmdError(SDMMC_TypeDef *SDMMCx)
1215 {
1216 /* 8 is the number of required instructions cycles for the below loop statement.
1217 The SDMMC_CMDTIMEOUT is expressed in ms */
1218 register uint32_t count = SDMMC_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
1219
1220 do
1221 {
1222 if (count-- == 0U)
1223 {
1224 return SDMMC_ERROR_TIMEOUT;
1225 }
1226
1227 }while(!__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CMDSENT));
1228
1229 /* Clear all the static flags */
1230 __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_STATIC_CMD_FLAGS);
1231
1232 return SDMMC_ERROR_NONE;
1233 }
1234
1235 /**
1236 * @brief Checks for error conditions for R1 response.
1237 * @param hsd: SD handle
1238 * @param SD_CMD: The sent command index
1239 * @retval SD Card error state
1240 */
1241 static uint32_t SDMMC_GetCmdResp1(SDMMC_TypeDef *SDMMCx, uint8_t SD_CMD, uint32_t Timeout)
1242 {
1243 uint32_t response_r1;
1244 uint32_t sta_reg;
1245
1246 /* 8 is the number of required instructions cycles for the below loop statement.
1247 The Timeout is expressed in ms */
1248 register uint32_t count = Timeout * (SystemCoreClock / 8U /1000U);
1249
1250 do
1251 {
1252 if (count-- == 0U)
1253 {
1254 return SDMMC_ERROR_TIMEOUT;
1255 }
1256 sta_reg = SDMMCx->STA;
1257 }while(((sta_reg & (SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT | SDMMC_FLAG_BUSYD0END)) == 0U) ||
1258 ((sta_reg & SDMMC_FLAG_CMDACT) != 0U ));
1259
1260 if(__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT))
1261 {
1262 __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT);
1263
1264 return SDMMC_ERROR_CMD_RSP_TIMEOUT;
1265 }
1266 else if(__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL))
1267 {
1268 __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL);
1269
1270 return SDMMC_ERROR_CMD_CRC_FAIL;
1271 }
1272 else
1273 {
1274 /* Nothing to do */
1275 }
1276
1277 /* Clear all the static flags */
1278 __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_STATIC_CMD_FLAGS);
1279
1280 /* Check response received is of desired command */
1281 if(SDMMC_GetCommandResponse(SDMMCx) != SD_CMD)
1282 {
1283 return SDMMC_ERROR_CMD_CRC_FAIL;
1284 }
1285
1286 /* We have received response, retrieve it for analysis */
1287 response_r1 = SDMMC_GetResponse(SDMMCx, SDMMC_RESP1);
1288
1289 if((response_r1 & SDMMC_OCR_ERRORBITS) == SDMMC_ALLZERO)
1290 {
1291 return SDMMC_ERROR_NONE;
1292 }
1293 else if((response_r1 & SDMMC_OCR_ADDR_OUT_OF_RANGE) == SDMMC_OCR_ADDR_OUT_OF_RANGE)
1294 {
1295 return SDMMC_ERROR_ADDR_OUT_OF_RANGE;
1296 }
1297 else if((response_r1 & SDMMC_OCR_ADDR_MISALIGNED) == SDMMC_OCR_ADDR_MISALIGNED)
1298 {
1299 return SDMMC_ERROR_ADDR_MISALIGNED;
1300 }
1301 else if((response_r1 & SDMMC_OCR_BLOCK_LEN_ERR) == SDMMC_OCR_BLOCK_LEN_ERR)
1302 {
1303 return SDMMC_ERROR_BLOCK_LEN_ERR;
1304 }
1305 else if((response_r1 & SDMMC_OCR_ERASE_SEQ_ERR) == SDMMC_OCR_ERASE_SEQ_ERR)
1306 {
1307 return SDMMC_ERROR_ERASE_SEQ_ERR;
1308 }
1309 else if((response_r1 & SDMMC_OCR_BAD_ERASE_PARAM) == SDMMC_OCR_BAD_ERASE_PARAM)
1310 {
1311 return SDMMC_ERROR_BAD_ERASE_PARAM;
1312 }
1313 else if((response_r1 & SDMMC_OCR_WRITE_PROT_VIOLATION) == SDMMC_OCR_WRITE_PROT_VIOLATION)
1314 {
1315 return SDMMC_ERROR_WRITE_PROT_VIOLATION;
1316 }
1317 else if((response_r1 & SDMMC_OCR_LOCK_UNLOCK_FAILED) == SDMMC_OCR_LOCK_UNLOCK_FAILED)
1318 {
1319 return SDMMC_ERROR_LOCK_UNLOCK_FAILED;
1320 }
1321 else if((response_r1 & SDMMC_OCR_COM_CRC_FAILED) == SDMMC_OCR_COM_CRC_FAILED)
1322 {
1323 return SDMMC_ERROR_COM_CRC_FAILED;
1324 }
1325 else if((response_r1 & SDMMC_OCR_ILLEGAL_CMD) == SDMMC_OCR_ILLEGAL_CMD)
1326 {
1327 return SDMMC_ERROR_ILLEGAL_CMD;
1328 }
1329 else if((response_r1 & SDMMC_OCR_CARD_ECC_FAILED) == SDMMC_OCR_CARD_ECC_FAILED)
1330 {
1331 return SDMMC_ERROR_CARD_ECC_FAILED;
1332 }
1333 else if((response_r1 & SDMMC_OCR_CC_ERROR) == SDMMC_OCR_CC_ERROR)
1334 {
1335 return SDMMC_ERROR_CC_ERR;
1336 }
1337 else if((response_r1 & SDMMC_OCR_STREAM_READ_UNDERRUN) == SDMMC_OCR_STREAM_READ_UNDERRUN)
1338 {
1339 return SDMMC_ERROR_STREAM_READ_UNDERRUN;
1340 }
1341 else if((response_r1 & SDMMC_OCR_STREAM_WRITE_OVERRUN) == SDMMC_OCR_STREAM_WRITE_OVERRUN)
1342 {
1343 return SDMMC_ERROR_STREAM_WRITE_OVERRUN;
1344 }
1345 else if((response_r1 & SDMMC_OCR_CID_CSD_OVERWRITE) == SDMMC_OCR_CID_CSD_OVERWRITE)
1346 {
1347 return SDMMC_ERROR_CID_CSD_OVERWRITE;
1348 }
1349 else if((response_r1 & SDMMC_OCR_WP_ERASE_SKIP) == SDMMC_OCR_WP_ERASE_SKIP)
1350 {
1351 return SDMMC_ERROR_WP_ERASE_SKIP;
1352 }
1353 else if((response_r1 & SDMMC_OCR_CARD_ECC_DISABLED) == SDMMC_OCR_CARD_ECC_DISABLED)
1354 {
1355 return SDMMC_ERROR_CARD_ECC_DISABLED;
1356 }
1357 else if((response_r1 & SDMMC_OCR_ERASE_RESET) == SDMMC_OCR_ERASE_RESET)
1358 {
1359 return SDMMC_ERROR_ERASE_RESET;
1360 }
1361 else if((response_r1 & SDMMC_OCR_AKE_SEQ_ERROR) == SDMMC_OCR_AKE_SEQ_ERROR)
1362 {
1363 return SDMMC_ERROR_AKE_SEQ_ERR;
1364 }
1365 else
1366 {
1367 return SDMMC_ERROR_GENERAL_UNKNOWN_ERR;
1368 }
1369 }
1370
1371 /**
1372 * @brief Checks for error conditions for R2 (CID or CSD) response.
1373 * @param hsd: SD handle
1374 * @retval SD Card error state
1375 */
1376 static uint32_t SDMMC_GetCmdResp2(SDMMC_TypeDef *SDMMCx)
1377 {
1378 uint32_t sta_reg;
1379 /* 8 is the number of required instructions cycles for the below loop statement.
1380 The SDMMC_CMDTIMEOUT is expressed in ms */
1381 register uint32_t count = SDMMC_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
1382
1383 do
1384 {
1385 if (count-- == 0U)
1386 {
1387 return SDMMC_ERROR_TIMEOUT;
1388 }
1389 sta_reg = SDMMCx->STA;
1390 }while(((sta_reg & (SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT)) == 0U) ||
1391 ((sta_reg & SDMMC_FLAG_CMDACT) != 0U ));
1392
1393 if (__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT))
1394 {
1395 __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT);
1396
1397 return SDMMC_ERROR_CMD_RSP_TIMEOUT;
1398 }
1399 else if (__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL))
1400 {
1401 __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL);
1402
1403 return SDMMC_ERROR_CMD_CRC_FAIL;
1404 }
1405 else
1406 {
1407 /* No error flag set */
1408 /* Clear all the static flags */
1409 __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_STATIC_CMD_FLAGS);
1410 }
1411
1412 return SDMMC_ERROR_NONE;
1413 }
1414
1415 /**
1416 * @brief Checks for error conditions for R3 (OCR) response.
1417 * @param hsd: SD handle
1418 * @retval SD Card error state
1419 */
1420 static uint32_t SDMMC_GetCmdResp3(SDMMC_TypeDef *SDMMCx)
1421 {
1422 uint32_t sta_reg;
1423 /* 8 is the number of required instructions cycles for the below loop statement.
1424 The SDMMC_CMDTIMEOUT is expressed in ms */
1425 register uint32_t count = SDMMC_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
1426
1427 do
1428 {
1429 if (count-- == 0U)
1430 {
1431 return SDMMC_ERROR_TIMEOUT;
1432 }
1433 sta_reg = SDMMCx->STA;
1434 }while(((sta_reg & (SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT)) == 0U) ||
1435 ((sta_reg & SDMMC_FLAG_CMDACT) != 0U ));
1436
1437 if(__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT))
1438 {
1439 __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT);
1440
1441 return SDMMC_ERROR_CMD_RSP_TIMEOUT;
1442 }
1443 else
1444 {
1445 /* Clear all the static flags */
1446 __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_STATIC_CMD_FLAGS);
1447 }
1448
1449 return SDMMC_ERROR_NONE;
1450 }
1451
1452 /**
1453 * @brief Checks for error conditions for R6 (RCA) response.
1454 * @param hsd: SD handle
1455 * @param SD_CMD: The sent command index
1456 * @param pRCA: Pointer to the variable that will contain the SD card relative
1457 * address RCA
1458 * @retval SD Card error state
1459 */
1460 static uint32_t SDMMC_GetCmdResp6(SDMMC_TypeDef *SDMMCx, uint8_t SD_CMD, uint16_t *pRCA)
1461 {
1462 uint32_t response_r1;
1463 uint32_t sta_reg;
1464
1465 /* 8 is the number of required instructions cycles for the below loop statement.
1466 The SDMMC_CMDTIMEOUT is expressed in ms */
1467 register uint32_t count = SDMMC_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
1468
1469 do
1470 {
1471 if (count-- == 0U)
1472 {
1473 return SDMMC_ERROR_TIMEOUT;
1474 }
1475 sta_reg = SDMMCx->STA;
1476 }while(((sta_reg & (SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT)) == 0U) ||
1477 ((sta_reg & SDMMC_FLAG_CMDACT) != 0U ));
1478
1479 if(__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT))
1480 {
1481 __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT);
1482
1483 return SDMMC_ERROR_CMD_RSP_TIMEOUT;
1484 }
1485 else if(__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL))
1486 {
1487 __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL);
1488
1489 return SDMMC_ERROR_CMD_CRC_FAIL;
1490 }
1491 else
1492 {
1493 /* Nothing to do */
1494 }
1495
1496 /* Check response received is of desired command */
1497 if(SDMMC_GetCommandResponse(SDMMCx) != SD_CMD)
1498 {
1499 return SDMMC_ERROR_CMD_CRC_FAIL;
1500 }
1501
1502 /* Clear all the static flags */
1503 __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_STATIC_CMD_FLAGS);
1504
1505 /* We have received response, retrieve it. */
1506 response_r1 = SDMMC_GetResponse(SDMMCx, SDMMC_RESP1);
1507
1508 if((response_r1 & (SDMMC_R6_GENERAL_UNKNOWN_ERROR | SDMMC_R6_ILLEGAL_CMD | SDMMC_R6_COM_CRC_FAILED)) == SDMMC_ALLZERO)
1509 {
1510 *pRCA = (uint16_t) (response_r1 >> 16);
1511
1512 return SDMMC_ERROR_NONE;
1513 }
1514 else if((response_r1 & SDMMC_R6_ILLEGAL_CMD) == SDMMC_R6_ILLEGAL_CMD)
1515 {
1516 return SDMMC_ERROR_ILLEGAL_CMD;
1517 }
1518 else if((response_r1 & SDMMC_R6_COM_CRC_FAILED) == SDMMC_R6_COM_CRC_FAILED)
1519 {
1520 return SDMMC_ERROR_COM_CRC_FAILED;
1521 }
1522 else
1523 {
1524 return SDMMC_ERROR_GENERAL_UNKNOWN_ERR;
1525 }
1526 }
1527
1528 /**
1529 * @brief Checks for error conditions for R7 response.
1530 * @param hsd: SD handle
1531 * @retval SD Card error state
1532 */
1533 static uint32_t SDMMC_GetCmdResp7(SDMMC_TypeDef *SDMMCx)
1534 {
1535 uint32_t sta_reg;
1536 /* 8 is the number of required instructions cycles for the below loop statement.
1537 The SDMMC_CMDTIMEOUT is expressed in ms */
1538 register uint32_t count = SDMMC_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
1539
1540 do
1541 {
1542 if (count-- == 0U)
1543 {
1544 return SDMMC_ERROR_TIMEOUT;
1545 }
1546 sta_reg = SDMMCx->STA;
1547 }while(((sta_reg & (SDMMC_FLAG_CCRCFAIL | SDMMC_FLAG_CMDREND | SDMMC_FLAG_CTIMEOUT)) == 0U) ||
1548 ((sta_reg & SDMMC_FLAG_CMDACT) != 0U ));
1549
1550 if(__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT))
1551 {
1552 /* Card is SD V2.0 compliant */
1553 __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CTIMEOUT);
1554
1555 return SDMMC_ERROR_CMD_RSP_TIMEOUT;
1556 }
1557
1558 else if(__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL))
1559 {
1560 /* Card is SD V2.0 compliant */
1561 __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CCRCFAIL);
1562
1563 return SDMMC_ERROR_CMD_CRC_FAIL;
1564 }
1565 else
1566 {
1567 /* Nothing to do */
1568 }
1569
1570 if(__SDMMC_GET_FLAG(SDMMCx, SDMMC_FLAG_CMDREND))
1571 {
1572 /* Card is SD V2.0 compliant */
1573 __SDMMC_CLEAR_FLAG(SDMMCx, SDMMC_FLAG_CMDREND);
1574 }
1575
1576 return SDMMC_ERROR_NONE;
1577
1578 }
1579
1580 /**
1581 * @}
1582 */
1583
1584 #endif /* HAL_SD_MODULE_ENABLED || HAL_MMC_MODULE_ENABLED */
1585 /**
1586 * @}
1587 */
1588
1589 /**
1590 * @}
1591 */
1592
1593 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/