lib/main/STM32F1/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_hal_iwdg.c

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f1xx_hal_iwdg.c
   4   * @author  MCD Application Team
   5   * @version V1.1.1
   6   * @date    12-May-2017
   7   * @brief   IWDG HAL module driver.
   8   *          This file provides firmware functions to manage the following
   9   *          functionalities of the Independent Watchdog (IWDG) peripheral:
  10   *           + Initialization and Start functions
  11   *           + IO operation functions
  12   *
  13   @verbatim
  14   ==============================================================================
  15                     ##### IWDG Generic features #####
  16   ==============================================================================
  17   [..]
  18     (+) The IWDG can be started by either software or hardware (configurable
  19         through option byte).
  20
  21     (+) The IWDG is clocked by Low-Speed clock (LSI) and thus stays active even
  22         if the main clock fails.
  23
  24     (+) Once the IWDG is started, the LSI is forced ON and both can not be
  25         disabled. The counter starts counting down from the reset value (0xFFF).
  26         When it reaches the end of count value (0x000) a reset signal is
  27         generated (IWDG reset).
  28
  29     (+) Whenever the key value 0x0000 AAAA is written in the IWDG_KR register,
  30         the IWDG_RLR value is reloaded in the counter and the watchdog reset is
  31         prevented.
  32
  33     (+) The IWDG is implemented in the VDD voltage domain that is still functional
  34         in STOP and STANDBY mode (IWDG reset can wake-up from STANDBY).
  35         IWDGRST flag in RCC_CSR register can be used to inform when an IWDG
  36         reset occurs.
  37
  38     (+) Debug mode : When the microcontroller enters debug mode (core halted),
  39         the IWDG counter either continues to work normally or stops, depending
  40         on DBG_IWDG_STOP configuration bit in DBG module, accessible through
  41         __HAL_DBGMCU_FREEZE_IWDG() and __HAL_DBGMCU_UNFREEZE_IWDG() macros
  42
  43     [..] Min-max timeout value @32KHz (LSI): ~125us / ~32.7s
  44          The IWDG timeout may vary due to LSI frequency dispersion. STM32F1xx
  45          devices provide the capability to measure the LSI frequency (LSI clock
  46          connected internally to TIM5 CH4 input capture). The measured value
  47          can be used to have an IWDG timeout with an acceptable accuracy.
  48
  49                      ##### How to use this driver #####
  50   ==============================================================================
  51   [..]
  52     (#) Use IWDG using HAL_IWDG_Init() function to :
  53       (++) Enable instance by writing Start keyword in IWDG_KEY register. LSI
  54            clock is forced ON and IWDG counter starts downcounting.
  55       (++) Enable write access to configuration register: IWDG_PR & IWDG_RLR.
  56       (++) Configure the IWDG prescaler and counter reload value. This reload
  57            value will be loaded in the IWDG counter each time the watchdog is
  58            reloaded, then the IWDG will start counting down from this value.
  59       (++) wait for status flags to be reset"
  60
  61     (#) Then the application program must refresh the IWDG counter at regular
  62         intervals during normal operation to prevent an MCU reset, using
  63         HAL_IWDG_Refresh() function.
  64
  65      *** IWDG HAL driver macros list ***
  66      ====================================
  67      [..]
  68        Below the list of most used macros in IWDG HAL driver:
  69       (+) __HAL_IWDG_START: Enable the IWDG peripheral
  70       (+) __HAL_IWDG_RELOAD_COUNTER: Reloads IWDG counter with value defined in
  71           the reload register
  72
  73   @endverbatim
  74   ******************************************************************************
  75   * @attention
  76   *
  77   * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  78   *
  79   * Redistribution and use in source and binary forms, with or without modification,
  80   * are permitted provided that the following conditions are met:
  81   *   1. Redistributions of source code must retain the above copyright notice,
  82   *      this list of conditions and the following disclaimer.
  83   *   2. Redistributions in binary form must reproduce the above copyright notice,
  84   *      this list of conditions and the following disclaimer in the documentation
  85   *      and/or other materials provided with the distribution
  86   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  87   *      may be used to endorse or promote products derived from this software
  88   *      without specific prior written permission.
  89   *
  90   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  91   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  92   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  93   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  94   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  95   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  96   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  97   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  98   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  99   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 100   *
 101   ******************************************************************************
 102   */
 103
 104 /* Includes ------------------------------------------------------------------*/
 105 #include "stm32f1xx_hal.h"
 106
 107 /** @addtogroup STM32F1xx_HAL_Driver
 108   * @{
 109   */
 110
 111 #ifdef HAL_IWDG_MODULE_ENABLED
 112 /** @defgroup IWDG IWDG
 113   * @brief IWDG HAL module driver.
 114   * @{
 115   */
 116
 117 /* Private typedef -----------------------------------------------------------*/
 118 /* Private define ------------------------------------------------------------*/
 119 /** @defgroup IWDG_Private_Defines IWDG Private Defines
 120   * @{
 121   */
 122 /* Status register need 5 RC LSI divided by prescaler clock to be updated. With
 123    higher prescaler (256), and according to HSI variation, we need to wait at
 124    least 6 cycles so 48 ms. */
 125 #define HAL_IWDG_DEFAULT_TIMEOUT            48U
 126 /**
 127   * @}
 128   */
 129
 130 /* Private macro -------------------------------------------------------------*/
 131 /* Private variables ---------------------------------------------------------*/
 132 /* Private function prototypes -----------------------------------------------*/
 133 /* Exported functions --------------------------------------------------------*/
 134
 135 /** @addtogroup IWDG_Exported_Functions
 136   * @{
 137   */
 138
 139 /** @addtogroup IWDG_Exported_Functions_Group1
 140   *  @brief    Initialization and Start functions.
 141   *
 142 @verbatim
 143  ===============================================================================
 144           ##### Initialization and Start functions #####
 145  ===============================================================================
 146  [..]  This section provides functions allowing to:
 147       (+) Initialize the IWDG according to the specified parameters in the
 148           IWDG_InitTypeDef of associated handle.
 149       (+) Once initialization is performed in HAL_IWDG_Init function, Watchdog
 150           is reloaded in order to exit function with correct time base.
 151
 152 @endverbatim
 153   * @{
 154   */
 155
 156 /**
 157   * @brief  Initialize the IWDG according to the specified parameters in the
 158   *         IWDG_InitTypeDef and start watchdog. Before exiting function,
 159   *         watchdog is refreshed in order to have correct time base.
 160   * @param  hiwdg  pointer to a IWDG_HandleTypeDef structure that contains
 161   *                the configuration information for the specified IWDG module.
 162   * @retval HAL status
 163   */
 164 HAL_StatusTypeDef HAL_IWDG_Init(IWDG_HandleTypeDef *hiwdg)
 165 {
 166   uint32_t tickstart;
 167
 168   /* Check the IWDG handle allocation */
 169   if(hiwdg == NULL)
 170   {
 171     return HAL_ERROR;
 172   }
 173
 174   /* Check the parameters */
 175   assert_param(IS_IWDG_ALL_INSTANCE(hiwdg->Instance));
 176   assert_param(IS_IWDG_PRESCALER(hiwdg->Init.Prescaler));
 177   assert_param(IS_IWDG_RELOAD(hiwdg->Init.Reload));
 178
 179   /* Enable IWDG. LSI is turned on automaticaly */
 180   __HAL_IWDG_START(hiwdg);
 181
 182   /* Enable write access to IWDG_PR and IWDG_RLR registers by writing 0x5555 in KR */
 183   IWDG_ENABLE_WRITE_ACCESS(hiwdg);
 184
 185   /* Write to IWDG registers the Prescaler & Reload values to work with */
 186   hiwdg->Instance->PR = hiwdg->Init.Prescaler;
 187   hiwdg->Instance->RLR = hiwdg->Init.Reload;
 188
 189   /* Check pending flag, if previous update not done, return timeout */
 190   tickstart = HAL_GetTick();
 191
 192   /* Wait for register to be updated */
 193   while(hiwdg->Instance->SR != RESET)
 194   {
 195     if((HAL_GetTick() - tickstart ) > HAL_IWDG_DEFAULT_TIMEOUT)
 196     {
 197       return HAL_TIMEOUT;
 198     }
 199   }
 200
 201   /* Reload IWDG counter with value defined in the reload register */
 202   __HAL_IWDG_RELOAD_COUNTER(hiwdg);
 203
 204   /* Return function status */
 205   return HAL_OK;
 206 }
 207
 208 /**
 209   * @}
 210   */
 211
 212 /** @addtogroup IWDG_Exported_Functions_Group2
 213   *  @brief   IO operation functions
 214   *
 215 @verbatim
 216  ===============================================================================
 217                       ##### IO operation functions #####
 218  ===============================================================================
 219  [..]  This section provides functions allowing to:
 220       (+) Refresh the IWDG.
 221
 222 @endverbatim
 223   * @{
 224   */
 225
 226 /**
 227   * @brief  Refresh the IWDG.
 228   * @param  hiwdg  pointer to a IWDG_HandleTypeDef structure that contains
 229   *                the configuration information for the specified IWDG module.
 230   * @retval HAL status
 231   */
 232 HAL_StatusTypeDef HAL_IWDG_Refresh(IWDG_HandleTypeDef *hiwdg)
 233 {
 234   /* Reload IWDG counter with value defined in the reload register */
 235   __HAL_IWDG_RELOAD_COUNTER(hiwdg);
 236
 237   /* Return function status */
 238   return HAL_OK;
 239 }
 240
 241 /**
 242   * @}
 243   */
 244
 245 /**
 246   * @}
 247   */
 248
 249 #endif /* HAL_IWDG_MODULE_ENABLED */
 250 /**
 251   * @}
 252   */
 253
 254 /**
 255   * @}
 256   */
 257
 258 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/