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1 /* ----------------------------------------------------------------------
2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
3 *
4 * $Date: 19. March 2015
5 * $Revision: V.1.4.5
6 *
7 * Project: CMSIS DSP Library
8 * Title: arm_mat_add_q15.c
9 *
10 * Description: Q15 matrix addition
12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
14 * Redistribution and use in source and binary forms, with or without
15 * modification, are permitted provided that the following conditions
16 * are met:
17 * - Redistributions of source code must retain the above copyright
18 * notice, this list of conditions and the following disclaimer.
19 * - Redistributions in binary form must reproduce the above copyright
20 * notice, this list of conditions and the following disclaimer in
21 * the documentation and/or other materials provided with the
22 * distribution.
23 * - Neither the name of ARM LIMITED nor the names of its contributors
24 * may be used to endorse or promote products derived from this
25 * software without specific prior written permission.
27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
38 * POSSIBILITY OF SUCH DAMAGE.
39 * -------------------------------------------------------------------- */
41 #include "arm_math.h"
43 /**
44 * @ingroup groupMatrix
47 /**
48 * @addtogroup MatrixAdd
49 * @{
52 /**
53 * @brief Q15 matrix addition.
54 * @param[in] *pSrcA points to the first input matrix structure
55 * @param[in] *pSrcB points to the second input matrix structure
56 * @param[out] *pDst points to output matrix structure
57 * @return The function returns either
58 * <code>ARM_MATH_SIZE_MISMATCH</code> or <code>ARM_MATH_SUCCESS</code> based on the outcome of size checking.
60 * <b>Scaling and Overflow Behavior:</b>
61 * \par
62 * The function uses saturating arithmetic.
63 * Results outside of the allowable Q15 range [0x8000 0x7FFF] will be saturated.
66 arm_status arm_mat_add_q15(
67 const arm_matrix_instance_q15 * pSrcA,
68 const arm_matrix_instance_q15 * pSrcB,
69 arm_matrix_instance_q15 * pDst)
71 q15_t *pInA = pSrcA->pData; /* input data matrix pointer A */
72 q15_t *pInB = pSrcB->pData; /* input data matrix pointer B */
73 q15_t *pOut = pDst->pData; /* output data matrix pointer */
74 uint16_t numSamples; /* total number of elements in the matrix */
75 uint32_t blkCnt; /* loop counters */
76 arm_status status; /* status of matrix addition */
78 #ifdef ARM_MATH_MATRIX_CHECK
81 /* Check for matrix mismatch condition */
82 if((pSrcA->numRows != pSrcB->numRows) ||
83 (pSrcA->numCols != pSrcB->numCols) ||
84 (pSrcA->numRows != pDst->numRows) || (pSrcA->numCols != pDst->numCols))
86 /* Set status as ARM_MATH_SIZE_MISMATCH */
87 status = ARM_MATH_SIZE_MISMATCH;
89 else
90 #endif /* #ifdef ARM_MATH_MATRIX_CHECK */
93 /* Total number of samples in the input matrix */
94 numSamples = (uint16_t) (pSrcA->numRows * pSrcA->numCols);
96 #ifndef ARM_MATH_CM0_FAMILY
98 /* Run the below code for Cortex-M4 and Cortex-M3 */
100 /* Loop unrolling */
101 blkCnt = (uint32_t) numSamples >> 2u;
103 /* First part of the processing with loop unrolling. Compute 4 outputs at a time.
104 ** a second loop below computes the remaining 1 to 3 samples. */
105 while(blkCnt > 0u)
107 /* C(m,n) = A(m,n) + B(m,n) */
108 /* Add, Saturate and then store the results in the destination buffer. */
109 *__SIMD32(pOut)++ = __QADD16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
110 *__SIMD32(pOut)++ = __QADD16(*__SIMD32(pInA)++, *__SIMD32(pInB)++);
112 /* Decrement the loop counter */
113 blkCnt--;
116 /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
117 ** No loop unrolling is used. */
118 blkCnt = (uint32_t) numSamples % 0x4u;
120 /* q15 pointers of input and output are initialized */
122 while(blkCnt > 0u)
124 /* C(m,n) = A(m,n) + B(m,n) */
125 /* Add, Saturate and then store the results in the destination buffer. */
126 *pOut++ = (q15_t) __QADD16(*pInA++, *pInB++);
128 /* Decrement the loop counter */
129 blkCnt--;
132 #else
134 /* Run the below code for Cortex-M0 */
136 /* Initialize blkCnt with number of samples */
137 blkCnt = (uint32_t) numSamples;
140 /* q15 pointers of input and output are initialized */
141 while(blkCnt > 0u)
143 /* C(m,n) = A(m,n) + B(m,n) */
144 /* Add, Saturate and then store the results in the destination buffer. */
145 *pOut++ = (q15_t) __SSAT(((q31_t) * pInA++ + *pInB++), 16);
147 /* Decrement the loop counter */
148 blkCnt--;
151 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
153 /* set status as ARM_MATH_SUCCESS */
154 status = ARM_MATH_SUCCESS;
157 /* Return to application */
158 return (status);
161 /**
162 * @} end of MatrixAdd group