lib/main/STM32F1/Drivers/CMSIS/DSP_Lib/Source/BasicMathFunctions/arm_add_f32.c

   1 /* ----------------------------------------------------------------------
   2 * Copyright (C) 2010-2014 ARM Limited. All rights reserved.
   3 *
   4 * $Date:        19. March 2015
   5 * $Revision:    V.1.4.5
   6 *
   7 * Project:          CMSIS DSP Library
   8 * Title:                arm_add_f32.c
   9 *
  10 * Description:  Floating-point vector addition.
  11 *
  12 * Target Processor: Cortex-M4/Cortex-M3/Cortex-M0
  13 *
  14 * Redistribution and use in source and binary forms, with or without
  15 * modification, are permitted provided that the following conditions
  16 * are met:
  17 *   - Redistributions of source code must retain the above copyright
  18 *     notice, this list of conditions and the following disclaimer.
  19 *   - Redistributions in binary form must reproduce the above copyright
  20 *     notice, this list of conditions and the following disclaimer in
  21 *     the documentation and/or other materials provided with the
  22 *     distribution.
  23 *   - Neither the name of ARM LIMITED nor the names of its contributors
  24 *     may be used to endorse or promote products derived from this
  25 *     software without specific prior written permission.
  26 *
  27 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  28 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  29 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
  30 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
  31 * COPYRIGHT OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  32 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
  33 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
  34 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  35 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
  36 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
  37 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
  38 * POSSIBILITY OF SUCH DAMAGE.
  39 * ---------------------------------------------------------------------------- */
  40
  41 #include "arm_math.h"
  42
  43 /**
  44  * @ingroup groupMath
  45  */
  46
  47 /**
  48  * @defgroup BasicAdd Vector Addition
  49  *
  50  * Element-by-element addition of two vectors.
  51  *
  52  * <pre>
  53  *     pDst[n] = pSrcA[n] + pSrcB[n],   0 <= n < blockSize.
  54  * </pre>
  55  *
  56  * There are separate functions for floating-point, Q7, Q15, and Q31 data types.
  57  */
  58
  59 /**
  60  * @addtogroup BasicAdd
  61  * @{
  62  */
  63
  64 /**
  65  * @brief Floating-point vector addition.
  66  * @param[in]       *pSrcA points to the first input vector
  67  * @param[in]       *pSrcB points to the second input vector
  68  * @param[out]      *pDst points to the output vector
  69  * @param[in]       blockSize number of samples in each vector
  70  * @return none.
  71  */
  72
  73 void arm_add_f32(
  74   float32_t * pSrcA,
  75   float32_t * pSrcB,
  76   float32_t * pDst,
  77   uint32_t blockSize)
  78 {
  79   uint32_t blkCnt;                               /* loop counter */
  80
  81 #ifndef ARM_MATH_CM0_FAMILY
  82
  83 /* Run the below code for Cortex-M4 and Cortex-M3 */
  84   float32_t inA1, inA2, inA3, inA4;              /* temporary input variabels */
  85   float32_t inB1, inB2, inB3, inB4;              /* temporary input variables */
  86
  87   /*loop Unrolling */
  88   blkCnt = blockSize >> 2u;
  89
  90   /* First part of the processing with loop unrolling.  Compute 4 outputs at a time.
  91    ** a second loop below computes the remaining 1 to 3 samples. */
  92   while(blkCnt > 0u)
  93   {
  94     /* C = A + B */
  95     /* Add and then store the results in the destination buffer. */
  96
  97     /* read four inputs from sourceA and four inputs from sourceB */
  98     inA1 = *pSrcA;
  99     inB1 = *pSrcB;
 100     inA2 = *(pSrcA + 1);
 101     inB2 = *(pSrcB + 1);
 102     inA3 = *(pSrcA + 2);
 103     inB3 = *(pSrcB + 2);
 104     inA4 = *(pSrcA + 3);
 105     inB4 = *(pSrcB + 3);
 106
 107     /* C = A + B */
 108     /* add and store result to destination */
 109     *pDst = inA1 + inB1;
 110     *(pDst + 1) = inA2 + inB2;
 111     *(pDst + 2) = inA3 + inB3;
 112     *(pDst + 3) = inA4 + inB4;
 113
 114     /* update pointers to process next samples */
 115     pSrcA += 4u;
 116     pSrcB += 4u;
 117     pDst += 4u;
 118
 119
 120     /* Decrement the loop counter */
 121     blkCnt--;
 122   }
 123
 124   /* If the blockSize is not a multiple of 4, compute any remaining output samples here.
 125    ** No loop unrolling is used. */
 126   blkCnt = blockSize % 0x4u;
 127
 128 #else
 129
 130   /* Run the below code for Cortex-M0 */
 131
 132   /* Initialize blkCnt with number of samples */
 133   blkCnt = blockSize;
 134
 135 #endif /* #ifndef ARM_MATH_CM0_FAMILY */
 136
 137   while(blkCnt > 0u)
 138   {
 139     /* C = A + B */
 140     /* Add and then store the results in the destination buffer. */
 141     *pDst++ = (*pSrcA++) + (*pSrcB++);
 142
 143     /* Decrement the loop counter */
 144     blkCnt--;
 145   }
 146 }
 147
 148 /**
 149  * @} end of BasicAdd group
 150  */