src/main/drivers/adc_stm32f4xx.c

   1 /*
   2  * This file is part of Cleanflight.
   3  *
   4  * Cleanflight is free software: you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation, either version 3 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * Cleanflight is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with Cleanflight.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #include <stdbool.h>
  19 #include <stdint.h>
  20 #include <string.h>
  21
  22 #include "platform.h"
  23 #include "system.h"
  24
  25 #include "io.h"
  26 #include "io_impl.h"
  27 #include "rcc.h"
  28
  29 #include "sensors/sensors.h" // FIXME dependency into the main code
  30
  31 #include "sensor.h"
  32 #include "accgyro.h"
  33
  34 #include "adc.h"
  35 #include "adc_impl.h"
  36
  37 #ifndef ADC_INSTANCE
  38 #define ADC_INSTANCE                ADC1
  39 #endif
  40
  41 const adcDevice_t adcHardware[] = {
  42     { .ADCx = ADC1, .rccADC = RCC_APB2(ADC1), .rccDMA = RCC_AHB1(DMA2), .DMAy_Streamx = DMA2_Stream4, .channel = DMA_Channel_0 },
  43     //{ .ADCx = ADC2, .rccADC = RCC_APB2(ADC2), .rccDMA = RCC_AHB1(DMA2), .DMAy_Streamx = DMA2_Stream1, .channel = DMA_Channel_0 }
  44 };
  45
  46 /* note these could be packed up for saving space */
  47 const adcTagMap_t adcTagMap[] = {
  48 /*
  49     { DEFIO_TAG_E__PF3,  ADC_Channel_9  },
  50     { DEFIO_TAG_E__PF4,  ADC_Channel_14 },
  51     { DEFIO_TAG_E__PF5,  ADC_Channel_15 },
  52     { DEFIO_TAG_E__PF6,  ADC_Channel_4  },
  53     { DEFIO_TAG_E__PF7,  ADC_Channel_5  },
  54     { DEFIO_TAG_E__PF8,  ADC_Channel_6  },
  55     { DEFIO_TAG_E__PF9,  ADC_Channel_7  },
  56     { DEFIO_TAG_E__PF10, ADC_Channel_8  },
  57 */
  58     { DEFIO_TAG_E__PC0, ADC_Channel_10 },
  59     { DEFIO_TAG_E__PC1, ADC_Channel_11 },
  60     { DEFIO_TAG_E__PC2, ADC_Channel_12 },
  61     { DEFIO_TAG_E__PC3, ADC_Channel_13 },
  62     { DEFIO_TAG_E__PC4, ADC_Channel_14 },
  63     { DEFIO_TAG_E__PC5, ADC_Channel_15 },
  64     { DEFIO_TAG_E__PB0, ADC_Channel_8  },
  65     { DEFIO_TAG_E__PB1, ADC_Channel_9  },
  66     { DEFIO_TAG_E__PA0, ADC_Channel_0  },
  67     { DEFIO_TAG_E__PA1, ADC_Channel_1  },
  68     { DEFIO_TAG_E__PA2, ADC_Channel_2  },
  69     { DEFIO_TAG_E__PA3, ADC_Channel_3  },
  70     { DEFIO_TAG_E__PA4, ADC_Channel_4  },
  71     { DEFIO_TAG_E__PA5, ADC_Channel_5  },
  72     { DEFIO_TAG_E__PA6, ADC_Channel_6  },
  73     { DEFIO_TAG_E__PA7, ADC_Channel_7  },
  74 };
  75
  76 ADCDevice adcDeviceByInstance(ADC_TypeDef *instance)
  77 {
  78     if (instance == ADC1)
  79         return ADCDEV_1;
  80 /*
  81     if (instance == ADC2) // TODO add ADC2 and 3
  82         return ADCDEV_2;
  83 */
  84     return ADCINVALID;
  85 }
  86
  87 void adcInit(drv_adc_config_t *init)
  88 {
  89     ADC_InitTypeDef ADC_InitStructure;
  90     DMA_InitTypeDef DMA_InitStructure;
  91
  92     uint8_t i;
  93     uint8_t configuredAdcChannels = 0;
  94
  95     memset(&adcConfig, 0, sizeof(adcConfig));
  96
  97 #if !defined(VBAT_ADC_PIN) && !defined(EXTERNAL1_ADC_PIN) && !defined(RSSI_ADC_PIN) && !defined(CURRENT_METER_ADC_PIN)
  98     UNUSED(init);
  99 #endif
 100
 101 #ifdef VBAT_ADC_PIN
 102     if (init->enableVBat) {
 103         adcConfig[ADC_BATTERY].tag = IO_TAG(VBAT_ADC_PIN); //VBAT_ADC_CHANNEL;
 104     }
 105 #endif
 106
 107 #ifdef RSSI_ADC_PIN
 108     if (init->enableRSSI) {
 109         adcConfig[ADC_RSSI].tag = IO_TAG(RSSI_ADC_PIN);  //RSSI_ADC_CHANNEL;
 110     }
 111 #endif
 112
 113 #ifdef EXTERNAL1_ADC_PIN
 114     if (init->enableExternal1) {
 115         adcConfig[ADC_EXTERNAL1].tag = IO_TAG(EXTERNAL1_ADC_PIN); //EXTERNAL1_ADC_CHANNEL;
 116     }
 117 #endif
 118
 119 #ifdef CURRENT_METER_ADC_PIN
 120     if (init->enableCurrentMeter) {
 121         adcConfig[ADC_CURRENT].tag = IO_TAG(CURRENT_METER_ADC_PIN);  //CURRENT_METER_ADC_CHANNEL;
 122     }
 123 #endif
 124
 125     //RCC_ADCCLKConfig(RCC_ADC12PLLCLK_Div256);  // 72 MHz divided by 256 = 281.25 kHz
 126
 127     ADCDevice device = adcDeviceByInstance(ADC_INSTANCE);
 128     if (device == ADCINVALID)
 129         return;
 130
 131     adcDevice_t adc = adcHardware[device];
 132
 133     for (uint8_t i = 0; i < ADC_CHANNEL_COUNT; i++) {
 134         if (!adcConfig[i].tag)
 135             continue;
 136
 137             IOInit(IOGetByTag(adcConfig[i].tag), OWNER_ADC, RESOURCE_ADC_BATTERY + i, 0);
 138         IOConfigGPIO(IOGetByTag(adcConfig[i].tag), IO_CONFIG(GPIO_Mode_AN, 0, GPIO_OType_OD, GPIO_PuPd_NOPULL));
 139         adcConfig[i].adcChannel = adcChannelByTag(adcConfig[i].tag);
 140         adcConfig[i].dmaIndex = configuredAdcChannels++;
 141         adcConfig[i].sampleTime = ADC_SampleTime_480Cycles;
 142         adcConfig[i].enabled = true;
 143     }
 144
 145     RCC_ClockCmd(adc.rccDMA, ENABLE);
 146     RCC_ClockCmd(adc.rccADC, ENABLE);
 147
 148     DMA_DeInit(adc.DMAy_Streamx);
 149
 150     DMA_StructInit(&DMA_InitStructure);
 151     DMA_InitStructure.DMA_PeripheralBaseAddr = (uint32_t)&adc.ADCx->DR;
 152     DMA_InitStructure.DMA_Channel = adc.channel;
 153     DMA_InitStructure.DMA_Memory0BaseAddr = (uint32_t)adcValues;
 154     DMA_InitStructure.DMA_DIR = DMA_DIR_PeripheralToMemory;
 155     DMA_InitStructure.DMA_BufferSize = configuredAdcChannels;
 156     DMA_InitStructure.DMA_PeripheralInc = DMA_PeripheralInc_Disable;
 157     DMA_InitStructure.DMA_MemoryInc = configuredAdcChannels > 1 ? DMA_MemoryInc_Enable : DMA_MemoryInc_Disable;
 158     DMA_InitStructure.DMA_PeripheralDataSize = DMA_PeripheralDataSize_HalfWord;
 159     DMA_InitStructure.DMA_MemoryDataSize = DMA_MemoryDataSize_HalfWord;
 160     DMA_InitStructure.DMA_Mode = DMA_Mode_Circular;
 161     DMA_InitStructure.DMA_Priority = DMA_Priority_High;
 162     DMA_Init(adc.DMAy_Streamx, &DMA_InitStructure);
 163
 164     DMA_Cmd(adc.DMAy_Streamx, ENABLE);
 165
 166     ADC_CommonInitTypeDef ADC_CommonInitStructure;
 167
 168     ADC_CommonStructInit(&ADC_CommonInitStructure);
 169     ADC_CommonInitStructure.ADC_Mode             = ADC_Mode_Independent;
 170     ADC_CommonInitStructure.ADC_Prescaler        = ADC_Prescaler_Div8;
 171     ADC_CommonInitStructure.ADC_DMAAccessMode    = ADC_DMAAccessMode_Disabled;
 172     ADC_CommonInitStructure.ADC_TwoSamplingDelay = ADC_TwoSamplingDelay_5Cycles;
 173     ADC_CommonInit(&ADC_CommonInitStructure);
 174
 175     ADC_StructInit(&ADC_InitStructure);
 176
 177     ADC_InitStructure.ADC_ContinuousConvMode       = ENABLE;
 178     ADC_InitStructure.ADC_Resolution               = ADC_Resolution_12b;
 179     ADC_InitStructure.ADC_ExternalTrigConv         = ADC_ExternalTrigConv_T1_CC1;
 180     ADC_InitStructure.ADC_ExternalTrigConvEdge     = ADC_ExternalTrigConvEdge_None;
 181     ADC_InitStructure.ADC_DataAlign                = ADC_DataAlign_Right;
 182     ADC_InitStructure.ADC_NbrOfConversion          = configuredAdcChannels;
 183     ADC_InitStructure.ADC_ScanConvMode             = configuredAdcChannels > 1 ? ENABLE : DISABLE; // 1=scan more that one channel in group
 184
 185     ADC_Init(adc.ADCx, &ADC_InitStructure);
 186
 187     uint8_t rank = 1;
 188     for (i = 0; i < ADC_CHANNEL_COUNT; i++) {
 189         if (!adcConfig[i].enabled) {
 190             continue;
 191         }
 192         ADC_RegularChannelConfig(adc.ADCx, adcConfig[i].adcChannel, rank++, adcConfig[i].sampleTime);
 193     }
 194     ADC_DMARequestAfterLastTransferCmd(adc.ADCx, ENABLE);
 195
 196     ADC_DMACmd(adc.ADCx, ENABLE);
 197     ADC_Cmd(adc.ADCx, ENABLE);
 198
 199     ADC_SoftwareStartConv(adc.ADCx);
 200 }