src/main/target/NAZE/target.h

   1 /*
   2  * This file is part of Cleanflight.
   3  *
   4  * Cleanflight is free software: you can redistribute it and/or modify
   5  * it under the terms of the GNU General Public License as published by
   6  * the Free Software Foundation, either version 3 of the License, or
   7  * (at your option) any later version.
   8  *
   9  * Cleanflight is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with Cleanflight.  If not, see <http://www.gnu.org/licenses/>.
  16  */
  17
  18 #pragma once
  19
  20 #define TARGET_BOARD_IDENTIFIER "AFNA" // AFroNAze - NAZE might be considered misleading on Naze clones like the flip32.
  21 #define USE_HARDWARE_REVISION_DETECTION
  22
  23 #define BOARD_HAS_VOLTAGE_DIVIDER
  24
  25 #define LED0    PB3 // PB3 (LED)
  26 #define LED1    PB4 // PB4 (LED)
  27
  28 #define BEEPER      PA12 // PA12 (Beeper)
  29
  30 #define BARO_XCLR_PIN    PC13
  31 #define BARO_EOC_PIN     PC14
  32
  33 #define INVERTER    PB2 // PB2 (BOOT1) abused as inverter select GPIO
  34 #define INVERTER_USART USART2
  35
  36 #define USE_EXTI
  37
  38 // SPI2
  39 // PB15 28 SPI2_MOSI
  40 // PB14 27 SPI2_MISO
  41 // PB13 26 SPI2_SCK
  42 // PB12 25 SPI2_NSS
  43
  44 #define USE_SPI
  45 #define USE_SPI_DEVICE_2
  46
  47 #define NAZE_SPI_INSTANCE     SPI2
  48 #define NAZE_SPI_CS_GPIO      GPIOB
  49 #define NAZE_SPI_CS_PIN       PB12
  50 #define NAZE_CS_GPIO_CLK_PERIPHERAL RCC_APB2Periph_GPIOB
  51
  52 // We either have this 16mbit flash chip on SPI or the MPU6500 acc/gyro depending on board revision:
  53 #define M25P16_CS_GPIO        NAZE_SPI_CS_GPIO
  54 #define M25P16_CS_PIN         NAZE_SPI_CS_PIN
  55 #define M25P16_SPI_INSTANCE   NAZE_SPI_INSTANCE
  56
  57 #define MPU6500_CS_GPIO_CLK_PERIPHERAL   NAZE_CS_GPIO_CLK_PERIPHERAL
  58 #define MPU6500_CS_GPIO                  NAZE_SPI_CS_GPIO
  59 #define MPU6500_CS_PIN                   NAZE_SPI_CS_PIN
  60 #define MPU6500_SPI_INSTANCE             NAZE_SPI_INSTANCE
  61
  62
  63 #define USE_FLASHFS
  64
  65 #define USE_FLASH_M25P16
  66
  67 #define EXTI_CALLBACK_HANDLER_COUNT 3 // MPU data ready, MAG data ready, BMP085 EOC
  68
  69 //#define DEBUG_MPU_DATA_READY_INTERRUPT
  70 #define USE_MPU_DATA_READY_SIGNAL
  71
  72 //#define DEBUG_MAG_DATA_READY_INTERRUPT
  73 #define USE_MAG_DATA_READY_SIGNAL
  74
  75 #define GYRO
  76 #define USE_GYRO_MPU3050
  77 #define USE_GYRO_MPU6050
  78 #define USE_GYRO_MPU6500
  79 #define USE_GYRO_SPI_MPU6500
  80
  81
  82 #define GYRO_MPU3050_ALIGN CW0_DEG
  83 #define GYRO_MPU6050_ALIGN CW0_DEG
  84 #define GYRO_MPU6500_ALIGN CW0_DEG
  85
  86 #define ACC
  87 #define USE_ACC_ADXL345
  88 #define USE_ACC_BMA280
  89 #define USE_ACC_MMA8452
  90 #define USE_ACC_MPU6050
  91 #define USE_ACC_MPU6500
  92 #define USE_ACC_SPI_MPU6500
  93
  94 #define ACC_ADXL345_ALIGN CW270_DEG
  95 #define ACC_MPU6050_ALIGN CW0_DEG
  96 #define ACC_MMA8452_ALIGN CW90_DEG
  97 #define ACC_BMA280_ALIGN CW0_DEG
  98 #define ACC_MPU6500_ALIGN CW0_DEG
  99
 100 #define BARO
 101 #define USE_BARO_MS5611
 102 #define USE_BARO_BMP085
 103 #define USE_BARO_BMP280
 104
 105 #define MAG
 106 #define USE_MAG_HMC5883
 107
 108 #define MAG_HMC5883_ALIGN CW180_DEG
 109
 110 #define SONAR
 111 #define DISPLAY
 112
 113 #define USE_USART1
 114 #define USE_USART2
 115 #define USE_USART3
 116 #define USE_SOFTSERIAL1
 117 #define USE_SOFTSERIAL2
 118 #define SERIAL_PORT_COUNT 5
 119
 120 #define SOFTSERIAL_1_TIMER TIM3
 121 #define SOFTSERIAL_1_TIMER_RX_HARDWARE 4 // PWM 5
 122 #define SOFTSERIAL_1_TIMER_TX_HARDWARE 5 // PWM 6
 123 #define SOFTSERIAL_2_TIMER TIM3
 124 #define SOFTSERIAL_2_TIMER_RX_HARDWARE 6 // PWM 7
 125 #define SOFTSERIAL_2_TIMER_TX_HARDWARE 7 // PWM 8
 126
 127 // USART3 only on NAZE32_SP - Flex Port
 128 #define USART3_RX_PIN Pin_11
 129 #define USART3_TX_PIN Pin_10
 130 #define USART3_GPIO GPIOB
 131 #define USART3_APB1_PERIPHERALS RCC_APB1Periph_USART3
 132 #define USART3_APB2_PERIPHERALS RCC_APB2Periph_GPIOB
 133
 134 #define USE_I2C
 135 #define I2C_DEVICE (I2CDEV_2)
 136
 137 // #define SOFT_I2C // enable to test software i2c
 138 // #define SOFT_I2C_PB1011 // If SOFT_I2C is enabled above, need to define pinout as well (I2C1 = PB67, I2C2 = PB1011)
 139 // #define SOFT_I2C_PB67
 140
 141 #define USE_ADC
 142
 143 #define CURRENT_METER_ADC_GPIO      GPIOB
 144 #define CURRENT_METER_ADC_GPIO_PIN  GPIO_Pin_1
 145 #define CURRENT_METER_ADC_CHANNEL   ADC_Channel_9
 146
 147 #define VBAT_ADC_GPIO               GPIOA
 148 #define VBAT_ADC_GPIO_PIN           GPIO_Pin_4
 149 #define VBAT_ADC_CHANNEL            ADC_Channel_4
 150
 151 #define RSSI_ADC_GPIO               GPIOA
 152 #define RSSI_ADC_GPIO_PIN           GPIO_Pin_1
 153 #define RSSI_ADC_CHANNEL            ADC_Channel_1
 154
 155 #define EXTERNAL1_ADC_GPIO          GPIOA
 156 #define EXTERNAL1_ADC_GPIO_PIN      GPIO_Pin_5
 157 #define EXTERNAL1_ADC_CHANNEL       ADC_Channel_5
 158
 159
 160 #define LED_STRIP
 161 #define LED_STRIP_TIMER TIM3
 162 #define WS2811_DMA_TC_FLAG           DMA1_FLAG_TC6
 163 #define WS2811_DMA_HANDLER_IDENTIFER DMA1_CH6_HANDLER
 164
 165 //#define GPS
 166 //#define GTUNE
 167 #define BLACKBOX
 168 #define TELEMETRY
 169 #define SERIAL_RX
 170 #define USE_SERVOS
 171 #define USE_CLI
 172
 173 #define SPEKTRUM_BIND
 174 // USART2, PA3
 175 #define BIND_PIN   PA3
 176
 177 #define USE_SERIAL_4WAY_BLHELI_INTERFACE
 178
 179 // alternative defaults for AlienWii32 F1 target
 180 #ifdef ALIENFLIGHT
 181 #undef TARGET_BOARD_IDENTIFIER
 182 #define TARGET_BOARD_IDENTIFIER "AWF1" // AlienFlight F1.
 183 #undef BOARD_HAS_VOLTAGE_DIVIDER
 184 #define ALIENFLIGHT
 185
 186 #define HARDWARE_BIND_PLUG
 187
 188 // Hardware bind plug at PB5 (Pin 41)
 189 #define BINDPLUG_PIN   PB5
 190 #endif
 191
 192 // IO - assuming all IOs on 48pin package
 193 #define TARGET_IO_PORTA 0xffff
 194 #define TARGET_IO_PORTB 0xffff
 195 #define TARGET_IO_PORTC (BIT(13)|BIT(14)|BIT(15))