2 * This file is part of Betaflight.
4 * Betaflight is free software. You can redistribute this software
5 * and/or modify this software under the terms of the GNU General
6 * Public License as published by the Free Software Foundation,
7 * either version 3 of the License, or (at your option) any later
10 * Betaflight is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
14 * See the GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public
17 * License along with this software.
19 * If not, see <http://www.gnu.org/licenses/>.
23 This file has been auto generated from unified-targets repo.
25 The auto generation is transitional only.
28 #define FC_TARGET_MCU STM32H750
30 #define BOARD_NAME SPRACINGH7EXTREME
31 #define MANUFACTURER_ID SPRO
33 #define TARGET_BOARD_IDENTIFIER "SP7E"
34 #define USBD_PRODUCT_STRING "SPRacingH7EXTREME"
35 #define EEPROM_SIZE 8192
36 #define USE_SPRACING_PERSISTENT_RTC_WORKAROUND
38 #define BUTTON_A_PIN PE4
39 #define BUTTON_A_PIN_INVERTED
40 #define BUTTON_B_PIN PE4
41 #define BUTTON_B_PIN_INVERTED
43 #define USE_QUADSPI_DEVICE_1
44 #define QUADSPI1_SCK_PIN PB2
45 #define QUADSPI1_BK1_IO0_PIN PD11
46 #define QUADSPI1_BK1_IO1_PIN PD12
47 #define QUADSPI1_BK1_IO2_PIN PE2
48 #define QUADSPI1_BK1_IO3_PIN PD13
49 #define QUADSPI1_BK1_CS_PIN PB10
50 #define QUADSPI1_BK2_IO0_PIN PE7
51 #define QUADSPI1_BK2_IO1_PIN PE8
52 #define QUADSPI1_BK2_IO2_PIN PE9
53 #define QUADSPI1_BK2_IO3_PIN PE10
54 #define QUADSPI1_BK2_CS_PIN NONE
55 #define QUADSPI1_MODE QUADSPI_MODE_BK1_ONLY
56 #define QUADSPI1_CS_FLAGS (QUADSPI_BK1_CS_HARDWARE | QUADSPI_BK2_CS_NONE | QUADSPI_CS_MODE_LINKED)
57 #define ENABLE_BLACKBOX_LOGGING_ON_SDCARD_BY_DEFAULT
58 #define FLASH_QUADSPI_INSTANCE QUADSPI
59 #define CONFIG_IN_EXTERNAL_FLASH
60 #define SDCARD_DETECT_PIN PD10
61 #define SDCARD_DETECT_INVERTED
62 #define SDIO_DEVICE SDIODEV_1
63 #define SDIO_USE_4BIT 1
64 #define SDIO_CK_PIN PC12
65 #define SDIO_CMD_PIN PD2
66 #define SDIO_D0_PIN PC8
67 #define SDIO_D1_PIN PC9
68 #define SDIO_D2_PIN PC10
69 #define SDIO_D3_PIN PC11
71 #define USE_SPI_DEVICE_2
72 #define SPI2_SCK_PIN PD3
73 #define SPI2_MISO_PIN PC2
74 #define SPI2_MOSI_PIN PC3
75 #define SPI2_NSS_PIN PB12
76 #define USE_SPI_DEVICE_3
77 #define SPI3_SCK_PIN PB3
78 #define SPI3_MISO_PIN PB4
79 #define SPI3_MOSI_PIN PD6
80 #define SPI3_NSS_PIN PA15
81 #define USE_SPI_DEVICE_4
82 #define SPI4_SCK_PIN PE12
83 #define SPI4_MISO_PIN PE13
84 #define SPI4_MOSI_PIN PE14
85 #define SPI4_NSS_PIN PE11
88 #define USE_I2C_DEVICE_1
89 #define I2C1_SCL_PIN PB8
90 #define I2C1_SDA_PIN PB9
91 #define I2C_DEVICE (I2CDEV_1)
92 #define ENSURE_MPU_DATA_READY_IS_LOW
94 #define VTX_RTC6705_OPTIONAL
95 #define ADC1_DMA_OPT 8
96 #define ADC3_DMA_OPT 9
97 #define USE_ACC_SPI_MPU6500
98 #define USE_GYRO_SPI_MPU6500
99 #define USE_BARO_BMP388
100 #define USE_MAG_HMC5883
101 #define USE_MAG_QMC5883
102 #define USE_FLASH_W25N01G
104 #define USE_CAMERA_CONTROL