src/main/drivers/bus.h

   1 /*
   2  * This file is part of Cleanflight and Betaflight.
   3  *
   4  * Cleanflight and Betaflight are free software. You can redistribute
   5  * this software and/or modify this software under the terms of the
   6  * GNU General Public License as published by the Free Software
   7  * Foundation, either version 3 of the License, or (at your option)
   8  * any later version.
   9  *
  10  * Cleanflight and Betaflight are distributed in the hope that they
  11  * will be useful, but WITHOUT ANY WARRANTY; without even the implied
  12  * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  13  * See the GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this software.
  17  *
  18  * If not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #pragma once
  22
  23 #include "platform.h"
  24
  25 #include "drivers/bus_i2c.h"
  26 #include "drivers/io_types.h"
  27 #include "drivers/dma.h"
  28
  29 typedef enum {
  30     BUS_TYPE_NONE = 0,
  31     BUS_TYPE_I2C,
  32     BUS_TYPE_SPI,
  33     BUS_TYPE_MPU_SLAVE, // Slave I2C on SPI master
  34     BUS_TYPE_GYRO_AUTO,  // Only used by acc/gyro bus auto detection code
  35 } busType_e;
  36
  37 struct spiDevice_s;
  38
  39 typedef enum {
  40     BUS_READY,
  41     BUS_BUSY,
  42     BUS_ABORT
  43 } busStatus_e;
  44
  45 struct extDevice_s;
  46
  47 // Bus interface, independent of connected device
  48 typedef struct busDevice_s {
  49     busType_e busType;
  50     union {
  51         struct busSpi_s {
  52             SPI_TypeDef *instance;
  53             uint16_t speed;
  54             bool leadingEdge;
  55         } spi;
  56         struct busI2C_s {
  57             I2CDevice device;
  58         } i2c;
  59         struct busMpuSlave_s {
  60             struct extDevice_s *master;
  61         } mpuSlave;
  62     } busType_u;
  63     bool useDMA;
  64     uint8_t deviceCount;
  65     dmaChannelDescriptor_t *dmaTx;
  66     dmaChannelDescriptor_t *dmaRx;
  67 #ifndef UNIT_TEST
  68     // Use a reference here as this saves RAM for unused descriptors
  69 #if defined(USE_FULL_LL_DRIVER)
  70     LL_DMA_InitTypeDef          *initTx;
  71     LL_DMA_InitTypeDef          *initRx;
  72 #else
  73     DMA_InitTypeDef             *initTx;
  74     DMA_InitTypeDef             *initRx;
  75 #endif
  76 #endif // UNIT_TEST
  77     volatile struct busSegment_s* volatile curSegment;
  78     bool initSegment;
  79 } busDevice_t;
  80
  81 // External device has an associated bus and bus dependent address
  82 typedef struct extDevice_s {
  83     busDevice_t *bus;
  84     union {
  85         struct extSpi_s {
  86             uint16_t speed;
  87             IO_t csnPin;
  88             bool leadingEdge;
  89         } spi;
  90         struct extI2C_s {
  91             uint8_t address;
  92         } i2c;
  93         struct extMpuSlave_s {
  94             uint8_t address;
  95         } mpuSlave;
  96     } busType_u;
  97 #ifndef UNIT_TEST
  98     // Cache the init structure for the next DMA transfer to reduce inter-segment delay
  99 #if defined(USE_FULL_LL_DRIVER)
 100     LL_DMA_InitTypeDef          initTx;
 101     LL_DMA_InitTypeDef          initRx;
 102 #else
 103     DMA_InitTypeDef             initTx;
 104     DMA_InitTypeDef             initRx;
 105 #endif
 106 #endif // UNIT_TEST
 107     // Support disabling DMA on a per device basis
 108     bool useDMA;
 109     // Per device buffer reference if needed
 110     uint8_t *txBuf, *rxBuf;
 111     // Connected devices on the same bus may support different speeds
 112     uint32_t callbackArg;
 113 } extDevice_t;
 114
 115 /* Each SPI access may comprise multiple parts, for example, wait/write enable/write/data each of which
 116  * is defined by a segment, with optional callback after each is completed.
 117  *
 118  * If there are more than one segments, or a single segment with negateCS negated then DMA will be used irrespective of length
 119  *
 120  */
 121 typedef struct busSegment_s {
 122     union {
 123         struct {
 124             // Transmit buffer
 125             uint8_t *txData;
 126             // Receive buffer, or in the case of the final segment to
 127             uint8_t *rxData;
 128         } buffers;
 129         struct {
 130             // Link to the device associated with the next transfer
 131             const extDevice_t *dev;
 132             // Segments to process in the next transfer.
 133             volatile struct busSegment_s *segments;
 134         } link;
 135     } u;
 136     int len;
 137     bool negateCS; // Should CS be negated at the end of this segment
 138     busStatus_e (*callback)(uint32_t arg);
 139 } busSegment_t;
 140
 141 #ifdef TARGET_BUS_INIT
 142 void targetBusInit(void);
 143 #endif
 144
 145 // Access routines where the register is accessed directly
 146 bool busRawWriteRegister(const extDevice_t *dev, uint8_t reg, uint8_t data);
 147 bool busRawWriteRegisterStart(const extDevice_t *dev, uint8_t reg, uint8_t data);
 148 bool busRawReadRegisterBuffer(const extDevice_t *dev, uint8_t reg, uint8_t *data, uint8_t length);
 149 bool busRawReadRegisterBufferStart(const extDevice_t *dev, uint8_t reg, uint8_t *data, uint8_t length);
 150 // Write routines where the register is masked with 0x7f
 151 bool busWriteRegister(const extDevice_t *dev, uint8_t reg, uint8_t data);
 152 bool busWriteRegisterStart(const extDevice_t *dev, uint8_t reg, uint8_t data);
 153 // Read routines where the register is ORed with 0x80
 154 bool busReadRegisterBuffer(const extDevice_t *dev, uint8_t reg, uint8_t *data, uint8_t length);
 155 bool busReadRegisterBufferStart(const extDevice_t *dev, uint8_t reg, uint8_t *data, uint8_t length);
 156 uint8_t busReadRegister(const extDevice_t *dev, uint8_t reg);
 157
 158 bool busBusy(const extDevice_t *dev, bool *error);
 159 void busDeviceRegister(const extDevice_t *dev);