src/main/drivers/dshot_bitbang_ll.c

   1 /*
   2  * This file is part of Cleanflight and Betaflight.
   3  *
   4  * Cleanflight and Betaflight are free software. You can redistribute
   5  * this software and/or modify this software under the terms of the
   6  * GNU General Public License as published by the Free Software
   7  * Foundation, either version 3 of the License, or (at your option)
   8  * any later version.
   9  *
  10  * Cleanflight and Betaflight are distributed in the hope that they
  11  * will be useful, but WITHOUT ANY WARRANTY; without even the implied
  12  * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  13  * See the GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this software.
  17  *
  18  * If not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #include <stdint.h>
  22 #include <math.h>
  23 #include <string.h>
  24
  25 #include "platform.h"
  26
  27 #ifdef USE_DSHOT_BITBANG
  28
  29 #include "build/atomic.h"
  30 #include "build/debug.h"
  31
  32 #include "drivers/io.h"
  33 #include "drivers/io_impl.h"
  34 #include "drivers/dma.h"
  35 #include "drivers/dma_reqmap.h"
  36 #include "drivers/dshot.h"
  37 #include "drivers/dshot_bitbang_impl.h"
  38 #include "drivers/dshot_command.h"
  39 #include "drivers/motor.h"
  40 #include "drivers/nvic.h"
  41 #include "drivers/pwm_output.h" // XXX for pwmOutputPort_t motors[]; should go away with refactoring
  42 #include "drivers/time.h"
  43 #include "drivers/timer.h"
  44
  45 #include "pg/motor.h"
  46
  47 // Setup GPIO_MODER and GPIO_ODR register manipulation values
  48
  49 void bbGpioSetup(bbMotor_t *bbMotor)
  50 {
  51     bbPort_t *bbPort = bbMotor->bbPort;
  52     int pinIndex = bbMotor->pinIndex;
  53
  54     bbPort->gpioModeMask |= (GPIO_MODER_MODER0 << (pinIndex * 2));
  55     bbPort->gpioModeInput |= (LL_GPIO_MODE_INPUT << (pinIndex * 2));
  56     bbPort->gpioModeOutput |= (LL_GPIO_MODE_OUTPUT << (pinIndex * 2));
  57
  58 #ifdef USE_DSHOT_TELEMETRY
  59     if (useDshotTelemetry) {
  60         bbPort->gpioIdleBSRR |= (1 << pinIndex);         // BS (lower half)
  61     } else
  62 #endif
  63     {
  64         bbPort->gpioIdleBSRR |= (1 << (pinIndex + 16));  // BR (higher half)
  65     }
  66
  67 #ifdef USE_DSHOT_TELEMETRY
  68     if (useDshotTelemetry) {
  69         IOWrite(bbMotor->io, 1);
  70     } else
  71 #endif
  72     {
  73         IOWrite(bbMotor->io, 0);
  74     }
  75
  76 #if defined(STM32F7)
  77     IOConfigGPIO(bbMotor->io, IO_CONFIG(GPIO_MODE_OUTPUT_PP, GPIO_SPEED_FREQ_HIGH, bbPuPdMode));
  78 #else
  79 #error MCU dependent code required
  80 #endif
  81 }
  82
  83 void bbTimerChannelInit(bbPort_t *bbPort)
  84 {
  85     const timerHardware_t *timhw = bbPort->timhw;
  86
  87     switch (bbPort->timhw->channel) {
  88     case TIM_CHANNEL_1: bbPort->llChannel = LL_TIM_CHANNEL_CH1; break;
  89     case TIM_CHANNEL_2: bbPort->llChannel = LL_TIM_CHANNEL_CH2; break;
  90     case TIM_CHANNEL_3: bbPort->llChannel = LL_TIM_CHANNEL_CH3; break;
  91     case TIM_CHANNEL_4: bbPort->llChannel = LL_TIM_CHANNEL_CH4; break;
  92     }
  93
  94     LL_TIM_OC_InitTypeDef ocInit;
  95     LL_TIM_OC_StructInit(&ocInit);
  96     ocInit.OCMode = LL_TIM_OCMODE_PWM1;
  97     ocInit.OCIdleState = LL_TIM_OCIDLESTATE_HIGH;
  98     ocInit.OCState = LL_TIM_OCSTATE_ENABLE;
  99     ocInit.OCPolarity = LL_TIM_OCPOLARITY_LOW;
 100     ocInit.CompareValue = 10; // Duty doesn't matter, but too value small would make monitor output invalid
 101
 102     //TIM_Cmd(bbPort->timhw->tim, DISABLE);
 103     LL_TIM_DisableCounter(bbPort->timhw->tim);
 104
 105     //timerOCInit(timhw->tim, timhw->channel, &TIM_OCStruct);
 106     LL_TIM_OC_Init(timhw->tim, bbPort->llChannel, &ocInit);
 107
 108     //timerOCPreloadConfig(timhw->tim, timhw->channel, TIM_OCPreload_Enable);
 109     LL_TIM_OC_EnablePreload(timhw->tim, bbPort->llChannel);
 110
 111 #ifdef DEBUG_MONITOR_PACER
 112     if (timhw->tag) {
 113         IO_t io = IOGetByTag(timhw->tag);
 114         IOConfigGPIOAF(io, IOCFG_AF_PP, timhw->alternateFunction);
 115         IOInit(io, OWNER_DSHOT_BITBANG, 0);
 116         //TIM_CtrlPWMOutputs(timhw->tim, ENABLE);
 117         LL_TIM_EnableAllOutputs(timhw->tim);
 118     }
 119 #endif
 120
 121     // Enable and keep it running
 122
 123     //TIM_Cmd(bbPort->timhw->tim, ENABLE);
 124     LL_TIM_EnableCounter(bbPort->timhw->tim);
 125 }
 126
 127 #ifdef USE_DMA_REGISTER_CACHE
 128 void bbLoadDMARegs(dmaResource_t *dmaResource, dmaRegCache_t *dmaRegCache)
 129 {
 130     ((DMA_ARCH_TYPE *)dmaResource)->CR = dmaRegCache->CR;
 131     ((DMA_ARCH_TYPE *)dmaResource)->FCR = dmaRegCache->FCR;
 132     ((DMA_ARCH_TYPE *)dmaResource)->NDTR = dmaRegCache->NDTR;
 133     ((DMA_ARCH_TYPE *)dmaResource)->PAR = dmaRegCache->PAR;
 134     ((DMA_ARCH_TYPE *)dmaResource)->M0AR = dmaRegCache->M0AR;
 135 }
 136
 137 static void bbSaveDMARegs(dmaResource_t *dmaResource, dmaRegCache_t *dmaRegCache)
 138 {
 139     dmaRegCache->CR = ((DMA_ARCH_TYPE *)dmaResource)->CR;
 140     dmaRegCache->FCR = ((DMA_ARCH_TYPE *)dmaResource)->FCR;
 141     dmaRegCache->NDTR = ((DMA_ARCH_TYPE *)dmaResource)->NDTR;
 142     dmaRegCache->PAR = ((DMA_ARCH_TYPE *)dmaResource)->PAR;
 143     dmaRegCache->M0AR = ((DMA_ARCH_TYPE *)dmaResource)->M0AR;
 144 }
 145 #endif
 146
 147 void bbSwitchToOutput(bbPort_t * bbPort)
 148 {
 149     // Output idle level before switching to output
 150     // Use BSRR register for this
 151     // Normal: Use BR (higher half)
 152     // Inverted: Use BS (lower half)
 153
 154     WRITE_REG(bbPort->gpio->BSRR, bbPort->gpioIdleBSRR);
 155
 156     // Set GPIO to output
 157
 158     ATOMIC_BLOCK(NVIC_PRIO_TIMER) {
 159         MODIFY_REG(bbPort->gpio->MODER, bbPort->gpioModeMask, bbPort->gpioModeOutput);
 160     }
 161
 162     // Reinitialize port group DMA for output
 163
 164     dmaResource_t *dmaResource = bbPort->dmaResource;
 165 #ifdef USE_DMA_REGISTER_CACHE
 166     bbDMA_Cmd(bbPort, DISABLE);
 167     bbLoadDMARegs(dmaResource, &bbPort->dmaRegOutput);
 168 #else
 169     //xDMA_DeInit(dmaResource);
 170     xLL_EX_DMA_Deinit(dmaResource);
 171     //xDMA_Init(dmaResource, &bbPort->outputDmaInit);
 172     xLL_EX_DMA_Init(dmaResource, &bbPort->outputDmaInit);
 173     // Needs this, as it is DeInit'ed above...
 174     //xDMA_ITConfig(dmaResource, DMA_IT_TC, ENABLE);
 175     xLL_EX_DMA_EnableIT_TC(dmaResource);
 176 #endif
 177
 178     // Reinitialize pacer timer for output
 179
 180     bbPort->timhw->tim->ARR = bbPort->outputARR;
 181
 182     bbPort->direction = DSHOT_BITBANG_DIRECTION_OUTPUT;
 183 }
 184
 185 #ifdef USE_DSHOT_TELEMETRY
 186 void bbSwitchToInput(bbPort_t *bbPort)
 187 {
 188     // Set GPIO to input
 189
 190     ATOMIC_BLOCK(NVIC_PRIO_TIMER) {
 191         MODIFY_REG(bbPort->gpio->MODER, bbPort->gpioModeMask, bbPort->gpioModeInput);
 192     }
 193
 194     // Reinitialize port group DMA for input
 195
 196     dmaResource_t *dmaResource = bbPort->dmaResource;
 197 #ifdef USE_DMA_REGISTER_CACHE
 198     bbLoadDMARegs(dmaResource, &bbPort->dmaRegInput);
 199 #else
 200     //xDMA_DeInit(dmaResource);
 201     xLL_EX_DMA_Deinit(dmaResource);
 202     //xDMA_Init(dmaResource, &bbPort->inputDmaInit);
 203     xLL_EX_DMA_Init(dmaResource, &bbPort->inputDmaInit);
 204
 205     // Needs this, as it is DeInit'ed above...
 206     //xDMA_ITConfig(dmaResource, DMA_IT_TC, ENABLE);
 207     xLL_EX_DMA_EnableIT_TC(dmaResource);
 208 #endif
 209
 210     // Reinitialize pacer timer for input
 211
 212     bbPort->timhw->tim->ARR = bbPort->inputARR;
 213
 214     bbDMA_Cmd(bbPort, ENABLE);
 215
 216     bbPort->direction = DSHOT_BITBANG_DIRECTION_INPUT;
 217 }
 218 #endif
 219
 220 void bbDMAPreconfigure(bbPort_t *bbPort, uint8_t direction)
 221 {
 222     LL_DMA_InitTypeDef *dmainit = (direction == DSHOT_BITBANG_DIRECTION_OUTPUT) ?  &bbPort->outputDmaInit : &bbPort->inputDmaInit;
 223
 224     LL_DMA_StructInit(dmainit);
 225
 226     dmainit->Mode = LL_DMA_MODE_NORMAL;
 227     dmainit->Channel = bbPort->dmaChannel;
 228     dmainit->PeriphOrM2MSrcIncMode = LL_DMA_PERIPH_NOINCREMENT;
 229     dmainit->MemoryOrM2MDstIncMode = LL_DMA_MEMORY_INCREMENT;
 230     dmainit->FIFOMode = LL_DMA_FIFOMODE_ENABLE ;
 231 #if 0
 232     dmainit->DMA_FIFOThreshold = DMA_FIFOThreshold_1QuarterFull ;
 233     dmainit->DMA_MemoryBurst = DMA_MemoryBurst_Single ;
 234     dmainit->DMA_PeripheralBurst = DMA_PeripheralBurst_Single;
 235 #endif
 236
 237     if (direction == DSHOT_BITBANG_DIRECTION_OUTPUT) {
 238         dmainit->Priority = LL_DMA_PRIORITY_VERYHIGH;
 239         dmainit->Direction = LL_DMA_DIRECTION_MEMORY_TO_PERIPH;
 240         dmainit->NbData = bbPort->portOutputCount;
 241         dmainit->PeriphOrM2MSrcAddress = (uint32_t)&bbPort->gpio->BSRR;
 242         dmainit->PeriphOrM2MSrcDataSize = LL_DMA_PDATAALIGN_WORD;
 243         dmainit->MemoryOrM2MDstAddress = (uint32_t)bbPort->portOutputBuffer;
 244         dmainit->MemoryOrM2MDstDataSize = LL_DMA_MDATAALIGN_WORD;
 245
 246 #ifdef USE_DMA_REGISTER_CACHE
 247         xLL_EX_DMA_Init(bbPort->dmaResource, dmainit);
 248         bbSaveDMARegs(bbPort->dmaResource, &bbPort->dmaRegOutput);
 249 #endif
 250     } else {
 251         dmainit->Priority = LL_DMA_PRIORITY_HIGH;
 252         dmainit->Direction = LL_DMA_DIRECTION_PERIPH_TO_MEMORY;
 253         dmainit->NbData = bbPort->portInputCount;
 254
 255         dmainit->PeriphOrM2MSrcAddress = (uint32_t)&bbPort->gpio->IDR;
 256         dmainit->PeriphOrM2MSrcDataSize = LL_DMA_PDATAALIGN_HALFWORD;
 257         dmainit->MemoryOrM2MDstAddress = (uint32_t)bbPort->portInputBuffer;
 258         dmainit->MemoryOrM2MDstDataSize = LL_DMA_MDATAALIGN_WORD;
 259
 260 #ifdef USE_DMA_REGISTER_CACHE
 261         xLL_EX_DMA_Init(bbPort->dmaResource, dmainit);
 262         bbSaveDMARegs(bbPort->dmaResource, &bbPort->dmaRegInput);
 263 #endif
 264     }
 265 }
 266
 267 void bbTIM_TimeBaseInit(bbPort_t *bbPort, uint16_t period)
 268 {
 269     LL_TIM_InitTypeDef *init = &bbPort->timeBaseInit;
 270
 271     init->Prescaler = 0; // Feed raw timerClock
 272     init->ClockDivision = LL_TIM_CLOCKDIVISION_DIV1;
 273     init->CounterMode = LL_TIM_COUNTERMODE_UP;
 274     init->Autoreload = period;
 275     //TIM_TimeBaseInit(bbPort->timhw->tim, &bbPort->timeBaseInit);
 276     LL_TIM_Init(bbPort->timhw->tim, init);
 277     MODIFY_REG(bbPort->timhw->tim->CR1, TIM_CR1_ARPE, TIM_AUTORELOAD_PRELOAD_ENABLE);
 278 }
 279
 280 void bbTIM_DMACmd(TIM_TypeDef* TIMx, uint16_t TIM_DMASource, FunctionalState NewState)
 281 {
 282     //TIM_DMACmd(TIMx, TIM_DMASource, NewState);
 283     if (NewState == ENABLE) {
 284         SET_BIT(TIMx->DIER, TIM_DMASource);
 285     } else {
 286         CLEAR_BIT(TIMx->DIER, TIM_DMASource);
 287     }
 288 }
 289
 290 void bbDMA_ITConfig(bbPort_t *bbPort)
 291 {
 292     //xDMA_ITConfig(bbPort->dmaResource, DMA_IT_TC, ENABLE);
 293
 294     xLL_EX_DMA_EnableIT_TC(bbPort->dmaResource);
 295
 296     SET_BIT(((DMA_Stream_TypeDef *)(bbPort->dmaResource))->CR, DMA_SxCR_TCIE|DMA_SxCR_TEIE);
 297 }
 298
 299 void bbDMA_Cmd(bbPort_t *bbPort, FunctionalState NewState)
 300 {
 301     //xDMA_Cmd(bbPort->dmaResource, NewState);
 302
 303     if (NewState == ENABLE) {
 304         xLL_EX_DMA_EnableResource(bbPort->dmaResource);
 305     } else {
 306         xLL_EX_DMA_DisableResource(bbPort->dmaResource);
 307     }
 308 }
 309
 310 int bbDMA_Count(bbPort_t *bbPort)
 311 {
 312     return xLL_EX_DMA_GetDataLength(bbPort->dmaResource);
 313 }
 314 #endif // USE_DSHOT_BITBANG