include/miiphy.h

   1 /*
   2  * linux/mii.h: definitions for MII-compatible transceivers
   3  * Originally drivers/net/sunhme.h.
   4  *
   5  * Copyright (C) 1996, 1999, 2001 David S. Miller (davem@redhat.com)
   6  */
   7
   8 #ifndef _MII_PHY_H_
   9 #define _MII_PHY_H_
  10
  11 #include <driver.h>
  12
  13 #define MIIPHY_FORCE_10         (1 << 0)
  14 #define MIIPHY_FORCE_LINK       (1 << 1)
  15
  16 #define MII_BMCR            0x00        /* Basic mode control register */
  17 #define MII_BMSR            0x01        /* Basic mode status register  */
  18 #define MII_PHYSID1         0x02        /* PHYS ID 1                   */
  19 #define MII_PHYSID2         0x03        /* PHYS ID 2                   */
  20 #define MII_ADVERTISE       0x04        /* Advertisement control reg   */
  21 #define MII_LPA             0x05        /* Link partner ability reg    */
  22 #define MII_EXPANSION       0x06        /* Expansion register          */
  23 #define MII_CTRL1000        0x09        /* 1000BASE-T control          */
  24 #define MII_STAT1000        0x0a        /* 1000BASE-T status           */
  25 #define MII_ESTATUS         0x0f        /* Extended Status             */
  26 #define MII_DCOUNTER        0x12        /* Disconnect counter          */
  27 #define MII_FCSCOUNTER      0x13        /* False carrier counter       */
  28 #define MII_NWAYTEST        0x14        /* N-way auto-neg test reg     */
  29 #define MII_RERRCOUNTER     0x15        /* Receive error counter       */
  30 #define MII_SREVISION       0x16        /* Silicon revision            */
  31 #define MII_RESV1           0x17        /* Reserved...                 */
  32 #define MII_LBRERROR        0x18        /* Lpback, rx, bypass error    */
  33 #define MII_PHYADDR         0x19        /* PHY address                 */
  34 #define MII_RESV2           0x1a        /* Reserved...                 */
  35 #define MII_TPISTATUS       0x1b        /* TPI status for 10mbps       */
  36 #define MII_NCONFIG         0x1c        /* Network interface config    */
  37
  38 /* Basic mode control register. */
  39 #define BMCR_RESV               0x003f  /* Unused...                   */
  40 #define BMCR_SPEED1000          0x0040  /* MSB of Speed (1000)         */
  41 #define BMCR_CTST               0x0080  /* Collision test              */
  42 #define BMCR_FULLDPLX           0x0100  /* Full duplex                 */
  43 #define BMCR_ANRESTART          0x0200  /* Auto negotiation restart    */
  44 #define BMCR_ISOLATE            0x0400  /* Disconnect DP83840 from MII */
  45 #define BMCR_PDOWN              0x0800  /* Powerdown the DP83840       */
  46 #define BMCR_ANENABLE           0x1000  /* Enable auto negotiation     */
  47 #define BMCR_SPEED100           0x2000  /* Select 100Mbps              */
  48 #define BMCR_LOOPBACK           0x4000  /* TXD loopback bits           */
  49 #define BMCR_RESET              0x8000  /* Reset the DP83840           */
  50
  51 /* Basic mode status register. */
  52 #define BMSR_ERCAP              0x0001  /* Ext-reg capability          */
  53 #define BMSR_JCD                0x0002  /* Jabber detected             */
  54 #define BMSR_LSTATUS            0x0004  /* Link status                 */
  55 #define BMSR_ANEGCAPABLE        0x0008  /* Able to do auto-negotiation */
  56 #define BMSR_RFAULT             0x0010  /* Remote fault detected       */
  57 #define BMSR_ANEGCOMPLETE       0x0020  /* Auto-negotiation complete   */
  58 #define BMSR_RESV               0x00c0  /* Unused...                   */
  59 #define BMSR_ESTATEN            0x0100  /* Extended Status in R15      */
  60 #define BMSR_100HALF2           0x0200  /* Can do 100BASE-T2 HDX       */
  61 #define BMSR_100FULL2           0x0400  /* Can do 100BASE-T2 FDX       */
  62 #define BMSR_10HALF             0x0800  /* Can do 10mbps, half-duplex  */
  63 #define BMSR_10FULL             0x1000  /* Can do 10mbps, full-duplex  */
  64 #define BMSR_100HALF            0x2000  /* Can do 100mbps, half-duplex */
  65 #define BMSR_100FULL            0x4000  /* Can do 100mbps, full-duplex */
  66 #define BMSR_100BASE4           0x8000  /* Can do 100mbps, 4k packets  */
  67
  68 /* Advertisement control register. */
  69 #define ADVERTISE_SLCT          0x001f  /* Selector bits               */
  70 #define ADVERTISE_CSMA          0x0001  /* Only selector supported     */
  71 #define ADVERTISE_10HALF        0x0020  /* Try for 10mbps half-duplex  */
  72 #define ADVERTISE_1000XFULL     0x0020  /* Try for 1000BASE-X full-duplex */
  73 #define ADVERTISE_10FULL        0x0040  /* Try for 10mbps full-duplex  */
  74 #define ADVERTISE_1000XHALF     0x0040  /* Try for 1000BASE-X half-duplex */
  75 #define ADVERTISE_100HALF       0x0080  /* Try for 100mbps half-duplex */
  76 #define ADVERTISE_1000XPAUSE    0x0080  /* Try for 1000BASE-X pause    */
  77 #define ADVERTISE_100FULL       0x0100  /* Try for 100mbps full-duplex */
  78 #define ADVERTISE_1000XPSE_ASYM 0x0100  /* Try for 1000BASE-X asym pause */
  79 #define ADVERTISE_100BASE4      0x0200  /* Try for 100mbps 4k packets  */
  80 #define ADVERTISE_PAUSE_CAP     0x0400  /* Try for pause               */
  81 #define ADVERTISE_PAUSE_ASYM    0x0800  /* Try for asymetric pause     */
  82 #define ADVERTISE_RESV          0x1000  /* Unused...                   */
  83 #define ADVERTISE_RFAULT        0x2000  /* Say we can detect faults    */
  84 #define ADVERTISE_LPACK         0x4000  /* Ack link partners response  */
  85 #define ADVERTISE_NPAGE         0x8000  /* Next page bit               */
  86
  87 #define ADVERTISE_FULL (ADVERTISE_100FULL | ADVERTISE_10FULL | \
  88                         ADVERTISE_CSMA)
  89 #define ADVERTISE_ALL (ADVERTISE_10HALF | ADVERTISE_10FULL | \
  90                        ADVERTISE_100HALF | ADVERTISE_100FULL)
  91
  92 /* Link partner ability register. */
  93 #define LPA_SLCT                0x001f  /* Same as advertise selector  */
  94 #define LPA_10HALF              0x0020  /* Can do 10mbps half-duplex   */
  95 #define LPA_1000XFULL           0x0020  /* Can do 1000BASE-X full-duplex */
  96 #define LPA_10FULL              0x0040  /* Can do 10mbps full-duplex   */
  97 #define LPA_1000XHALF           0x0040  /* Can do 1000BASE-X half-duplex */
  98 #define LPA_100HALF             0x0080  /* Can do 100mbps half-duplex  */
  99 #define LPA_1000XPAUSE          0x0080  /* Can do 1000BASE-X pause     */
 100 #define LPA_100FULL             0x0100  /* Can do 100mbps full-duplex  */
 101 #define LPA_1000XPAUSE_ASYM     0x0100  /* Can do 1000BASE-X pause asym*/
 102 #define LPA_100BASE4            0x0200  /* Can do 100mbps 4k packets   */
 103 #define LPA_PAUSE_CAP           0x0400  /* Can pause                   */
 104 #define LPA_PAUSE_ASYM          0x0800  /* Can pause asymetrically     */
 105 #define LPA_RESV                0x1000  /* Unused...                   */
 106 #define LPA_RFAULT              0x2000  /* Link partner faulted        */
 107 #define LPA_LPACK               0x4000  /* Link partner acked us       */
 108 #define LPA_NPAGE               0x8000  /* Next page bit               */
 109
 110 #define LPA_DUPLEX              (LPA_10FULL | LPA_100FULL)
 111 #define LPA_100                 (LPA_100FULL | LPA_100HALF | LPA_100BASE4)
 112
 113 /* Expansion register for auto-negotiation. */
 114 #define EXPANSION_NWAY          0x0001  /* Can do N-way auto-nego      */
 115 #define EXPANSION_LCWP          0x0002  /* Got new RX page code word   */
 116 #define EXPANSION_ENABLENPAGE   0x0004  /* This enables npage words    */
 117 #define EXPANSION_NPCAPABLE     0x0008  /* Link partner supports npage */
 118 #define EXPANSION_MFAULTS       0x0010  /* Multiple faults detected    */
 119 #define EXPANSION_RESV          0xffe0  /* Unused...                   */
 120
 121 #define ESTATUS_1000_TFULL      0x2000  /* Can do 1000BT Full */
 122 #define ESTATUS_1000_THALF      0x1000  /* Can do 1000BT Half */
 123
 124 /* N-way test register. */
 125 #define NWAYTEST_RESV1          0x00ff  /* Unused...                   */
 126 #define NWAYTEST_LOOPBACK       0x0100  /* Enable loopback for N-way   */
 127 #define NWAYTEST_RESV2          0xfe00  /* Unused...                   */
 128
 129 /* 1000BASE-T Control register */
 130 #define ADVERTISE_1000FULL      0x0200  /* Advertise 1000BASE-T full duplex */
 131 #define ADVERTISE_1000HALF      0x0100  /* Advertise 1000BASE-T half duplex */
 132
 133 /* 1000BASE-T Status register */
 134 #define LPA_1000LOCALRXOK       0x2000  /* Link partner local receiver status */
 135 #define LPA_1000REMRXOK         0x1000  /* Link partner remote receiver status */
 136 #define LPA_1000FULL            0x0800  /* Link partner 1000BASE-T full duplex */
 137 #define LPA_1000HALF            0x0400  /* Link partner 1000BASE-T half duplex */
 138
 139 struct miiphy_device {
 140         struct device_d dev;
 141
 142         int address;    /* The address the phy has on the bus */
 143         int (*read)(struct miiphy_device *mdev, uint8_t phy_addr, uint8_t reg_addr, uint16_t *value);
 144         int (*write)(struct miiphy_device *mdev, uint8_t phy_addr, uint8_t reg_addr, uint16_t data);
 145
 146         int flags;
 147
 148         struct eth_device *edev;
 149         struct cdev cdev;
 150 };
 151
 152 int miiphy_register(struct miiphy_device *mdev);
 153 void miiphy_unregister(struct miiphy_device *mdev);
 154 int miiphy_restart_aneg(struct miiphy_device *mdev);
 155 int miiphy_wait_aneg(struct miiphy_device *mdev);
 156 int miiphy_print_status(struct miiphy_device *mdev);
 157
 158 #endif