arch/arm/boards/a9m2410/a9m2410.c

   1 /*
   2  * Copyright (C) 2009 Juergen Beisert, Pengutronix
   3  *
   4  * This program is free software; you can redistribute it and/or
   5  * modify it under the terms of the GNU General Public License as
   6  * published by the Free Software Foundation; either version 2 of
   7  * the License, or (at your option) any later version.
   8  *
   9  * This program is distributed in the hope that it will be useful,
  10  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  11  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12  * GNU General Public License for more details.
  13  *
  14  * You should have received a copy of the GNU General Public License
  15  * along with this program; if not, write to the Free Software
  16  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  17  * MA 02111-1307 USA
  18  *
  19  */
  20
  21 /**
  22  * @file
  23  * @brief a9m2410 Specific Board Initialization routines
  24  *
  25  */
  26
  27 #include <common.h>
  28 #include <driver.h>
  29 #include <init.h>
  30 #include <asm/armlinux.h>
  31 #include <asm/mach-types.h>
  32 #include <partition.h>
  33 #include <nand.h>
  34 #include <asm/io.h>
  35 #include <mach/s3c24x0-iomap.h>
  36 #include <mach/s3c24x0-nand.h>
  37
  38 static struct memory_platform_data ram_pdata = {
  39         .name           = "ram0",
  40         .flags          = DEVFS_RDWR,
  41 };
  42
  43 static struct device_d sdram_dev = {
  44         .name           = "ram",
  45         .map_base       = CS6_BASE,
  46         .platform_data  = &ram_pdata,
  47 };
  48
  49 // {"NAND 1MiB 3,3V 8-bit", 0xec, 256, 1, 0x1000, 0},
  50 static struct s3c24x0_nand_platform_data nand_info = {
  51         .nand_timing = CALC_NFCONF_TIMING(A9M2410_TACLS, A9M2410_TWRPH0, A9M2410_TWRPH1)
  52 };
  53
  54 static struct device_d nand_dev = {
  55         .name     = "s3c24x0_nand",
  56         .map_base = S3C24X0_NAND_BASE,
  57         .platform_data  = &nand_info,
  58 };
  59
  60 /*
  61  * SMSC 91C111 network controller on the baseboard
  62  * connected to CS line 1 and interrupt line
  63  * GPIO3, data width is 32 bit
  64  */
  65 static struct device_d network_dev = {
  66         .name     = "smc91c111",
  67         .map_base = CS1_BASE + 0x300,
  68         .size     = 16,
  69 };
  70
  71 static int a9m2410_devices_init(void)
  72 {
  73         uint32_t reg;
  74
  75         /*
  76          * detect the current memory size
  77          * Note: On this card the second SDRAM page is not used
  78          */
  79         reg = readl(BANKSIZE);
  80
  81         switch (reg &= 0x7) {
  82         case 0:
  83                 sdram_dev.size = 32 * 1024 * 1024;
  84                 break;
  85         case 1:
  86                 sdram_dev.size = 64 * 1024 * 1024;
  87                 break;
  88         case 2:
  89                 sdram_dev.size = 128 * 1024 * 1024;
  90                 break;
  91         case 4:
  92                 sdram_dev.size = 2 * 1024 * 1024;
  93                 break;
  94         case 5:
  95                 sdram_dev.size = 4 * 1024 * 1024;
  96                 break;
  97         case 6:
  98                 sdram_dev.size = 8 * 1024 * 1024;
  99                 break;
 100         case 7:
 101                 sdram_dev.size = 16 * 1024 * 1024;
 102                 break;
 103         }
 104
 105         /* ---------- configure the GPIOs ------------- */
 106         writel(0x007FFFFF, GPACON);
 107         writel(0x00000000, GPCCON);
 108         writel(0x00000000, GPCUP);
 109         writel(0x00000000, GPDCON);
 110         writel(0x00000000, GPDUP);
 111         writel(0xAAAAAAAA, GPECON);
 112         writel(0x0000E03F, GPEUP);
 113         writel(0x00000000, GPBCON);     /* all inputs */
 114         writel(0x00000007, GPBUP);      /* pullup disabled for GPB0..3 */
 115         writel(0x00009000, GPFCON);     /* GPF7 CLK_INT#, GPF6 Debug-LED */
 116         writel(0x000000FF, GPFUP);
 117         writel(readl(GPGDAT) | 0x0010, GPGDAT); /* switch off LCD backlight */
 118         writel(0xFF00A938, GPGCON);     /* switch off USB device */
 119         writel(0x0000F000, GPGUP);
 120         writel(readl(GPHDAT) | 0x100, GPHDAT);  /* switch BOOTINT/GPIO_ON# to high */
 121         writel(0x000007FF, GPHUP);
 122         writel(0x0029FAAA, GPHCON);
 123         /*
 124          * USB port1 normal, USB port0 normal, USB1 pads for device
 125          * PCLK output on CLKOUT0, UPLL CLK output on CLKOUT1,
 126          * 2nd SDRAM bank off (only bank 1 is used)
 127          */
 128         writel(0x40140, MISCCR);
 129
 130         /* ----------- configure the access to the outer space ---------- */
 131         reg = readl(BWSCON);
 132
 133         /* CS#1 to access the network controller */
 134         reg &= ~0xf0;
 135         reg |= 0xe0;
 136         writel(0x1350, BANKCON1);
 137
 138         /* CS#2 to the dual 16550 UART */
 139         reg &= ~0xf00;
 140         reg |= 0x400;
 141         writel(0x0d50, BANKCON2);
 142
 143         writel(reg, BWSCON);
 144
 145         /* release the reset signal to the network and UART device */
 146         reg = readl(MISCCR);
 147         reg |= 0x10000;
 148         writel(reg, MISCCR);
 149
 150         /* ----------- the devices the boot loader should work with -------- */
 151         register_device(&nand_dev);
 152         register_device(&sdram_dev);
 153         register_device(&network_dev);
 154
 155 #ifdef CONFIG_NAND
 156         /* ----------- add some vital partitions -------- */
 157         devfs_add_partition("nand0", 0x00000, 0x40000, PARTITION_FIXED, "self_raw");
 158         dev_add_bb_dev("self_raw", "self0");
 159
 160         devfs_add_partition("nand0", 0x40000, 0x20000, PARTITION_FIXED, "env_raw");
 161         dev_add_bb_dev("env_raw", "env0");
 162 #endif
 163
 164         armlinux_add_dram(&sdram_dev);
 165         armlinux_set_bootparams((void *)sdram_dev.map_base + 0x100);
 166         armlinux_set_architecture(MACH_TYPE_A9M2410);
 167
 168         return 0;
 169 }
 170
 171 device_initcall(a9m2410_devices_init);
 172
 173 #ifdef CONFIG_S3C24XX_NAND_BOOT
 174 void __bare_init nand_boot(void)
 175 {
 176         s3c24x0_nand_load_image((void *)TEXT_BASE, 256 * 1024, 0, 512);
 177 }
 178 #endif
 179
 180 static struct device_d a9m2410_serial_device = {
 181         .name     = "s3c24x0_serial",
 182         .map_base = UART1_BASE,
 183         .size     = UART1_SIZE,
 184 };
 185
 186 static int a9m2410_console_init(void)
 187 {
 188         register_device(&a9m2410_serial_device);
 189         return 0;
 190 }
 191
 192 console_initcall(a9m2410_console_init);
 193
 194 /** @page a9m2410 DIGI's a9m2410
 195
 196 This CPU card is based on a Samsung S3C2410 CPU. The card is shipped with:
 197
 198 - S3C2410\@200 MHz (ARM920T/ARMv4T)
 199 - 12MHz crystal reference
 200 - SDRAM 32 MiB
 201    - Samsung K4M563233E-EE1H
 202    - 2M x 32Bit x 4 Banks Mobile SDRAM
 203    - 90 pin FBGA
 204    - CL3\@133MHz, CL2\@100MHz (CAS/RAS delay 19ns)
 205    - four banks
 206    - 32 bit data bits
 207    - row address size is 11
 208    - Row cycle time: 69ns
 209    - collumn address size is 9 bits
 210    - Extended temperature range (-25°C...85°C)
 211    - 64ms refresh period (4k)
 212 - NAND Flash 32 MiB
 213    - Samsung KM29U256T
 214    - 32MiB 3,3V 8-bit
 215    - ID: 0xEC, 0x75, 0x??, 0xBD
 216    - 30ns/40ns/20ns
 217 - I2C interface, 100KHz and 400KHz
 218   - Real Time Clock
 219     - Dallas DS1337
 220     - address 0x68
 221   - EEPROM
 222     - ST M24LC64
 223     - address 0x50
 224     - 16bit addressing
 225 - LCD interface
 226 - Touch Screen interface
 227 - Camera interface
 228 - I2S interface
 229 - AC97 Audio-CODEC interface
 230 - SD card interface
 231 - 3 serial RS232 interfaces
 232 - Host and device USB interface, USB1.1 compliant
 233 - Ethernet interface
 234   - 10Mbps, Cirrus Logic, CS8900A (on the CPU card) or
 235   - 10/100Mbps, SMSC 91C111 (on the baseboard)
 236 - SPI interface
 237 - JTAG interface
 238
 239 How to get the binary image:
 240
 241 Using the default configuration:
 242
 243 @code
 244 make ARCH=arm a9m2410_defconfig
 245 @endcode
 246
 247 Build the binary image:
 248
 249 @code
 250 make ARCH=arm CROSS_COMPILE=armv4compiler
 251 @endcode
 252
 253 @note replace the armv4compiler with your ARM v4 cross compiler.
 254 */