barebox_default_env: fix out of tree build
[barebox-mini2440.git] / board / guf-neso / lowlevel.c
blob0c376f2fae30778059b4b6627423a12a106afd3c
1 /*
3 * (c) 2007 Pengutronix, Sascha Hauer <s.hauer@pengutronix.de>
5 * See file CREDITS for list of people who contributed to this
6 * project.
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * MA 02111-1307 USA
23 #include <common.h>
24 #include <init.h>
25 #include <mach/imx-regs.h>
26 #include <mach/imx-pll.h>
27 #include <mach/esdctl.h>
28 #include <asm/cache-l2x0.h>
29 #include <asm/io.h>
30 #include <mach/imx-nand.h>
31 #include <asm/barebox-arm.h>
32 #include <asm/system.h>
33 #include <asm-generic/memory_layout.h>
35 static void __bare_init __naked insdram(void)
37 uint32_t r;
39 PCCR1 |= PCCR1_NFC_BAUDEN;
41 /* setup a stack to be able to call imx_nand_load_image() */
42 r = STACK_BASE + STACK_SIZE - 12;
43 __asm__ __volatile__("mov sp, %0" : : "r"(r));
45 imx_nand_load_image((void *)TEXT_BASE, 256 * 1024);
47 board_init_lowlevel_return();
50 #define ESDCTL0_VAL (ESDCTL0_SDE | ESDCTL0_ROW13 | ESDCTL0_COL10)
52 void __bare_init __naked board_init_lowlevel(void)
54 uint32_t r;
55 int i;
56 unsigned int *trg, *src;
58 /* ahb lite ip interface */
59 AIPI1_PSR0 = 0x20040304;
60 AIPI1_PSR1 = 0xDFFBFCFB;
61 AIPI2_PSR0 = 0x00000000;
62 AIPI2_PSR1 = 0xFFFFFFFF;
64 /* Skip SDRAM initialization if we run from RAM */
65 r = get_pc();
66 if (r > 0xa0000000 && r < 0xb0000000)
67 board_init_lowlevel_return();
70 * DDR on CSD0
72 writel(0x00000008, ESDMISC); /* Enable DDR SDRAM operation */
74 DSCR(3) = 0x55555555; /* Set the driving strength */
75 DSCR(5) = 0x55555555;
76 DSCR(6) = 0x55555555;
77 DSCR(7) = 0x00005005;
78 DSCR(8) = 0x15555555;
80 writel(0x00000004, ESDMISC); /* Initial reset */
81 writel(0x006ac73a, ESDCFG0);
83 writel(ESDCTL0_VAL | ESDCTL0_SMODE_PRECHARGE, ESDCTL0); /* precharge CSD0 all banks */
84 writel(0x00000000, 0xA0000F00); /* CSD0 precharge address (A10 = 1) */
85 writel(ESDCTL0_VAL | ESDCTL0_SMODE_AUTO_REFRESH, ESDCTL0);
87 for (i = 0; i < 8; i++)
88 writel(0, 0xa0000f00);
90 writel(ESDCTL0_VAL | ESDCTL0_SMODE_LOAD_MODE, ESDCTL0);
92 writeb(0xda, 0xa0000033);
93 writeb(0xff, 0xa1000000);
94 writel(ESDCTL0_VAL | ESDCTL0_DSIZ_31_0 | ESDCTL0_REF4 |
95 ESDCTL0_BL | ESDCTL0_SMODE_NORMAL, ESDCTL0);
97 #ifdef CONFIG_NAND_IMX_BOOT
98 /* skip NAND boot if not running from NFC space */
99 r = get_pc();
100 if (r < IMX_NFC_BASE || r > IMX_NFC_BASE + 0x800)
101 board_init_lowlevel_return();
103 src = (unsigned int *)IMX_NFC_BASE;
104 trg = (unsigned int *)TEXT_BASE;
106 /* Move ourselves out of NFC SRAM */
107 for (i = 0; i < 0x800 / sizeof(int); i++)
108 *trg++ = *src++;
110 /* Jump to SDRAM */
111 r = (unsigned int)&insdram;
112 __asm__ __volatile__("mov pc, %0" : : "r"(r));
113 #else
114 board_init_lowlevel_return();
115 #endif