5 * This is the generic MTD driver for NAND flash devices. It should be
6 * capable of working with almost all NAND chips currently available.
7 * Basic support for AG-AND chips is provided.
9 * Additional technical information is available on
10 * http://www.linux-mtd.infradead.org/doc/nand.html
12 * Copyright (C) 2000 Steven J. Hill (sjhill@realitydiluted.com)
13 * 2002-2006 Thomas Gleixner (tglx@linutronix.de)
16 * David Woodhouse for adding multichip support
18 * Aleph One Ltd. and Toby Churchill Ltd. for supporting the
19 * rework for 2K page size chips
22 * Enable cached programming for 2k page size chips
23 * Check, if mtd->ecctype should be set to MTD_ECC_HW
24 * if we have HW ecc support.
25 * The AG-AND chips have nice features for speed improvement,
26 * which are not supported yet. Read / program 4 pages in one go.
27 * BBT table is not serialized, has to be fixed
29 * This program is free software; you can redistribute it and/or modify
30 * it under the terms of the GNU General Public License version 2 as
31 * published by the Free Software Foundation.
37 #include <linux/mtd/mtd.h>
38 #include <linux/mtd/nand.h>
39 #include <linux/err.h>
40 #include <linux/mtd/nand_ecc.h>
41 #include <asm/byteorder.h>
46 #ifndef DOXYGEN_SHOULD_SKIP_THIS
48 /* Define default oob placement schemes for large and small page devices */
49 static struct nand_ecclayout nand_oob_8
= {
59 static struct nand_ecclayout nand_oob_16
= {
61 .eccpos
= {0, 1, 2, 3, 6, 7},
67 static struct nand_ecclayout nand_oob_64
= {
70 40, 41, 42, 43, 44, 45, 46, 47,
71 48, 49, 50, 51, 52, 53, 54, 55,
72 56, 57, 58, 59, 60, 61, 62, 63},
78 static int nand_get_device(struct nand_chip
*chip
, struct mtd_info
*mtd
,
81 static int nand_do_write_oob(struct mtd_info
*mtd
, loff_t to
,
82 struct mtd_oob_ops
*ops
);
84 #define DEFINE_LED_TRIGGER(x)
85 #define DEFINE_LED_TRIGGER_GLOBAL(x)
86 #define led_trigger_register_simple(x, y) do {} while(0)
87 #define led_trigger_unregister_simple(x) do {} while(0)
88 #define led_trigger_event(x, y) do {} while(0)
91 * For devices which display every fart in the system on a separate LED. Is
92 * compiled away when LED support is disabled.
94 DEFINE_LED_TRIGGER(nand_led_trigger
);
97 * nand_release_device - [GENERIC] release chip
98 * @mtd: MTD device structure
100 * Deselect, release chip lock and wake up anyone waiting on the device
102 static void nand_release_device(struct mtd_info
*mtd
)
104 struct nand_chip
*chip
= mtd
->priv
;
106 /* De-select the NAND device */
107 chip
->select_chip(mtd
, -1);
109 /* Release the controller and the chip */
110 chip
->controller
->active
= NULL
;
111 chip
->state
= FL_READY
;
115 * nand_read_byte - [DEFAULT] read one byte from the chip
116 * @mtd: MTD device structure
118 * Default read function for 8bit buswith
120 static uint8_t nand_read_byte(struct mtd_info
*mtd
)
122 struct nand_chip
*chip
= mtd
->priv
;
123 return readb(chip
->IO_ADDR_R
);
127 * nand_read_byte16 - [DEFAULT] read one byte endianess aware from the chip
128 * @mtd: MTD device structure
130 * Default read function for 16bit buswith with
131 * endianess conversion
133 static uint8_t nand_read_byte16(struct mtd_info
*mtd
)
135 struct nand_chip
*chip
= mtd
->priv
;
136 return (uint8_t) cpu_to_le16(readw(chip
->IO_ADDR_R
));
140 * nand_read_word - [DEFAULT] read one word from the chip
141 * @mtd: MTD device structure
143 * Default read function for 16bit buswith without
144 * endianess conversion
146 static u16
nand_read_word(struct mtd_info
*mtd
)
148 struct nand_chip
*chip
= mtd
->priv
;
149 return readw(chip
->IO_ADDR_R
);
153 * nand_select_chip - [DEFAULT] control CE line
154 * @mtd: MTD device structure
155 * @chipnr: chipnumber to select, -1 for deselect
157 * Default select function for 1 chip devices.
159 static void nand_select_chip(struct mtd_info
*mtd
, int chipnr
)
161 struct nand_chip
*chip
= mtd
->priv
;
165 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
, 0 | NAND_CTRL_CHANGE
);
170 printf("%s: illegal chip number %d\n", chipnr
);
175 * nand_write_buf - [DEFAULT] write buffer to chip
176 * @mtd: MTD device structure
178 * @len: number of bytes to write
180 * Default write function for 8bit buswith
182 static void nand_write_buf(struct mtd_info
*mtd
, const uint8_t *buf
, int len
)
185 struct nand_chip
*chip
= mtd
->priv
;
187 for (i
= 0; i
< len
; i
++)
188 writeb(buf
[i
], chip
->IO_ADDR_W
);
192 * nand_read_buf - [DEFAULT] read chip data into buffer
193 * @mtd: MTD device structure
194 * @buf: buffer to store date
195 * @len: number of bytes to read
197 * Default read function for 8bit buswith
199 static void nand_read_buf(struct mtd_info
*mtd
, uint8_t *buf
, int len
)
202 struct nand_chip
*chip
= mtd
->priv
;
204 for (i
= 0; i
< len
; i
++)
205 buf
[i
] = readb(chip
->IO_ADDR_R
);
209 * nand_verify_buf - [DEFAULT] Verify chip data against buffer
210 * @mtd: MTD device structure
211 * @buf: buffer containing the data to compare
212 * @len: number of bytes to compare
214 * Default verify function for 8bit buswith
216 static int nand_verify_buf(struct mtd_info
*mtd
, const uint8_t *buf
, int len
)
219 struct nand_chip
*chip
= mtd
->priv
;
221 for (i
= 0; i
< len
; i
++)
222 if (buf
[i
] != readb(chip
->IO_ADDR_R
))
228 * nand_write_buf16 - [DEFAULT] write buffer to chip
229 * @mtd: MTD device structure
231 * @len: number of bytes to write
233 * Default write function for 16bit buswith
235 static void nand_write_buf16(struct mtd_info
*mtd
, const uint8_t *buf
, int len
)
238 struct nand_chip
*chip
= mtd
->priv
;
239 u16
*p
= (u16
*) buf
;
242 for (i
= 0; i
< len
; i
++)
243 writew(p
[i
], chip
->IO_ADDR_W
);
248 * nand_read_buf16 - [DEFAULT] read chip data into buffer
249 * @mtd: MTD device structure
250 * @buf: buffer to store date
251 * @len: number of bytes to read
253 * Default read function for 16bit buswith
255 static void nand_read_buf16(struct mtd_info
*mtd
, uint8_t *buf
, int len
)
258 struct nand_chip
*chip
= mtd
->priv
;
259 u16
*p
= (u16
*) buf
;
262 for (i
= 0; i
< len
; i
++)
263 p
[i
] = readw(chip
->IO_ADDR_R
);
267 * nand_verify_buf16 - [DEFAULT] Verify chip data against buffer
268 * @mtd: MTD device structure
269 * @buf: buffer containing the data to compare
270 * @len: number of bytes to compare
272 * Default verify function for 16bit buswith
274 static int nand_verify_buf16(struct mtd_info
*mtd
, const uint8_t *buf
, int len
)
277 struct nand_chip
*chip
= mtd
->priv
;
278 u16
*p
= (u16
*) buf
;
281 for (i
= 0; i
< len
; i
++)
282 if (p
[i
] != readw(chip
->IO_ADDR_R
))
289 * nand_block_bad - [DEFAULT] Read bad block marker from the chip
290 * @mtd: MTD device structure
291 * @ofs: offset from device start
292 * @getchip: 0, if the chip is already selected
294 * Check, if the block is bad.
296 static int nand_block_bad(struct mtd_info
*mtd
, loff_t ofs
, int getchip
)
298 int page
, chipnr
, res
= 0;
299 struct nand_chip
*chip
= mtd
->priv
;
302 page
= (int)(ofs
>> chip
->page_shift
) & chip
->pagemask
;
305 chipnr
= (int)(ofs
>> chip
->chip_shift
);
307 nand_get_device(chip
, mtd
, FL_READING
);
309 /* Select the NAND device */
310 chip
->select_chip(mtd
, chipnr
);
313 if (chip
->options
& NAND_BUSWIDTH_16
) {
314 chip
->cmdfunc(mtd
, NAND_CMD_READOOB
, chip
->badblockpos
& 0xFE,
316 bad
= cpu_to_le16(chip
->read_word(mtd
));
317 if (chip
->badblockpos
& 0x1)
319 if ((bad
& 0xFF) != 0xff)
322 chip
->cmdfunc(mtd
, NAND_CMD_READOOB
, chip
->badblockpos
, page
);
323 if (chip
->read_byte(mtd
) != 0xff)
328 nand_release_device(mtd
);
334 * nand_default_block_markbad - [DEFAULT] mark a block bad
335 * @mtd: MTD device structure
336 * @ofs: offset from device start
338 * This is the default implementation, which can be overridden by
339 * a hardware specific driver.
341 static int nand_default_block_markbad(struct mtd_info
*mtd
, loff_t ofs
)
343 struct nand_chip
*chip
= mtd
->priv
;
344 uint8_t buf
[2] = { 0, 0 };
347 /* Get block number */
348 block
= (int)(ofs
>> chip
->bbt_erase_shift
);
350 chip
->bbt
[block
>> 2] |= 0x01 << ((block
& 0x03) << 1);
352 /* Do we have a flash based bad block table ? */
353 if (chip
->options
& NAND_USE_FLASH_BBT
)
354 ret
= nand_update_bbt(mtd
, ofs
);
356 /* We write two bytes, so we dont have to mess with 16 bit
359 nand_get_device(chip
, mtd
, FL_WRITING
);
361 chip
->ops
.len
= chip
->ops
.ooblen
= 2;
362 chip
->ops
.datbuf
= NULL
;
363 chip
->ops
.oobbuf
= buf
;
364 chip
->ops
.ooboffs
= chip
->badblockpos
& ~0x01;
366 ret
= nand_do_write_oob(mtd
, ofs
, &chip
->ops
);
367 nand_release_device(mtd
);
370 mtd
->ecc_stats
.badblocks
++;
376 * nand_check_wp - [GENERIC] check if the chip is write protected
377 * @mtd: MTD device structure
378 * Check, if the device is write protected
380 * The function expects, that the device is already selected
382 static int nand_check_wp(struct mtd_info
*mtd
)
384 struct nand_chip
*chip
= mtd
->priv
;
385 /* Check the WP bit */
386 chip
->cmdfunc(mtd
, NAND_CMD_STATUS
, -1, -1);
387 return (chip
->read_byte(mtd
) & NAND_STATUS_WP
) ? 0 : 1;
391 * nand_block_checkbad - [GENERIC] Check if a block is marked bad
392 * @mtd: MTD device structure
393 * @ofs: offset from device start
394 * @getchip: 0, if the chip is already selected
395 * @allowbbt: 1, if its allowed to access the bbt area
397 * Check, if the block is bad. Either by reading the bad block table or
398 * calling of the scan function.
400 static int nand_block_checkbad(struct mtd_info
*mtd
, loff_t ofs
, int getchip
,
403 struct nand_chip
*chip
= mtd
->priv
;
406 return chip
->block_bad(mtd
, ofs
, getchip
);
408 /* Return info from the table */
409 return nand_isbad_bbt(mtd
, ofs
, allowbbt
);
413 * Wait for the ready pin, after a command
414 * The timeout is catched later.
416 void nand_wait_ready(struct mtd_info
*mtd
)
418 struct nand_chip
*chip
= mtd
->priv
;
419 uint64_t start
= get_time_ns();
421 led_trigger_event(nand_led_trigger
, LED_FULL
);
422 /* wait until command is processed or timeout occures */
424 if (chip
->dev_ready(mtd
))
426 } while (!is_timeout(start
, SECOND
* 2));
427 led_trigger_event(nand_led_trigger
, LED_OFF
);
429 EXPORT_SYMBOL(nand_wait_ready
);
432 * nand_command - [DEFAULT] Send command to NAND device
433 * @mtd: MTD device structure
434 * @command: the command to be sent
435 * @column: the column address for this command, -1 if none
436 * @page_addr: the page address for this command, -1 if none
438 * Send command to NAND device. This function is used for small page
439 * devices (256/512 Bytes per page)
441 static void nand_command(struct mtd_info
*mtd
, unsigned int command
,
442 int column
, int page_addr
)
444 register struct nand_chip
*chip
= mtd
->priv
;
445 int ctrl
= NAND_CTRL_CLE
| NAND_CTRL_CHANGE
;
448 * Write out the command to the device.
450 if (command
== NAND_CMD_SEQIN
) {
453 if (column
>= mtd
->writesize
) {
455 column
-= mtd
->writesize
;
456 readcmd
= NAND_CMD_READOOB
;
457 } else if (column
< 256) {
458 /* First 256 bytes --> READ0 */
459 readcmd
= NAND_CMD_READ0
;
462 readcmd
= NAND_CMD_READ1
;
464 chip
->cmd_ctrl(mtd
, readcmd
, ctrl
);
465 ctrl
&= ~NAND_CTRL_CHANGE
;
467 chip
->cmd_ctrl(mtd
, command
, ctrl
);
470 * Address cycle, when necessary
472 ctrl
= NAND_CTRL_ALE
| NAND_CTRL_CHANGE
;
473 /* Serially input address */
475 /* Adjust columns for 16 bit buswidth */
476 if (chip
->options
& NAND_BUSWIDTH_16
)
478 chip
->cmd_ctrl(mtd
, column
, ctrl
);
479 ctrl
&= ~NAND_CTRL_CHANGE
;
481 if (page_addr
!= -1) {
482 chip
->cmd_ctrl(mtd
, page_addr
, ctrl
);
483 ctrl
&= ~NAND_CTRL_CHANGE
;
484 chip
->cmd_ctrl(mtd
, page_addr
>> 8, ctrl
);
485 /* One more address cycle for devices > 32MiB */
486 if (chip
->chipsize
> (32 << 20))
487 chip
->cmd_ctrl(mtd
, page_addr
>> 16, ctrl
);
489 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
, NAND_NCE
| NAND_CTRL_CHANGE
);
492 * program and erase have their own busy handlers
493 * status and sequential in needs no delay
497 case NAND_CMD_PAGEPROG
:
498 case NAND_CMD_ERASE1
:
499 case NAND_CMD_ERASE2
:
501 case NAND_CMD_STATUS
:
507 udelay(chip
->chip_delay
);
508 chip
->cmd_ctrl(mtd
, NAND_CMD_STATUS
,
509 NAND_CTRL_CLE
| NAND_CTRL_CHANGE
);
511 NAND_CMD_NONE
, NAND_NCE
| NAND_CTRL_CHANGE
);
512 while (!(chip
->read_byte(mtd
) & NAND_STATUS_READY
)) ;
515 /* This applies to read commands */
518 * If we don't have access to the busy pin, we apply the given
521 if (!chip
->dev_ready
) {
522 udelay(chip
->chip_delay
);
526 /* Apply this short delay always to ensure that we do wait tWB in
527 * any case on any machine. */
530 nand_wait_ready(mtd
);
534 * nand_command_lp - [DEFAULT] Send command to NAND large page device
535 * @mtd: MTD device structure
536 * @command: the command to be sent
537 * @column: the column address for this command, -1 if none
538 * @page_addr: the page address for this command, -1 if none
540 * Send command to NAND device. This is the version for the new large page
541 * devices We dont have the separate regions as we have in the small page
542 * devices. We must emulate NAND_CMD_READOOB to keep the code compatible.
544 static void nand_command_lp(struct mtd_info
*mtd
, unsigned int command
,
545 int column
, int page_addr
)
547 register struct nand_chip
*chip
= mtd
->priv
;
549 /* Emulate NAND_CMD_READOOB */
550 if (command
== NAND_CMD_READOOB
) {
551 column
+= mtd
->writesize
;
552 command
= NAND_CMD_READ0
;
555 /* Command latch cycle */
556 chip
->cmd_ctrl(mtd
, command
& 0xff,
557 NAND_NCE
| NAND_CLE
| NAND_CTRL_CHANGE
);
559 if (column
!= -1 || page_addr
!= -1) {
560 int ctrl
= NAND_CTRL_CHANGE
| NAND_NCE
| NAND_ALE
;
562 /* Serially input address */
564 /* Adjust columns for 16 bit buswidth */
565 if (chip
->options
& NAND_BUSWIDTH_16
)
567 chip
->cmd_ctrl(mtd
, column
, ctrl
);
568 ctrl
&= ~NAND_CTRL_CHANGE
;
569 chip
->cmd_ctrl(mtd
, column
>> 8, ctrl
);
571 if (page_addr
!= -1) {
572 chip
->cmd_ctrl(mtd
, page_addr
, ctrl
);
573 chip
->cmd_ctrl(mtd
, page_addr
>> 8,
574 NAND_NCE
| NAND_ALE
);
575 /* One more address cycle for devices > 128MiB */
576 if (chip
->chipsize
> (128 << 20))
577 chip
->cmd_ctrl(mtd
, page_addr
>> 16,
578 NAND_NCE
| NAND_ALE
);
581 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
, NAND_NCE
| NAND_CTRL_CHANGE
);
584 * program and erase have their own busy handlers
585 * status, sequential in, and deplete1 need no delay
589 case NAND_CMD_CACHEDPROG
:
590 case NAND_CMD_PAGEPROG
:
591 case NAND_CMD_ERASE1
:
592 case NAND_CMD_ERASE2
:
595 case NAND_CMD_STATUS
:
596 case NAND_CMD_DEPLETE1
:
600 * read error status commands require only a short delay
602 case NAND_CMD_STATUS_ERROR
:
603 case NAND_CMD_STATUS_ERROR0
:
604 case NAND_CMD_STATUS_ERROR1
:
605 case NAND_CMD_STATUS_ERROR2
:
606 case NAND_CMD_STATUS_ERROR3
:
607 udelay(chip
->chip_delay
);
613 udelay(chip
->chip_delay
);
614 chip
->cmd_ctrl(mtd
, NAND_CMD_STATUS
,
615 NAND_NCE
| NAND_CLE
| NAND_CTRL_CHANGE
);
616 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
,
617 NAND_NCE
| NAND_CTRL_CHANGE
);
618 while (!(chip
->read_byte(mtd
) & NAND_STATUS_READY
)) ;
621 case NAND_CMD_RNDOUT
:
622 /* No ready / busy check necessary */
623 chip
->cmd_ctrl(mtd
, NAND_CMD_RNDOUTSTART
,
624 NAND_NCE
| NAND_CLE
| NAND_CTRL_CHANGE
);
625 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
,
626 NAND_NCE
| NAND_CTRL_CHANGE
);
630 chip
->cmd_ctrl(mtd
, NAND_CMD_READSTART
,
631 NAND_NCE
| NAND_CLE
| NAND_CTRL_CHANGE
);
632 chip
->cmd_ctrl(mtd
, NAND_CMD_NONE
,
633 NAND_NCE
| NAND_CTRL_CHANGE
);
635 /* This applies to read commands */
638 * If we don't have access to the busy pin, we apply the given
641 if (!chip
->dev_ready
) {
642 udelay(chip
->chip_delay
);
647 /* Apply this short delay always to ensure that we do wait tWB in
648 * any case on any machine. */
651 nand_wait_ready(mtd
);
655 * nand_get_device - [GENERIC] Get chip for selected access
656 * @chip: the nand chip descriptor
657 * @mtd: MTD device structure
658 * @new_state: the state which is requested
660 * Get the device and lock it for exclusive access
663 nand_get_device(struct nand_chip
*chip
, struct mtd_info
*mtd
, int new_state
)
666 /* Hardware controller shared among independend devices */
667 if (!chip
->controller
->active
)
668 chip
->controller
->active
= chip
;
670 if (chip
->controller
->active
== chip
&& chip
->state
== FL_READY
) {
671 chip
->state
= new_state
;
674 if (new_state
== FL_PM_SUSPENDED
) {
675 return (chip
->state
== FL_PM_SUSPENDED
) ? 0 : -EAGAIN
;
681 * nand_wait - [DEFAULT] wait until the command is done
682 * @mtd: MTD device structure
683 * @chip: NAND chip structure
685 * Wait for command done. This applies to erase and program only
686 * Erase can take up to 400ms and program up to 20ms according to
687 * general NAND and SmartMedia specs
689 static int nand_wait(struct mtd_info
*mtd
, struct nand_chip
*chip
)
692 uint64_t start
= get_time_ns();
694 int status
, state
= chip
->state
;
696 if (state
== FL_ERASING
)
697 timeo
= 400 * MSECOND
;
699 timeo
= 20 * MSECOND
;
701 led_trigger_event(nand_led_trigger
, LED_FULL
);
703 /* Apply this short delay always to ensure that we do wait tWB in
704 * any case on any machine. */
707 if ((state
== FL_ERASING
) && (chip
->options
& NAND_IS_AND
))
708 chip
->cmdfunc(mtd
, NAND_CMD_STATUS_MULTI
, -1, -1);
710 chip
->cmdfunc(mtd
, NAND_CMD_STATUS
, -1, -1);
712 while (!is_timeout(start
, timeo
)) {
713 if (chip
->dev_ready
) {
714 if (chip
->dev_ready(mtd
))
717 if (chip
->read_byte(mtd
) & NAND_STATUS_READY
)
721 led_trigger_event(nand_led_trigger
, LED_OFF
);
723 status
= (int)chip
->read_byte(mtd
);
728 * nand_read_page_raw - [Intern] read raw page data without ecc
729 * @mtd: mtd info structure
730 * @chip: nand chip info structure
731 * @buf: buffer to store read data
733 static int nand_read_page_raw(struct mtd_info
*mtd
, struct nand_chip
*chip
,
736 chip
->read_buf(mtd
, buf
, mtd
->writesize
);
737 chip
->read_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
742 * nand_read_page_swecc - [REPLACABLE] software ecc based page read function
743 * @mtd: mtd info structure
744 * @chip: nand chip info structure
745 * @buf: buffer to store read data
747 static int nand_read_page_swecc(struct mtd_info
*mtd
, struct nand_chip
*chip
,
750 int i
, eccsize
= chip
->ecc
.size
;
751 int eccbytes
= chip
->ecc
.bytes
;
752 int eccsteps
= chip
->ecc
.steps
;
754 uint8_t *ecc_calc
= chip
->buffers
->ecccalc
;
755 uint8_t *ecc_code
= chip
->buffers
->ecccode
;
756 uint32_t *eccpos
= chip
->ecc
.layout
->eccpos
;
758 chip
->ecc
.read_page_raw(mtd
, chip
, buf
);
760 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
)
761 chip
->ecc
.calculate(mtd
, p
, &ecc_calc
[i
]);
763 for (i
= 0; i
< chip
->ecc
.total
; i
++)
764 ecc_code
[i
] = chip
->oob_poi
[eccpos
[i
]];
766 eccsteps
= chip
->ecc
.steps
;
769 for (i
= 0 ; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
772 stat
= chip
->ecc
.correct(mtd
, p
, &ecc_code
[i
], &ecc_calc
[i
]);
774 mtd
->ecc_stats
.failed
++;
776 mtd
->ecc_stats
.corrected
+= stat
;
782 * nand_read_page_hwecc - [REPLACABLE] hardware ecc based page read function
783 * @mtd: mtd info structure
784 * @chip: nand chip info structure
785 * @buf: buffer to store read data
787 * Not for syndrome calculating ecc controllers which need a special oob layout
789 static int nand_read_page_hwecc(struct mtd_info
*mtd
, struct nand_chip
*chip
,
792 int i
, eccsize
= chip
->ecc
.size
;
793 int eccbytes
= chip
->ecc
.bytes
;
794 int eccsteps
= chip
->ecc
.steps
;
796 uint8_t *ecc_calc
= chip
->buffers
->ecccalc
;
797 uint8_t *ecc_code
= chip
->buffers
->ecccode
;
798 uint32_t *eccpos
= chip
->ecc
.layout
->eccpos
;
800 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
801 chip
->ecc
.hwctl(mtd
, NAND_ECC_READ
);
802 chip
->read_buf(mtd
, p
, eccsize
);
803 chip
->ecc
.calculate(mtd
, p
, &ecc_calc
[i
]);
805 chip
->read_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
807 for (i
= 0; i
< chip
->ecc
.total
; i
++)
808 ecc_code
[i
] = chip
->oob_poi
[eccpos
[i
]];
810 eccsteps
= chip
->ecc
.steps
;
813 for (i
= 0 ; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
816 stat
= chip
->ecc
.correct(mtd
, p
, &ecc_code
[i
], &ecc_calc
[i
]);
818 mtd
->ecc_stats
.failed
++;
820 mtd
->ecc_stats
.corrected
+= stat
;
826 * nand_read_page_syndrome - [REPLACABLE] hardware ecc syndrom based page read
827 * @mtd: mtd info structure
828 * @chip: nand chip info structure
829 * @buf: buffer to store read data
831 * The hw generator calculates the error syndrome automatically. Therefor
832 * we need a special oob layout and handling.
834 static int nand_read_page_syndrome(struct mtd_info
*mtd
, struct nand_chip
*chip
,
837 int i
, eccsize
= chip
->ecc
.size
;
838 int eccbytes
= chip
->ecc
.bytes
;
839 int eccsteps
= chip
->ecc
.steps
;
841 uint8_t *oob
= chip
->oob_poi
;
843 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
846 chip
->ecc
.hwctl(mtd
, NAND_ECC_READ
);
847 chip
->read_buf(mtd
, p
, eccsize
);
849 if (chip
->ecc
.prepad
) {
850 chip
->read_buf(mtd
, oob
, chip
->ecc
.prepad
);
851 oob
+= chip
->ecc
.prepad
;
854 chip
->ecc
.hwctl(mtd
, NAND_ECC_READSYN
);
855 chip
->read_buf(mtd
, oob
, eccbytes
);
856 stat
= chip
->ecc
.correct(mtd
, p
, oob
, NULL
);
859 mtd
->ecc_stats
.failed
++;
861 mtd
->ecc_stats
.corrected
+= stat
;
865 if (chip
->ecc
.postpad
) {
866 chip
->read_buf(mtd
, oob
, chip
->ecc
.postpad
);
867 oob
+= chip
->ecc
.postpad
;
871 /* Calculate remaining oob bytes */
872 i
= mtd
->oobsize
- (oob
- chip
->oob_poi
);
874 chip
->read_buf(mtd
, oob
, i
);
880 * nand_transfer_oob - [Internal] Transfer oob to client buffer
881 * @chip: nand chip structure
882 * @oob: oob destination address
883 * @ops: oob ops structure
884 * @len: size of oob to transfer
886 static uint8_t *nand_transfer_oob(struct nand_chip
*chip
, uint8_t *oob
,
887 struct mtd_oob_ops
*ops
, size_t len
)
893 memcpy(oob
, chip
->oob_poi
+ ops
->ooboffs
, len
);
897 struct nand_oobfree
*free
= chip
->ecc
.layout
->oobfree
;
898 uint32_t boffs
= 0, roffs
= ops
->ooboffs
;
901 for(; free
->length
&& len
; free
++, len
-= bytes
) {
902 /* Read request not from offset 0 ? */
903 if (unlikely(roffs
)) {
904 if (roffs
>= free
->length
) {
905 roffs
-= free
->length
;
908 boffs
= free
->offset
+ roffs
;
909 bytes
= min_t(size_t, len
,
910 (free
->length
- roffs
));
913 bytes
= min_t(size_t, len
, free
->length
);
914 boffs
= free
->offset
;
916 memcpy(oob
, chip
->oob_poi
+ boffs
, bytes
);
928 * nand_do_read_ops - [Internal] Read data with ECC
930 * @mtd: MTD device structure
931 * @from: offset to read from
932 * @ops: oob ops structure
934 * Internal function. Called with chip held.
936 static int nand_do_read_ops(struct mtd_info
*mtd
, loff_t from
,
937 struct mtd_oob_ops
*ops
)
939 int chipnr
, page
, realpage
, col
, bytes
, aligned
;
940 struct nand_chip
*chip
= mtd
->priv
;
941 struct mtd_ecc_stats stats
;
942 int blkcheck
= (1 << (chip
->phys_erase_shift
- chip
->page_shift
)) - 1;
945 uint32_t readlen
= ops
->len
;
946 uint32_t oobreadlen
= ops
->ooblen
;
947 uint8_t *bufpoi
, *oob
, *buf
;
949 stats
= mtd
->ecc_stats
;
951 chipnr
= (int)(from
>> chip
->chip_shift
);
952 chip
->select_chip(mtd
, chipnr
);
954 realpage
= (int)(from
>> chip
->page_shift
);
955 page
= realpage
& chip
->pagemask
;
957 col
= (int)(from
& (mtd
->writesize
- 1));
963 bytes
= min(mtd
->writesize
- col
, readlen
);
964 aligned
= (bytes
== mtd
->writesize
);
966 /* Is the current page in the buffer ? */
967 if (realpage
!= chip
->pagebuf
|| oob
) {
968 bufpoi
= aligned
? buf
: chip
->buffers
->databuf
;
970 if (likely(sndcmd
)) {
971 chip
->cmdfunc(mtd
, NAND_CMD_READ0
, 0x00, page
);
975 /* Now read the page into the buffer */
976 if (unlikely(ops
->mode
== MTD_OOB_RAW
))
977 ret
= chip
->ecc
.read_page_raw(mtd
, chip
, bufpoi
);
979 ret
= chip
->ecc
.read_page(mtd
, chip
, bufpoi
);
983 /* Transfer not aligned data */
985 chip
->pagebuf
= realpage
;
986 memcpy(buf
, chip
->buffers
->databuf
+ col
, bytes
);
992 /* Raw mode does data:oob:data:oob */
993 if (ops
->mode
!= MTD_OOB_RAW
) {
994 int toread
= min(oobreadlen
,
995 chip
->ecc
.layout
->oobavail
);
997 oob
= nand_transfer_oob(chip
,
999 oobreadlen
-= toread
;
1002 buf
= nand_transfer_oob(chip
,
1003 buf
, ops
, mtd
->oobsize
);
1006 if (!(chip
->options
& NAND_NO_READRDY
)) {
1008 * Apply delay or wait for ready/busy pin. Do
1009 * this before the AUTOINCR check, so no
1010 * problems arise if a chip which does auto
1011 * increment is marked as NOAUTOINCR by the
1014 if (!chip
->dev_ready
)
1015 udelay(chip
->chip_delay
);
1017 nand_wait_ready(mtd
);
1020 memcpy(buf
, chip
->buffers
->databuf
+ col
, bytes
);
1029 /* For subsequent reads align to page boundary. */
1031 /* Increment page address */
1034 page
= realpage
& chip
->pagemask
;
1035 /* Check, if we cross a chip boundary */
1038 chip
->select_chip(mtd
, -1);
1039 chip
->select_chip(mtd
, chipnr
);
1042 /* Check, if the chip supports auto page increment
1043 * or if we have hit a block boundary.
1045 if (!NAND_CANAUTOINCR(chip
) || !(page
& blkcheck
))
1049 ops
->retlen
= ops
->len
- (size_t) readlen
;
1051 ops
->oobretlen
= ops
->ooblen
- oobreadlen
;
1056 if (mtd
->ecc_stats
.failed
- stats
.failed
)
1063 * nand_read - [MTD Interface] MTD compability function for nand_do_read_ecc
1064 * @mtd: MTD device structure
1065 * @from: offset to read from
1066 * @len: number of bytes to read
1067 * @retlen: pointer to variable to store the number of read bytes
1068 * @buf: the databuffer to put data
1070 * Get hold of the chip and call nand_do_read
1072 static int nand_read(struct mtd_info
*mtd
, loff_t from
, size_t len
,
1073 size_t *retlen
, uint8_t *buf
)
1075 struct nand_chip
*chip
= mtd
->priv
;
1078 /* Do not allow reads past end of device */
1079 if ((from
+ len
) > mtd
->size
)
1084 nand_get_device(chip
, mtd
, FL_READING
);
1086 chip
->ops
.len
= len
;
1087 chip
->ops
.datbuf
= buf
;
1088 chip
->ops
.oobbuf
= NULL
;
1090 ret
= nand_do_read_ops(mtd
, from
, &chip
->ops
);
1092 *retlen
= chip
->ops
.retlen
;
1094 nand_release_device(mtd
);
1100 * nand_read_oob_std - [REPLACABLE] the most common OOB data read function
1101 * @mtd: mtd info structure
1102 * @chip: nand chip info structure
1103 * @page: page number to read
1104 * @sndcmd: flag whether to issue read command or not
1106 static int nand_read_oob_std(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1107 int page
, int sndcmd
)
1110 chip
->cmdfunc(mtd
, NAND_CMD_READOOB
, 0, page
);
1113 chip
->read_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
1118 * nand_read_oob_syndrome - [REPLACABLE] OOB data read function for HW ECC
1120 * @mtd: mtd info structure
1121 * @chip: nand chip info structure
1122 * @page: page number to read
1123 * @sndcmd: flag whether to issue read command or not
1125 static int nand_read_oob_syndrome(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1126 int page
, int sndcmd
)
1128 uint8_t *buf
= chip
->oob_poi
;
1129 int length
= mtd
->oobsize
;
1130 int chunk
= chip
->ecc
.bytes
+ chip
->ecc
.prepad
+ chip
->ecc
.postpad
;
1131 int eccsize
= chip
->ecc
.size
;
1132 uint8_t *bufpoi
= buf
;
1133 int i
, toread
, sndrnd
= 0, pos
;
1135 chip
->cmdfunc(mtd
, NAND_CMD_READ0
, chip
->ecc
.size
, page
);
1136 for (i
= 0; i
< chip
->ecc
.steps
; i
++) {
1138 pos
= eccsize
+ i
* (eccsize
+ chunk
);
1139 if (mtd
->writesize
> 512)
1140 chip
->cmdfunc(mtd
, NAND_CMD_RNDOUT
, pos
, -1);
1142 chip
->cmdfunc(mtd
, NAND_CMD_READ0
, pos
, page
);
1145 toread
= min_t(int, length
, chunk
);
1146 chip
->read_buf(mtd
, bufpoi
, toread
);
1151 chip
->read_buf(mtd
, bufpoi
, length
);
1157 * nand_write_oob_std - [REPLACABLE] the most common OOB data write function
1158 * @mtd: mtd info structure
1159 * @chip: nand chip info structure
1160 * @page: page number to write
1162 static int nand_write_oob_std(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1166 const uint8_t *buf
= chip
->oob_poi
;
1167 int length
= mtd
->oobsize
;
1169 chip
->cmdfunc(mtd
, NAND_CMD_SEQIN
, mtd
->writesize
, page
);
1170 chip
->write_buf(mtd
, buf
, length
);
1171 /* Send command to program the OOB data */
1172 chip
->cmdfunc(mtd
, NAND_CMD_PAGEPROG
, -1, -1);
1174 status
= chip
->waitfunc(mtd
, chip
);
1176 return status
& NAND_STATUS_FAIL
? -EIO
: 0;
1180 * nand_write_oob_syndrome - [REPLACABLE] OOB data write function for HW ECC
1181 * with syndrome - only for large page flash !
1182 * @mtd: mtd info structure
1183 * @chip: nand chip info structure
1184 * @page: page number to write
1186 static int nand_write_oob_syndrome(struct mtd_info
*mtd
,
1187 struct nand_chip
*chip
, int page
)
1189 int chunk
= chip
->ecc
.bytes
+ chip
->ecc
.prepad
+ chip
->ecc
.postpad
;
1190 int eccsize
= chip
->ecc
.size
, length
= mtd
->oobsize
;
1191 int i
, len
, pos
, status
= 0, sndcmd
= 0, steps
= chip
->ecc
.steps
;
1192 const uint8_t *bufpoi
= chip
->oob_poi
;
1195 * data-ecc-data-ecc ... ecc-oob
1197 * data-pad-ecc-pad-data-pad .... ecc-pad-oob
1199 if (!chip
->ecc
.prepad
&& !chip
->ecc
.postpad
) {
1200 pos
= steps
* (eccsize
+ chunk
);
1205 chip
->cmdfunc(mtd
, NAND_CMD_SEQIN
, pos
, page
);
1206 for (i
= 0; i
< steps
; i
++) {
1208 if (mtd
->writesize
<= 512) {
1209 uint32_t fill
= 0xFFFFFFFF;
1213 int num
= min_t(int, len
, 4);
1214 chip
->write_buf(mtd
, (uint8_t *)&fill
,
1219 pos
= eccsize
+ i
* (eccsize
+ chunk
);
1220 chip
->cmdfunc(mtd
, NAND_CMD_RNDIN
, pos
, -1);
1224 len
= min_t(int, length
, chunk
);
1225 chip
->write_buf(mtd
, bufpoi
, len
);
1230 chip
->write_buf(mtd
, bufpoi
, length
);
1232 chip
->cmdfunc(mtd
, NAND_CMD_PAGEPROG
, -1, -1);
1233 status
= chip
->waitfunc(mtd
, chip
);
1235 return status
& NAND_STATUS_FAIL
? -EIO
: 0;
1239 * nand_do_read_oob - [Intern] NAND read out-of-band
1240 * @mtd: MTD device structure
1241 * @from: offset to read from
1242 * @ops: oob operations description structure
1244 * NAND read out-of-band data from the spare area
1246 static int nand_do_read_oob(struct mtd_info
*mtd
, loff_t from
,
1247 struct mtd_oob_ops
*ops
)
1249 int page
, realpage
, chipnr
, sndcmd
= 1;
1250 struct nand_chip
*chip
= mtd
->priv
;
1251 int blkcheck
= (1 << (chip
->phys_erase_shift
- chip
->page_shift
)) - 1;
1252 int readlen
= ops
->ooblen
;
1254 uint8_t *buf
= ops
->oobbuf
;
1256 MTD_DEBUG(MTD_DEBUG_LEVEL3
, "nand_read_oob: from = 0x%08Lx, len = %i\n",
1257 (unsigned long long)from
, readlen
);
1259 if (ops
->mode
== MTD_OOB_AUTO
)
1260 len
= chip
->ecc
.layout
->oobavail
;
1264 if (unlikely(ops
->ooboffs
>= len
)) {
1265 MTD_DEBUG(MTD_DEBUG_LEVEL0
, "nand_read_oob: "
1266 "Attempt to start read outside oob\n");
1270 /* Do not allow reads past end of device */
1271 if (unlikely(from
>= mtd
->size
||
1272 ops
->ooboffs
+ readlen
> ((mtd
->size
>> chip
->page_shift
) -
1273 (from
>> chip
->page_shift
)) * len
)) {
1274 MTD_DEBUG(MTD_DEBUG_LEVEL0
, "nand_read_oob: "
1275 "Attempt read beyond end of device\n");
1279 chipnr
= (int)(from
>> chip
->chip_shift
);
1280 chip
->select_chip(mtd
, chipnr
);
1282 /* Shift to get page */
1283 realpage
= (int)(from
>> chip
->page_shift
);
1284 page
= realpage
& chip
->pagemask
;
1287 sndcmd
= chip
->ecc
.read_oob(mtd
, chip
, page
, sndcmd
);
1289 len
= min(len
, readlen
);
1290 buf
= nand_transfer_oob(chip
, buf
, ops
, len
);
1292 if (!(chip
->options
& NAND_NO_READRDY
)) {
1294 * Apply delay or wait for ready/busy pin. Do this
1295 * before the AUTOINCR check, so no problems arise if a
1296 * chip which does auto increment is marked as
1297 * NOAUTOINCR by the board driver.
1299 if (!chip
->dev_ready
)
1300 udelay(chip
->chip_delay
);
1302 nand_wait_ready(mtd
);
1309 /* Increment page address */
1312 page
= realpage
& chip
->pagemask
;
1313 /* Check, if we cross a chip boundary */
1316 chip
->select_chip(mtd
, -1);
1317 chip
->select_chip(mtd
, chipnr
);
1320 /* Check, if the chip supports auto page increment
1321 * or if we have hit a block boundary.
1323 if (!NAND_CANAUTOINCR(chip
) || !(page
& blkcheck
))
1327 ops
->oobretlen
= ops
->ooblen
;
1332 * nand_read_oob - [MTD Interface] NAND read data and/or out-of-band
1333 * @mtd: MTD device structure
1334 * @from: offset to read from
1335 * @ops: oob operation description structure
1337 * NAND read data and/or out-of-band data
1339 static int nand_read_oob(struct mtd_info
*mtd
, loff_t from
,
1340 struct mtd_oob_ops
*ops
)
1342 struct nand_chip
*chip
= mtd
->priv
;
1347 /* Do not allow reads past end of device */
1348 if (ops
->datbuf
&& (from
+ ops
->len
) > mtd
->size
) {
1349 MTD_DEBUG(MTD_DEBUG_LEVEL0
, "nand_read_oob: "
1350 "Attempt read beyond end of device\n");
1354 nand_get_device(chip
, mtd
, FL_READING
);
1367 ret
= nand_do_read_oob(mtd
, from
, ops
);
1369 ret
= nand_do_read_ops(mtd
, from
, ops
);
1372 nand_release_device(mtd
);
1378 * nand_write_page_raw - [Intern] raw page write function
1379 * @mtd: mtd info structure
1380 * @chip: nand chip info structure
1383 static void nand_write_page_raw(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1386 chip
->write_buf(mtd
, buf
, mtd
->writesize
);
1387 chip
->write_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
1391 * nand_write_page_swecc - [REPLACABLE] software ecc based page write function
1392 * @mtd: mtd info structure
1393 * @chip: nand chip info structure
1396 static void nand_write_page_swecc(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1399 int i
, eccsize
= chip
->ecc
.size
;
1400 int eccbytes
= chip
->ecc
.bytes
;
1401 int eccsteps
= chip
->ecc
.steps
;
1402 uint8_t *ecc_calc
= chip
->buffers
->ecccalc
;
1403 const uint8_t *p
= buf
;
1404 uint32_t *eccpos
= chip
->ecc
.layout
->eccpos
;
1406 /* Software ecc calculation */
1407 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
)
1408 chip
->ecc
.calculate(mtd
, p
, &ecc_calc
[i
]);
1410 for (i
= 0; i
< chip
->ecc
.total
; i
++)
1411 chip
->oob_poi
[eccpos
[i
]] = ecc_calc
[i
];
1413 chip
->ecc
.write_page_raw(mtd
, chip
, buf
);
1417 * nand_write_page_hwecc - [REPLACABLE] hardware ecc based page write function
1418 * @mtd: mtd info structure
1419 * @chip: nand chip info structure
1422 static void nand_write_page_hwecc(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1425 int i
, eccsize
= chip
->ecc
.size
;
1426 int eccbytes
= chip
->ecc
.bytes
;
1427 int eccsteps
= chip
->ecc
.steps
;
1428 uint8_t *ecc_calc
= chip
->buffers
->ecccalc
;
1429 const uint8_t *p
= buf
;
1430 uint32_t *eccpos
= chip
->ecc
.layout
->eccpos
;
1432 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
1433 chip
->ecc
.hwctl(mtd
, NAND_ECC_WRITE
);
1434 chip
->write_buf(mtd
, p
, eccsize
);
1435 chip
->ecc
.calculate(mtd
, p
, &ecc_calc
[i
]);
1438 for (i
= 0; i
< chip
->ecc
.total
; i
++)
1439 chip
->oob_poi
[eccpos
[i
]] = ecc_calc
[i
];
1441 chip
->write_buf(mtd
, chip
->oob_poi
, mtd
->oobsize
);
1445 * nand_write_page_syndrome - [REPLACABLE] hardware ecc syndrom based page write
1446 * @mtd: mtd info structure
1447 * @chip: nand chip info structure
1450 * The hw generator calculates the error syndrome automatically. Therefor
1451 * we need a special oob layout and handling.
1453 static void nand_write_page_syndrome(struct mtd_info
*mtd
,
1454 struct nand_chip
*chip
, const uint8_t *buf
)
1456 int i
, eccsize
= chip
->ecc
.size
;
1457 int eccbytes
= chip
->ecc
.bytes
;
1458 int eccsteps
= chip
->ecc
.steps
;
1459 const uint8_t *p
= buf
;
1460 uint8_t *oob
= chip
->oob_poi
;
1462 for (i
= 0; eccsteps
; eccsteps
--, i
+= eccbytes
, p
+= eccsize
) {
1464 chip
->ecc
.hwctl(mtd
, NAND_ECC_WRITE
);
1465 chip
->write_buf(mtd
, p
, eccsize
);
1467 if (chip
->ecc
.prepad
) {
1468 chip
->write_buf(mtd
, oob
, chip
->ecc
.prepad
);
1469 oob
+= chip
->ecc
.prepad
;
1472 chip
->ecc
.calculate(mtd
, p
, oob
);
1473 chip
->write_buf(mtd
, oob
, eccbytes
);
1476 if (chip
->ecc
.postpad
) {
1477 chip
->write_buf(mtd
, oob
, chip
->ecc
.postpad
);
1478 oob
+= chip
->ecc
.postpad
;
1482 /* Calculate remaining oob bytes */
1483 i
= mtd
->oobsize
- (oob
- chip
->oob_poi
);
1485 chip
->write_buf(mtd
, oob
, i
);
1489 * nand_write_page - [REPLACEABLE] write one page
1490 * @mtd: MTD device structure
1491 * @chip: NAND chip descriptor
1492 * @buf: the data to write
1493 * @page: page number to write
1494 * @cached: cached programming
1495 * @raw: use _raw version of write_page
1497 static int nand_write_page(struct mtd_info
*mtd
, struct nand_chip
*chip
,
1498 const uint8_t *buf
, int page
, int cached
, int raw
)
1502 chip
->cmdfunc(mtd
, NAND_CMD_SEQIN
, 0x00, page
);
1505 chip
->ecc
.write_page_raw(mtd
, chip
, buf
);
1507 chip
->ecc
.write_page(mtd
, chip
, buf
);
1510 * Cached progamming disabled for now, Not sure if its worth the
1511 * trouble. The speed gain is not very impressive. (2.3->2.6Mib/s)
1515 if (!cached
|| !(chip
->options
& NAND_CACHEPRG
)) {
1517 chip
->cmdfunc(mtd
, NAND_CMD_PAGEPROG
, -1, -1);
1518 status
= chip
->waitfunc(mtd
, chip
);
1520 * See if operation failed and additional status checks are
1523 if ((status
& NAND_STATUS_FAIL
) && (chip
->errstat
))
1524 status
= chip
->errstat(mtd
, chip
, FL_WRITING
, status
,
1527 if (status
& NAND_STATUS_FAIL
) {
1531 chip
->cmdfunc(mtd
, NAND_CMD_CACHEDPROG
, -1, -1);
1532 status
= chip
->waitfunc(mtd
, chip
);
1535 #ifdef CONFIG_MTD_NAND_VERIFY_WRITE
1536 /* Send command to read back the data */
1537 chip
->cmdfunc(mtd
, NAND_CMD_READ0
, 0, page
);
1539 if (chip
->verify_buf(mtd
, buf
, mtd
->writesize
))
1546 * nand_fill_oob - [Internal] Transfer client buffer to oob
1547 * @chip: nand chip structure
1548 * @oob: oob data buffer
1549 * @ops: oob ops structure
1551 static uint8_t *nand_fill_oob(struct nand_chip
*chip
, uint8_t *oob
,
1552 struct mtd_oob_ops
*ops
)
1554 size_t len
= ops
->ooblen
;
1560 memcpy(chip
->oob_poi
+ ops
->ooboffs
, oob
, len
);
1563 case MTD_OOB_AUTO
: {
1564 struct nand_oobfree
*free
= chip
->ecc
.layout
->oobfree
;
1565 uint32_t boffs
= 0, woffs
= ops
->ooboffs
;
1568 for(; free
->length
&& len
; free
++, len
-= bytes
) {
1569 /* Write request not from offset 0 ? */
1570 if (unlikely(woffs
)) {
1571 if (woffs
>= free
->length
) {
1572 woffs
-= free
->length
;
1575 boffs
= free
->offset
+ woffs
;
1576 bytes
= min_t(size_t, len
,
1577 (free
->length
- woffs
));
1580 bytes
= min_t(size_t, len
, free
->length
);
1581 boffs
= free
->offset
;
1583 memcpy(chip
->oob_poi
+ boffs
, oob
, bytes
);
1594 #define NOTALIGNED(x) (x & (chip->subpagesize - 1)) != 0
1597 * nand_do_write_ops - [Internal] NAND write with ECC
1598 * @mtd: MTD device structure
1599 * @to: offset to write to
1600 * @ops: oob operations description structure
1602 * NAND write with ECC
1604 static int nand_do_write_ops(struct mtd_info
*mtd
, loff_t to
,
1605 struct mtd_oob_ops
*ops
)
1607 int chipnr
, realpage
, page
, blockmask
, column
;
1608 struct nand_chip
*chip
= mtd
->priv
;
1609 uint32_t writelen
= ops
->len
;
1610 uint8_t *oob
= ops
->oobbuf
;
1611 uint8_t *buf
= ops
->datbuf
;
1618 /* reject writes, which are not page aligned */
1619 if (NOTALIGNED(to
) || NOTALIGNED(ops
->len
)) {
1620 printk(KERN_NOTICE
"nand_write: "
1621 "Attempt to write not page aligned data\n");
1625 column
= to
& (mtd
->writesize
- 1);
1626 subpage
= column
|| (writelen
& (mtd
->writesize
- 1));
1631 chipnr
= (int)(to
>> chip
->chip_shift
);
1632 chip
->select_chip(mtd
, chipnr
);
1634 /* Check, if it is write protected */
1635 if (nand_check_wp(mtd
)) {
1639 realpage
= (int)(to
>> chip
->page_shift
);
1640 page
= realpage
& chip
->pagemask
;
1641 blockmask
= (1 << (chip
->phys_erase_shift
- chip
->page_shift
)) - 1;
1643 /* Invalidate the page cache, when we write to the cached page */
1644 if (to
<= (chip
->pagebuf
<< chip
->page_shift
) &&
1645 (chip
->pagebuf
<< chip
->page_shift
) < (to
+ ops
->len
))
1648 /* If we're not given explicit OOB data, let it be 0xFF */
1650 memset(chip
->oob_poi
, 0xff, mtd
->oobsize
);
1653 int bytes
= mtd
->writesize
;
1654 int cached
= writelen
> bytes
&& page
!= blockmask
;
1655 uint8_t *wbuf
= buf
;
1657 /* Partial page write ? */
1658 if (unlikely(column
|| writelen
< (mtd
->writesize
- 1))) {
1660 bytes
= min_t(int, bytes
- column
, (int) writelen
);
1662 memset(chip
->buffers
->databuf
, 0xff, mtd
->writesize
);
1663 memcpy(&chip
->buffers
->databuf
[column
], buf
, bytes
);
1664 wbuf
= chip
->buffers
->databuf
;
1668 oob
= nand_fill_oob(chip
, oob
, ops
);
1670 ret
= chip
->write_page(mtd
, chip
, wbuf
, page
, cached
,
1671 (ops
->mode
== MTD_OOB_RAW
));
1683 page
= realpage
& chip
->pagemask
;
1684 /* Check, if we cross a chip boundary */
1687 chip
->select_chip(mtd
, -1);
1688 chip
->select_chip(mtd
, chipnr
);
1692 ops
->retlen
= ops
->len
- writelen
;
1694 ops
->oobretlen
= ops
->ooblen
;
1699 * nand_write - [MTD Interface] NAND write with ECC
1700 * @mtd: MTD device structure
1701 * @to: offset to write to
1702 * @len: number of bytes to write
1703 * @retlen: pointer to variable to store the number of written bytes
1704 * @buf: the data to write
1706 * NAND write with ECC
1708 static int nand_write(struct mtd_info
*mtd
, loff_t to
, size_t len
,
1709 size_t *retlen
, const uint8_t *buf
)
1711 struct nand_chip
*chip
= mtd
->priv
;
1714 /* Do not allow reads past end of device */
1715 if ((to
+ len
) > mtd
->size
)
1720 nand_get_device(chip
, mtd
, FL_WRITING
);
1722 chip
->ops
.len
= len
;
1723 chip
->ops
.datbuf
= (uint8_t *)buf
;
1724 chip
->ops
.oobbuf
= NULL
;
1726 ret
= nand_do_write_ops(mtd
, to
, &chip
->ops
);
1728 *retlen
= chip
->ops
.retlen
;
1730 nand_release_device(mtd
);
1736 * nand_do_write_oob - [MTD Interface] NAND write out-of-band
1737 * @mtd: MTD device structure
1738 * @to: offset to write to
1739 * @ops: oob operation description structure
1741 * NAND write out-of-band
1743 static int nand_do_write_oob(struct mtd_info
*mtd
, loff_t to
,
1744 struct mtd_oob_ops
*ops
)
1746 int chipnr
, page
, status
, len
;
1747 struct nand_chip
*chip
= mtd
->priv
;
1749 MTD_DEBUG(MTD_DEBUG_LEVEL3
, "nand_write_oob: to = 0x%08x, len = %i\n",
1750 (unsigned int)to
, (int)ops
->ooblen
);
1752 if (ops
->mode
== MTD_OOB_AUTO
)
1753 len
= chip
->ecc
.layout
->oobavail
;
1757 /* Do not allow write past end of page */
1758 if ((ops
->ooboffs
+ ops
->ooblen
) > len
) {
1759 MTD_DEBUG(MTD_DEBUG_LEVEL0
, "nand_write_oob: "
1760 "Attempt to write past end of page\n");
1764 if (unlikely(ops
->ooboffs
>= len
)) {
1765 MTD_DEBUG(MTD_DEBUG_LEVEL0
, "nand_read_oob: "
1766 "Attempt to start write outside oob\n");
1770 /* Do not allow reads past end of device */
1771 if (unlikely(to
>= mtd
->size
||
1772 ops
->ooboffs
+ ops
->ooblen
>
1773 ((mtd
->size
>> chip
->page_shift
) -
1774 (to
>> chip
->page_shift
)) * len
)) {
1775 MTD_DEBUG(MTD_DEBUG_LEVEL0
, "nand_read_oob: "
1776 "Attempt write beyond end of device\n");
1780 chipnr
= (int)(to
>> chip
->chip_shift
);
1781 chip
->select_chip(mtd
, chipnr
);
1783 /* Shift to get page */
1784 page
= (int)(to
>> chip
->page_shift
);
1787 * Reset the chip. Some chips (like the Toshiba TC5832DC found in one
1788 * of my DiskOnChip 2000 test units) will clear the whole data page too
1789 * if we don't do this. I have no clue why, but I seem to have 'fixed'
1790 * it in the doc2000 driver in August 1999. dwmw2.
1792 chip
->cmdfunc(mtd
, NAND_CMD_RESET
, -1, -1);
1794 /* Check, if it is write protected */
1795 if (nand_check_wp(mtd
))
1798 /* Invalidate the page cache, if we write to the cached page */
1799 if (page
== chip
->pagebuf
)
1802 memset(chip
->oob_poi
, 0xff, mtd
->oobsize
);
1803 nand_fill_oob(chip
, ops
->oobbuf
, ops
);
1804 status
= chip
->ecc
.write_oob(mtd
, chip
, page
& chip
->pagemask
);
1805 memset(chip
->oob_poi
, 0xff, mtd
->oobsize
);
1810 ops
->oobretlen
= ops
->ooblen
;
1816 * nand_write_oob - [MTD Interface] NAND write data and/or out-of-band
1817 * @mtd: MTD device structure
1818 * @to: offset to write to
1819 * @ops: oob operation description structure
1821 static int nand_write_oob(struct mtd_info
*mtd
, loff_t to
,
1822 struct mtd_oob_ops
*ops
)
1824 struct nand_chip
*chip
= mtd
->priv
;
1829 /* Do not allow writes past end of device */
1830 if (ops
->datbuf
&& (to
+ ops
->len
) > mtd
->size
) {
1831 MTD_DEBUG(MTD_DEBUG_LEVEL0
, "nand_read_oob: "
1832 "Attempt read beyond end of device\n");
1836 nand_get_device(chip
, mtd
, FL_WRITING
);
1849 ret
= nand_do_write_oob(mtd
, to
, ops
);
1851 ret
= nand_do_write_ops(mtd
, to
, ops
);
1854 nand_release_device(mtd
);
1859 * single_erease_cmd - [GENERIC] NAND standard block erase command function
1860 * @mtd: MTD device structure
1861 * @page: the page address of the block which will be erased
1863 * Standard erase command for NAND chips
1865 static void single_erase_cmd(struct mtd_info
*mtd
, int page
)
1867 struct nand_chip
*chip
= mtd
->priv
;
1868 /* Send commands to erase a block */
1869 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
);
1870 chip
->cmdfunc(mtd
, NAND_CMD_ERASE2
, -1, -1);
1874 * multi_erease_cmd - [GENERIC] AND specific block erase command function
1875 * @mtd: MTD device structure
1876 * @page: the page address of the block which will be erased
1878 * AND multi block erase command function
1879 * Erase 4 consecutive blocks
1881 static void multi_erase_cmd(struct mtd_info
*mtd
, int page
)
1883 struct nand_chip
*chip
= mtd
->priv
;
1884 /* Send commands to erase a block */
1885 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
++);
1886 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
++);
1887 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
++);
1888 chip
->cmdfunc(mtd
, NAND_CMD_ERASE1
, -1, page
);
1889 chip
->cmdfunc(mtd
, NAND_CMD_ERASE2
, -1, -1);
1893 * nand_erase - [MTD Interface] erase block(s)
1894 * @mtd: MTD device structure
1895 * @instr: erase instruction
1897 * Erase one ore more blocks
1899 static int nand_erase(struct mtd_info
*mtd
, struct erase_info
*instr
)
1901 return nand_erase_nand(mtd
, instr
, 0);
1904 #define BBT_PAGE_MASK 0xffffff3f
1906 * nand_erase_nand - [Internal] erase block(s)
1907 * @mtd: MTD device structure
1908 * @instr: erase instruction
1909 * @allowbbt: allow erasing the bbt area
1911 * Erase one ore more blocks
1913 int nand_erase_nand(struct mtd_info
*mtd
, struct erase_info
*instr
,
1916 int page
, len
, status
, pages_per_block
, ret
, chipnr
;
1917 struct nand_chip
*chip
= mtd
->priv
;
1918 int rewrite_bbt
[NAND_MAX_CHIPS
]={0};
1919 unsigned int bbt_masked_page
= 0xffffffff;
1921 MTD_DEBUG(MTD_DEBUG_LEVEL3
, "nand_erase: start = 0x%08x, len = %i\n",
1922 (unsigned int)instr
->addr
, (unsigned int)instr
->len
);
1924 /* Start address must align on block boundary */
1925 if (instr
->addr
& ((1 << chip
->phys_erase_shift
) - 1)) {
1926 MTD_DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: Unaligned address\n");
1930 /* Length must align on block boundary */
1931 if (instr
->len
& ((1 << chip
->phys_erase_shift
) - 1)) {
1932 MTD_DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: "
1933 "Length not block aligned\n");
1937 /* Do not allow erase past end of device */
1938 if ((instr
->len
+ instr
->addr
) > mtd
->size
) {
1939 MTD_DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: "
1940 "Erase past end of device\n");
1944 instr
->fail_addr
= 0xffffffff;
1946 /* Grab the lock and see if the device is available */
1947 nand_get_device(chip
, mtd
, FL_ERASING
);
1949 /* Shift to get first page */
1950 page
= (int)(instr
->addr
>> chip
->page_shift
);
1951 chipnr
= (int)(instr
->addr
>> chip
->chip_shift
);
1953 /* Calculate pages in each block */
1954 pages_per_block
= 1 << (chip
->phys_erase_shift
- chip
->page_shift
);
1956 /* Select the NAND device */
1957 chip
->select_chip(mtd
, chipnr
);
1959 /* Check, if it is write protected */
1960 if (nand_check_wp(mtd
)) {
1961 MTD_DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: "
1962 "Device is write protected!!!\n");
1963 instr
->state
= MTD_ERASE_FAILED
;
1968 * If BBT requires refresh, set the BBT page mask to see if the BBT
1969 * should be rewritten. Otherwise the mask is set to 0xffffffff which
1970 * can not be matched. This is also done when the bbt is actually
1971 * erased to avoid recusrsive updates
1973 if (chip
->options
& BBT_AUTO_REFRESH
&& !allowbbt
)
1974 bbt_masked_page
= chip
->bbt_td
->pages
[chipnr
] & BBT_PAGE_MASK
;
1976 /* Loop through the pages */
1979 instr
->state
= MTD_ERASING
;
1983 * heck if we have a bad block, we do not erase bad blocks !
1985 if (nand_block_checkbad(mtd
, ((loff_t
) page
) <<
1986 chip
->page_shift
, 0, allowbbt
)) {
1987 printk(KERN_WARNING
"nand_erase: attempt to erase a "
1988 "bad block at page 0x%08x\n", page
);
1989 instr
->state
= MTD_ERASE_FAILED
;
1994 * Invalidate the page cache, if we erase the block which
1995 * contains the current cached page
1997 if (page
<= chip
->pagebuf
&& chip
->pagebuf
<
1998 (page
+ pages_per_block
))
2001 chip
->erase_cmd(mtd
, page
& chip
->pagemask
);
2003 status
= chip
->waitfunc(mtd
, chip
);
2006 * See if operation failed and additional status checks are
2009 if ((status
& NAND_STATUS_FAIL
) && (chip
->errstat
))
2010 status
= chip
->errstat(mtd
, chip
, FL_ERASING
,
2013 /* See if block erase succeeded */
2014 if (status
& NAND_STATUS_FAIL
) {
2015 MTD_DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase: "
2016 "Failed erase, page 0x%08x\n", page
);
2017 instr
->state
= MTD_ERASE_FAILED
;
2018 instr
->fail_addr
= (page
<< chip
->page_shift
);
2023 * If BBT requires refresh, set the BBT rewrite flag to the
2026 if (bbt_masked_page
!= 0xffffffff &&
2027 (page
& BBT_PAGE_MASK
) == bbt_masked_page
)
2028 rewrite_bbt
[chipnr
] = (page
<< chip
->page_shift
);
2030 /* Increment page address and decrement length */
2031 len
-= (1 << chip
->phys_erase_shift
);
2032 page
+= pages_per_block
;
2034 /* Check, if we cross a chip boundary */
2035 if (len
&& !(page
& chip
->pagemask
)) {
2037 chip
->select_chip(mtd
, -1);
2038 chip
->select_chip(mtd
, chipnr
);
2041 * If BBT requires refresh and BBT-PERCHIP, set the BBT
2042 * page mask to see if this BBT should be rewritten
2044 if (bbt_masked_page
!= 0xffffffff &&
2045 (chip
->bbt_td
->options
& NAND_BBT_PERCHIP
))
2046 bbt_masked_page
= chip
->bbt_td
->pages
[chipnr
] &
2050 instr
->state
= MTD_ERASE_DONE
;
2054 ret
= instr
->state
== MTD_ERASE_DONE
? 0 : -EIO
;
2056 /* Deselect and wake up anyone waiting on the device */
2057 nand_release_device(mtd
);
2059 /* Do call back function */
2061 mtd_erase_callback(instr
);
2064 * If BBT requires refresh and erase was successful, rewrite any
2065 * selected bad block tables
2067 if (bbt_masked_page
== 0xffffffff || ret
)
2070 for (chipnr
= 0; chipnr
< chip
->numchips
; chipnr
++) {
2071 if (!rewrite_bbt
[chipnr
])
2073 /* update the BBT for chip */
2074 MTD_DEBUG(MTD_DEBUG_LEVEL0
, "nand_erase_nand: nand_update_bbt "
2075 "(%d:0x%0x 0x%0x)\n", chipnr
, rewrite_bbt
[chipnr
],
2076 chip
->bbt_td
->pages
[chipnr
]);
2077 nand_update_bbt(mtd
, rewrite_bbt
[chipnr
]);
2080 /* Return more or less happy */
2085 * nand_sync - [MTD Interface] sync
2086 * @mtd: MTD device structure
2088 * Sync is actually a wait for chip ready function
2090 static void nand_sync(struct mtd_info
*mtd
)
2092 struct nand_chip
*chip
= mtd
->priv
;
2094 MTD_DEBUG(MTD_DEBUG_LEVEL3
, "nand_sync: called\n");
2096 /* Grab the lock and see if the device is available */
2097 nand_get_device(chip
, mtd
, FL_SYNCING
);
2098 /* Release it and go back */
2099 nand_release_device(mtd
);
2103 * nand_block_isbad - [MTD Interface] Check if block at offset is bad
2104 * @mtd: MTD device structure
2105 * @offs: offset relative to mtd start
2107 static int nand_block_isbad(struct mtd_info
*mtd
, loff_t offs
)
2109 /* Check for invalid offset */
2110 if (offs
> mtd
->size
)
2113 return nand_block_checkbad(mtd
, offs
, 1, 0);
2117 * nand_block_markbad - [MTD Interface] Mark block at the given offset as bad
2118 * @mtd: MTD device structure
2119 * @ofs: offset relative to mtd start
2121 static int nand_block_markbad(struct mtd_info
*mtd
, loff_t ofs
)
2123 struct nand_chip
*chip
= mtd
->priv
;
2126 if ((ret
= nand_block_isbad(mtd
, ofs
))) {
2127 /* If it was bad already, return success and do nothing. */
2133 return chip
->block_markbad(mtd
, ofs
);
2137 * nand_suspend - [MTD Interface] Suspend the NAND flash
2138 * @mtd: MTD device structure
2140 static int nand_suspend(struct mtd_info
*mtd
)
2142 struct nand_chip
*chip
= mtd
->priv
;
2144 return nand_get_device(chip
, mtd
, FL_PM_SUSPENDED
);
2148 * nand_resume - [MTD Interface] Resume the NAND flash
2149 * @mtd: MTD device structure
2151 static void nand_resume(struct mtd_info
*mtd
)
2153 struct nand_chip
*chip
= mtd
->priv
;
2155 if (chip
->state
== FL_PM_SUSPENDED
)
2156 nand_release_device(mtd
);
2158 printk(KERN_ERR
"nand_resume() called for a chip which is not "
2159 "in suspended state\n");
2163 * Set default functions
2165 static void nand_set_defaults(struct nand_chip
*chip
, int busw
)
2167 /* check for proper chip_delay setup, set 20us if not */
2168 if (!chip
->chip_delay
)
2169 chip
->chip_delay
= 20;
2171 /* check, if a user supplied command function given */
2172 if (chip
->cmdfunc
== NULL
)
2173 chip
->cmdfunc
= nand_command
;
2175 /* check, if a user supplied wait function given */
2176 if (chip
->waitfunc
== NULL
)
2177 chip
->waitfunc
= nand_wait
;
2179 if (!chip
->select_chip
)
2180 chip
->select_chip
= nand_select_chip
;
2181 if (!chip
->read_byte
)
2182 chip
->read_byte
= busw
? nand_read_byte16
: nand_read_byte
;
2183 if (!chip
->read_word
)
2184 chip
->read_word
= nand_read_word
;
2185 if (!chip
->block_bad
)
2186 chip
->block_bad
= nand_block_bad
;
2187 if (!chip
->block_markbad
)
2188 chip
->block_markbad
= nand_default_block_markbad
;
2189 if (!chip
->write_buf
)
2190 chip
->write_buf
= busw
? nand_write_buf16
: nand_write_buf
;
2191 if (!chip
->read_buf
)
2192 chip
->read_buf
= busw
? nand_read_buf16
: nand_read_buf
;
2193 if (!chip
->verify_buf
)
2194 chip
->verify_buf
= busw
? nand_verify_buf16
: nand_verify_buf
;
2195 if (!chip
->scan_bbt
)
2196 chip
->scan_bbt
= nand_default_bbt
;
2198 if (!chip
->controller
) {
2199 chip
->controller
= &chip
->hwcontrol
;
2205 * Get the flash and manufacturer id and lookup if the type is supported
2207 static struct nand_flash_dev
*nand_get_flash_type(struct mtd_info
*mtd
,
2208 struct nand_chip
*chip
,
2209 int busw
, int *maf_id
)
2211 struct nand_flash_dev
*type
= NULL
;
2212 int i
, dev_id
, maf_idx
;
2213 int tmp_id
, tmp_manf
;
2215 /* Select the device */
2216 chip
->select_chip(mtd
, 0);
2218 /* Send the command for reading device ID */
2219 chip
->cmdfunc(mtd
, NAND_CMD_READID
, 0x00, -1);
2221 /* Read manufacturer and device IDs */
2222 *maf_id
= chip
->read_byte(mtd
);
2223 dev_id
= chip
->read_byte(mtd
);
2225 /* Try again to make sure, as some systems the bus-hold or other
2226 * interface concerns can cause random data which looks like a
2227 * possibly credible NAND flash to appear. If the two results do
2228 * not match, ignore the device completely.
2231 chip
->cmdfunc(mtd
, NAND_CMD_READID
, 0x00, -1);
2233 /* Read manufacturer and device IDs */
2235 tmp_manf
= chip
->read_byte(mtd
);
2236 tmp_id
= chip
->read_byte(mtd
);
2238 if (tmp_manf
!= *maf_id
|| tmp_id
!= dev_id
) {
2239 printk(KERN_INFO
"%s: second ID read did not match "
2240 "%02x,%02x against %02x,%02x\n", __func__
,
2241 *maf_id
, dev_id
, tmp_manf
, tmp_id
);
2242 return ERR_PTR(-ENODEV
);
2245 /* Lookup the flash id */
2246 for (i
= 0; nand_flash_ids
[i
].name
!= NULL
; i
++) {
2247 if (dev_id
== nand_flash_ids
[i
].id
) {
2248 type
= &nand_flash_ids
[i
];
2254 return ERR_PTR(-ENODEV
);
2257 mtd
->name
= type
->name
;
2259 chip
->chipsize
= type
->chipsize
<< 20;
2261 /* Newer devices have all the information in additional id bytes */
2262 if (!type
->pagesize
) {
2264 /* The 3rd id byte holds MLC / multichip data */
2265 chip
->cellinfo
= chip
->read_byte(mtd
);
2266 /* The 4th id byte is the important one */
2267 extid
= chip
->read_byte(mtd
);
2269 mtd
->writesize
= 1024 << (extid
& 0x3);
2272 mtd
->oobsize
= (8 << (extid
& 0x01)) * (mtd
->writesize
>> 9);
2274 /* Calc blocksize. Blocksize is multiples of 64KiB */
2275 mtd
->erasesize
= (64 * 1024) << (extid
& 0x03);
2277 /* Get buswidth information */
2278 busw
= (extid
& 0x01) ? NAND_BUSWIDTH_16
: 0;
2282 * Old devices have chip data hardcoded in the device id table
2284 mtd
->erasesize
= type
->erasesize
;
2285 mtd
->writesize
= type
->pagesize
;
2286 mtd
->oobsize
= mtd
->writesize
/ 32;
2287 busw
= type
->options
& NAND_BUSWIDTH_16
;
2290 /* Try to identify manufacturer */
2291 for (maf_idx
= 0; nand_manuf_ids
[maf_idx
].id
!= 0x0; maf_idx
++) {
2292 if (nand_manuf_ids
[maf_idx
].id
== *maf_id
)
2297 * Check, if buswidth is correct. Hardware drivers should set
2300 if (busw
!= (chip
->options
& NAND_BUSWIDTH_16
)) {
2301 printk(KERN_INFO
"NAND device: Manufacturer ID:"
2302 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id
,
2303 dev_id
, nand_manuf_ids
[maf_idx
].name
, mtd
->name
);
2304 printk(KERN_WARNING
"NAND bus width %d instead %d bit\n",
2305 (chip
->options
& NAND_BUSWIDTH_16
) ? 16 : 8,
2307 return ERR_PTR(-EINVAL
);
2310 /* Calculate the address shift from the page size */
2311 chip
->page_shift
= ffs(mtd
->writesize
) - 1;
2312 /* Convert chipsize to number of pages per chip -1. */
2313 chip
->pagemask
= (chip
->chipsize
>> chip
->page_shift
) - 1;
2315 chip
->bbt_erase_shift
= chip
->phys_erase_shift
=
2316 ffs(mtd
->erasesize
) - 1;
2317 chip
->chip_shift
= ffs(chip
->chipsize
) - 1;
2319 /* Set the bad block position */
2320 chip
->badblockpos
= mtd
->writesize
> 512 ?
2321 NAND_LARGE_BADBLOCK_POS
: NAND_SMALL_BADBLOCK_POS
;
2323 /* Get chip options, preserve non chip based options */
2324 chip
->options
&= ~NAND_CHIPOPTIONS_MSK
;
2325 chip
->options
|= type
->options
& NAND_CHIPOPTIONS_MSK
;
2328 * Set chip as a default. Board drivers can override it, if necessary
2330 chip
->options
|= NAND_NO_AUTOINCR
;
2332 /* Check if chip is a not a samsung device. Do not clear the
2333 * options for chips which are not having an extended id.
2335 if (*maf_id
!= NAND_MFR_SAMSUNG
&& !type
->pagesize
)
2336 chip
->options
&= ~NAND_SAMSUNG_LP_OPTIONS
;
2338 /* Check for AND chips with 4 page planes */
2339 if (chip
->options
& NAND_4PAGE_ARRAY
)
2340 chip
->erase_cmd
= multi_erase_cmd
;
2342 chip
->erase_cmd
= single_erase_cmd
;
2344 /* Do not replace user supplied command function ! */
2345 if (mtd
->writesize
> 512 && chip
->cmdfunc
== nand_command
)
2346 chip
->cmdfunc
= nand_command_lp
;
2348 printk(KERN_INFO
"NAND device: Manufacturer ID:"
2349 " 0x%02x, Chip ID: 0x%02x (%s %s)\n", *maf_id
, dev_id
,
2350 nand_manuf_ids
[maf_idx
].name
, type
->name
);
2356 * nand_scan_ident - [NAND Interface] Scan for the NAND device
2357 * @mtd: MTD device structure
2358 * @maxchips: Number of chips to scan for
2360 * This is the first phase of the normal nand_scan() function. It
2361 * reads the flash ID and sets up MTD fields accordingly.
2363 * The mtd->owner field must be set to the module of the caller.
2365 int nand_scan_ident(struct mtd_info
*mtd
, int maxchips
)
2367 int i
, busw
, nand_maf_id
;
2368 struct nand_chip
*chip
= mtd
->priv
;
2369 struct nand_flash_dev
*type
;
2371 /* Get buswidth to select the correct functions */
2372 busw
= chip
->options
& NAND_BUSWIDTH_16
;
2373 /* Set the default functions */
2374 nand_set_defaults(chip
, busw
);
2376 /* Read the flash type */
2377 type
= nand_get_flash_type(mtd
, chip
, busw
, &nand_maf_id
);
2380 printk(KERN_WARNING
"No NAND device found!!!\n");
2381 chip
->select_chip(mtd
, -1);
2382 return PTR_ERR(type
);
2385 /* Check for a chip array */
2386 for (i
= 1; i
< maxchips
; i
++) {
2387 chip
->select_chip(mtd
, i
);
2388 /* Send the command for reading device ID */
2389 chip
->cmdfunc(mtd
, NAND_CMD_READID
, 0x00, -1);
2390 /* Read manufacturer and device IDs */
2391 if (nand_maf_id
!= chip
->read_byte(mtd
) ||
2392 type
->id
!= chip
->read_byte(mtd
))
2396 printk(KERN_INFO
"%d NAND chips detected\n", i
);
2398 /* Store the number of chips and calc total size for mtd */
2400 mtd
->size
= i
* chip
->chipsize
;
2407 * nand_scan_tail - [NAND Interface] Scan for the NAND device
2408 * @mtd: MTD device structure
2409 * @maxchips: Number of chips to scan for
2411 * This is the second phase of the normal nand_scan() function. It
2412 * fills out all the uninitialized function pointers with the defaults
2413 * and scans for a bad block table if appropriate.
2415 int nand_scan_tail(struct mtd_info
*mtd
)
2418 struct nand_chip
*chip
= mtd
->priv
;
2420 if (!(chip
->options
& NAND_OWN_BUFFERS
))
2421 chip
->buffers
= kmalloc(sizeof(*chip
->buffers
), GFP_KERNEL
);
2425 /* Set the internal oob buffer location, just after the page data */
2426 chip
->oob_poi
= chip
->buffers
->databuf
+ mtd
->writesize
;
2429 * If no default placement scheme is given, select an appropriate one
2431 if (!chip
->ecc
.layout
) {
2432 switch (mtd
->oobsize
) {
2434 chip
->ecc
.layout
= &nand_oob_8
;
2437 chip
->ecc
.layout
= &nand_oob_16
;
2440 chip
->ecc
.layout
= &nand_oob_64
;
2443 printk(KERN_WARNING
"No oob scheme defined for "
2444 "oobsize %d\n", mtd
->oobsize
);
2449 if (!chip
->write_page
)
2450 chip
->write_page
= nand_write_page
;
2453 * check ECC mode, default to software if 3byte/512byte hardware ECC is
2454 * selected and we have 256 byte pagesize fallback to software ECC
2456 if (!chip
->ecc
.read_page_raw
)
2457 chip
->ecc
.read_page_raw
= nand_read_page_raw
;
2458 if (!chip
->ecc
.write_page_raw
)
2459 chip
->ecc
.write_page_raw
= nand_write_page_raw
;
2461 switch (chip
->ecc
.mode
) {
2463 /* Use standard hwecc read page function ? */
2464 if (!chip
->ecc
.read_page
)
2465 chip
->ecc
.read_page
= nand_read_page_hwecc
;
2466 if (!chip
->ecc
.write_page
)
2467 chip
->ecc
.write_page
= nand_write_page_hwecc
;
2468 if (!chip
->ecc
.read_oob
)
2469 chip
->ecc
.read_oob
= nand_read_oob_std
;
2470 if (!chip
->ecc
.write_oob
)
2471 chip
->ecc
.write_oob
= nand_write_oob_std
;
2473 case NAND_ECC_HW_SYNDROME
:
2474 if ((!chip
->ecc
.calculate
|| !chip
->ecc
.correct
||
2475 !chip
->ecc
.hwctl
) &&
2476 (!chip
->ecc
.read_page
||
2477 chip
->ecc
.read_page
== nand_read_page_hwecc
||
2478 !chip
->ecc
.write_page
||
2479 chip
->ecc
.write_page
== nand_write_page_hwecc
)) {
2480 printk(KERN_WARNING
"No ECC functions supplied, "
2481 "Hardware ECC not possible\n");
2484 /* Use standard syndrome read/write page function ? */
2485 if (!chip
->ecc
.read_page
)
2486 chip
->ecc
.read_page
= nand_read_page_syndrome
;
2487 if (!chip
->ecc
.write_page
)
2488 chip
->ecc
.write_page
= nand_write_page_syndrome
;
2489 if (!chip
->ecc
.read_oob
)
2490 chip
->ecc
.read_oob
= nand_read_oob_syndrome
;
2491 if (!chip
->ecc
.write_oob
)
2492 chip
->ecc
.write_oob
= nand_write_oob_syndrome
;
2494 if (mtd
->writesize
>= chip
->ecc
.size
)
2496 printk(KERN_WARNING
"%d byte HW ECC not possible on "
2497 "%d byte page size, fallback to SW ECC\n",
2498 chip
->ecc
.size
, mtd
->writesize
);
2499 chip
->ecc
.mode
= NAND_ECC_SOFT
;
2502 chip
->ecc
.calculate
= nand_calculate_ecc
;
2503 chip
->ecc
.correct
= nand_correct_data
;
2504 chip
->ecc
.read_page
= nand_read_page_swecc
;
2505 chip
->ecc
.write_page
= nand_write_page_swecc
;
2506 chip
->ecc
.read_oob
= nand_read_oob_std
;
2507 chip
->ecc
.write_oob
= nand_write_oob_std
;
2508 chip
->ecc
.size
= 256;
2509 chip
->ecc
.bytes
= 3;
2513 printk(KERN_WARNING
"NAND_ECC_NONE selected by board driver. "
2514 "This is not recommended !!\n");
2515 chip
->ecc
.read_page
= nand_read_page_raw
;
2516 chip
->ecc
.write_page
= nand_write_page_raw
;
2517 chip
->ecc
.read_oob
= nand_read_oob_std
;
2518 chip
->ecc
.write_oob
= nand_write_oob_std
;
2519 chip
->ecc
.size
= mtd
->writesize
;
2520 chip
->ecc
.bytes
= 0;
2524 printk(KERN_WARNING
"Invalid NAND_ECC_MODE %d\n",
2530 * The number of bytes available for a client to place data into
2531 * the out of band area
2533 chip
->ecc
.layout
->oobavail
= 0;
2534 for (i
= 0; chip
->ecc
.layout
->oobfree
[i
].length
; i
++)
2535 chip
->ecc
.layout
->oobavail
+=
2536 chip
->ecc
.layout
->oobfree
[i
].length
;
2537 mtd
->oobavail
= chip
->ecc
.layout
->oobavail
;
2540 * Set the number of read / write steps for one page depending on ECC
2543 chip
->ecc
.steps
= mtd
->writesize
/ chip
->ecc
.size
;
2544 if(chip
->ecc
.steps
* chip
->ecc
.size
!= mtd
->writesize
) {
2545 printk(KERN_WARNING
"Invalid ecc parameters\n");
2548 chip
->ecc
.total
= chip
->ecc
.steps
* chip
->ecc
.bytes
;
2551 * Allow subpage writes up to ecc.steps. Not possible for MLC
2554 if (!(chip
->options
& NAND_NO_SUBPAGE_WRITE
) &&
2555 !(chip
->cellinfo
& NAND_CI_CELLTYPE_MSK
)) {
2556 switch(chip
->ecc
.steps
) {
2558 mtd
->subpage_sft
= 1;
2562 mtd
->subpage_sft
= 2;
2566 chip
->subpagesize
= mtd
->writesize
>> mtd
->subpage_sft
;
2568 /* Initialize state */
2569 chip
->state
= FL_READY
;
2571 /* De-select the device */
2572 chip
->select_chip(mtd
, -1);
2574 /* Invalidate the pagebuffer reference */
2577 /* Fill in remaining MTD driver data */
2578 mtd
->type
= MTD_NANDFLASH
;
2579 mtd
->flags
= MTD_CAP_NANDFLASH
;
2580 mtd
->erase
= nand_erase
;
2581 mtd
->read
= nand_read
;
2582 mtd
->write
= nand_write
;
2583 mtd
->read_oob
= nand_read_oob
;
2584 mtd
->write_oob
= nand_write_oob
;
2585 mtd
->sync
= nand_sync
;
2588 mtd
->suspend
= nand_suspend
;
2589 mtd
->resume
= nand_resume
;
2590 mtd
->block_isbad
= nand_block_isbad
;
2591 mtd
->block_markbad
= nand_block_markbad
;
2593 /* propagate ecc.layout to mtd_info */
2594 mtd
->ecclayout
= chip
->ecc
.layout
;
2596 /* Check, if we should skip the bad block table scan */
2597 if (chip
->options
& NAND_SKIP_BBTSCAN
)
2600 /* Build bad block table */
2601 return chip
->scan_bbt(mtd
);
2605 * nand_scan - [NAND Interface] Scan for the NAND device
2606 * @mtd: MTD device structure
2607 * @maxchips: Number of chips to scan for
2609 * This fills out all the uninitialized function pointers
2610 * with the defaults.
2611 * The flash ID is read and the mtd/chip structures are
2612 * filled with the appropriate values.
2613 * The mtd->owner field must be set to the module of the caller
2616 int nand_scan(struct mtd_info
*mtd
, int maxchips
)
2620 ret
= nand_scan_ident(mtd
, maxchips
);
2622 ret
= nand_scan_tail(mtd
);
2627 * nand_release - [NAND Interface] Free resources held by the NAND device
2628 * @mtd: MTD device structure
2630 void nand_release(struct mtd_info
*mtd
)
2632 struct nand_chip
*chip
= mtd
->priv
;
2634 /* Deregister the device */
2635 del_mtd_device(mtd
);
2637 /* Free bad block table memory */
2639 if (!(chip
->options
& NAND_OWN_BUFFERS
))
2640 kfree(chip
->buffers
);
2643 EXPORT_SYMBOL(nand_scan
);
2644 EXPORT_SYMBOL(nand_scan_ident
);
2645 EXPORT_SYMBOL(nand_scan_tail
);
2646 EXPORT_SYMBOL(nand_release
);
2648 #endif /* DOXYGEN_SHOULD_SKIP_THIS */