add unified compile target
[avr_work.git] / common / spi_slave_spi.c
blobe11f337ce62d71e0a99cd79afaa1a649b6627adb
1 /*
2 * avrtest - A simple interface to usbtinyisp to act as a 'console'
3 * using SPI, target software to test for attiny84.
4 * Copyright (C) 2008 Matt Anderson.
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 #include <stdint.h>
23 #include <avr/io.h>
24 #include <avr/interrupt.h>
25 #include <avr/power.h>
27 #include "spislave.h"
29 #define NUM_BUFFER_BYTES 32
31 struct buffer_type
33 uint8_t buf[NUM_BUFFER_BYTES];
34 uint8_t cur;
35 uint8_t len;
38 static volatile struct buffer_type tx, rx;
40 ISR(SIG_SPI)
41 { // If byte in USIDR is non zero and space is available in the
42 // rx queue, read byte from USIDR and place in rx queue.
43 uint8_t spdr = SPDR;
44 if (spdr && rx.len < NUM_BUFFER_BYTES)
46 uint8_t pos = rx.cur + rx.len;
47 while (pos >= NUM_BUFFER_BYTES) {
48 pos -= NUM_BUFFER_BYTES;
50 rx.buf[pos] = spdr;
51 ++rx.len;
54 // If bytes are pending in the tx queue place in USIDR.
55 if (tx.len)
57 SPDR = tx.buf[tx.cur];
59 uint8_t cur = tx.cur+1;
60 while (cur >= NUM_BUFFER_BYTES) {
61 cur -= NUM_BUFFER_BYTES;
63 tx.cur = cur;
65 --tx.len;
68 // Otherwise clear USIDR.
69 else
70 SPDR = 0;
74 void
75 spi_slave_init(void)
77 power_spi_enable();
78 // Enable three wire mode, external positive edge clock,
79 // Interrupt on counter overflow
80 // Interupt, enable, msb first, slave, leading edge on rise, sample on leading edge.
83 DDRB&=~(1<<5)|(1<<7)|(1<<4); // inputs
84 DDRB|= (1<<6); // outputs
85 PORTB&=~(1<<5)|(1<<7)|(1<<4)|(1<<6); // disable pullups & start low
86 SPCR = (1<<SPIE) | (1<<SPE) | (1 << DORD) | (0 << MSTR) | (0 << CPOL) | (0 << CPHA);
87 SPDR = 0;
90 #include <spi_slave_common.c>