8 static inline void spi_isr_on (void) {USICR
|= (1<<USIOIE
);}
9 static inline void spi_isr_off(void) {USICR
&= (uint8_t)~(1<<USIOIE
);}
11 static void spi_io_init_hw(void) {
14 // Clr the flags we interupt on + counter bits in same reg.
15 // (default is not raised)
16 //USISR = (1<<USIOIF);
18 // Clr datareg to avoid junk data being sent out. (defaults to 0)
25 //#warning Using Port B (default)
26 //USIPP &= (uint8_t)~(1<<USIPOS);
35 DDR(SPI_PORT
) |= (1<<SPI_MISO
);
36 DDR(SPI_PORT
) &= (uint8_t)~((1<<SPI_MOSI
)|(1<<SPI_CLK
));
37 PORT(SPI_PORT
)&= (uint8_t)~( (1<<SPI_MOSI
) | (1<<SPI_CLK
) | (1<<SPI_MISO
) );
39 // To resolve SPI_EDGE
43 USICR
= (0<<USISIE
) | // Start IE(2w), CLK edge IE(3w)
44 (1<<USIOIE
) | // Ovf interupt (to refil register)
45 (0<<USIWM1
) | (1<<USIWM0
) | // 01 = 3w, 00 = disable, 10&11 = 2w
46 (1<<USICS1
) | (SPI_EDGE
<<USICS0
) | // 10 = positive edge, 11 = neg.
47 (0<<USICLK
) | // 4bit timer : 0 = external, 1 = sw
48 (0<<USITC
); // Clock toggle
54 ISR( SIG_USI_OVERFLOW
) {
55 USISR
= (1<<USIOIF
); // Clear interupt flag and counter.
65 if (in
!= 0 && !q_full(&rx
)) {
71 /*// Alternate if we don't care about losing old data.