e1000: Ignore reset command
[armpft.git] / hw / mips_mipssim.c
blob1117db27b937aced1e1c315d21e6d18f6c6e848f
1 /*
2 * QEMU/mipssim emulation
4 * Emulates a very simple machine model similiar to the one use by the
5 * proprietary MIPS emulator.
6 *
7 * Copyright (c) 2007 Thiemo Seufer
9 * Permission is hereby granted, free of charge, to any person obtaining a copy
10 * of this software and associated documentation files (the "Software"), to deal
11 * in the Software without restriction, including without limitation the rights
12 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
13 * copies of the Software, and to permit persons to whom the Software is
14 * furnished to do so, subject to the following conditions:
16 * The above copyright notice and this permission notice shall be included in
17 * all copies or substantial portions of the Software.
19 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
20 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
21 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
22 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
23 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
24 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
25 * THE SOFTWARE.
27 #include "hw.h"
28 #include "mips.h"
29 #include "pc.h"
30 #include "isa.h"
31 #include "net.h"
32 #include "sysemu.h"
33 #include "boards.h"
34 #include "mips-bios.h"
36 #ifdef TARGET_MIPS64
37 #define PHYS_TO_VIRT(x) ((x) | ~0x7fffffffULL)
38 #else
39 #define PHYS_TO_VIRT(x) ((x) | ~0x7fffffffU)
40 #endif
42 #define VIRT_TO_PHYS_ADDEND (-((int64_t)(int32_t)0x80000000))
44 static struct _loaderparams {
45 int ram_size;
46 const char *kernel_filename;
47 const char *kernel_cmdline;
48 const char *initrd_filename;
49 } loaderparams;
51 static void load_kernel (CPUState *env)
53 int64_t entry, kernel_low, kernel_high;
54 long kernel_size;
55 long initrd_size;
56 ram_addr_t initrd_offset;
58 kernel_size = load_elf(loaderparams.kernel_filename, VIRT_TO_PHYS_ADDEND,
59 (uint64_t *)&entry, (uint64_t *)&kernel_low,
60 (uint64_t *)&kernel_high);
61 if (kernel_size >= 0) {
62 if ((entry & ~0x7fffffffULL) == 0x80000000)
63 entry = (int32_t)entry;
64 env->active_tc.PC = entry;
65 } else {
66 fprintf(stderr, "qemu: could not load kernel '%s'\n",
67 loaderparams.kernel_filename);
68 exit(1);
71 /* load initrd */
72 initrd_size = 0;
73 initrd_offset = 0;
74 if (loaderparams.initrd_filename) {
75 initrd_size = get_image_size (loaderparams.initrd_filename);
76 if (initrd_size > 0) {
77 initrd_offset = (kernel_high + ~TARGET_PAGE_MASK) & TARGET_PAGE_MASK;
78 if (initrd_offset + initrd_size > loaderparams.ram_size) {
79 fprintf(stderr,
80 "qemu: memory too small for initial ram disk '%s'\n",
81 loaderparams.initrd_filename);
82 exit(1);
84 initrd_size = load_image_targphys(loaderparams.initrd_filename,
85 initrd_offset, loaderparams.ram_size - initrd_offset);
87 if (initrd_size == (target_ulong) -1) {
88 fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
89 loaderparams.initrd_filename);
90 exit(1);
95 static void main_cpu_reset(void *opaque)
97 CPUState *env = opaque;
98 cpu_reset(env);
100 if (loaderparams.kernel_filename)
101 load_kernel (env);
104 static void
105 mips_mipssim_init (ram_addr_t ram_size,
106 const char *boot_device,
107 const char *kernel_filename, const char *kernel_cmdline,
108 const char *initrd_filename, const char *cpu_model)
110 char buf[1024];
111 ram_addr_t ram_offset;
112 ram_addr_t bios_offset;
113 CPUState *env;
114 int bios_size;
116 /* Init CPUs. */
117 if (cpu_model == NULL) {
118 #ifdef TARGET_MIPS64
119 cpu_model = "5Kf";
120 #else
121 cpu_model = "24Kf";
122 #endif
124 env = cpu_init(cpu_model);
125 if (!env) {
126 fprintf(stderr, "Unable to find CPU definition\n");
127 exit(1);
129 qemu_register_reset(main_cpu_reset, 0, env);
131 /* Allocate RAM. */
132 ram_offset = qemu_ram_alloc(ram_size);
133 bios_offset = qemu_ram_alloc(BIOS_SIZE);
135 cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
137 /* Map the BIOS / boot exception handler. */
138 cpu_register_physical_memory(0x1fc00000LL,
139 BIOS_SIZE, bios_offset | IO_MEM_ROM);
140 /* Load a BIOS / boot exception handler image. */
141 if (bios_name == NULL)
142 bios_name = BIOS_FILENAME;
143 snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name);
144 bios_size = load_image_targphys(buf, 0x1fc00000LL, BIOS_SIZE);
145 if ((bios_size < 0 || bios_size > BIOS_SIZE) && !kernel_filename) {
146 /* Bail out if we have neither a kernel image nor boot vector code. */
147 fprintf(stderr,
148 "qemu: Could not load MIPS bios '%s', and no -kernel argument was specified\n",
149 buf);
150 exit(1);
151 } else {
152 /* We have a boot vector start address. */
153 env->active_tc.PC = (target_long)(int32_t)0xbfc00000;
156 if (kernel_filename) {
157 loaderparams.ram_size = ram_size;
158 loaderparams.kernel_filename = kernel_filename;
159 loaderparams.kernel_cmdline = kernel_cmdline;
160 loaderparams.initrd_filename = initrd_filename;
161 load_kernel(env);
164 /* Init CPU internal devices. */
165 cpu_mips_irq_init_cpu(env);
166 cpu_mips_clock_init(env);
168 /* Register 64 KB of ISA IO space at 0x1fd00000. */
169 isa_mmio_init(0x1fd00000, 0x00010000);
171 /* A single 16450 sits at offset 0x3f8. It is attached to
172 MIPS CPU INT2, which is interrupt 4. */
173 if (serial_hds[0])
174 serial_init(0x3f8, env->irq[4], 115200, serial_hds[0]);
176 if (nd_table[0].vlan)
177 /* MIPSnet uses the MIPS CPU INT0, which is interrupt 2. */
178 mipsnet_init(0x4200, env->irq[2], &nd_table[0]);
181 static QEMUMachine mips_mipssim_machine = {
182 .name = "mipssim",
183 .desc = "MIPS MIPSsim platform",
184 .init = mips_mipssim_init,
187 static void mips_mipssim_machine_init(void)
189 qemu_register_machine(&mips_mipssim_machine);
192 machine_init(mips_mipssim_machine_init);