2 * QEMU OldWorld PowerMac (currently ~G3 Beige) hardware System Emulator
4 * Copyright (c) 2004-2007 Fabrice Bellard
5 * Copyright (c) 2007 Jocelyn Mayer
7 * Permission is hereby granted, free of charge, to any person obtaining a copy
8 * of this software and associated documentation files (the "Software"), to deal
9 * in the Software without restriction, including without limitation the rights
10 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11 * copies of the Software, and to permit persons to whom the Software is
12 * furnished to do so, subject to the following conditions:
14 * The above copyright notice and this permission notice shall be included in
15 * all copies or substantial portions of the Software.
17 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
28 #include "mac_dbdma.h"
41 #define VGA_BIOS_SIZE 65536
42 #define CFG_ADDR 0xf0000510
44 /* temporary frame buffer OSI calls for the video.x driver. The right
45 solution is to modify the driver to use VGA PCI I/Os */
46 /* XXX: to be removed. This is no way related to emulation */
47 static int vga_osi_call (CPUState
*env
)
49 static int vga_vbl_enabled
;
53 printf("osi_call R5=%016" PRIx64
"\n", ppc_dump_gpr(env
, 5));
56 /* same handler as PearPC, coming from the original MOL video
61 case 28: /* set_vmode */
62 if (env
->gpr
[6] != 1 || env
->gpr
[7] != 0)
67 case 29: /* get_vmode_info */
68 if (env
->gpr
[6] != 0) {
69 if (env
->gpr
[6] != 1 || env
->gpr
[7] != 0) {
75 env
->gpr
[4] = (1 << 16) | 1; /* num_vmodes, cur_vmode */
76 env
->gpr
[5] = (1 << 16) | 0; /* num_depths, cur_depth_mode */
77 env
->gpr
[6] = (graphic_width
<< 16) | graphic_height
; /* w, h */
78 env
->gpr
[7] = 85 << 16; /* refresh rate */
79 env
->gpr
[8] = (graphic_depth
+ 7) & ~7; /* depth (round to byte) */
80 linesize
= ((graphic_depth
+ 7) >> 3) * graphic_width
;
81 linesize
= (linesize
+ 3) & ~3;
82 env
->gpr
[9] = (linesize
<< 16) | 0; /* row_bytes, offset */
84 case 31: /* set_video power */
87 case 39: /* video_ctrl */
88 if (env
->gpr
[6] == 0 || env
->gpr
[6] == 1)
89 vga_vbl_enabled
= env
->gpr
[6];
94 case 59: /* set_color */
95 /* R6 = index, R7 = RGB */
98 case 64: /* get color */
102 case 116: /* set hwcursor */
103 /* R6 = x, R7 = y, R8 = visible, R9 = data */
106 fprintf(stderr
, "unsupported OSI call R5=%016" PRIx64
"\n",
107 ppc_dump_gpr(env
, 5));
111 return 1; /* osi_call handled */
114 static int fw_cfg_boot_set(void *opaque
, const char *boot_device
)
116 fw_cfg_add_i16(opaque
, FW_CFG_BOOT_DEVICE
, boot_device
[0]);
120 static void ppc_heathrow_init (ram_addr_t ram_size
,
121 const char *boot_device
,
122 const char *kernel_filename
,
123 const char *kernel_cmdline
,
124 const char *initrd_filename
,
125 const char *cpu_model
)
127 CPUState
*env
= NULL
, *envs
[MAX_CPUS
];
129 qemu_irq
*pic
, **heathrow_irqs
;
131 ram_addr_t ram_offset
, bios_offset
, vga_bios_offset
;
132 uint32_t kernel_base
, initrd_base
;
133 int32_t kernel_size
, initrd_size
;
135 MacIONVRAMState
*nvr
;
136 int vga_bios_size
, bios_size
;
137 int pic_mem_index
, nvram_mem_index
, dbdma_mem_index
, cuda_mem_index
;
138 int escc_mem_index
, ide_mem_index
[2];
139 uint16_t ppc_boot_device
;
140 DriveInfo
*hd
[MAX_IDE_BUS
* MAX_IDE_DEVS
];
143 uint8_t *vga_bios_ptr
;
145 linux_boot
= (kernel_filename
!= NULL
);
148 if (cpu_model
== NULL
)
150 for (i
= 0; i
< smp_cpus
; i
++) {
151 env
= cpu_init(cpu_model
);
153 fprintf(stderr
, "Unable to find PowerPC CPU definition\n");
156 /* Set time-base frequency to 16.6 Mhz */
157 cpu_ppc_tb_init(env
, 16600000UL);
158 env
->osi_call
= vga_osi_call
;
159 qemu_register_reset(&cpu_ppc_reset
, env
);
164 if (ram_size
> (2047 << 20)) {
166 "qemu: Too much memory for this machine: %d MB, maximum 2047 MB\n",
167 ((unsigned int)ram_size
/ (1 << 20)));
171 ram_offset
= qemu_ram_alloc(ram_size
);
172 cpu_register_physical_memory(0, ram_size
, ram_offset
);
174 /* allocate and load BIOS */
175 bios_offset
= qemu_ram_alloc(BIOS_SIZE
);
176 if (bios_name
== NULL
)
177 bios_name
= PROM_FILENAME
;
178 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, bios_name
);
179 cpu_register_physical_memory(PROM_ADDR
, BIOS_SIZE
, bios_offset
| IO_MEM_ROM
);
181 /* Load OpenBIOS (ELF) */
183 bios_size
= load_elf(filename
, 0, NULL
, NULL
, NULL
);
188 if (bios_size
< 0 || bios_size
> BIOS_SIZE
) {
189 hw_error("qemu: could not load PowerPC bios '%s'\n", bios_name
);
193 /* allocate and load VGA BIOS */
194 vga_bios_offset
= qemu_ram_alloc(VGA_BIOS_SIZE
);
195 vga_bios_ptr
= qemu_get_ram_ptr(vga_bios_offset
);
196 filename
= qemu_find_file(QEMU_FILE_TYPE_BIOS
, VGABIOS_FILENAME
);
198 vga_bios_size
= load_image(filename
, vga_bios_ptr
+ 8);
203 if (vga_bios_size
< 0) {
204 /* if no bios is present, we can still work */
205 fprintf(stderr
, "qemu: warning: could not load VGA bios '%s'\n",
209 /* set a specific header (XXX: find real Apple format for NDRV
211 vga_bios_ptr
[0] = 'N';
212 vga_bios_ptr
[1] = 'D';
213 vga_bios_ptr
[2] = 'R';
214 vga_bios_ptr
[3] = 'V';
215 cpu_to_be32w((uint32_t *)(vga_bios_ptr
+ 4), vga_bios_size
);
218 /* Round to page boundary */
219 vga_bios_size
= (vga_bios_size
+ TARGET_PAGE_SIZE
- 1) &
224 uint64_t lowaddr
= 0;
225 kernel_base
= KERNEL_LOAD_ADDR
;
226 /* Now we can load the kernel. The first step tries to load the kernel
227 supposing PhysAddr = 0x00000000. If that was wrong the kernel is
228 loaded again, the new PhysAddr being computed from lowaddr. */
229 kernel_size
= load_elf(kernel_filename
, kernel_base
, NULL
, &lowaddr
, NULL
);
230 if (kernel_size
> 0 && lowaddr
!= KERNEL_LOAD_ADDR
) {
231 kernel_size
= load_elf(kernel_filename
, (2 * kernel_base
) - lowaddr
,
235 kernel_size
= load_aout(kernel_filename
, kernel_base
,
236 ram_size
- kernel_base
);
238 kernel_size
= load_image_targphys(kernel_filename
,
240 ram_size
- kernel_base
);
241 if (kernel_size
< 0) {
242 hw_error("qemu: could not load kernel '%s'\n",
247 if (initrd_filename
) {
248 initrd_base
= INITRD_LOAD_ADDR
;
249 initrd_size
= load_image_targphys(initrd_filename
, initrd_base
,
250 ram_size
- initrd_base
);
251 if (initrd_size
< 0) {
252 hw_error("qemu: could not load initial ram disk '%s'\n",
260 ppc_boot_device
= 'm';
266 ppc_boot_device
= '\0';
267 for (i
= 0; boot_device
[i
] != '\0'; i
++) {
268 /* TOFIX: for now, the second IDE channel is not properly
269 * used by OHW. The Mac floppy disk are not emulated.
270 * For now, OHW cannot boot from the network.
273 if (boot_device
[i
] >= 'a' && boot_device
[i
] <= 'f') {
274 ppc_boot_device
= boot_device
[i
];
278 if (boot_device
[i
] >= 'c' && boot_device
[i
] <= 'd') {
279 ppc_boot_device
= boot_device
[i
];
284 if (ppc_boot_device
== '\0') {
285 fprintf(stderr
, "No valid boot device for G3 Beige machine\n");
290 isa_mem_base
= 0x80000000;
292 /* Register 2 MB of ISA IO space */
293 isa_mmio_init(0xfe000000, 0x00200000);
295 /* XXX: we register only 1 output pin for heathrow PIC */
296 heathrow_irqs
= qemu_mallocz(smp_cpus
* sizeof(qemu_irq
*));
298 qemu_mallocz(smp_cpus
* sizeof(qemu_irq
) * 1);
299 /* Connect the heathrow PIC outputs to the 6xx bus */
300 for (i
= 0; i
< smp_cpus
; i
++) {
301 switch (PPC_INPUT(env
)) {
302 case PPC_FLAGS_INPUT_6xx
:
303 heathrow_irqs
[i
] = heathrow_irqs
[0] + (i
* 1);
304 heathrow_irqs
[i
][0] =
305 ((qemu_irq
*)env
->irq_inputs
)[PPC6xx_INPUT_INT
];
308 hw_error("Bus model not supported on OldWorld Mac machine\n");
312 /* init basic PC hardware */
313 if (PPC_INPUT(env
) != PPC_FLAGS_INPUT_6xx
) {
314 hw_error("Only 6xx bus is supported on heathrow machine\n");
316 pic
= heathrow_pic_init(&pic_mem_index
, 1, heathrow_irqs
);
317 pci_bus
= pci_grackle_init(0xfec00000, pic
);
318 pci_vga_init(pci_bus
, vga_bios_offset
, vga_bios_size
);
320 escc_mem_index
= escc_init(0x80013000, pic
[0x0f], pic
[0x10], serial_hds
[0],
321 serial_hds
[1], ESCC_CLOCK
, 4);
323 for(i
= 0; i
< nb_nics
; i
++)
324 pci_nic_init(&nd_table
[i
], "ne2k_pci", NULL
);
327 if (drive_get_max_bus(IF_IDE
) >= MAX_IDE_BUS
) {
328 fprintf(stderr
, "qemu: too many IDE bus\n");
332 /* First IDE channel is a MAC IDE on the MacIO bus */
333 hd
[0] = drive_get(IF_IDE
, 0, 0);
334 hd
[1] = drive_get(IF_IDE
, 0, 1);
335 dbdma
= DBDMA_init(&dbdma_mem_index
);
336 ide_mem_index
[0] = -1;
337 ide_mem_index
[1] = pmac_ide_init(hd
, pic
[0x0D], dbdma
, 0x16, pic
[0x02]);
339 /* Second IDE channel is a CMD646 on the PCI bus */
340 hd
[0] = drive_get(IF_IDE
, 1, 0);
341 hd
[1] = drive_get(IF_IDE
, 1, 1);
342 hd
[3] = hd
[2] = NULL
;
343 pci_cmd646_ide_init(pci_bus
, hd
, 0);
345 /* cuda also initialize ADB */
346 cuda_init(&cuda_mem_index
, pic
[0x12]);
348 adb_kbd_init(&adb_bus
);
349 adb_mouse_init(&adb_bus
);
351 nvr
= macio_nvram_init(&nvram_mem_index
, 0x2000, 4);
352 pmac_format_nvram_partition(nvr
, 0x2000);
354 macio_init(pci_bus
, PCI_DEVICE_ID_APPLE_343S1201
, 1, pic_mem_index
,
355 dbdma_mem_index
, cuda_mem_index
, nvr
, 2, ide_mem_index
,
359 usb_ohci_init_pci(pci_bus
, -1);
362 if (graphic_depth
!= 15 && graphic_depth
!= 32 && graphic_depth
!= 8)
365 /* No PCI init: the BIOS will do it */
367 fw_cfg
= fw_cfg_init(0, 0, CFG_ADDR
, CFG_ADDR
+ 2);
368 fw_cfg_add_i32(fw_cfg
, FW_CFG_ID
, 1);
369 fw_cfg_add_i64(fw_cfg
, FW_CFG_RAM_SIZE
, (uint64_t)ram_size
);
370 fw_cfg_add_i16(fw_cfg
, FW_CFG_MACHINE_ID
, ARCH_HEATHROW
);
371 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_ADDR
, kernel_base
);
372 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_SIZE
, kernel_size
);
373 if (kernel_cmdline
) {
374 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_CMDLINE
, CMDLINE_ADDR
);
375 pstrcpy_targphys(CMDLINE_ADDR
, TARGET_PAGE_SIZE
, kernel_cmdline
);
377 fw_cfg_add_i32(fw_cfg
, FW_CFG_KERNEL_CMDLINE
, 0);
379 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_ADDR
, initrd_base
);
380 fw_cfg_add_i32(fw_cfg
, FW_CFG_INITRD_SIZE
, initrd_size
);
381 fw_cfg_add_i16(fw_cfg
, FW_CFG_BOOT_DEVICE
, ppc_boot_device
);
383 fw_cfg_add_i16(fw_cfg
, FW_CFG_PPC_WIDTH
, graphic_width
);
384 fw_cfg_add_i16(fw_cfg
, FW_CFG_PPC_HEIGHT
, graphic_height
);
385 fw_cfg_add_i16(fw_cfg
, FW_CFG_PPC_DEPTH
, graphic_depth
);
387 qemu_register_boot_set(fw_cfg_boot_set
, fw_cfg
);
390 static QEMUMachine heathrow_machine
= {
392 .desc
= "Heathrow based PowerMAC",
393 .init
= ppc_heathrow_init
,
394 .max_cpus
= MAX_CPUS
,
398 static void heathrow_machine_init(void)
400 qemu_register_machine(&heathrow_machine
);
403 machine_init(heathrow_machine_init
);