generic-FreeRTOS-demo/lpc.c

   1 #include "lpc.h"
   2
   3 void init_pio(void)
   4 {
   5
   6     PINSEL0 = 0;
   7     PINSEL1 = 0;
   8     PINSEL2 = 0;
   9     IODIR0  = 0;
  10     IODIR1  = 0;
  11     //            P5=>MAT0.1
  12     PINSEL0 |=      (2<<  10);
  13
  14
  15
  16     //              P16=>MAT0.2
  17     PINSEL1 |=  (2<<  0)  ;
  18     //              P29=>MAT0.3
  19     PINSEL1 |=  (3<<  26)  ;
  20
  21
  22
  23     IODIR0 |= P10 | P11 | P12;
  24
  25
  26 }
  27
  28 void init_peripheral(void)
  29 {
  30     init_timer();
  31
  32
  33 }
  34
  35 static void init_timer(void)
  36 {
  37     //T0TCR = 0; // Disable timer
  38     //T0PC = 0;
  39     //T0PR=14;  //58
  40
  41
  42
  43     T0MCR |= 0; // interrupt yok
  44     T0CCR = 0; // Capture disable
  45     T0EMR = 0x540; // 0101 0100 0000  MAT0(1..3) => 1  clear on match  0x7
  46
  47     //T0TCR = 2;     //reset
  48     //T0TCR = 1;      //başlat
  49
  50 }
  51
  52 void init_low_level( void )
  53 {
  54         #ifdef RUN_FROM_RAM
  55                 /* Remap the interrupt vectors to RAM if we are are running from RAM. */
  56                 SCB_MEMMAP = 2;
  57         #endif
  58
  59         /* Setup the PLL to multiply the XTAL input by 4. */
  60         SCB_PLLCFG = ( mainPLL_MUL_4 | mainPLL_DIV_1 );
  61
  62         /* Activate the PLL by turning it on then feeding the correct sequence of
  63         bytes. */
  64         SCB_PLLCON = mainPLL_ENABLE;
  65         SCB_PLLFEED = mainPLL_FEED_BYTE1;
  66         SCB_PLLFEED = mainPLL_FEED_BYTE2;
  67
  68         /* Wait for the PLL to lock... */
  69         while( !( SCB_PLLSTAT & mainPLL_LOCK ) );
  70
  71         /* ...before connecting it using the feed sequence again. */
  72         SCB_PLLCON = mainPLL_CONNECT;
  73         SCB_PLLFEED = mainPLL_FEED_BYTE1;
  74         SCB_PLLFEED = mainPLL_FEED_BYTE2;
  75
  76         /* Setup and turn on the MAM.  Three cycle access is used due to the fast
  77         PLL used.  It is possible faster overall performance could be obtained by
  78         tuning the MAM and PLL settings. */
  79         MAM_TIM = mainMAM_TIM_3;
  80         MAM_CR = mainMAM_MODE_FULL;
  81
  82         /* Setup the peripheral bus to be the same as the PLL output. */
  83         SCB_VPBDIV = mainBUS_CLK_FULL;
  84
  85 }