FreeRTOS/Common/ethernet/lwIP_130/contrib/port/FreeRTOS/ColdFire/fecbd.h

   1 /*
   2  * File:    fecbd.h
   3  * Purpose:
   4  *
   5  * Purpose: Provide a simple buffer management driver
   6  */
   7
   8 #ifndef _FECBD_H_
   9 #define _FECBD_H_
  10
  11 /********************************************************************/
  12
  13 #define Rx  1
  14 #define Tx  0
  15
  16 /*
  17  * Buffer sizes in bytes
  18  */
  19 #ifndef RX_BUF_SZ
  20 #define RX_BUF_SZ  1520 //2048
  21 #endif
  22 #ifndef TX_BUF_SZ
  23 #define TX_BUF_SZ  1520
  24 #endif
  25
  26 /*
  27  * Buffer Descriptor Format
  28  */
  29 #pragma options align= packed
  30 typedef struct
  31 {
  32     uint16 status;  /* control and status */
  33     uint16 length;  /* transfer length */
  34     uint8  *data;   /* buffer address */
  35 } FECBD;
  36
  37 /*
  38  * Bit level definitions for status field of buffer descriptors
  39  */
  40 #define TX_BD_R         0x8000
  41 #define TX_BD_TO1       0x4000
  42 #define TX_BD_W         0x2000
  43 #define TX_BD_TO2       0x1000
  44 #define TX_BD_INTERRUPT 0x1000  /* MCF547x/8x Only */
  45 #define TX_BD_L         0x0800
  46 #define TX_BD_TC        0x0400
  47 #define TX_BD_DEF       0x0200  /* MCF5272 Only */
  48 #define TX_BD_ABC       0x0200
  49 #define TX_BD_HB        0x0100  /* MCF5272 Only */
  50 #define TX_BD_LC        0x0080  /* MCF5272 Only */
  51 #define TX_BD_RL        0x0040  /* MCF5272 Only */
  52 #define TX_BD_UN        0x0002  /* MCF5272 Only */
  53 #define TX_BD_CSL       0x0001  /* MCF5272 Only */
  54
  55 #define RX_BD_E         0x8000
  56 #define RX_BD_R01       0x4000
  57 #define RX_BD_W         0x2000
  58 #define RX_BD_R02       0x1000
  59 #define RX_BD_INTERRUPT 0x1000  /* MCF547x/8x Only */
  60 #define RX_BD_L         0x0800
  61 #define RX_BD_M         0x0100
  62 #define RX_BD_BC        0x0080
  63 #define RX_BD_MC        0x0040
  64 #define RX_BD_LG        0x0020
  65 #define RX_BD_NO        0x0010
  66 #define RX_BD_CR        0x0004
  67 #define RX_BD_OV        0x0002
  68 #define RX_BD_TR        0x0001
  69 #define RX_BD_ERROR     (RX_BD_NO | RX_BD_CR | RX_BD_OV | RX_BD_TR)
  70
  71 /*
  72  * The following defines are provided by the MCF547x/8x
  73  * DMA API.  These are shown here to show their correlation
  74  * to the other FEC buffer descriptor status bits
  75  *
  76  * #define MCD_FEC_BUF_READY   0x8000
  77  * #define MCD_FEC_WRAP        0x2000
  78  * #define MCD_FEC_INTERRUPT   0x1000
  79  * #define MCD_FEC_END_FRAME   0x0800
  80  */
  81
  82 /*
  83  * Functions provided in fec_bd.c
  84  */
  85 int     fecbd_init(int, int, int);
  86 void    fecbd_flush(int);
  87 void    fecbd_dump( void );
  88 uint32  fecbd_get_start(int, int);
  89 FECBD*  fecbd_rx_alloc(int);
  90 FECBD*  fecbd_tx_alloc(int);
  91 FECBD*  fecbd_tx_free(int);
  92
  93 /*
  94  * Error codes
  95  */
  96 #define ERR_MALLOC      (-1)
  97 #define ERR_NBUFALLOC   (-2)
  98
  99 /*******************************************************************/
 100
 101 #endif /* _FECBD_H_ */