test/fdct4x4_test.cc

   1 /*
   2  *  Copyright (c) 2012 The WebM project authors. All Rights Reserved.
   3  *
   4  *  Use of this source code is governed by a BSD-style license
   5  *  that can be found in the LICENSE file in the root of the source
   6  *  tree. An additional intellectual property rights grant can be found
   7  *  in the file PATENTS.  All contributing project authors may
   8  *  be found in the AUTHORS file in the root of the source tree.
   9  */
  10
  11 #include <math.h>
  12 #include <stdlib.h>
  13 #include <string.h>
  14
  15 #include "third_party/googletest/src/include/gtest/gtest.h"
  16 #include "test/acm_random.h"
  17 #include "test/clear_system_state.h"
  18 #include "test/register_state_check.h"
  19 #include "test/util.h"
  20
  21 #include "./vp9_rtcd.h"
  22 #include "vp9/common/vp9_entropy.h"
  23 #include "vpx/vpx_codec.h"
  24 #include "vpx/vpx_integer.h"
  25 #include "vpx_ports/mem.h"
  26
  27 using libvpx_test::ACMRandom;
  28
  29 namespace {
  30 const int kNumCoeffs = 16;
  31 typedef void (*FdctFunc)(const int16_t *in, tran_low_t *out, int stride);
  32 typedef void (*IdctFunc)(const tran_low_t *in, uint8_t *out, int stride);
  33 typedef void (*FhtFunc)(const int16_t *in, tran_low_t *out, int stride,
  34                         int tx_type);
  35 typedef void (*IhtFunc)(const tran_low_t *in, uint8_t *out, int stride,
  36                         int tx_type);
  37
  38 typedef std::tr1::tuple<FdctFunc, IdctFunc, int, vpx_bit_depth_t> Dct4x4Param;
  39 typedef std::tr1::tuple<FhtFunc, IhtFunc, int, vpx_bit_depth_t> Ht4x4Param;
  40
  41 void fdct4x4_ref(const int16_t *in, tran_low_t *out, int stride,
  42                  int tx_type) {
  43   vp9_fdct4x4_c(in, out, stride);
  44 }
  45
  46 void fht4x4_ref(const int16_t *in, tran_low_t *out, int stride, int tx_type) {
  47   vp9_fht4x4_c(in, out, stride, tx_type);
  48 }
  49
  50 void fwht4x4_ref(const int16_t *in, tran_low_t *out, int stride,
  51                  int tx_type) {
  52   vp9_fwht4x4_c(in, out, stride);
  53 }
  54
  55 #if CONFIG_VP9_HIGHBITDEPTH
  56 void idct4x4_10(const tran_low_t *in, uint8_t *out, int stride) {
  57   vp9_highbd_idct4x4_16_add_c(in, out, stride, 10);
  58 }
  59
  60 void idct4x4_12(const tran_low_t *in, uint8_t *out, int stride) {
  61   vp9_highbd_idct4x4_16_add_c(in, out, stride, 12);
  62 }
  63
  64 void iht4x4_10(const tran_low_t *in, uint8_t *out, int stride, int tx_type) {
  65   vp9_highbd_iht4x4_16_add_c(in, out, stride, tx_type, 10);
  66 }
  67
  68 void iht4x4_12(const tran_low_t *in, uint8_t *out, int stride, int tx_type) {
  69   vp9_highbd_iht4x4_16_add_c(in, out, stride, tx_type, 12);
  70 }
  71
  72 void iwht4x4_10(const tran_low_t *in, uint8_t *out, int stride) {
  73   vp9_highbd_iwht4x4_16_add_c(in, out, stride, 10);
  74 }
  75
  76 void iwht4x4_12(const tran_low_t *in, uint8_t *out, int stride) {
  77   vp9_highbd_iwht4x4_16_add_c(in, out, stride, 12);
  78 }
  79
  80 #if HAVE_SSE2
  81 void idct4x4_10_sse2(const tran_low_t *in, uint8_t *out, int stride) {
  82   vp9_highbd_idct4x4_16_add_sse2(in, out, stride, 10);
  83 }
  84
  85 void idct4x4_12_sse2(const tran_low_t *in, uint8_t *out, int stride) {
  86   vp9_highbd_idct4x4_16_add_sse2(in, out, stride, 12);
  87 }
  88 #endif  // HAVE_SSE2
  89 #endif  // CONFIG_VP9_HIGHBITDEPTH
  90
  91 class Trans4x4TestBase {
  92  public:
  93   virtual ~Trans4x4TestBase() {}
  94
  95  protected:
  96   virtual void RunFwdTxfm(const int16_t *in, tran_low_t *out, int stride) = 0;
  97
  98   virtual void RunInvTxfm(const tran_low_t *out, uint8_t *dst, int stride) = 0;
  99
 100   void RunAccuracyCheck(int limit) {
 101     ACMRandom rnd(ACMRandom::DeterministicSeed());
 102     uint32_t max_error = 0;
 103     int64_t total_error = 0;
 104     const int count_test_block = 10000;
 105     for (int i = 0; i < count_test_block; ++i) {
 106       DECLARE_ALIGNED(16, int16_t, test_input_block[kNumCoeffs]);
 107       DECLARE_ALIGNED(16, tran_low_t, test_temp_block[kNumCoeffs]);
 108       DECLARE_ALIGNED(16, uint8_t, dst[kNumCoeffs]);
 109       DECLARE_ALIGNED(16, uint8_t, src[kNumCoeffs]);
 110 #if CONFIG_VP9_HIGHBITDEPTH
 111       DECLARE_ALIGNED(16, uint16_t, dst16[kNumCoeffs]);
 112       DECLARE_ALIGNED(16, uint16_t, src16[kNumCoeffs]);
 113 #endif
 114
 115       // Initialize a test block with input range [-255, 255].
 116       for (int j = 0; j < kNumCoeffs; ++j) {
 117         if (bit_depth_ == VPX_BITS_8) {
 118           src[j] = rnd.Rand8();
 119           dst[j] = rnd.Rand8();
 120           test_input_block[j] = src[j] - dst[j];
 121 #if CONFIG_VP9_HIGHBITDEPTH
 122         } else {
 123           src16[j] = rnd.Rand16() & mask_;
 124           dst16[j] = rnd.Rand16() & mask_;
 125           test_input_block[j] = src16[j] - dst16[j];
 126 #endif
 127         }
 128       }
 129
 130       ASM_REGISTER_STATE_CHECK(RunFwdTxfm(test_input_block,
 131                                           test_temp_block, pitch_));
 132       if (bit_depth_ == VPX_BITS_8) {
 133         ASM_REGISTER_STATE_CHECK(RunInvTxfm(test_temp_block, dst, pitch_));
 134 #if CONFIG_VP9_HIGHBITDEPTH
 135       } else {
 136         ASM_REGISTER_STATE_CHECK(RunInvTxfm(test_temp_block,
 137                                             CONVERT_TO_BYTEPTR(dst16), pitch_));
 138 #endif
 139       }
 140
 141       for (int j = 0; j < kNumCoeffs; ++j) {
 142 #if CONFIG_VP9_HIGHBITDEPTH
 143         const uint32_t diff =
 144             bit_depth_ == VPX_BITS_8 ? dst[j] - src[j] : dst16[j] - src16[j];
 145 #else
 146         ASSERT_EQ(VPX_BITS_8, bit_depth_);
 147         const uint32_t diff = dst[j] - src[j];
 148 #endif
 149         const uint32_t error = diff * diff;
 150         if (max_error < error)
 151           max_error = error;
 152         total_error += error;
 153       }
 154     }
 155
 156     EXPECT_GE(static_cast<uint32_t>(limit), max_error)
 157         << "Error: 4x4 FHT/IHT has an individual round trip error > "
 158         << limit;
 159
 160     EXPECT_GE(count_test_block * limit, total_error)
 161         << "Error: 4x4 FHT/IHT has average round trip error > " << limit
 162         << " per block";
 163   }
 164
 165   void RunCoeffCheck() {
 166     ACMRandom rnd(ACMRandom::DeterministicSeed());
 167     const int count_test_block = 5000;
 168     DECLARE_ALIGNED(16, int16_t, input_block[kNumCoeffs]);
 169     DECLARE_ALIGNED(16, tran_low_t, output_ref_block[kNumCoeffs]);
 170     DECLARE_ALIGNED(16, tran_low_t, output_block[kNumCoeffs]);
 171
 172     for (int i = 0; i < count_test_block; ++i) {
 173       // Initialize a test block with input range [-mask_, mask_].
 174       for (int j = 0; j < kNumCoeffs; ++j)
 175         input_block[j] = (rnd.Rand16() & mask_) - (rnd.Rand16() & mask_);
 176
 177       fwd_txfm_ref(input_block, output_ref_block, pitch_, tx_type_);
 178       ASM_REGISTER_STATE_CHECK(RunFwdTxfm(input_block, output_block, pitch_));
 179
 180       // The minimum quant value is 4.
 181       for (int j = 0; j < kNumCoeffs; ++j)
 182         EXPECT_EQ(output_block[j], output_ref_block[j]);
 183     }
 184   }
 185
 186   void RunMemCheck() {
 187     ACMRandom rnd(ACMRandom::DeterministicSeed());
 188     const int count_test_block = 5000;
 189     DECLARE_ALIGNED(16, int16_t, input_extreme_block[kNumCoeffs]);
 190     DECLARE_ALIGNED(16, tran_low_t, output_ref_block[kNumCoeffs]);
 191     DECLARE_ALIGNED(16, tran_low_t, output_block[kNumCoeffs]);
 192
 193     for (int i = 0; i < count_test_block; ++i) {
 194       // Initialize a test block with input range [-mask_, mask_].
 195       for (int j = 0; j < kNumCoeffs; ++j) {
 196         input_extreme_block[j] = rnd.Rand8() % 2 ? mask_ : -mask_;
 197       }
 198       if (i == 0) {
 199         for (int j = 0; j < kNumCoeffs; ++j)
 200           input_extreme_block[j] = mask_;
 201       } else if (i == 1) {
 202         for (int j = 0; j < kNumCoeffs; ++j)
 203           input_extreme_block[j] = -mask_;
 204       }
 205
 206       fwd_txfm_ref(input_extreme_block, output_ref_block, pitch_, tx_type_);
 207       ASM_REGISTER_STATE_CHECK(RunFwdTxfm(input_extreme_block,
 208                                           output_block, pitch_));
 209
 210       // The minimum quant value is 4.
 211       for (int j = 0; j < kNumCoeffs; ++j) {
 212         EXPECT_EQ(output_block[j], output_ref_block[j]);
 213         EXPECT_GE(4 * DCT_MAX_VALUE << (bit_depth_ - 8), abs(output_block[j]))
 214             << "Error: 4x4 FDCT has coefficient larger than 4*DCT_MAX_VALUE";
 215       }
 216     }
 217   }
 218
 219   void RunInvAccuracyCheck(int limit) {
 220     ACMRandom rnd(ACMRandom::DeterministicSeed());
 221     const int count_test_block = 1000;
 222     DECLARE_ALIGNED(16, int16_t, in[kNumCoeffs]);
 223     DECLARE_ALIGNED(16, tran_low_t, coeff[kNumCoeffs]);
 224     DECLARE_ALIGNED(16, uint8_t, dst[kNumCoeffs]);
 225     DECLARE_ALIGNED(16, uint8_t, src[kNumCoeffs]);
 226 #if CONFIG_VP9_HIGHBITDEPTH
 227     DECLARE_ALIGNED(16, uint16_t, dst16[kNumCoeffs]);
 228     DECLARE_ALIGNED(16, uint16_t, src16[kNumCoeffs]);
 229 #endif
 230
 231     for (int i = 0; i < count_test_block; ++i) {
 232       // Initialize a test block with input range [-mask_, mask_].
 233       for (int j = 0; j < kNumCoeffs; ++j) {
 234         if (bit_depth_ == VPX_BITS_8) {
 235           src[j] = rnd.Rand8();
 236           dst[j] = rnd.Rand8();
 237           in[j] = src[j] - dst[j];
 238 #if CONFIG_VP9_HIGHBITDEPTH
 239         } else {
 240           src16[j] = rnd.Rand16() & mask_;
 241           dst16[j] = rnd.Rand16() & mask_;
 242           in[j] = src16[j] - dst16[j];
 243 #endif
 244         }
 245       }
 246
 247       fwd_txfm_ref(in, coeff, pitch_, tx_type_);
 248
 249       if (bit_depth_ == VPX_BITS_8) {
 250         ASM_REGISTER_STATE_CHECK(RunInvTxfm(coeff, dst, pitch_));
 251 #if CONFIG_VP9_HIGHBITDEPTH
 252       } else {
 253         ASM_REGISTER_STATE_CHECK(RunInvTxfm(coeff, CONVERT_TO_BYTEPTR(dst16),
 254                                             pitch_));
 255 #endif
 256       }
 257
 258       for (int j = 0; j < kNumCoeffs; ++j) {
 259 #if CONFIG_VP9_HIGHBITDEPTH
 260         const uint32_t diff =
 261             bit_depth_ == VPX_BITS_8 ? dst[j] - src[j] : dst16[j] - src16[j];
 262 #else
 263         const uint32_t diff = dst[j] - src[j];
 264 #endif
 265         const uint32_t error = diff * diff;
 266         EXPECT_GE(static_cast<uint32_t>(limit), error)
 267             << "Error: 4x4 IDCT has error " << error
 268             << " at index " << j;
 269       }
 270     }
 271   }
 272
 273   int pitch_;
 274   int tx_type_;
 275   FhtFunc fwd_txfm_ref;
 276   vpx_bit_depth_t bit_depth_;
 277   int mask_;
 278 };
 279
 280 class Trans4x4DCT
 281     : public Trans4x4TestBase,
 282       public ::testing::TestWithParam<Dct4x4Param> {
 283  public:
 284   virtual ~Trans4x4DCT() {}
 285
 286   virtual void SetUp() {
 287     fwd_txfm_ = GET_PARAM(0);
 288     inv_txfm_ = GET_PARAM(1);
 289     tx_type_  = GET_PARAM(2);
 290     pitch_    = 4;
 291     fwd_txfm_ref = fdct4x4_ref;
 292     bit_depth_ = GET_PARAM(3);
 293     mask_ = (1 << bit_depth_) - 1;
 294   }
 295   virtual void TearDown() { libvpx_test::ClearSystemState(); }
 296
 297  protected:
 298   void RunFwdTxfm(const int16_t *in, tran_low_t *out, int stride) {
 299     fwd_txfm_(in, out, stride);
 300   }
 301   void RunInvTxfm(const tran_low_t *out, uint8_t *dst, int stride) {
 302     inv_txfm_(out, dst, stride);
 303   }
 304
 305   FdctFunc fwd_txfm_;
 306   IdctFunc inv_txfm_;
 307 };
 308
 309 TEST_P(Trans4x4DCT, AccuracyCheck) {
 310   RunAccuracyCheck(1);
 311 }
 312
 313 TEST_P(Trans4x4DCT, CoeffCheck) {
 314   RunCoeffCheck();
 315 }
 316
 317 TEST_P(Trans4x4DCT, MemCheck) {
 318   RunMemCheck();
 319 }
 320
 321 TEST_P(Trans4x4DCT, InvAccuracyCheck) {
 322   RunInvAccuracyCheck(1);
 323 }
 324
 325 class Trans4x4HT
 326     : public Trans4x4TestBase,
 327       public ::testing::TestWithParam<Ht4x4Param> {
 328  public:
 329   virtual ~Trans4x4HT() {}
 330
 331   virtual void SetUp() {
 332     fwd_txfm_ = GET_PARAM(0);
 333     inv_txfm_ = GET_PARAM(1);
 334     tx_type_  = GET_PARAM(2);
 335     pitch_    = 4;
 336     fwd_txfm_ref = fht4x4_ref;
 337     bit_depth_ = GET_PARAM(3);
 338     mask_ = (1 << bit_depth_) - 1;
 339   }
 340   virtual void TearDown() { libvpx_test::ClearSystemState(); }
 341
 342  protected:
 343   void RunFwdTxfm(const int16_t *in, tran_low_t *out, int stride) {
 344     fwd_txfm_(in, out, stride, tx_type_);
 345   }
 346
 347   void RunInvTxfm(const tran_low_t *out, uint8_t *dst, int stride) {
 348     inv_txfm_(out, dst, stride, tx_type_);
 349   }
 350
 351   FhtFunc fwd_txfm_;
 352   IhtFunc inv_txfm_;
 353 };
 354
 355 TEST_P(Trans4x4HT, AccuracyCheck) {
 356   RunAccuracyCheck(1);
 357 }
 358
 359 TEST_P(Trans4x4HT, CoeffCheck) {
 360   RunCoeffCheck();
 361 }
 362
 363 TEST_P(Trans4x4HT, MemCheck) {
 364   RunMemCheck();
 365 }
 366
 367 TEST_P(Trans4x4HT, InvAccuracyCheck) {
 368   RunInvAccuracyCheck(1);
 369 }
 370
 371 class Trans4x4WHT
 372     : public Trans4x4TestBase,
 373       public ::testing::TestWithParam<Dct4x4Param> {
 374  public:
 375   virtual ~Trans4x4WHT() {}
 376
 377   virtual void SetUp() {
 378     fwd_txfm_ = GET_PARAM(0);
 379     inv_txfm_ = GET_PARAM(1);
 380     tx_type_  = GET_PARAM(2);
 381     pitch_    = 4;
 382     fwd_txfm_ref = fwht4x4_ref;
 383     bit_depth_ = GET_PARAM(3);
 384     mask_ = (1 << bit_depth_) - 1;
 385   }
 386   virtual void TearDown() { libvpx_test::ClearSystemState(); }
 387
 388  protected:
 389   void RunFwdTxfm(const int16_t *in, tran_low_t *out, int stride) {
 390     fwd_txfm_(in, out, stride);
 391   }
 392   void RunInvTxfm(const tran_low_t *out, uint8_t *dst, int stride) {
 393     inv_txfm_(out, dst, stride);
 394   }
 395
 396   FdctFunc fwd_txfm_;
 397   IdctFunc inv_txfm_;
 398 };
 399
 400 TEST_P(Trans4x4WHT, AccuracyCheck) {
 401   RunAccuracyCheck(0);
 402 }
 403
 404 TEST_P(Trans4x4WHT, CoeffCheck) {
 405   RunCoeffCheck();
 406 }
 407
 408 TEST_P(Trans4x4WHT, MemCheck) {
 409   RunMemCheck();
 410 }
 411
 412 TEST_P(Trans4x4WHT, InvAccuracyCheck) {
 413   RunInvAccuracyCheck(0);
 414 }
 415 using std::tr1::make_tuple;
 416
 417 #if CONFIG_VP9_HIGHBITDEPTH
 418 INSTANTIATE_TEST_CASE_P(
 419     C, Trans4x4DCT,
 420     ::testing::Values(
 421         make_tuple(&vp9_highbd_fdct4x4_c, &idct4x4_10, 0, VPX_BITS_10),
 422         make_tuple(&vp9_highbd_fdct4x4_c, &idct4x4_12, 0, VPX_BITS_12),
 423         make_tuple(&vp9_fdct4x4_c, &vp9_idct4x4_16_add_c, 0, VPX_BITS_8)));
 424 #else
 425 INSTANTIATE_TEST_CASE_P(
 426     C, Trans4x4DCT,
 427     ::testing::Values(
 428         make_tuple(&vp9_fdct4x4_c, &vp9_idct4x4_16_add_c, 0, VPX_BITS_8)));
 429 #endif  // CONFIG_VP9_HIGHBITDEPTH
 430
 431 #if CONFIG_VP9_HIGHBITDEPTH
 432 INSTANTIATE_TEST_CASE_P(
 433     C, Trans4x4HT,
 434     ::testing::Values(
 435         make_tuple(&vp9_highbd_fht4x4_c, &iht4x4_10, 0, VPX_BITS_10),
 436         make_tuple(&vp9_highbd_fht4x4_c, &iht4x4_10, 1, VPX_BITS_10),
 437         make_tuple(&vp9_highbd_fht4x4_c, &iht4x4_10, 2, VPX_BITS_10),
 438         make_tuple(&vp9_highbd_fht4x4_c, &iht4x4_10, 3, VPX_BITS_10),
 439         make_tuple(&vp9_highbd_fht4x4_c, &iht4x4_12, 0, VPX_BITS_12),
 440         make_tuple(&vp9_highbd_fht4x4_c, &iht4x4_12, 1, VPX_BITS_12),
 441         make_tuple(&vp9_highbd_fht4x4_c, &iht4x4_12, 2, VPX_BITS_12),
 442         make_tuple(&vp9_highbd_fht4x4_c, &iht4x4_12, 3, VPX_BITS_12),
 443         make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_c, 0, VPX_BITS_8),
 444         make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_c, 1, VPX_BITS_8),
 445         make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_c, 2, VPX_BITS_8),
 446         make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_c, 3, VPX_BITS_8)));
 447 #else
 448 INSTANTIATE_TEST_CASE_P(
 449     C, Trans4x4HT,
 450     ::testing::Values(
 451         make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_c, 0, VPX_BITS_8),
 452         make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_c, 1, VPX_BITS_8),
 453         make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_c, 2, VPX_BITS_8),
 454         make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_c, 3, VPX_BITS_8)));
 455 #endif  // CONFIG_VP9_HIGHBITDEPTH
 456
 457 #if CONFIG_VP9_HIGHBITDEPTH
 458 INSTANTIATE_TEST_CASE_P(
 459     C, Trans4x4WHT,
 460     ::testing::Values(
 461         make_tuple(&vp9_highbd_fwht4x4_c, &iwht4x4_10, 0, VPX_BITS_10),
 462         make_tuple(&vp9_highbd_fwht4x4_c, &iwht4x4_12, 0, VPX_BITS_12),
 463         make_tuple(&vp9_fwht4x4_c, &vp9_iwht4x4_16_add_c, 0, VPX_BITS_8)));
 464 #else
 465 INSTANTIATE_TEST_CASE_P(
 466     C, Trans4x4WHT,
 467     ::testing::Values(
 468         make_tuple(&vp9_fwht4x4_c, &vp9_iwht4x4_16_add_c, 0, VPX_BITS_8)));
 469 #endif  // CONFIG_VP9_HIGHBITDEPTH
 470
 471 #if HAVE_NEON_ASM && !CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
 472 INSTANTIATE_TEST_CASE_P(
 473     NEON, Trans4x4DCT,
 474     ::testing::Values(
 475         make_tuple(&vp9_fdct4x4_c,
 476                    &vp9_idct4x4_16_add_neon, 0, VPX_BITS_8)));
 477 #endif  // HAVE_NEON_ASM && !CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
 478
 479 #if HAVE_NEON && !CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
 480 INSTANTIATE_TEST_CASE_P(
 481     NEON, Trans4x4HT,
 482     ::testing::Values(
 483         make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_neon, 0, VPX_BITS_8),
 484         make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_neon, 1, VPX_BITS_8),
 485         make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_neon, 2, VPX_BITS_8),
 486         make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_neon, 3, VPX_BITS_8)));
 487 #endif  // HAVE_NEON && !CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
 488
 489 #if CONFIG_USE_X86INC && HAVE_MMX && !CONFIG_VP9_HIGHBITDEPTH && \
 490     !CONFIG_EMULATE_HARDWARE
 491 INSTANTIATE_TEST_CASE_P(
 492     MMX, Trans4x4WHT,
 493     ::testing::Values(
 494         make_tuple(&vp9_fwht4x4_mmx, &vp9_iwht4x4_16_add_c, 0, VPX_BITS_8)));
 495 #endif
 496
 497 #if CONFIG_USE_X86INC && HAVE_SSE2 && !CONFIG_VP9_HIGHBITDEPTH && \
 498     !CONFIG_EMULATE_HARDWARE
 499 INSTANTIATE_TEST_CASE_P(
 500     SSE2, Trans4x4WHT,
 501     ::testing::Values(
 502         make_tuple(&vp9_fwht4x4_c, &vp9_iwht4x4_16_add_sse2, 0, VPX_BITS_8)));
 503 #endif
 504
 505 #if HAVE_SSE2 && !CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
 506 INSTANTIATE_TEST_CASE_P(
 507     SSE2, Trans4x4DCT,
 508     ::testing::Values(
 509         make_tuple(&vp9_fdct4x4_sse2,
 510                    &vp9_idct4x4_16_add_sse2, 0, VPX_BITS_8)));
 511 INSTANTIATE_TEST_CASE_P(
 512     SSE2, Trans4x4HT,
 513     ::testing::Values(
 514         make_tuple(&vp9_fht4x4_sse2, &vp9_iht4x4_16_add_sse2, 0, VPX_BITS_8),
 515         make_tuple(&vp9_fht4x4_sse2, &vp9_iht4x4_16_add_sse2, 1, VPX_BITS_8),
 516         make_tuple(&vp9_fht4x4_sse2, &vp9_iht4x4_16_add_sse2, 2, VPX_BITS_8),
 517         make_tuple(&vp9_fht4x4_sse2, &vp9_iht4x4_16_add_sse2, 3, VPX_BITS_8)));
 518 #endif  // HAVE_SSE2 && !CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
 519
 520 #if HAVE_SSE2 && CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
 521 INSTANTIATE_TEST_CASE_P(
 522     SSE2, Trans4x4DCT,
 523     ::testing::Values(
 524         make_tuple(&vp9_highbd_fdct4x4_c,    &idct4x4_10_sse2, 0, VPX_BITS_10),
 525         make_tuple(&vp9_highbd_fdct4x4_sse2, &idct4x4_10_sse2, 0, VPX_BITS_10),
 526         make_tuple(&vp9_highbd_fdct4x4_c,    &idct4x4_12_sse2, 0, VPX_BITS_12),
 527         make_tuple(&vp9_highbd_fdct4x4_sse2, &idct4x4_12_sse2, 0, VPX_BITS_12),
 528         make_tuple(&vp9_fdct4x4_sse2,      &vp9_idct4x4_16_add_c, 0,
 529                    VPX_BITS_8)));
 530
 531 INSTANTIATE_TEST_CASE_P(
 532     SSE2, Trans4x4HT,
 533     ::testing::Values(
 534         make_tuple(&vp9_highbd_fht4x4_sse2, &iht4x4_10, 0, VPX_BITS_10),
 535         make_tuple(&vp9_highbd_fht4x4_sse2, &iht4x4_10, 1, VPX_BITS_10),
 536         make_tuple(&vp9_highbd_fht4x4_sse2, &iht4x4_10, 2, VPX_BITS_10),
 537         make_tuple(&vp9_highbd_fht4x4_sse2, &iht4x4_10, 3, VPX_BITS_10),
 538         make_tuple(&vp9_highbd_fht4x4_sse2, &iht4x4_12, 0, VPX_BITS_12),
 539         make_tuple(&vp9_highbd_fht4x4_sse2, &iht4x4_12, 1, VPX_BITS_12),
 540         make_tuple(&vp9_highbd_fht4x4_sse2, &iht4x4_12, 2, VPX_BITS_12),
 541         make_tuple(&vp9_highbd_fht4x4_sse2, &iht4x4_12, 3, VPX_BITS_12),
 542         make_tuple(&vp9_fht4x4_sse2, &vp9_iht4x4_16_add_c, 0, VPX_BITS_8),
 543         make_tuple(&vp9_fht4x4_sse2, &vp9_iht4x4_16_add_c, 1, VPX_BITS_8),
 544         make_tuple(&vp9_fht4x4_sse2, &vp9_iht4x4_16_add_c, 2, VPX_BITS_8),
 545         make_tuple(&vp9_fht4x4_sse2, &vp9_iht4x4_16_add_c, 3, VPX_BITS_8)));
 546 #endif  // HAVE_SSE2 && CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
 547
 548 #if HAVE_MSA && !CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
 549 INSTANTIATE_TEST_CASE_P(
 550     MSA, Trans4x4DCT,
 551     ::testing::Values(
 552         make_tuple(&vp9_fdct4x4_msa, &vp9_idct4x4_16_add_msa, 0, VPX_BITS_8)));
 553 INSTANTIATE_TEST_CASE_P(
 554     MSA, Trans4x4HT,
 555     ::testing::Values(
 556         make_tuple(&vp9_fht4x4_msa, &vp9_iht4x4_16_add_msa, 0, VPX_BITS_8),
 557         make_tuple(&vp9_fht4x4_msa, &vp9_iht4x4_16_add_msa, 1, VPX_BITS_8),
 558         make_tuple(&vp9_fht4x4_msa, &vp9_iht4x4_16_add_msa, 2, VPX_BITS_8),
 559         make_tuple(&vp9_fht4x4_msa, &vp9_iht4x4_16_add_msa, 3, VPX_BITS_8)));
 560 #endif  // HAVE_MSA && !CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
 561 }  // namespace