test/fdct4x4_test.cc

   1 /*
   2  *  Copyright (c) 2012 The WebM project authors. All Rights Reserved.
   3  *
   4  *  Use of this source code is governed by a BSD-style license
   5  *  that can be found in the LICENSE file in the root of the source
   6  *  tree. An additional intellectual property rights grant can be found
   7  *  in the file PATENTS.  All contributing project authors may
   8  *  be found in the AUTHORS file in the root of the source tree.
   9  */
  10
  11 #include <math.h>
  12 #include <stdlib.h>
  13 #include <string.h>
  14
  15 #include "third_party/googletest/src/include/gtest/gtest.h"
  16
  17 #include "./vp9_rtcd.h"
  18 #include "./vpx_dsp_rtcd.h"
  19 #include "test/acm_random.h"
  20 #include "test/clear_system_state.h"
  21 #include "test/register_state_check.h"
  22 #include "test/util.h"
  23 #include "vp9/common/vp9_entropy.h"
  24 #include "vpx/vpx_codec.h"
  25 #include "vpx/vpx_integer.h"
  26 #include "vpx_ports/mem.h"
  27
  28 using libvpx_test::ACMRandom;
  29
  30 namespace {
  31 const int kNumCoeffs = 16;
  32 typedef void (*FdctFunc)(const int16_t *in, tran_low_t *out, int stride);
  33 typedef void (*IdctFunc)(const tran_low_t *in, uint8_t *out, int stride);
  34 typedef void (*FhtFunc)(const int16_t *in, tran_low_t *out, int stride,
  35                         int tx_type);
  36 typedef void (*IhtFunc)(const tran_low_t *in, uint8_t *out, int stride,
  37                         int tx_type);
  38
  39 typedef std::tr1::tuple<FdctFunc, IdctFunc, int, vpx_bit_depth_t> Dct4x4Param;
  40 typedef std::tr1::tuple<FhtFunc, IhtFunc, int, vpx_bit_depth_t> Ht4x4Param;
  41
  42 void fdct4x4_ref(const int16_t *in, tran_low_t *out, int stride,
  43                  int /*tx_type*/) {
  44   vpx_fdct4x4_c(in, out, stride);
  45 }
  46
  47 void fht4x4_ref(const int16_t *in, tran_low_t *out, int stride, int tx_type) {
  48   vp9_fht4x4_c(in, out, stride, tx_type);
  49 }
  50
  51 void fwht4x4_ref(const int16_t *in, tran_low_t *out, int stride,
  52                  int /*tx_type*/) {
  53   vp9_fwht4x4_c(in, out, stride);
  54 }
  55
  56 #if CONFIG_VP9_HIGHBITDEPTH
  57 void idct4x4_10(const tran_low_t *in, uint8_t *out, int stride) {
  58   vpx_highbd_idct4x4_16_add_c(in, out, stride, 10);
  59 }
  60
  61 void idct4x4_12(const tran_low_t *in, uint8_t *out, int stride) {
  62   vpx_highbd_idct4x4_16_add_c(in, out, stride, 12);
  63 }
  64
  65 void iht4x4_10(const tran_low_t *in, uint8_t *out, int stride, int tx_type) {
  66   vp9_highbd_iht4x4_16_add_c(in, out, stride, tx_type, 10);
  67 }
  68
  69 void iht4x4_12(const tran_low_t *in, uint8_t *out, int stride, int tx_type) {
  70   vp9_highbd_iht4x4_16_add_c(in, out, stride, tx_type, 12);
  71 }
  72
  73 void iwht4x4_10(const tran_low_t *in, uint8_t *out, int stride) {
  74   vpx_highbd_iwht4x4_16_add_c(in, out, stride, 10);
  75 }
  76
  77 void iwht4x4_12(const tran_low_t *in, uint8_t *out, int stride) {
  78   vpx_highbd_iwht4x4_16_add_c(in, out, stride, 12);
  79 }
  80
  81 #if HAVE_SSE2
  82 void idct4x4_10_sse2(const tran_low_t *in, uint8_t *out, int stride) {
  83   vpx_highbd_idct4x4_16_add_sse2(in, out, stride, 10);
  84 }
  85
  86 void idct4x4_12_sse2(const tran_low_t *in, uint8_t *out, int stride) {
  87   vpx_highbd_idct4x4_16_add_sse2(in, out, stride, 12);
  88 }
  89 #endif  // HAVE_SSE2
  90 #endif  // CONFIG_VP9_HIGHBITDEPTH
  91
  92 class Trans4x4TestBase {
  93  public:
  94   virtual ~Trans4x4TestBase() {}
  95
  96  protected:
  97   virtual void RunFwdTxfm(const int16_t *in, tran_low_t *out, int stride) = 0;
  98
  99   virtual void RunInvTxfm(const tran_low_t *out, uint8_t *dst, int stride) = 0;
 100
 101   void RunAccuracyCheck(int limit) {
 102     ACMRandom rnd(ACMRandom::DeterministicSeed());
 103     uint32_t max_error = 0;
 104     int64_t total_error = 0;
 105     const int count_test_block = 10000;
 106     for (int i = 0; i < count_test_block; ++i) {
 107       DECLARE_ALIGNED(16, int16_t, test_input_block[kNumCoeffs]);
 108       DECLARE_ALIGNED(16, tran_low_t, test_temp_block[kNumCoeffs]);
 109       DECLARE_ALIGNED(16, uint8_t, dst[kNumCoeffs]);
 110       DECLARE_ALIGNED(16, uint8_t, src[kNumCoeffs]);
 111 #if CONFIG_VP9_HIGHBITDEPTH
 112       DECLARE_ALIGNED(16, uint16_t, dst16[kNumCoeffs]);
 113       DECLARE_ALIGNED(16, uint16_t, src16[kNumCoeffs]);
 114 #endif
 115
 116       // Initialize a test block with input range [-255, 255].
 117       for (int j = 0; j < kNumCoeffs; ++j) {
 118         if (bit_depth_ == VPX_BITS_8) {
 119           src[j] = rnd.Rand8();
 120           dst[j] = rnd.Rand8();
 121           test_input_block[j] = src[j] - dst[j];
 122 #if CONFIG_VP9_HIGHBITDEPTH
 123         } else {
 124           src16[j] = rnd.Rand16() & mask_;
 125           dst16[j] = rnd.Rand16() & mask_;
 126           test_input_block[j] = src16[j] - dst16[j];
 127 #endif
 128         }
 129       }
 130
 131       ASM_REGISTER_STATE_CHECK(RunFwdTxfm(test_input_block,
 132                                           test_temp_block, pitch_));
 133       if (bit_depth_ == VPX_BITS_8) {
 134         ASM_REGISTER_STATE_CHECK(RunInvTxfm(test_temp_block, dst, pitch_));
 135 #if CONFIG_VP9_HIGHBITDEPTH
 136       } else {
 137         ASM_REGISTER_STATE_CHECK(RunInvTxfm(test_temp_block,
 138                                             CONVERT_TO_BYTEPTR(dst16), pitch_));
 139 #endif
 140       }
 141
 142       for (int j = 0; j < kNumCoeffs; ++j) {
 143 #if CONFIG_VP9_HIGHBITDEPTH
 144         const uint32_t diff =
 145             bit_depth_ == VPX_BITS_8 ? dst[j] - src[j] : dst16[j] - src16[j];
 146 #else
 147         ASSERT_EQ(VPX_BITS_8, bit_depth_);
 148         const uint32_t diff = dst[j] - src[j];
 149 #endif
 150         const uint32_t error = diff * diff;
 151         if (max_error < error)
 152           max_error = error;
 153         total_error += error;
 154       }
 155     }
 156
 157     EXPECT_GE(static_cast<uint32_t>(limit), max_error)
 158         << "Error: 4x4 FHT/IHT has an individual round trip error > "
 159         << limit;
 160
 161     EXPECT_GE(count_test_block * limit, total_error)
 162         << "Error: 4x4 FHT/IHT has average round trip error > " << limit
 163         << " per block";
 164   }
 165
 166   void RunCoeffCheck() {
 167     ACMRandom rnd(ACMRandom::DeterministicSeed());
 168     const int count_test_block = 5000;
 169     DECLARE_ALIGNED(16, int16_t, input_block[kNumCoeffs]);
 170     DECLARE_ALIGNED(16, tran_low_t, output_ref_block[kNumCoeffs]);
 171     DECLARE_ALIGNED(16, tran_low_t, output_block[kNumCoeffs]);
 172
 173     for (int i = 0; i < count_test_block; ++i) {
 174       // Initialize a test block with input range [-mask_, mask_].
 175       for (int j = 0; j < kNumCoeffs; ++j)
 176         input_block[j] = (rnd.Rand16() & mask_) - (rnd.Rand16() & mask_);
 177
 178       fwd_txfm_ref(input_block, output_ref_block, pitch_, tx_type_);
 179       ASM_REGISTER_STATE_CHECK(RunFwdTxfm(input_block, output_block, pitch_));
 180
 181       // The minimum quant value is 4.
 182       for (int j = 0; j < kNumCoeffs; ++j)
 183         EXPECT_EQ(output_block[j], output_ref_block[j]);
 184     }
 185   }
 186
 187   void RunMemCheck() {
 188     ACMRandom rnd(ACMRandom::DeterministicSeed());
 189     const int count_test_block = 5000;
 190     DECLARE_ALIGNED(16, int16_t, input_extreme_block[kNumCoeffs]);
 191     DECLARE_ALIGNED(16, tran_low_t, output_ref_block[kNumCoeffs]);
 192     DECLARE_ALIGNED(16, tran_low_t, output_block[kNumCoeffs]);
 193
 194     for (int i = 0; i < count_test_block; ++i) {
 195       // Initialize a test block with input range [-mask_, mask_].
 196       for (int j = 0; j < kNumCoeffs; ++j) {
 197         input_extreme_block[j] = rnd.Rand8() % 2 ? mask_ : -mask_;
 198       }
 199       if (i == 0) {
 200         for (int j = 0; j < kNumCoeffs; ++j)
 201           input_extreme_block[j] = mask_;
 202       } else if (i == 1) {
 203         for (int j = 0; j < kNumCoeffs; ++j)
 204           input_extreme_block[j] = -mask_;
 205       }
 206
 207       fwd_txfm_ref(input_extreme_block, output_ref_block, pitch_, tx_type_);
 208       ASM_REGISTER_STATE_CHECK(RunFwdTxfm(input_extreme_block,
 209                                           output_block, pitch_));
 210
 211       // The minimum quant value is 4.
 212       for (int j = 0; j < kNumCoeffs; ++j) {
 213         EXPECT_EQ(output_block[j], output_ref_block[j]);
 214         EXPECT_GE(4 * DCT_MAX_VALUE << (bit_depth_ - 8), abs(output_block[j]))
 215             << "Error: 4x4 FDCT has coefficient larger than 4*DCT_MAX_VALUE";
 216       }
 217     }
 218   }
 219
 220   void RunInvAccuracyCheck(int limit) {
 221     ACMRandom rnd(ACMRandom::DeterministicSeed());
 222     const int count_test_block = 1000;
 223     DECLARE_ALIGNED(16, int16_t, in[kNumCoeffs]);
 224     DECLARE_ALIGNED(16, tran_low_t, coeff[kNumCoeffs]);
 225     DECLARE_ALIGNED(16, uint8_t, dst[kNumCoeffs]);
 226     DECLARE_ALIGNED(16, uint8_t, src[kNumCoeffs]);
 227 #if CONFIG_VP9_HIGHBITDEPTH
 228     DECLARE_ALIGNED(16, uint16_t, dst16[kNumCoeffs]);
 229     DECLARE_ALIGNED(16, uint16_t, src16[kNumCoeffs]);
 230 #endif
 231
 232     for (int i = 0; i < count_test_block; ++i) {
 233       // Initialize a test block with input range [-mask_, mask_].
 234       for (int j = 0; j < kNumCoeffs; ++j) {
 235         if (bit_depth_ == VPX_BITS_8) {
 236           src[j] = rnd.Rand8();
 237           dst[j] = rnd.Rand8();
 238           in[j] = src[j] - dst[j];
 239 #if CONFIG_VP9_HIGHBITDEPTH
 240         } else {
 241           src16[j] = rnd.Rand16() & mask_;
 242           dst16[j] = rnd.Rand16() & mask_;
 243           in[j] = src16[j] - dst16[j];
 244 #endif
 245         }
 246       }
 247
 248       fwd_txfm_ref(in, coeff, pitch_, tx_type_);
 249
 250       if (bit_depth_ == VPX_BITS_8) {
 251         ASM_REGISTER_STATE_CHECK(RunInvTxfm(coeff, dst, pitch_));
 252 #if CONFIG_VP9_HIGHBITDEPTH
 253       } else {
 254         ASM_REGISTER_STATE_CHECK(RunInvTxfm(coeff, CONVERT_TO_BYTEPTR(dst16),
 255                                             pitch_));
 256 #endif
 257       }
 258
 259       for (int j = 0; j < kNumCoeffs; ++j) {
 260 #if CONFIG_VP9_HIGHBITDEPTH
 261         const uint32_t diff =
 262             bit_depth_ == VPX_BITS_8 ? dst[j] - src[j] : dst16[j] - src16[j];
 263 #else
 264         const uint32_t diff = dst[j] - src[j];
 265 #endif
 266         const uint32_t error = diff * diff;
 267         EXPECT_GE(static_cast<uint32_t>(limit), error)
 268             << "Error: 4x4 IDCT has error " << error
 269             << " at index " << j;
 270       }
 271     }
 272   }
 273
 274   int pitch_;
 275   int tx_type_;
 276   FhtFunc fwd_txfm_ref;
 277   vpx_bit_depth_t bit_depth_;
 278   int mask_;
 279 };
 280
 281 class Trans4x4DCT
 282     : public Trans4x4TestBase,
 283       public ::testing::TestWithParam<Dct4x4Param> {
 284  public:
 285   virtual ~Trans4x4DCT() {}
 286
 287   virtual void SetUp() {
 288     fwd_txfm_ = GET_PARAM(0);
 289     inv_txfm_ = GET_PARAM(1);
 290     tx_type_  = GET_PARAM(2);
 291     pitch_    = 4;
 292     fwd_txfm_ref = fdct4x4_ref;
 293     bit_depth_ = GET_PARAM(3);
 294     mask_ = (1 << bit_depth_) - 1;
 295   }
 296   virtual void TearDown() { libvpx_test::ClearSystemState(); }
 297
 298  protected:
 299   void RunFwdTxfm(const int16_t *in, tran_low_t *out, int stride) {
 300     fwd_txfm_(in, out, stride);
 301   }
 302   void RunInvTxfm(const tran_low_t *out, uint8_t *dst, int stride) {
 303     inv_txfm_(out, dst, stride);
 304   }
 305
 306   FdctFunc fwd_txfm_;
 307   IdctFunc inv_txfm_;
 308 };
 309
 310 TEST_P(Trans4x4DCT, AccuracyCheck) {
 311   RunAccuracyCheck(1);
 312 }
 313
 314 TEST_P(Trans4x4DCT, CoeffCheck) {
 315   RunCoeffCheck();
 316 }
 317
 318 TEST_P(Trans4x4DCT, MemCheck) {
 319   RunMemCheck();
 320 }
 321
 322 TEST_P(Trans4x4DCT, InvAccuracyCheck) {
 323   RunInvAccuracyCheck(1);
 324 }
 325
 326 class Trans4x4HT
 327     : public Trans4x4TestBase,
 328       public ::testing::TestWithParam<Ht4x4Param> {
 329  public:
 330   virtual ~Trans4x4HT() {}
 331
 332   virtual void SetUp() {
 333     fwd_txfm_ = GET_PARAM(0);
 334     inv_txfm_ = GET_PARAM(1);
 335     tx_type_  = GET_PARAM(2);
 336     pitch_    = 4;
 337     fwd_txfm_ref = fht4x4_ref;
 338     bit_depth_ = GET_PARAM(3);
 339     mask_ = (1 << bit_depth_) - 1;
 340   }
 341   virtual void TearDown() { libvpx_test::ClearSystemState(); }
 342
 343  protected:
 344   void RunFwdTxfm(const int16_t *in, tran_low_t *out, int stride) {
 345     fwd_txfm_(in, out, stride, tx_type_);
 346   }
 347
 348   void RunInvTxfm(const tran_low_t *out, uint8_t *dst, int stride) {
 349     inv_txfm_(out, dst, stride, tx_type_);
 350   }
 351
 352   FhtFunc fwd_txfm_;
 353   IhtFunc inv_txfm_;
 354 };
 355
 356 TEST_P(Trans4x4HT, AccuracyCheck) {
 357   RunAccuracyCheck(1);
 358 }
 359
 360 TEST_P(Trans4x4HT, CoeffCheck) {
 361   RunCoeffCheck();
 362 }
 363
 364 TEST_P(Trans4x4HT, MemCheck) {
 365   RunMemCheck();
 366 }
 367
 368 TEST_P(Trans4x4HT, InvAccuracyCheck) {
 369   RunInvAccuracyCheck(1);
 370 }
 371
 372 class Trans4x4WHT
 373     : public Trans4x4TestBase,
 374       public ::testing::TestWithParam<Dct4x4Param> {
 375  public:
 376   virtual ~Trans4x4WHT() {}
 377
 378   virtual void SetUp() {
 379     fwd_txfm_ = GET_PARAM(0);
 380     inv_txfm_ = GET_PARAM(1);
 381     tx_type_  = GET_PARAM(2);
 382     pitch_    = 4;
 383     fwd_txfm_ref = fwht4x4_ref;
 384     bit_depth_ = GET_PARAM(3);
 385     mask_ = (1 << bit_depth_) - 1;
 386   }
 387   virtual void TearDown() { libvpx_test::ClearSystemState(); }
 388
 389  protected:
 390   void RunFwdTxfm(const int16_t *in, tran_low_t *out, int stride) {
 391     fwd_txfm_(in, out, stride);
 392   }
 393   void RunInvTxfm(const tran_low_t *out, uint8_t *dst, int stride) {
 394     inv_txfm_(out, dst, stride);
 395   }
 396
 397   FdctFunc fwd_txfm_;
 398   IdctFunc inv_txfm_;
 399 };
 400
 401 TEST_P(Trans4x4WHT, AccuracyCheck) {
 402   RunAccuracyCheck(0);
 403 }
 404
 405 TEST_P(Trans4x4WHT, CoeffCheck) {
 406   RunCoeffCheck();
 407 }
 408
 409 TEST_P(Trans4x4WHT, MemCheck) {
 410   RunMemCheck();
 411 }
 412
 413 TEST_P(Trans4x4WHT, InvAccuracyCheck) {
 414   RunInvAccuracyCheck(0);
 415 }
 416 using std::tr1::make_tuple;
 417
 418 #if CONFIG_VP9_HIGHBITDEPTH
 419 INSTANTIATE_TEST_CASE_P(
 420     C, Trans4x4DCT,
 421     ::testing::Values(
 422         make_tuple(&vpx_highbd_fdct4x4_c, &idct4x4_10, 0, VPX_BITS_10),
 423         make_tuple(&vpx_highbd_fdct4x4_c, &idct4x4_12, 0, VPX_BITS_12),
 424         make_tuple(&vpx_fdct4x4_c, &vpx_idct4x4_16_add_c, 0, VPX_BITS_8)));
 425 #else
 426 INSTANTIATE_TEST_CASE_P(
 427     C, Trans4x4DCT,
 428     ::testing::Values(
 429         make_tuple(&vpx_fdct4x4_c, &vpx_idct4x4_16_add_c, 0, VPX_BITS_8)));
 430 #endif  // CONFIG_VP9_HIGHBITDEPTH
 431
 432 #if CONFIG_VP9_HIGHBITDEPTH
 433 INSTANTIATE_TEST_CASE_P(
 434     C, Trans4x4HT,
 435     ::testing::Values(
 436         make_tuple(&vp9_highbd_fht4x4_c, &iht4x4_10, 0, VPX_BITS_10),
 437         make_tuple(&vp9_highbd_fht4x4_c, &iht4x4_10, 1, VPX_BITS_10),
 438         make_tuple(&vp9_highbd_fht4x4_c, &iht4x4_10, 2, VPX_BITS_10),
 439         make_tuple(&vp9_highbd_fht4x4_c, &iht4x4_10, 3, VPX_BITS_10),
 440         make_tuple(&vp9_highbd_fht4x4_c, &iht4x4_12, 0, VPX_BITS_12),
 441         make_tuple(&vp9_highbd_fht4x4_c, &iht4x4_12, 1, VPX_BITS_12),
 442         make_tuple(&vp9_highbd_fht4x4_c, &iht4x4_12, 2, VPX_BITS_12),
 443         make_tuple(&vp9_highbd_fht4x4_c, &iht4x4_12, 3, VPX_BITS_12),
 444         make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_c, 0, VPX_BITS_8),
 445         make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_c, 1, VPX_BITS_8),
 446         make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_c, 2, VPX_BITS_8),
 447         make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_c, 3, VPX_BITS_8)));
 448 #else
 449 INSTANTIATE_TEST_CASE_P(
 450     C, Trans4x4HT,
 451     ::testing::Values(
 452         make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_c, 0, VPX_BITS_8),
 453         make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_c, 1, VPX_BITS_8),
 454         make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_c, 2, VPX_BITS_8),
 455         make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_c, 3, VPX_BITS_8)));
 456 #endif  // CONFIG_VP9_HIGHBITDEPTH
 457
 458 #if CONFIG_VP9_HIGHBITDEPTH
 459 INSTANTIATE_TEST_CASE_P(
 460     C, Trans4x4WHT,
 461     ::testing::Values(
 462         make_tuple(&vp9_highbd_fwht4x4_c, &iwht4x4_10, 0, VPX_BITS_10),
 463         make_tuple(&vp9_highbd_fwht4x4_c, &iwht4x4_12, 0, VPX_BITS_12),
 464         make_tuple(&vp9_fwht4x4_c, &vpx_iwht4x4_16_add_c, 0, VPX_BITS_8)));
 465 #else
 466 INSTANTIATE_TEST_CASE_P(
 467     C, Trans4x4WHT,
 468     ::testing::Values(
 469         make_tuple(&vp9_fwht4x4_c, &vpx_iwht4x4_16_add_c, 0, VPX_BITS_8)));
 470 #endif  // CONFIG_VP9_HIGHBITDEPTH
 471
 472 #if HAVE_NEON_ASM && !CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
 473 INSTANTIATE_TEST_CASE_P(
 474     NEON, Trans4x4DCT,
 475     ::testing::Values(
 476         make_tuple(&vpx_fdct4x4_c,
 477                    &vpx_idct4x4_16_add_neon, 0, VPX_BITS_8)));
 478 #endif  // HAVE_NEON_ASM && !CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
 479
 480 #if HAVE_NEON && !CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
 481 INSTANTIATE_TEST_CASE_P(
 482     NEON, Trans4x4HT,
 483     ::testing::Values(
 484         make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_neon, 0, VPX_BITS_8),
 485         make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_neon, 1, VPX_BITS_8),
 486         make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_neon, 2, VPX_BITS_8),
 487         make_tuple(&vp9_fht4x4_c, &vp9_iht4x4_16_add_neon, 3, VPX_BITS_8)));
 488 #endif  // HAVE_NEON && !CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
 489
 490 #if CONFIG_USE_X86INC && HAVE_MMX && !CONFIG_VP9_HIGHBITDEPTH && \
 491     !CONFIG_EMULATE_HARDWARE
 492 INSTANTIATE_TEST_CASE_P(
 493     MMX, Trans4x4WHT,
 494     ::testing::Values(
 495         make_tuple(&vp9_fwht4x4_mmx, &vpx_iwht4x4_16_add_c, 0, VPX_BITS_8)));
 496 #endif
 497
 498 #if CONFIG_USE_X86INC && HAVE_SSE2 && !CONFIG_VP9_HIGHBITDEPTH && \
 499     !CONFIG_EMULATE_HARDWARE
 500 INSTANTIATE_TEST_CASE_P(
 501     SSE2, Trans4x4WHT,
 502     ::testing::Values(
 503         make_tuple(&vp9_fwht4x4_c, &vpx_iwht4x4_16_add_sse2, 0, VPX_BITS_8)));
 504 #endif
 505
 506 #if HAVE_SSE2 && !CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
 507 INSTANTIATE_TEST_CASE_P(
 508     SSE2, Trans4x4DCT,
 509     ::testing::Values(
 510         make_tuple(&vpx_fdct4x4_sse2,
 511                    &vpx_idct4x4_16_add_sse2, 0, VPX_BITS_8)));
 512 INSTANTIATE_TEST_CASE_P(
 513     SSE2, Trans4x4HT,
 514     ::testing::Values(
 515         make_tuple(&vp9_fht4x4_sse2, &vp9_iht4x4_16_add_sse2, 0, VPX_BITS_8),
 516         make_tuple(&vp9_fht4x4_sse2, &vp9_iht4x4_16_add_sse2, 1, VPX_BITS_8),
 517         make_tuple(&vp9_fht4x4_sse2, &vp9_iht4x4_16_add_sse2, 2, VPX_BITS_8),
 518         make_tuple(&vp9_fht4x4_sse2, &vp9_iht4x4_16_add_sse2, 3, VPX_BITS_8)));
 519 #endif  // HAVE_SSE2 && !CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
 520
 521 #if HAVE_SSE2 && CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
 522 INSTANTIATE_TEST_CASE_P(
 523     SSE2, Trans4x4DCT,
 524     ::testing::Values(
 525         make_tuple(&vpx_highbd_fdct4x4_c,    &idct4x4_10_sse2, 0, VPX_BITS_10),
 526         make_tuple(&vpx_highbd_fdct4x4_sse2, &idct4x4_10_sse2, 0, VPX_BITS_10),
 527         make_tuple(&vpx_highbd_fdct4x4_c,    &idct4x4_12_sse2, 0, VPX_BITS_12),
 528         make_tuple(&vpx_highbd_fdct4x4_sse2, &idct4x4_12_sse2, 0, VPX_BITS_12),
 529         make_tuple(&vpx_fdct4x4_sse2,      &vpx_idct4x4_16_add_c, 0,
 530                    VPX_BITS_8)));
 531
 532 INSTANTIATE_TEST_CASE_P(
 533     SSE2, Trans4x4HT,
 534     ::testing::Values(
 535         make_tuple(&vp9_fht4x4_sse2, &vp9_iht4x4_16_add_c, 0, VPX_BITS_8),
 536         make_tuple(&vp9_fht4x4_sse2, &vp9_iht4x4_16_add_c, 1, VPX_BITS_8),
 537         make_tuple(&vp9_fht4x4_sse2, &vp9_iht4x4_16_add_c, 2, VPX_BITS_8),
 538         make_tuple(&vp9_fht4x4_sse2, &vp9_iht4x4_16_add_c, 3, VPX_BITS_8)));
 539 #endif  // HAVE_SSE2 && CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
 540
 541 #if HAVE_MSA && !CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
 542 INSTANTIATE_TEST_CASE_P(
 543     MSA, Trans4x4DCT,
 544     ::testing::Values(
 545         make_tuple(&vpx_fdct4x4_msa, &vpx_idct4x4_16_add_msa, 0, VPX_BITS_8)));
 546 INSTANTIATE_TEST_CASE_P(
 547     MSA, Trans4x4HT,
 548     ::testing::Values(
 549         make_tuple(&vp9_fht4x4_msa, &vp9_iht4x4_16_add_msa, 0, VPX_BITS_8),
 550         make_tuple(&vp9_fht4x4_msa, &vp9_iht4x4_16_add_msa, 1, VPX_BITS_8),
 551         make_tuple(&vp9_fht4x4_msa, &vp9_iht4x4_16_add_msa, 2, VPX_BITS_8),
 552         make_tuple(&vp9_fht4x4_msa, &vp9_iht4x4_16_add_msa, 3, VPX_BITS_8)));
 553 #endif  // HAVE_MSA && !CONFIG_VP9_HIGHBITDEPTH && !CONFIG_EMULATE_HARDWARE
 554 }  // namespace