ndk/platforms/android-19/arch-mips/usr/include/asm/cpu.h

   1 /****************************************************************************
   2  ****************************************************************************
   3  ***
   4  ***   This header was automatically generated from a Linux kernel header
   5  ***   of the same name, to make information necessary for userspace to
   6  ***   call into the kernel available to libc.  It contains only constants,
   7  ***   structures, and macros generated from the original header, and thus,
   8  ***   contains no copyrightable information.
   9  ***
  10  ***   To edit the content of this header, modify the corresponding
  11  ***   source file (e.g. under external/kernel-headers/original/) then
  12  ***   run bionic/libc/kernel/tools/update_all.py
  13  ***
  14  ***   Any manual change here will be lost the next time this script will
  15  ***   be run. You've been warned!
  16  ***
  17  ****************************************************************************
  18  ****************************************************************************/
  19 #ifndef _ASM_CPU_H
  20 #define _ASM_CPU_H
  21 #define PRID_COMP_LEGACY 0x000000
  22 #define PRID_COMP_MIPS 0x010000
  23 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  24 #define PRID_COMP_BROADCOM 0x020000
  25 #define PRID_COMP_ALCHEMY 0x030000
  26 #define PRID_COMP_SIBYTE 0x040000
  27 #define PRID_COMP_SANDCRAFT 0x050000
  28 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  29 #define PRID_COMP_NXP 0x060000
  30 #define PRID_COMP_TOSHIBA 0x070000
  31 #define PRID_COMP_LSI 0x080000
  32 #define PRID_COMP_LEXRA 0x0b0000
  33 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  34 #define PRID_IMP_R2000 0x0100
  35 #define PRID_IMP_AU1_REV1 0x0100
  36 #define PRID_IMP_AU1_REV2 0x0200
  37 #define PRID_IMP_R3000 0x0200
  38 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  39 #define PRID_IMP_R6000 0x0300
  40 #define PRID_IMP_R4000 0x0400
  41 #define PRID_IMP_R6000A 0x0600
  42 #define PRID_IMP_R10000 0x0900
  43 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  44 #define PRID_IMP_R4300 0x0b00
  45 #define PRID_IMP_VR41XX 0x0c00
  46 #define PRID_IMP_R12000 0x0e00
  47 #define PRID_IMP_R14000 0x0f00
  48 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  49 #define PRID_IMP_R8000 0x1000
  50 #define PRID_IMP_PR4450 0x1200
  51 #define PRID_IMP_R4600 0x2000
  52 #define PRID_IMP_R4700 0x2100
  53 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  54 #define PRID_IMP_TX39 0x2200
  55 #define PRID_IMP_R4640 0x2200
  56 #define PRID_IMP_R4650 0x2200
  57 #define PRID_IMP_R5000 0x2300
  58 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  59 #define PRID_IMP_TX49 0x2d00
  60 #define PRID_IMP_SONIC 0x2400
  61 #define PRID_IMP_MAGIC 0x2500
  62 #define PRID_IMP_RM7000 0x2700
  63 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  64 #define PRID_IMP_NEVADA 0x2800
  65 #define PRID_IMP_RM9000 0x3400
  66 #define PRID_IMP_LOONGSON1 0x4200
  67 #define PRID_IMP_R5432 0x5400
  68 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  69 #define PRID_IMP_R5500 0x5500
  70 #define PRID_IMP_LOONGSON2 0x6300
  71 #define PRID_IMP_UNKNOWN 0xff00
  72 #define PRID_IMP_4KC 0x8000
  73 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  74 #define PRID_IMP_5KC 0x8100
  75 #define PRID_IMP_20KC 0x8200
  76 #define PRID_IMP_4KEC 0x8400
  77 #define PRID_IMP_4KSC 0x8600
  78 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  79 #define PRID_IMP_25KF 0x8800
  80 #define PRID_IMP_5KE 0x8900
  81 #define PRID_IMP_4KECR2 0x9000
  82 #define PRID_IMP_4KEMPR2 0x9100
  83 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  84 #define PRID_IMP_4KSD 0x9200
  85 #define PRID_IMP_24K 0x9300
  86 #define PRID_IMP_34K 0x9500
  87 #define PRID_IMP_24KE 0x9600
  88 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  89 #define PRID_IMP_74K 0x9700
  90 #define PRID_IMP_1004K 0x9900
  91 #define PRID_IMP_SB1 0x0100
  92 #define PRID_IMP_SB1A 0x1100
  93 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  94 #define PRID_IMP_SR71000 0x0400
  95 #define PRID_IMP_BCM4710 0x4000
  96 #define PRID_IMP_BCM3302 0x9000
  97 #define PRID_REV_MASK 0x00ff
  98 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
  99 #define PRID_REV_TX4927 0x0022
 100 #define PRID_REV_TX4937 0x0030
 101 #define PRID_REV_R4400 0x0040
 102 #define PRID_REV_R3000A 0x0030
 103 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 104 #define PRID_REV_R3000 0x0020
 105 #define PRID_REV_R2000A 0x0010
 106 #define PRID_REV_TX3912 0x0010
 107 #define PRID_REV_TX3922 0x0030
 108 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 109 #define PRID_REV_TX3927 0x0040
 110 #define PRID_REV_VR4111 0x0050
 111 #define PRID_REV_VR4181 0x0050
 112 #define PRID_REV_VR4121 0x0060
 113 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 114 #define PRID_REV_VR4122 0x0070
 115 #define PRID_REV_VR4181A 0x0070
 116 #define PRID_REV_VR4130 0x0080
 117 #define PRID_REV_34K_V1_0_2 0x0022
 118 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 119 #define PRID_REV_ENCODE_44(ver, rev)   ((ver) << 4 | (rev))
 120 #define PRID_REV_ENCODE_332(ver, rev, patch)   ((ver) << 5 | (rev) << 2 | (patch))
 121 #define FPIR_IMP_NONE 0x0000
 122 enum cpu_type_enum {
 123 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 124  CPU_UNKNOWN,
 125  CPU_R2000, CPU_R3000, CPU_R3000A, CPU_R3041, CPU_R3051, CPU_R3052,
 126  CPU_R3081, CPU_R3081E,
 127  CPU_R6000, CPU_R6000A,
 128 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 129  CPU_R4000PC, CPU_R4000SC, CPU_R4000MC, CPU_R4200, CPU_R4300, CPU_R4310,
 130  CPU_R4400PC, CPU_R4400SC, CPU_R4400MC, CPU_R4600, CPU_R4640, CPU_R4650,
 131  CPU_R4700, CPU_R5000, CPU_R5000A, CPU_R5500, CPU_NEVADA, CPU_R5432,
 132  CPU_R10000, CPU_R12000, CPU_R14000, CPU_VR41XX, CPU_VR4111, CPU_VR4121,
 133 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 134  CPU_VR4122, CPU_VR4131, CPU_VR4133, CPU_VR4181, CPU_VR4181A, CPU_RM7000,
 135  CPU_SR71000, CPU_RM9000, CPU_TX49XX,
 136  CPU_R8000,
 137  CPU_TX3912, CPU_TX3922, CPU_TX3927,
 138 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 139  CPU_4KC, CPU_4KEC, CPU_4KSC, CPU_24K, CPU_34K, CPU_1004K, CPU_74K,
 140  CPU_AU1000, CPU_AU1100, CPU_AU1200, CPU_AU1210, CPU_AU1250, CPU_AU1500,
 141  CPU_AU1550, CPU_PR4450, CPU_BCM3302, CPU_BCM4710,
 142  CPU_5KC, CPU_20KC, CPU_25KF, CPU_SB1, CPU_SB1A, CPU_LOONGSON2,
 143 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 144  CPU_LAST
 145 };
 146 #define MIPS_CPU_ISA_I 0x00000001
 147 #define MIPS_CPU_ISA_II 0x00000002
 148 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 149 #define MIPS_CPU_ISA_III 0x00000004
 150 #define MIPS_CPU_ISA_IV 0x00000008
 151 #define MIPS_CPU_ISA_V 0x00000010
 152 #define MIPS_CPU_ISA_M32R1 0x00000020
 153 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 154 #define MIPS_CPU_ISA_M32R2 0x00000040
 155 #define MIPS_CPU_ISA_M64R1 0x00000080
 156 #define MIPS_CPU_ISA_M64R2 0x00000100
 157 #define MIPS_CPU_ISA_32BIT (MIPS_CPU_ISA_I | MIPS_CPU_ISA_II |   MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M32R2 )
 158 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 159 #define MIPS_CPU_ISA_64BIT (MIPS_CPU_ISA_III | MIPS_CPU_ISA_IV |   MIPS_CPU_ISA_V | MIPS_CPU_ISA_M64R1 | MIPS_CPU_ISA_M64R2)
 160 #define MIPS_CPU_TLB 0x00000001
 161 #define MIPS_CPU_4KEX 0x00000002
 162 #define MIPS_CPU_3K_CACHE 0x00000004
 163 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 164 #define MIPS_CPU_4K_CACHE 0x00000008
 165 #define MIPS_CPU_TX39_CACHE 0x00000010
 166 #define MIPS_CPU_FPU 0x00000020
 167 #define MIPS_CPU_32FPR 0x00000040
 168 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 169 #define MIPS_CPU_COUNTER 0x00000080
 170 #define MIPS_CPU_WATCH 0x00000100
 171 #define MIPS_CPU_DIVEC 0x00000200
 172 #define MIPS_CPU_VCE 0x00000400
 173 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 174 #define MIPS_CPU_CACHE_CDEX_P 0x00000800
 175 #define MIPS_CPU_CACHE_CDEX_S 0x00001000
 176 #define MIPS_CPU_MCHECK 0x00002000
 177 #define MIPS_CPU_EJTAG 0x00004000
 178 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 179 #define MIPS_CPU_NOFPUEX 0x00008000
 180 #define MIPS_CPU_LLSC 0x00010000
 181 #define MIPS_CPU_INCLUSIVE_CACHES 0x00020000
 182 #define MIPS_CPU_PREFETCH 0x00040000
 183 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 184 #define MIPS_CPU_VINT 0x00080000
 185 #define MIPS_CPU_VEIC 0x00100000
 186 #define MIPS_CPU_ULRI 0x00200000
 187 #define MIPS_ASE_MIPS16 0x00000001
 188 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 189 #define MIPS_ASE_MDMX 0x00000002
 190 #define MIPS_ASE_MIPS3D 0x00000004
 191 #define MIPS_ASE_SMARTMIPS 0x00000008
 192 #define MIPS_ASE_DSP 0x00000010
 193 /* WARNING: DO NOT EDIT, AUTO-GENERATED CODE - SEE TOP FOR INSTRUCTIONS */
 194 #define MIPS_ASE_MIPSMT 0x00000020
 195 #endif