2 # ##############################################################################
3 # Created by Base System Builder Wizard for Xilinx EDK 13.2 Build EDK_O.61xd
4 # Mon Jan 9 16:09:41 2012
5 # Target Board: xilinx.com ml605 Rev D
10 # ##############################################################################
11 PARAMETER VERSION = 2.1.0
14 PORT ddr_memory_we_n = ddr_memory_we_n, DIR = O
15 PORT ddr_memory_ras_n = ddr_memory_ras_n, DIR = O
16 PORT ddr_memory_odt = ddr_memory_odt, DIR = O
17 PORT ddr_memory_dqs_n = ddr_memory_dqs_n, DIR = IO, VEC = [0:0]
18 PORT ddr_memory_dqs = ddr_memory_dqs, DIR = IO, VEC = [0:0]
19 PORT ddr_memory_dq = ddr_memory_dq, DIR = IO, VEC = [7:0]
20 PORT ddr_memory_dm = ddr_memory_dm, DIR = O, VEC = [0:0]
21 PORT ddr_memory_ddr3_rst = ddr_memory_ddr3_rst, DIR = O
22 PORT ddr_memory_cs_n = ddr_memory_cs_n, DIR = O
23 PORT ddr_memory_clk_n = ddr_memory_clk_n, DIR = O
24 PORT ddr_memory_clk = ddr_memory_clk, DIR = O
25 PORT ddr_memory_cke = ddr_memory_cke, DIR = O
26 PORT ddr_memory_cas_n = ddr_memory_cas_n, DIR = O
27 PORT ddr_memory_ba = ddr_memory_ba, DIR = O, VEC = [2:0]
28 PORT ddr_memory_addr = ddr_memory_addr, DIR = O, VEC = [12:0]
29 PORT SysACE_WEN = SysACE_WEN, DIR = O
30 PORT SysACE_OEN = SysACE_OEN, DIR = O
31 PORT SysACE_MPIRQ = SysACE_MPIRQ, DIR = I
32 PORT SysACE_MPD = SysACE_MPD, DIR = IO, VEC = [7:0]
33 PORT SysACE_MPA = SysACE_MPA, DIR = O, VEC = [6:0]
34 PORT SysACE_CLK = SysACE_CLK, DIR = I
35 PORT SysACE_CEN = SysACE_CEN, DIR = O
36 PORT RS232_Uart_1_sout = RS232_Uart_1_sout, DIR = O
37 PORT RS232_Uart_1_sin = RS232_Uart_1_sin, DIR = I
38 PORT RESET = RESET, DIR = I, SIGIS = RST, RST_POLARITY = 1
39 PORT Push_Buttons_5Bits_TRI_I = Push_Buttons_5Bits_TRI_I, DIR = I, VEC = [0:4]
40 PORT Linear_Flash_we_n = Linear_Flash_we_n, DIR = O
41 PORT Linear_Flash_oe_n = Linear_Flash_oe_n, DIR = O
42 PORT Linear_Flash_data = Linear_Flash_data, DIR = IO, VEC = [0:15]
43 PORT Linear_Flash_ce_n = Linear_Flash_ce_n, DIR = O
44 PORT Linear_Flash_address = Linear_Flash_address, DIR = O, VEC = [0:23]
45 PORT LEDs_Positions_TRI_O = LEDs_Positions_TRI_O, DIR = O, VEC = [0:4]
46 PORT LEDs_8Bits_TRI_O = LEDs_8Bits_TRI_O, DIR = O, VEC = [0:7]
47 PORT IIC_SFP_SDA = IIC_SFP_SDA, DIR = IO
48 PORT IIC_SFP_SCL = IIC_SFP_SCL, DIR = IO
49 PORT IIC_FMC_SDA = IIC_FMC_SDA, DIR = IO
50 PORT IIC_FMC_SCL = IIC_FMC_SCL, DIR = IO
51 PORT IIC_EEPROM_SDA = IIC_EEPROM_SDA, DIR = IO
52 PORT IIC_EEPROM_SCL = IIC_EEPROM_SCL, DIR = IO
53 PORT IIC_DVI_SDA = IIC_DVI_SDA, DIR = IO
54 PORT IIC_DVI_SCL = IIC_DVI_SCL, DIR = IO
55 PORT Ethernet_Lite_TX_EN = Ethernet_Lite_TX_EN, DIR = O
56 PORT Ethernet_Lite_TX_CLK = Ethernet_Lite_TX_CLK, DIR = I
57 PORT Ethernet_Lite_TXD = Ethernet_Lite_TXD, DIR = O, VEC = [3:0]
58 PORT Ethernet_Lite_RX_ER = Ethernet_Lite_RX_ER, DIR = I
59 PORT Ethernet_Lite_RX_DV = Ethernet_Lite_RX_DV, DIR = I
60 PORT Ethernet_Lite_RX_CLK = Ethernet_Lite_RX_CLK, DIR = I
61 PORT Ethernet_Lite_RXD = Ethernet_Lite_RXD, DIR = I, VEC = [3:0]
62 PORT Ethernet_Lite_PHY_RST_N = Ethernet_Lite_PHY_RST_N, DIR = O
63 PORT Ethernet_Lite_MDIO = Ethernet_Lite_MDIO, DIR = IO
64 PORT Ethernet_Lite_MDC = Ethernet_Lite_MDC, DIR = O
65 PORT Ethernet_Lite_CRS = Ethernet_Lite_CRS, DIR = I
66 PORT Ethernet_Lite_COL = Ethernet_Lite_COL, DIR = I
67 PORT DIP_Switches_8Bits_TRI_I = DIP_Switches_8Bits_TRI_I, DIR = I, VEC = [0:7]
68 PORT CLK_P = CLK, DIR = I, DIFFERENTIAL_POLARITY = P, SIGIS = CLK, CLK_FREQ = 200000000
69 PORT CLK_N = CLK, DIR = I, DIFFERENTIAL_POLARITY = N, SIGIS = CLK, CLK_FREQ = 200000000
73 PARAMETER INSTANCE = proc_sys_reset_0
74 PARAMETER HW_VER = 3.00.a
75 PARAMETER C_EXT_RESET_HIGH = 1
76 PORT MB_Debug_Sys_Rst = proc_sys_reset_0_MB_Debug_Sys_Rst
77 PORT Dcm_locked = proc_sys_reset_0_Dcm_locked
78 PORT MB_Reset = proc_sys_reset_0_MB_Reset
79 PORT Slowest_sync_clk = clk_100_0000MHzMMCM0
80 PORT Interconnect_aresetn = proc_sys_reset_0_Interconnect_aresetn
81 PORT Ext_Reset_In = RESET
82 PORT BUS_STRUCT_RESET = proc_sys_reset_0_BUS_STRUCT_RESET
86 PARAMETER INSTANCE = microblaze_0_intc
87 PARAMETER HW_VER = 1.01.a
88 PARAMETER C_BASEADDR = 0x41200000
89 PARAMETER C_HIGHADDR = 0x4120ffff
90 BUS_INTERFACE S_AXI = axi4lite_0
91 PORT IRQ = microblaze_0_interrupt
92 PORT S_AXI_ACLK = clk_100_0000MHzMMCM0
93 PORT INTR = RS232_Uart_1_Interrupt & DIP_Switches_8Bits_IP2INTC_Irpt & LEDs_8Bits_IP2INTC_Irpt & LEDs_Positions_IP2INTC_Irpt & Push_Buttons_5Bits_IP2INTC_Irpt & IIC_EEPROM_IIC2INTC_Irpt & IIC_DVI_IIC2INTC_Irpt & IIC_FMC_IIC2INTC_Irpt & IIC_SFP_IIC2INTC_Irpt & SysACE_CompactFlash_SysACE_IRQ & Ethernet_Lite_IP2INTC_Irpt & axi_timer_0_Interrupt
97 PARAMETER INSTANCE = microblaze_0_ilmb
98 PARAMETER HW_VER = 2.00.b
99 PORT SYS_RST = proc_sys_reset_0_BUS_STRUCT_RESET
100 PORT LMB_CLK = clk_100_0000MHzMMCM0
103 BEGIN lmb_bram_if_cntlr
104 PARAMETER INSTANCE = microblaze_0_i_bram_ctrl
105 PARAMETER HW_VER = 3.00.b
106 PARAMETER C_BASEADDR = 0x00000000
107 PARAMETER C_HIGHADDR = 0x00001fff
108 BUS_INTERFACE SLMB = microblaze_0_ilmb
109 BUS_INTERFACE BRAM_PORT = microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block
113 PARAMETER INSTANCE = microblaze_0_dlmb
114 PARAMETER HW_VER = 2.00.b
115 PORT SYS_RST = proc_sys_reset_0_BUS_STRUCT_RESET
116 PORT LMB_CLK = clk_100_0000MHzMMCM0
119 BEGIN lmb_bram_if_cntlr
120 PARAMETER INSTANCE = microblaze_0_d_bram_ctrl
121 PARAMETER HW_VER = 3.00.b
122 PARAMETER C_BASEADDR = 0x00000000
123 PARAMETER C_HIGHADDR = 0x00001fff
124 BUS_INTERFACE SLMB = microblaze_0_dlmb
125 BUS_INTERFACE BRAM_PORT = microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block
129 PARAMETER INSTANCE = microblaze_0_bram_block
130 PARAMETER HW_VER = 1.00.a
131 BUS_INTERFACE PORTA = microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block
132 BUS_INTERFACE PORTB = microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block
136 PARAMETER INSTANCE = microblaze_0
137 PARAMETER HW_VER = 8.20.a
138 PARAMETER C_INTERCONNECT = 2
139 PARAMETER C_USE_BARREL = 1
140 PARAMETER C_USE_FPU = 0
141 PARAMETER C_DEBUG_ENABLED = 1
142 PARAMETER C_ICACHE_BASEADDR = 0xc0000000
143 PARAMETER C_ICACHE_HIGHADDR = 0xcfffffff
144 PARAMETER C_USE_ICACHE = 1
145 PARAMETER C_CACHE_BYTE_SIZE = 16384
146 PARAMETER C_ICACHE_ALWAYS_USED = 1
147 PARAMETER C_DCACHE_BASEADDR = 0xc0000000
148 PARAMETER C_DCACHE_HIGHADDR = 0xcfffffff
149 PARAMETER C_USE_DCACHE = 1
150 PARAMETER C_DCACHE_BYTE_SIZE = 16384
151 PARAMETER C_DCACHE_ALWAYS_USED = 1
153 PARAMETER C_USE_MMU = 3
154 PARAMETER C_MMU_ZONES = 2
155 PARAMETER C_ICACHE_LINE_LEN = 8
156 PARAMETER C_ICACHE_STREAMS = 1
157 PARAMETER C_ICACHE_VICTIMS = 8
158 PARAMETER C_DIV_ZERO_EXCEPTION = 1
159 PARAMETER C_M_AXI_I_BUS_EXCEPTION = 1
160 PARAMETER C_M_AXI_D_BUS_EXCEPTION = 1
161 PARAMETER C_ILL_OPCODE_EXCEPTION = 1
162 PARAMETER C_OPCODE_0x0_ILLEGAL = 1
163 PARAMETER C_UNALIGNED_EXCEPTIONS = 1
164 PARAMETER C_USE_HW_MUL = 2
165 PARAMETER C_USE_DIV = 1
166 BUS_INTERFACE M_AXI_DP = axi4lite_0
167 BUS_INTERFACE M_AXI_IP = axi4lite_0
168 BUS_INTERFACE M_AXI_DC = axi4_0
169 BUS_INTERFACE M_AXI_IC = axi4_0
170 BUS_INTERFACE DEBUG = microblaze_0_debug
171 BUS_INTERFACE DLMB = microblaze_0_dlmb
172 BUS_INTERFACE ILMB = microblaze_0_ilmb
173 PORT MB_RESET = proc_sys_reset_0_MB_Reset
174 PORT CLK = clk_100_0000MHzMMCM0
175 PORT INTERRUPT = microblaze_0_interrupt
179 PARAMETER INSTANCE = debug_module
180 PARAMETER HW_VER = 2.00.b
181 PARAMETER C_INTERCONNECT = 2
182 PARAMETER C_USE_UART = 1
183 PARAMETER C_BASEADDR = 0x74800000
184 PARAMETER C_HIGHADDR = 0x7480ffff
185 BUS_INTERFACE S_AXI = axi4lite_0
186 BUS_INTERFACE MBDEBUG_0 = microblaze_0_debug
187 PORT Debug_SYS_Rst = proc_sys_reset_0_MB_Debug_Sys_Rst
188 PORT S_AXI_ACLK = clk_100_0000MHzMMCM0
191 BEGIN clock_generator
192 PARAMETER INSTANCE = clock_generator_0
193 PARAMETER HW_VER = 4.02.a
194 PARAMETER C_CLKIN_FREQ = 200000000
195 PARAMETER C_CLKOUT0_FREQ = 100000000
196 PARAMETER C_CLKOUT0_GROUP = MMCM0
197 PARAMETER C_CLKOUT1_FREQ = 200000000
198 PARAMETER C_CLKOUT1_GROUP = MMCM0
199 PARAMETER C_CLKOUT2_FREQ = 400000000
200 PARAMETER C_CLKOUT2_GROUP = MMCM0
201 PARAMETER C_CLKOUT3_FREQ = 400000000
202 PARAMETER C_CLKOUT3_GROUP = MMCM0
203 PARAMETER C_CLKOUT3_BUF = FALSE
204 PARAMETER C_CLKOUT3_VARIABLE_PHASE = TRUE
205 PORT LOCKED = proc_sys_reset_0_Dcm_locked
206 PORT CLKOUT0 = clk_100_0000MHzMMCM0
208 PORT CLKOUT3 = clk_400_0000MHzMMCM0_nobuf_varphase
209 PORT CLKOUT2 = clk_400_0000MHzMMCM0
210 PORT CLKOUT1 = clk_200_0000MHzMMCM0
212 PORT PSCLK = clk_200_0000MHzMMCM0
214 PORT PSINCDEC = psincdec
219 PARAMETER INSTANCE = axi_timer_0
220 PARAMETER HW_VER = 1.02.a
221 PARAMETER C_COUNT_WIDTH = 32
222 PARAMETER C_ONE_TIMER_ONLY = 0
223 PARAMETER C_BASEADDR = 0x41c00000
224 PARAMETER C_HIGHADDR = 0x41c0ffff
225 BUS_INTERFACE S_AXI = axi4lite_0
226 PORT S_AXI_ACLK = clk_100_0000MHzMMCM0
227 PORT Interrupt = axi_timer_0_Interrupt
230 BEGIN axi_interconnect
231 PARAMETER INSTANCE = axi4lite_0
232 PARAMETER HW_VER = 1.03.a
233 PARAMETER C_INTERCONNECT_CONNECTIVITY_MODE = 0
234 PORT INTERCONNECT_ARESETN = proc_sys_reset_0_Interconnect_aresetn
235 PORT INTERCONNECT_ACLK = clk_100_0000MHzMMCM0
238 BEGIN axi_interconnect
239 PARAMETER INSTANCE = axi4_0
240 PARAMETER HW_VER = 1.03.a
241 PORT interconnect_aclk = clk_100_0000MHzMMCM0
242 PORT INTERCONNECT_ARESETN = proc_sys_reset_0_Interconnect_aresetn
246 PARAMETER INSTANCE = SysACE_CompactFlash
247 PARAMETER HW_VER = 1.01.a
248 PARAMETER C_MEM_WIDTH = 8
249 PARAMETER C_BASEADDR = 0x41800000
250 PARAMETER C_HIGHADDR = 0x4180ffff
251 BUS_INTERFACE S_AXI = axi4lite_0
252 PORT S_AXI_ACLK = clk_100_0000MHzMMCM0
253 PORT SysACE_WEN = SysACE_WEN
254 PORT SysACE_OEN = SysACE_OEN
255 PORT SysACE_MPIRQ = SysACE_MPIRQ
256 PORT SysACE_MPD = SysACE_MPD
257 PORT SysACE_MPA = SysACE_MPA
258 PORT SysACE_CLK = SysACE_CLK
259 PORT SysACE_CEN = SysACE_CEN
260 PORT SysACE_IRQ = SysACE_CompactFlash_SysACE_IRQ
264 PARAMETER INSTANCE = RS232_Uart_1
265 PARAMETER HW_VER = 1.02.a
266 PARAMETER C_BAUDRATE = 9600
267 PARAMETER C_DATA_BITS = 8
268 PARAMETER C_USE_PARITY = 0
269 PARAMETER C_ODD_PARITY = 1
270 PARAMETER C_BASEADDR = 0x40600000
271 PARAMETER C_HIGHADDR = 0x4060ffff
272 BUS_INTERFACE S_AXI = axi4lite_0
273 PORT S_AXI_ACLK = clk_100_0000MHzMMCM0
274 PORT TX = RS232_Uart_1_sout
275 PORT RX = RS232_Uart_1_sin
276 PORT Interrupt = RS232_Uart_1_Interrupt
280 PARAMETER INSTANCE = Push_Buttons_5Bits
281 PARAMETER HW_VER = 1.01.a
282 PARAMETER C_GPIO_WIDTH = 5
283 PARAMETER C_ALL_INPUTS = 1
284 PARAMETER C_INTERRUPT_PRESENT = 1
285 PARAMETER C_IS_DUAL = 0
286 PARAMETER C_BASEADDR = 0x40000000
287 PARAMETER C_HIGHADDR = 0x4000ffff
288 BUS_INTERFACE S_AXI = axi4lite_0
289 PORT S_AXI_ACLK = clk_100_0000MHzMMCM0
290 PORT GPIO_IO_I = Push_Buttons_5Bits_TRI_I
291 PORT IP2INTC_Irpt = Push_Buttons_5Bits_IP2INTC_Irpt
294 BEGIN util_vector_logic
295 PARAMETER INSTANCE = Linear_Flash_invertor
296 PARAMETER HW_VER = 1.00.a
297 PARAMETER C_OPERATION = not
299 PORT Op1 = Linear_Flash_invertor_Op1_Adhoc
300 PORT Res = Linear_Flash_ce_n
304 PARAMETER INSTANCE = Linear_Flash
305 PARAMETER HW_VER = 1.01.a
306 PARAMETER C_NUM_BANKS_MEM = 1
307 PARAMETER C_MEM0_WIDTH = 16
308 PARAMETER C_INCLUDE_DATAWIDTH_MATCHING_0 = 1
309 PARAMETER C_MEM0_TYPE = 2
310 PARAMETER C_TCEDV_PS_MEM_0 = 130000
311 PARAMETER C_TAVDV_PS_MEM_0 = 130000
312 PARAMETER C_THZCE_PS_MEM_0 = 35000
313 PARAMETER C_TWC_PS_MEM_0 = 13000
314 PARAMETER C_TWP_PS_MEM_0 = 70000
315 PARAMETER C_TLZWE_PS_MEM_0 = 35000
316 PARAMETER C_MAX_MEM_WIDTH = 16
317 PARAMETER C_S_AXI_MEM0_BASEADDR = 0x42000000
318 PARAMETER C_S_AXI_MEM0_HIGHADDR = 0x43ffffff
319 BUS_INTERFACE S_AXI_MEM = axi4lite_0
320 PORT S_AXI_ACLK = clk_100_0000MHzMMCM0
321 PORT RdClk = clk_100_0000MHzMMCM0
322 PORT Mem_WEN = Linear_Flash_we_n
323 PORT Mem_OEN = Linear_Flash_oe_n
324 PORT Mem_CEN = Linear_Flash_invertor_Op1_Adhoc
325 PORT Mem_DQ = Linear_Flash_data
326 PORT Mem_A = 0b0000000 & Linear_Flash_address & 0b0
330 PARAMETER INSTANCE = LEDs_Positions
331 PARAMETER HW_VER = 1.01.a
332 PARAMETER C_GPIO_WIDTH = 5
333 PARAMETER C_ALL_INPUTS = 0
334 PARAMETER C_INTERRUPT_PRESENT = 1
335 PARAMETER C_IS_DUAL = 0
336 PARAMETER C_BASEADDR = 0x40020000
337 PARAMETER C_HIGHADDR = 0x4002ffff
338 BUS_INTERFACE S_AXI = axi4lite_0
339 PORT S_AXI_ACLK = clk_100_0000MHzMMCM0
340 PORT GPIO_IO_O = LEDs_Positions_TRI_O
341 PORT IP2INTC_Irpt = LEDs_Positions_IP2INTC_Irpt
345 PARAMETER INSTANCE = LEDs_8Bits
346 PARAMETER HW_VER = 1.01.a
347 PARAMETER C_GPIO_WIDTH = 8
348 PARAMETER C_ALL_INPUTS = 0
349 PARAMETER C_INTERRUPT_PRESENT = 1
350 PARAMETER C_IS_DUAL = 0
351 PARAMETER C_BASEADDR = 0x40040000
352 PARAMETER C_HIGHADDR = 0x4004ffff
353 BUS_INTERFACE S_AXI = axi4lite_0
354 PORT S_AXI_ACLK = clk_100_0000MHzMMCM0
355 PORT GPIO_IO_O = LEDs_8Bits_TRI_O
356 PORT IP2INTC_Irpt = LEDs_8Bits_IP2INTC_Irpt
360 PARAMETER INSTANCE = IIC_SFP
361 PARAMETER HW_VER = 1.01.a
362 PARAMETER C_IIC_FREQ = 100000
363 PARAMETER C_TEN_BIT_ADR = 0
364 PARAMETER C_BASEADDR = 0x40800000
365 PARAMETER C_HIGHADDR = 0x4080ffff
366 BUS_INTERFACE S_AXI = axi4lite_0
367 PORT S_AXI_ACLK = clk_100_0000MHzMMCM0
368 PORT Sda = IIC_SFP_SDA
369 PORT Scl = IIC_SFP_SCL
370 PORT IIC2INTC_Irpt = IIC_SFP_IIC2INTC_Irpt
374 PARAMETER INSTANCE = IIC_FMC
375 PARAMETER HW_VER = 1.01.a
376 PARAMETER C_IIC_FREQ = 100000
377 PARAMETER C_TEN_BIT_ADR = 0
378 PARAMETER C_BASEADDR = 0x40820000
379 PARAMETER C_HIGHADDR = 0x4082ffff
380 BUS_INTERFACE S_AXI = axi4lite_0
381 PORT S_AXI_ACLK = clk_100_0000MHzMMCM0
382 PORT Sda = IIC_FMC_SDA
383 PORT Scl = IIC_FMC_SCL
384 PORT IIC2INTC_Irpt = IIC_FMC_IIC2INTC_Irpt
388 PARAMETER INSTANCE = IIC_EEPROM
389 PARAMETER HW_VER = 1.01.a
390 PARAMETER C_IIC_FREQ = 100000
391 PARAMETER C_TEN_BIT_ADR = 0
392 PARAMETER C_BASEADDR = 0x40840000
393 PARAMETER C_HIGHADDR = 0x4084ffff
394 BUS_INTERFACE S_AXI = axi4lite_0
395 PORT S_AXI_ACLK = clk_100_0000MHzMMCM0
396 PORT Sda = IIC_EEPROM_SDA
397 PORT Scl = IIC_EEPROM_SCL
398 PORT IIC2INTC_Irpt = IIC_EEPROM_IIC2INTC_Irpt
402 PARAMETER INSTANCE = IIC_DVI
403 PARAMETER HW_VER = 1.01.a
404 PARAMETER C_IIC_FREQ = 100000
405 PARAMETER C_TEN_BIT_ADR = 0
406 PARAMETER C_BASEADDR = 0x40860000
407 PARAMETER C_HIGHADDR = 0x4086ffff
408 BUS_INTERFACE S_AXI = axi4lite_0
409 PORT S_AXI_ACLK = clk_100_0000MHzMMCM0
410 PORT Sda = IIC_DVI_SDA
411 PORT Scl = IIC_DVI_SCL
412 PORT IIC2INTC_Irpt = IIC_DVI_IIC2INTC_Irpt
415 BEGIN axi_ethernetlite
416 PARAMETER INSTANCE = Ethernet_Lite
417 PARAMETER HW_VER = 1.00.a
418 PARAMETER C_BASEADDR = 0x40e00000
419 PARAMETER C_HIGHADDR = 0x40e0ffff
420 BUS_INTERFACE S_AXI = axi4lite_0
421 PORT S_AXI_ACLK = clk_100_0000MHzMMCM0
422 PORT PHY_tx_en = Ethernet_Lite_TX_EN
423 PORT PHY_tx_clk = Ethernet_Lite_TX_CLK
424 PORT PHY_tx_data = Ethernet_Lite_TXD
425 PORT PHY_rx_er = Ethernet_Lite_RX_ER
426 PORT PHY_dv = Ethernet_Lite_RX_DV
427 PORT PHY_rx_clk = Ethernet_Lite_RX_CLK
428 PORT PHY_rx_data = Ethernet_Lite_RXD
429 PORT PHY_rst_n = Ethernet_Lite_PHY_RST_N
430 PORT PHY_MDIO = Ethernet_Lite_MDIO
431 PORT PHY_MDC = Ethernet_Lite_MDC
432 PORT PHY_crs = Ethernet_Lite_CRS
433 PORT PHY_col = Ethernet_Lite_COL
434 PORT IP2INTC_Irpt = Ethernet_Lite_IP2INTC_Irpt
438 PARAMETER INSTANCE = DIP_Switches_8Bits
439 PARAMETER HW_VER = 1.01.a
440 PARAMETER C_GPIO_WIDTH = 8
441 PARAMETER C_ALL_INPUTS = 1
442 PARAMETER C_INTERRUPT_PRESENT = 1
443 PARAMETER C_IS_DUAL = 0
444 PARAMETER C_BASEADDR = 0x40060000
445 PARAMETER C_HIGHADDR = 0x4006ffff
446 BUS_INTERFACE S_AXI = axi4lite_0
447 PORT S_AXI_ACLK = clk_100_0000MHzMMCM0
448 PORT GPIO_IO_I = DIP_Switches_8Bits_TRI_I
449 PORT IP2INTC_Irpt = DIP_Switches_8Bits_IP2INTC_Irpt
453 PARAMETER INSTANCE = DDR3_SDRAM
454 PARAMETER HW_VER = 1.03.a
455 PARAMETER C_MEM_PARTNO = MT41J64M16XX-15E
456 PARAMETER C_DM_WIDTH = 1
457 PARAMETER C_DQS_WIDTH = 1
458 PARAMETER C_DQ_WIDTH = 8
459 PARAMETER C_INTERCONNECT_S_AXI_MASTERS = microblaze_0.M_AXI_DC & microblaze_0.M_AXI_IC
460 PARAMETER C_MMCM_EXT_LOC = MMCM_ADV_X0Y8
461 PARAMETER C_NDQS_COL0 = 1
462 PARAMETER C_NDQS_COL1 = 0
463 PARAMETER C_S_AXI_BASEADDR = 0xC0000000
464 PARAMETER C_S_AXI_HIGHADDR = 0xCFFFFFFF
465 BUS_INTERFACE S_AXI = axi4_0
466 PORT ddr_we_n = ddr_memory_we_n
467 PORT ddr_ras_n = ddr_memory_ras_n
468 PORT ddr_odt = ddr_memory_odt
469 PORT ddr_dqs_n = ddr_memory_dqs_n
470 PORT ddr_dqs_p = ddr_memory_dqs
471 PORT ddr_dq = ddr_memory_dq
472 PORT ddr_dm = ddr_memory_dm
473 PORT ddr_reset_n = ddr_memory_ddr3_rst
474 PORT ddr_cs_n = ddr_memory_cs_n
475 PORT ddr_ck_n = ddr_memory_clk_n
476 PORT ddr_ck_p = ddr_memory_clk
477 PORT ddr_cke = ddr_memory_cke
478 PORT ddr_cas_n = ddr_memory_cas_n
479 PORT ddr_ba = ddr_memory_ba
480 PORT ddr_addr = ddr_memory_addr
481 PORT clk_rd_base = clk_400_0000MHzMMCM0_nobuf_varphase
482 PORT clk_mem = clk_400_0000MHzMMCM0
483 PORT clk = clk_200_0000MHzMMCM0
484 PORT clk_ref = clk_200_0000MHzMMCM0
486 PORT PD_PSINCDEC = psincdec
487 PORT PD_PSDONE = psdone