2 * Generate .byte code for some instructions not supported by old
8 #define REG_NUM_INVALID 100
10 #define REG_TYPE_R32 0
11 #define REG_TYPE_R64 1
12 #define REG_TYPE_XMM 2
13 #define REG_TYPE_INVALID 100
15 .macro R32_NUM opd r32
16 \opd
= REG_NUM_INVALID
69 .macro R64_NUM opd r64
70 \opd
= REG_NUM_INVALID
123 .macro XMM_NUM opd xmm
124 \opd
= REG_NUM_INVALID
175 .macro REG_TYPE type reg
176 R32_NUM reg_type_r32
\reg
177 R64_NUM reg_type_r64
\reg
178 XMM_NUM reg_type_xmm
\reg
179 .if reg_type_r64
<> REG_NUM_INVALID
181 .elseif reg_type_r32
<> REG_NUM_INVALID
183 .elseif reg_type_xmm
<> REG_NUM_INVALID
186 \type
= REG_TYPE_INVALID
194 .macro PFX_REX opd1 opd2 W
=0
195 .if ((\opd1
| \opd2
) & 8) || \W
196 .byte
0x40 | ((\opd1
& 8) >> 3) | ((\opd2
& 8) >> 1) | (\W
<< 3)
200 .macro MODRM mod opd1 opd2
201 .byte \mod
| (\opd1
& 7) | ((\opd2
& 7) << 3)
204 .macro PSHUFB_XMM xmm1 xmm2
205 XMM_NUM pshufb_opd1 \xmm1
206 XMM_NUM pshufb_opd2 \xmm2
208 PFX_REX pshufb_opd1 pshufb_opd2
209 .byte
0x0f, 0x38, 0x00
210 MODRM
0xc0 pshufb_opd1 pshufb_opd2
213 .macro PCLMULQDQ imm8 xmm1 xmm2
214 XMM_NUM clmul_opd1 \xmm1
215 XMM_NUM clmul_opd2 \xmm2
217 PFX_REX clmul_opd1 clmul_opd2
218 .byte
0x0f, 0x3a, 0x44
219 MODRM
0xc0 clmul_opd1 clmul_opd2
223 .macro PEXTRD imm8 xmm gpr
224 R32_NUM extrd_opd1 \gpr
225 XMM_NUM extrd_opd2 \xmm
227 PFX_REX extrd_opd1 extrd_opd2
228 .byte
0x0f, 0x3a, 0x16
229 MODRM
0xc0 extrd_opd1 extrd_opd2
233 .macro AESKEYGENASSIST rcon xmm1 xmm2
234 XMM_NUM aeskeygen_opd1 \xmm1
235 XMM_NUM aeskeygen_opd2 \xmm2
237 PFX_REX aeskeygen_opd1 aeskeygen_opd2
238 .byte
0x0f, 0x3a, 0xdf
239 MODRM
0xc0 aeskeygen_opd1 aeskeygen_opd2
243 .macro AESIMC xmm1 xmm2
244 XMM_NUM aesimc_opd1 \xmm1
245 XMM_NUM aesimc_opd2 \xmm2
247 PFX_REX aesimc_opd1 aesimc_opd2
248 .byte
0x0f, 0x38, 0xdb
249 MODRM
0xc0 aesimc_opd1 aesimc_opd2
252 .macro AESENC xmm1 xmm2
253 XMM_NUM aesenc_opd1 \xmm1
254 XMM_NUM aesenc_opd2 \xmm2
256 PFX_REX aesenc_opd1 aesenc_opd2
257 .byte
0x0f, 0x38, 0xdc
258 MODRM
0xc0 aesenc_opd1 aesenc_opd2
261 .macro AESENCLAST xmm1 xmm2
262 XMM_NUM aesenclast_opd1 \xmm1
263 XMM_NUM aesenclast_opd2 \xmm2
265 PFX_REX aesenclast_opd1 aesenclast_opd2
266 .byte
0x0f, 0x38, 0xdd
267 MODRM
0xc0 aesenclast_opd1 aesenclast_opd2
270 .macro AESDEC xmm1 xmm2
271 XMM_NUM aesdec_opd1 \xmm1
272 XMM_NUM aesdec_opd2 \xmm2
274 PFX_REX aesdec_opd1 aesdec_opd2
275 .byte
0x0f, 0x38, 0xde
276 MODRM
0xc0 aesdec_opd1 aesdec_opd2
279 .macro AESDECLAST xmm1 xmm2
280 XMM_NUM aesdeclast_opd1 \xmm1
281 XMM_NUM aesdeclast_opd2 \xmm2
283 PFX_REX aesdeclast_opd1 aesdeclast_opd2
284 .byte
0x0f, 0x38, 0xdf
285 MODRM
0xc0 aesdeclast_opd1 aesdeclast_opd2
288 .macro MOVQ_R64_XMM opd1 opd2
289 REG_TYPE movq_r64_xmm_opd1_type \opd1
290 .if movq_r64_xmm_opd1_type
== REG_TYPE_XMM
291 XMM_NUM movq_r64_xmm_opd1 \opd1
292 R64_NUM movq_r64_xmm_opd2 \opd2
294 R64_NUM movq_r64_xmm_opd1 \opd1
295 XMM_NUM movq_r64_xmm_opd2 \opd2
298 PFX_REX movq_r64_xmm_opd1 movq_r64_xmm_opd2
1
299 .if movq_r64_xmm_opd1_type
== REG_TYPE_XMM
304 MODRM
0xc0 movq_r64_xmm_opd1 movq_r64_xmm_opd2