firmware/target/sh/system-sh.c

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2007 by Jens Arnold
  11  * Based on the work of Alan Korr and others
  12  *
  13  * This program is free software; you can redistribute it and/or
  14  * modify it under the terms of the GNU General Public License
  15  * as published by the Free Software Foundation; either version 2
  16  * of the License, or (at your option) any later version.
  17  *
  18  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  19  * KIND, either express or implied.
  20  *
  21  ****************************************************************************/
  22
  23 #include <stdio.h>
  24 #include "config.h"
  25 #include "system.h"
  26 #include "lcd.h"
  27 #include "font.h"
  28 #include "led.h"
  29
  30 static const char* const irqname[] = {
  31     "", "", "", "", "IllInstr", "", "IllSltIn","","",
  32     "CPUAdrEr", "DMAAdrEr", "NMI", "UserBrk",
  33     "","","","","","","","","","","","","","","","","","","",
  34     "Trap32","Trap33","Trap34","Trap35","Trap36","Trap37","Trap38","Trap39",
  35     "Trap40","Trap41","Trap42","Trap43","Trap44","Trap45","Trap46","Trap47",
  36     "Trap48","Trap49","Trap50","Trap51","Trap52","Trap53","Trap54","Trap55",
  37     "Trap56","Trap57","Trap58","Trap59","Trap60","Trap61","Trap62","Trap63",
  38     "Irq0","Irq1","Irq2","Irq3","Irq4","Irq5","Irq6","Irq7",
  39     "Dma0","","Dma1","","Dma2","","Dma3","",
  40     "IMIA0","IMIB0","OVI0","", "IMIA1","IMIB1","OVI1","",
  41     "IMIA2","IMIB2","OVI2","", "IMIA3","IMIB3","OVI3","",
  42     "IMIA4","IMIB4","OVI4","",
  43     "Ser0Err","Ser0Rx","Ser0Tx","Ser0TE",
  44     "Ser1Err","Ser1Rx","Ser1Tx","Ser1TE",
  45     "ParityEr","A/D conv","","","Watchdog","DRAMRefr"
  46 };
  47
  48 #define RESERVE_INTERRUPT(number) "\t.long\t_UIE" #number "\n"
  49 #define DEFAULT_INTERRUPT(name, number)  "\t.weak\t_" #name \
  50                           "\n\t.set\t_" #name ",_UIE" #number \
  51                           "\n\t.long\t_" #name "\n"
  52
  53 asm (
  54
  55 /* Vector table.
  56  * Handled in asm because gcc 4.x doesn't allow weak aliases to symbols
  57  * defined in an asm block -- silly.
  58  * Reset vectors (0..3) are handled in crt0.S */
  59
  60     ".section\t.vectors,\"aw\",@progbits\n"
  61     DEFAULT_INTERRUPT (GII,      4)
  62     RESERVE_INTERRUPT (          5)
  63     DEFAULT_INTERRUPT (ISI,      6)
  64     RESERVE_INTERRUPT (          7)
  65     RESERVE_INTERRUPT (          8)
  66     DEFAULT_INTERRUPT (CPUAE,    9)
  67     DEFAULT_INTERRUPT (DMAAE,   10)
  68     DEFAULT_INTERRUPT (NMI,     11)
  69     DEFAULT_INTERRUPT (UB,      12)
  70     RESERVE_INTERRUPT (         13)
  71     RESERVE_INTERRUPT (         14)
  72     RESERVE_INTERRUPT (         15)
  73     RESERVE_INTERRUPT (         16) /* TCB #0 */
  74     RESERVE_INTERRUPT (         17) /* TCB #1 */
  75     RESERVE_INTERRUPT (         18) /* TCB #2 */
  76     RESERVE_INTERRUPT (         19) /* TCB #3 */
  77     RESERVE_INTERRUPT (         20) /* TCB #4 */
  78     RESERVE_INTERRUPT (         21) /* TCB #5 */
  79     RESERVE_INTERRUPT (         22) /* TCB #6 */
  80     RESERVE_INTERRUPT (         23) /* TCB #7 */
  81     RESERVE_INTERRUPT (         24) /* TCB #8 */
  82     RESERVE_INTERRUPT (         25) /* TCB #9 */
  83     RESERVE_INTERRUPT (         26) /* TCB #10 */
  84     RESERVE_INTERRUPT (         27) /* TCB #11 */
  85     RESERVE_INTERRUPT (         28) /* TCB #12 */
  86     RESERVE_INTERRUPT (         29) /* TCB #13 */
  87     RESERVE_INTERRUPT (         30) /* TCB #14 */
  88     RESERVE_INTERRUPT (         31) /* TCB #15 */
  89     DEFAULT_INTERRUPT (TRAPA32, 32)
  90     DEFAULT_INTERRUPT (TRAPA33, 33)
  91     DEFAULT_INTERRUPT (TRAPA34, 34)
  92     DEFAULT_INTERRUPT (TRAPA35, 35)
  93     DEFAULT_INTERRUPT (TRAPA36, 36)
  94     DEFAULT_INTERRUPT (TRAPA37, 37)
  95     DEFAULT_INTERRUPT (TRAPA38, 38)
  96     DEFAULT_INTERRUPT (TRAPA39, 39)
  97     DEFAULT_INTERRUPT (TRAPA40, 40)
  98     DEFAULT_INTERRUPT (TRAPA41, 41)
  99     DEFAULT_INTERRUPT (TRAPA42, 42)
 100     DEFAULT_INTERRUPT (TRAPA43, 43)
 101     DEFAULT_INTERRUPT (TRAPA44, 44)
 102     DEFAULT_INTERRUPT (TRAPA45, 45)
 103     DEFAULT_INTERRUPT (TRAPA46, 46)
 104     DEFAULT_INTERRUPT (TRAPA47, 47)
 105     DEFAULT_INTERRUPT (TRAPA48, 48)
 106     DEFAULT_INTERRUPT (TRAPA49, 49)
 107     DEFAULT_INTERRUPT (TRAPA50, 50)
 108     DEFAULT_INTERRUPT (TRAPA51, 51)
 109     DEFAULT_INTERRUPT (TRAPA52, 52)
 110     DEFAULT_INTERRUPT (TRAPA53, 53)
 111     DEFAULT_INTERRUPT (TRAPA54, 54)
 112     DEFAULT_INTERRUPT (TRAPA55, 55)
 113     DEFAULT_INTERRUPT (TRAPA56, 56)
 114     DEFAULT_INTERRUPT (TRAPA57, 57)
 115     DEFAULT_INTERRUPT (TRAPA58, 58)
 116     DEFAULT_INTERRUPT (TRAPA59, 59)
 117     DEFAULT_INTERRUPT (TRAPA60, 60)
 118     DEFAULT_INTERRUPT (TRAPA61, 61)
 119     DEFAULT_INTERRUPT (TRAPA62, 62)
 120     DEFAULT_INTERRUPT (TRAPA63, 63)
 121     DEFAULT_INTERRUPT (IRQ0,    64)
 122     DEFAULT_INTERRUPT (IRQ1,    65)
 123     DEFAULT_INTERRUPT (IRQ2,    66)
 124     DEFAULT_INTERRUPT (IRQ3,    67)
 125     DEFAULT_INTERRUPT (IRQ4,    68)
 126     DEFAULT_INTERRUPT (IRQ5,    69)
 127     DEFAULT_INTERRUPT (IRQ6,    70)
 128     DEFAULT_INTERRUPT (IRQ7,    71)
 129     DEFAULT_INTERRUPT (DEI0,    72)
 130     RESERVE_INTERRUPT (         73)
 131     DEFAULT_INTERRUPT (DEI1,    74)
 132     RESERVE_INTERRUPT (         75)
 133     DEFAULT_INTERRUPT (DEI2,    76)
 134     RESERVE_INTERRUPT (         77)
 135     DEFAULT_INTERRUPT (DEI3,    78)
 136     RESERVE_INTERRUPT (         79)
 137     DEFAULT_INTERRUPT (IMIA0,   80)
 138     DEFAULT_INTERRUPT (IMIB0,   81)
 139     DEFAULT_INTERRUPT (OVI0,    82)
 140     RESERVE_INTERRUPT (         83)
 141     DEFAULT_INTERRUPT (IMIA1,   84)
 142     DEFAULT_INTERRUPT (IMIB1,   85)
 143     DEFAULT_INTERRUPT (OVI1,    86)
 144     RESERVE_INTERRUPT (         87)
 145     DEFAULT_INTERRUPT (IMIA2,   88)
 146     DEFAULT_INTERRUPT (IMIB2,   89)
 147     DEFAULT_INTERRUPT (OVI2,    90)
 148     RESERVE_INTERRUPT (         91)
 149     DEFAULT_INTERRUPT (IMIA3,   92)
 150     DEFAULT_INTERRUPT (IMIB3,   93)
 151     DEFAULT_INTERRUPT (OVI3,    94)
 152     RESERVE_INTERRUPT (         95)
 153     DEFAULT_INTERRUPT (IMIA4,   96)
 154     DEFAULT_INTERRUPT (IMIB4,   97)
 155     DEFAULT_INTERRUPT (OVI4,    98)
 156     RESERVE_INTERRUPT (         99)
 157     DEFAULT_INTERRUPT (REI0,   100)
 158     DEFAULT_INTERRUPT (RXI0,   101)
 159     DEFAULT_INTERRUPT (TXI0,   102)
 160     DEFAULT_INTERRUPT (TEI0,   103)
 161     DEFAULT_INTERRUPT (REI1,   104)
 162     DEFAULT_INTERRUPT (RXI1,   105)
 163     DEFAULT_INTERRUPT (TXI1,   106)
 164     DEFAULT_INTERRUPT (TEI1,   107)
 165     RESERVE_INTERRUPT (        108)
 166     DEFAULT_INTERRUPT (ADITI,  109)
 167
 168 /* UIE# block.
 169  * Must go into the same section as the UIE() handler */
 170
 171     "\t.text\n"
 172     "_UIE4:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 173     "_UIE5:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 174     "_UIE6:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 175     "_UIE7:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 176     "_UIE8:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 177     "_UIE9:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 178     "_UIE10:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 179     "_UIE11:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 180     "_UIE12:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 181     "_UIE13:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 182     "_UIE14:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 183     "_UIE15:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 184     "_UIE16:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 185     "_UIE17:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 186     "_UIE18:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 187     "_UIE19:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 188     "_UIE20:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 189     "_UIE21:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 190     "_UIE22:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 191     "_UIE23:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 192     "_UIE24:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 193     "_UIE25:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 194     "_UIE26:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 195     "_UIE27:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 196     "_UIE28:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 197     "_UIE29:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 198     "_UIE30:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 199     "_UIE31:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 200     "_UIE32:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 201     "_UIE33:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 202     "_UIE34:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 203     "_UIE35:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 204     "_UIE36:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 205     "_UIE37:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 206     "_UIE38:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 207     "_UIE39:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 208     "_UIE40:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 209     "_UIE41:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 210     "_UIE42:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 211     "_UIE43:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 212     "_UIE44:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 213     "_UIE45:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 214     "_UIE46:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 215     "_UIE47:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 216     "_UIE48:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 217     "_UIE49:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 218     "_UIE50:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 219     "_UIE51:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 220     "_UIE52:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 221     "_UIE53:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 222     "_UIE54:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 223     "_UIE55:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 224     "_UIE56:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 225     "_UIE57:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 226     "_UIE58:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 227     "_UIE59:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 228     "_UIE60:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 229     "_UIE61:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 230     "_UIE62:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 231     "_UIE63:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 232     "_UIE64:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 233     "_UIE65:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 234     "_UIE66:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 235     "_UIE67:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 236     "_UIE68:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 237     "_UIE69:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 238     "_UIE70:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 239     "_UIE71:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 240     "_UIE72:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 241     "_UIE73:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 242     "_UIE74:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 243     "_UIE75:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 244     "_UIE76:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 245     "_UIE77:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 246     "_UIE78:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 247     "_UIE79:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 248     "_UIE80:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 249     "_UIE81:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 250     "_UIE82:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 251     "_UIE83:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 252     "_UIE84:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 253     "_UIE85:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 254     "_UIE86:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 255     "_UIE87:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 256     "_UIE88:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 257     "_UIE89:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 258     "_UIE90:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 259     "_UIE91:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 260     "_UIE92:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 261     "_UIE93:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 262     "_UIE94:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 263     "_UIE95:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 264     "_UIE96:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 265     "_UIE97:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 266     "_UIE98:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 267     "_UIE99:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 268     "_UIE100:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 269     "_UIE101:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 270     "_UIE102:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 271     "_UIE103:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 272     "_UIE104:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 273     "_UIE105:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 274     "_UIE106:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 275     "_UIE107:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 276     "_UIE108:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 277     "_UIE109:\tbsr\t_UIE\n\tmov.l\t@r15+,r4\n"
 278
 279 );
 280
 281 extern void UIE4(void); /* needed for calculating the UIE number */
 282
 283 void UIE (unsigned int pc) __attribute__((section(".text")));
 284 void UIE (unsigned int pc) /* Unexpected Interrupt or Exception */
 285 {
 286 #if CONFIG_LED == LED_REAL
 287     bool state = false;
 288     int i = 0;
 289 #endif
 290     unsigned int n;
 291     char str[32];
 292
 293     asm volatile ("sts\tpr,%0" : "=r"(n));
 294
 295     /* clear screen */
 296     lcd_clear_display ();
 297 #ifdef HAVE_LCD_BITMAP
 298     lcd_setfont(FONT_SYSFIXED);
 299 #endif
 300     /* output exception */
 301     n = (n - (unsigned)UIE4 + 12)>>2; /* get exception or interrupt number */
 302     snprintf(str,sizeof(str),"I%02x:%s",n,irqname[n]);
 303     lcd_puts(0,0,str);
 304     snprintf(str,sizeof(str),"at %08x",pc);
 305     lcd_puts(0,1,str);
 306     lcd_update ();
 307
 308     while (1)
 309     {
 310 #if CONFIG_LED == LED_REAL
 311         if (--i <= 0)
 312         {
 313             state = !state;
 314             led(state);
 315             i = 240000;
 316         }
 317 #endif
 318
 319         /* try to restart firmware if ON is pressed */
 320 #if CONFIG_KEYPAD == PLAYER_PAD
 321         if (!(PADRL & 0x20))
 322 #elif CONFIG_KEYPAD == RECORDER_PAD
 323 #ifdef HAVE_FMADC
 324         if (!(PCDR & 0x0008))
 325 #else
 326         if (!(PBDRH & 0x01))
 327 #endif
 328 #elif CONFIG_KEYPAD == ONDIO_PAD
 329         if (!(PCDR & 0x0008))
 330 #endif
 331         {
 332             /* enable the watchguard timer, but don't service it */
 333             RSTCSR_W = 0x5a40; /* Reset enabled, power-on reset */
 334             TCSR_W = 0xa560; /* Watchdog timer mode, timer enabled, sysclk/2 */
 335         }
 336     }
 337 }
 338
 339 void system_init(void)
 340 {
 341     /* Disable all interrupts */
 342     IPRA = 0;
 343     IPRB = 0;
 344     IPRC = 0;
 345     IPRD = 0;
 346     IPRE = 0;
 347
 348     /* NMI level low, falling edge on all interrupts */
 349     ICR = 0;
 350
 351     /* Enable burst and RAS down mode on DRAM */
 352     DCR |= 0x5000;
 353
 354     /* Activate Warp mode (simultaneous internal and external mem access) */
 355     BCR |= 0x2000;
 356
 357     /* Bus state controller initializations. These are only necessary when
 358        running from flash. */
 359     WCR1 = 0x40FD; /* Long wait states for CS6 (ATA), short for the rest. */
 360     WCR3 = 0x8000; /* WAIT is pulled up, 1 state inserted for CS6 */
 361 }
 362
 363 void system_reboot (void)
 364 {
 365     disable_irq();
 366
 367     asm volatile ("ldc\t%0,vbr" : : "r"(0));
 368
 369     PACR2 |= 0x4000; /* for coldstart detection */
 370     IPRA = 0;
 371     IPRB = 0;
 372     IPRC = 0;
 373     IPRD = 0;
 374     IPRE = 0;
 375     ICR = 0;
 376
 377     asm volatile ("jmp @%0; mov.l @%1,r15" : :
 378                   "r"(*(int*)0),"r"(4));
 379 }
 380
 381 /* Utilise the user break controller to catch invalid memory accesses. */
 382 int system_memory_guard(int newmode)
 383 {
 384     static const struct {
 385         unsigned long  addr;
 386         unsigned long  mask;
 387         unsigned short bbr;
 388     } modes[MAXMEMGUARD] = {
 389         /* catch nothing */
 390         { 0x00000000, 0x00000000, 0x0000 },
 391         /* catch writes to area 02 (flash ROM) */
 392         { 0x02000000, 0x00FFFFFF, 0x00F8 },
 393         /* catch all accesses to areas 00 (internal ROM) and 01 (free) */
 394         { 0x00000000, 0x01FFFFFF, 0x00FC }
 395     };
 396
 397     int oldmode = MEMGUARD_NONE;
 398     int i;
 399
 400     /* figure out the old mode from what is in the UBC regs. If the register
 401        values don't match any mode, assume MEMGUARD_NONE */
 402     for (i = MEMGUARD_NONE; i < MAXMEMGUARD; i++)
 403     {
 404         if (BAR == modes[i].addr && BAMR == modes[i].mask &&
 405             BBR == modes[i].bbr)
 406         {
 407             oldmode = i;
 408             break;
 409         }
 410     }
 411
 412     if (newmode == MEMGUARD_KEEP)
 413         newmode = oldmode;
 414
 415     BBR = 0;  /* switch off everything first */
 416
 417     /* always set the UBC according to the mode, in case the old settings
 418        didn't match any valid mode */
 419     BAR  = modes[newmode].addr;
 420     BAMR = modes[newmode].mask;
 421     BBR  = modes[newmode].bbr;
 422
 423     return oldmode;
 424 }