1 /***************************************************************************
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
10 * Copyright (C) 2002 by Linus Nielsen Feltzing
12 * All files in this archive are subject to the GNU General Public License.
13 * See the file COPYING in the source tree root for full license agreement.
15 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
16 * KIND, either express or implied.
18 ****************************************************************************/
27 /* cute little functions, atomic read-modify-write */
30 #define SDA_LO and_b(~0x80, &PBDRL)
31 #define SDA_HI or_b(0x80, &PBDRL)
32 #define SDA_INPUT and_b(~0x80, &PBIORL)
33 #define SDA_OUTPUT or_b(0x80, &PBIORL)
34 #define SDA (PBDRL & 0x80)
36 #if CONFIG_I2C == I2C_ONDIO
37 /* Ondio pinout, SCL moved to PB6 */
38 #define SCL_INPUT and_b(~0x40, &PBIORL)
39 #define SCL_OUTPUT or_b(0x40, &PBIORL)
40 #define SCL_LO and_b(~0x40, &PBDRL)
41 #define SCL_HI or_b(0x40, &PBDRL)
42 #define SCL (PBDRL & 0x40)
44 /* "classic" pinout, SCL is PB13 */
45 #define SCL_INPUT and_b(~0x20, &PBIORH)
46 #define SCL_OUTPUT or_b(0x20, &PBIORH)
47 #define SCL_LO and_b(~0x20, &PBDRH)
48 #define SCL_HI or_b(0x20, &PBDRH)
49 #define SCL (PBDRH & 0x20)
52 /* arbitrary delay loop */
53 #define DELAY do { int _x; for(_x=0;_x<20;_x++);} while (0)
55 static struct mutex i2c_mtx
;
64 mutex_unlock(&i2c_mtx
);
89 #if CONFIG_I2C == I2C_ONDIO
90 /* make PB6 & PB7 general I/O */
93 /* make PB7 & PB13 general I/O */
94 PBCR1
&= ~0x0c00; /* PB13 */
95 PBCR2
&= ~0xc000; /* PB7 */
106 void i2c_ack(int bit
)
108 /* Here's the deal. The MAS is slow, and sometimes needs to wait
109 before it can receive the acknowledge. Therefore it forces the clock
110 low until it is ready. We need to poll the clock line until it goes
111 high before we release the ack. */
113 SCL_LO
; /* Set the clock low */
123 SCL_INPUT
; /* Set the clock to input */
124 while(!SCL
) /* and wait for the MAS to release it */
136 /* Here's the deal. The MAS is slow, and sometimes needs to wait
137 before it can send the acknowledge. Therefore it forces the clock
138 low until it is ready. We need to poll the clock line until it goes
139 high before we read the ack. */
141 #ifdef HAVE_I2C_LOW_FIRST
142 SDA_LO
; /* First, discharge the data line */
144 SDA_INPUT
; /* And set to input */
145 SCL_INPUT
; /* Set the clock to input */
146 while(!SCL
) /* and wait for the MAS to release it */
160 void i2c_outb(unsigned char byte
)
164 /* clock out each bit, MSB first */
165 for ( i
=0x80; i
; i
>>=1 ) {
181 unsigned char i2c_inb(int ack
)
184 unsigned char byte
= 0;
186 /* clock in each bit, MSB first */
187 for ( i
=0x80; i
; i
>>=1 ) {
188 #ifdef HAVE_I2C_LOW_FIRST
189 /* Tricky business. Here we discharge the data line by driving it low
190 and then set it to input to see if it stays low or goes high */
191 SDA_LO
; /* First, discharge the data line */
193 SDA_INPUT
; /* And set to input */
206 int i2c_write(int address
, const unsigned char* buf
, int count
)
211 i2c_outb(address
& 0xfe);
214 for (i
=0; i
<count
; i
++)
226 debugf("i2c_write() - no ack\n");
233 int i2c_read(int address
, unsigned char* buf
, int count
)
238 i2c_outb(address
| 1);
240 for (i
=0; i
<count
; i
++) {