H300, X5: Optimised lcd_yuv_blit(), using line-pair zig-zag writing to the LCD contro...
[Rockbox.git] / firmware / target / coldfire / iaudio / x5 / lcd-x5.c
blob5ca2cb508cc5a07395d00b961781d401eec24062
1 /***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
10 * Copyright (C) 2004 by Linus Nielsen Feltzing
12 * All files in this archive are subject to the GNU General Public License.
13 * See the file COPYING in the source tree root for full license agreement.
15 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
16 * KIND, either express or implied.
18 ****************************************************************************/
19 #include "config.h"
21 #include "cpu.h"
22 #include "lcd.h"
23 #include "kernel.h"
24 #include "thread.h"
25 #include <string.h>
26 #include <stdlib.h>
27 #include "file.h"
28 #include "debug.h"
29 #include "system.h"
30 #include "font.h"
31 #include "bidi.h"
33 /* Power and display status */
34 static bool power_on = false; /* Is the power turned on? */
35 static bool display_on = false; /* Is the display turned on? */
37 /* Contrast */
38 static int lcd_contrast = DEFAULT_CONTRAST_SETTING << 8;
40 /* Reverse Flag */
41 #define R_DISP_CONTROL_NORMAL 0x0004
42 #define R_DISP_CONTROL_REV 0x0000
43 static unsigned short r_disp_control_rev = R_DISP_CONTROL_NORMAL;
45 /* Flipping */
46 #define Y_OFFSET_NORMAL 0
47 #define Y_OFFSET_FLIPPED 4
48 static int y_offset = 0; /* y correction for flip */
49 static unsigned short r_gate_scan_start_pos = 0x0002;
50 static unsigned short r_drv_output_control = 0x0313;
51 static unsigned short r_horiz_ram_addr_pos = 0x7f00;
53 /* Forward declarations */
54 static void lcd_display_off(void);
56 /* A15(0x8000) && CS1->CS, A1(0x0002)->RS */
57 #define LCD_CMD *(volatile unsigned short *)0xf0008000
58 #define LCD_DATA *(volatile unsigned short *)0xf0008002
60 /* register defines for the Renesas HD66773R */
61 #define R_START_OSC 0x00
62 #define R_DEVICE_CODE_READ 0x00
63 #define R_DRV_OUTPUT_CONTROL 0x01
64 #define R_DRV_AC_CONTROL 0x02
65 #define R_POWER_CONTROL1 0x03
66 #define R_POWER_CONTROL2 0x04
67 #define R_ENTRY_MODE 0x05
68 #define R_COMPARE_REG 0x06
69 #define R_DISP_CONTROL 0x07
70 #define R_FRAME_CYCLE_CONTROL 0x0b
71 #define R_POWER_CONTROL3 0x0c
72 #define R_POWER_CONTROL4 0x0d
73 #define R_POWER_CONTROL5 0x0e
74 #define R_GATE_SCAN_START_POS 0x0f
75 #define R_VERT_SCROLL_CONTROL 0x11
76 #define R_1ST_SCR_DRV_POS 0x14
77 #define R_2ND_SCR_DRV_POS 0x15
78 #define R_HORIZ_RAM_ADDR_POS 0x16
79 #define R_VERT_RAM_ADDR_POS 0x17
80 #define R_RAM_WRITE_DATA_MASK 0x20
81 #define R_RAM_ADDR_SET 0x21
82 #define R_WRITE_DATA_2_GRAM 0x22
83 #define R_RAM_READ_DATA 0x22
84 #define R_GAMMA_FINE_ADJ_POS1 0x30
85 #define R_GAMMA_FINE_ADJ_POS2 0x31
86 #define R_GAMMA_FINE_ADJ_POS3 0x32
87 #define R_GAMMA_GRAD_ADJ_POS 0x33
88 #define R_GAMMA_FINE_ADJ_NEG1 0x34
89 #define R_GAMMA_FINE_ADJ_NEG2 0x35
90 #define R_GAMMA_FINE_ADJ_NEG3 0x36
91 #define R_GAMMA_GRAD_ADJ_NEG 0x37
92 #define R_GAMMA_AMP_ADJ_POS 0x3a
93 #define R_GAMMA_AMP_ADJ_NEG 0x3b
95 #define R_ENTRY_MODE_SOLID_VERT 0x1038
96 #define R_ENTRY_MODE_DIT_HORZ 0x9030
98 /* called very frequently - inline! */
99 static inline void lcd_write_reg(int reg, int val)
101 LCD_CMD = 0x0000; /* MSB is ~always~ 0 */
102 LCD_CMD = reg << 1;
103 LCD_DATA = (val >> 8) << 1;
104 LCD_DATA = val << 1;
107 /* called very frequently - inline! */
108 static inline void lcd_begin_write_gram(void)
110 LCD_CMD = 0x0000;
111 LCD_CMD = R_WRITE_DATA_2_GRAM << 1;
114 /*** hardware configuration ***/
116 int lcd_default_contrast(void)
118 return DEFAULT_CONTRAST_SETTING;
121 void lcd_set_contrast(int val)
123 /* Clamp val in range 0-14, 16-30 */
124 if (val < 1)
125 val = 0;
126 else if (val <= 15)
127 --val;
128 else if (val > 30)
129 val = 30;
131 lcd_contrast = val << 8;
133 if (!power_on)
134 return;
136 /* VCOMG=1, VDV4-0=xxxxx, VCM4-0=11000 */
137 lcd_write_reg(R_POWER_CONTROL5, 0x2018 | lcd_contrast);
140 void lcd_set_invert_display(bool yesno)
142 r_disp_control_rev = yesno ? R_DISP_CONTROL_REV :
143 R_DISP_CONTROL_NORMAL;
145 if (!display_on)
146 return;
148 /* PT1-0=00, VLE2-1=00, SPT=0, GON=1, DTE=1, REV=x, D1-0=11 */
149 lcd_write_reg(R_DISP_CONTROL, 0x0033 | r_disp_control_rev);
152 /* turn the display upside down (call lcd_update() afterwards) */
153 void lcd_set_flip(bool yesno)
155 if (yesno)
157 y_offset = Y_OFFSET_FLIPPED;
158 r_gate_scan_start_pos = 0x0000;
159 r_drv_output_control = 0x0013;
160 r_horiz_ram_addr_pos = 0x8304;
162 else
164 y_offset = Y_OFFSET_NORMAL;
165 r_gate_scan_start_pos = 0x0002;
166 r_drv_output_control = 0x0313;
167 r_horiz_ram_addr_pos = 0x7f00;
170 if (!power_on)
171 return;
173 /* SCN4-0=000x0 (G1/G160) */
174 lcd_write_reg(R_GATE_SCAN_START_POS, r_gate_scan_start_pos);
175 /* SM=0, GS=x, SS=x, NL4-0=10011 (G1-G160)*/
176 lcd_write_reg(R_DRV_OUTPUT_CONTROL, r_drv_output_control);
177 /* HEA7-0=0xxx, HSA7-0=0xxx */
178 lcd_write_reg(R_HORIZ_RAM_ADDR_POS, r_horiz_ram_addr_pos);
181 static void lcd_power_on(void)
183 /* Be sure standby bit is clear. */
184 /* BT2-0=000, DC2-0=000, AP2-0=000, SLP=0, STB=0 */
185 lcd_write_reg(R_POWER_CONTROL1, 0x0000);
187 /** Power ON Sequence **/
188 /* Per datasheet Rev.1.10, Jun.21.2003, p. 99 */
190 lcd_write_reg(R_START_OSC, 0x0001); /* Start Oscillation */
191 /* 10ms or more for oscillation circuit to stabilize */
192 sleep(HZ/50);
193 /* Instruction (1) for power setting; VC2-0, VRH3-0, CAD,
194 VRL3-0, VCM4-0, VDV4-0 */
195 /* VC2-0=001 */
196 lcd_write_reg(R_POWER_CONTROL3, 0x0001);
197 /* VRL3-0=0100, PON=0, VRH3-0=0001 */
198 lcd_write_reg(R_POWER_CONTROL4, 0x0401);
199 /* CAD=1 */
200 lcd_write_reg(R_POWER_CONTROL2, 0x8000);
201 /* VCOMG=0, VDV4-0=xxxxx, VCM4-0=11000 */
202 lcd_write_reg(R_POWER_CONTROL5, 0x0018 | lcd_contrast);
203 /* Instruction (2) for power setting; BT2-0, DC2-0, AP2-0 */
204 /* BT2-0=000, DC2-0=001, AP2-0=011, SLP=0, STB=0 */
205 lcd_write_reg(R_POWER_CONTROL1, 0x002c);
206 /* Instruction (3) for power setting; VCOMG = "1" */
207 /* VCOMG=1, VDV4-0=xxxxx, VCM4-0=11000 */
208 lcd_write_reg(R_POWER_CONTROL5, 0x2018 | lcd_contrast);
210 /* 40ms or more; time for step-up circuits 1,2 to stabilize */
211 sleep(HZ/25);
213 /* Instruction (4) for power setting; PON = "1" */
214 /* VRL3-0=0100, PON=1, VRH3-0=0001 */
215 lcd_write_reg(R_POWER_CONTROL4, 0x0411);
217 /* 40ms or more; time for step-up circuit 4 to stabilize */
218 sleep(HZ/25);
220 /* Instructions for other mode settings (in register order). */
221 /* SM=0, GS=x, SS=x, NL4-0=10011 (G1-G160)*/
222 lcd_write_reg(R_DRV_OUTPUT_CONTROL, r_drv_output_control);
223 /* FLD1-0=01 (1 field), B/C=1, EOR=1 (C-pat), NW5-0=000000 (1 row) */
224 lcd_write_reg(R_DRV_AC_CONTROL, 0x0700);
225 /* DIT=x, BGR=1, HWM=0, I/D1-0=11, AM=1, LG2-0=000 */
226 lcd_write_reg(R_ENTRY_MODE, R_ENTRY_MODE_SOLID_VERT);
227 /* CP15-0=0000000000000000 */
228 lcd_write_reg(R_COMPARE_REG, 0x0000);
229 /* NO1-0=01, SDT1-0=00, EQ1-0=00, DIV1-0=00, RTN3-00000 */
230 lcd_write_reg(R_FRAME_CYCLE_CONTROL, 0x4000);
231 /* SCN4-0=000x0 (G1/G160) */
232 lcd_write_reg(R_GATE_SCAN_START_POS, r_gate_scan_start_pos);
233 /* VL7-0=0x00 */
234 lcd_write_reg(R_VERT_SCROLL_CONTROL, 0x0000);
235 /* SE17-10(End)=0x9f (159), SS17-10(Start)=0x00 */
236 lcd_write_reg(R_1ST_SCR_DRV_POS, 0x9f00);
237 /* SE27-20(End)=0x5c (92), SS27-20(Start)=0x00 */
238 lcd_write_reg(R_2ND_SCR_DRV_POS, 0x5c00);
239 /* HEA7-0=0xxx, HSA7-0=0xxx */
240 lcd_write_reg(R_HORIZ_RAM_ADDR_POS, r_horiz_ram_addr_pos);
241 /* PKP12-10=0x0, PKP02-00=0x0 */
242 lcd_write_reg(R_GAMMA_FINE_ADJ_POS1, 0x0003);
243 /* PKP32-30=0x4, PKP22-20=0x0 */
244 lcd_write_reg(R_GAMMA_FINE_ADJ_POS2, 0x0400);
245 /* PKP52-50=0x4, PKP42-40=0x7 */
246 lcd_write_reg(R_GAMMA_FINE_ADJ_POS3, 0x0407);
247 /* PRP12-10=0x3, PRP02-00=0x5 */
248 lcd_write_reg(R_GAMMA_GRAD_ADJ_POS, 0x0305);
249 /* PKN12-10=0x0, PKN02-00=0x3 */
250 lcd_write_reg(R_GAMMA_FINE_ADJ_NEG1, 0x0003);
251 /* PKN32-30=0x7, PKN22-20=0x4 */
252 lcd_write_reg(R_GAMMA_FINE_ADJ_NEG2, 0x0704);
253 /* PKN52-50=0x4, PRN42-40=0x7 */
254 lcd_write_reg(R_GAMMA_FINE_ADJ_NEG3, 0x0407);
255 /* PRN12-10=0x5, PRN02-00=0x3 */
256 lcd_write_reg(R_GAMMA_GRAD_ADJ_NEG, 0x0503);
257 /* VRP14-10=0x14, VRP03-00=0x09 */
258 lcd_write_reg(R_GAMMA_AMP_ADJ_POS, 0x1409);
259 /* VRN14-00=0x06, VRN03-00=0x02 */
260 lcd_write_reg(R_GAMMA_AMP_ADJ_NEG, 0x0602);
262 /* 100ms or more; time for step-up circuits to stabilize */
263 sleep(HZ/10);
265 power_on = true;
268 static void lcd_power_off(void)
270 /* Display must be off first */
271 if (display_on)
272 lcd_display_off();
274 power_on = false;
276 /** Power OFF sequence **/
277 /* Per datasheet Rev.1.10, Jun.21.2003, p. 99 */
279 /* Step-up1 halt setting bit */
280 /* BT2-0=110, DC2-0=001, AP2-0=011, SLP=0, STB=0 */
281 lcd_write_reg(R_POWER_CONTROL1, 0x062c);
282 /* Step-up3,4 halt setting bit */
283 /* VRL3-0=0100, PON=0, VRH3-0=0001 */
284 lcd_write_reg(R_POWER_CONTROL4, 0x0401);
285 /* VCOMG=0, VDV4-0=xxxxx, VCM4-0=11000 */
286 lcd_write_reg(R_POWER_CONTROL5, 0x0018 | lcd_contrast);
288 /* Wait 100ms or more */
289 sleep(HZ/10);
291 /* Step-up2,amp halt setting bit */
292 /* BT2-0=000, DC2-0=000, AP2-0=000, SLP=0, STB=0 */
293 lcd_write_reg(R_POWER_CONTROL1, 0x0000);
296 static void lcd_display_on(void)
298 /* Be sure power is on first */
299 if (!power_on)
300 lcd_power_on();
302 /** Display ON Sequence **/
303 /* Per datasheet Rev.1.10, Jun.21.2003, p. 97 */
305 /* PT1-0=00, VLE2-1=00, SPT=0, GON=0, DTE=0, REV=0, D1-0=01 */
306 lcd_write_reg(R_DISP_CONTROL, 0x0001);
308 sleep(HZ/25); /* Wait 2 frames or more */
310 /* PT1-0=00, VLE2-1=00, SPT=0, GON=1, DTE=0, REV=x, D1-0=01 */
311 lcd_write_reg(R_DISP_CONTROL, 0x0021 | r_disp_control_rev);
312 /* PT1-0=00, VLE2-1=00, SPT=0, GON=1, DTE=0, REV=x, D1-0=11 */
313 lcd_write_reg(R_DISP_CONTROL, 0x0023 | r_disp_control_rev);
315 sleep(HZ/25); /* Wait 2 frames or more */
317 /* PT1-0=00, VLE2-1=00, SPT=0, GON=1, DTE=1, REV=x, D1-0=11 */
318 lcd_write_reg(R_DISP_CONTROL, 0x0033 | r_disp_control_rev);
320 display_on = true;
323 static void lcd_display_off(void)
325 display_on = false;
327 /** Display OFF sequence **/
328 /* Per datasheet Rev.1.10, Jun.21.2003, p. 97 */
330 /* EQ1-0=00 already */
332 /* PT1-0=00, VLE2-1=00, SPT=0, GON=1, DTE=1, REV=x, D1-0=10 */
333 lcd_write_reg(R_DISP_CONTROL, 0x0032 | r_disp_control_rev);
335 sleep(HZ/25); /* Wait 2 frames or more */
337 /* PT1-0=00, VLE2-1=00, SPT=0, GON=1, DTE=0, REV=x, D1-0=10 */
338 lcd_write_reg(R_DISP_CONTROL, 0x0022 | r_disp_control_rev);
340 sleep(HZ/25); /* Wait 2 frames or more */
342 /* PT1-0=00, VLE2-1=00, SPT=0, GON=0, DTE=0, REV=0, D1-0=00 */
343 lcd_write_reg(R_DISP_CONTROL, 0x0000);
346 /* LCD init */
347 void lcd_init_device(void)
349 #ifdef BOOTLOADER
350 /* Initial boot requires power on reset and setting up chip
351 registers but a full reset is not needed again. */
353 /* LCD Reset */
354 and_l(~0x00000010, &GPIO1_OUT);
355 or_l(0x00000010, &GPIO1_ENABLE);
356 or_l(0x00000010, &GPIO1_FUNCTION);
357 sleep(HZ/100);
358 or_l(0x00000010, &GPIO1_OUT);
360 sleep(HZ/100);
362 lcd_display_on();
363 #else
364 /* Power and display already ON - reset settings */
365 power_on = true;
366 display_on = true;
367 lcd_set_contrast(DEFAULT_CONTRAST_SETTING);
368 lcd_set_invert_display(false);
369 lcd_set_flip(false);
370 lcd_write_reg(R_ENTRY_MODE, R_ENTRY_MODE_SOLID_VERT);
371 /* do this or all bootloaders will need reflashing */
372 #endif
375 void lcd_enable(bool on)
377 if (on == display_on)
378 return;
380 if (on)
382 lcd_display_on();
383 /* Probably out of sync and we don't wanna pepper the code with
384 lcd_update() calls for this. */
385 lcd_update();
387 else
389 lcd_display_off();
393 bool lcd_enabled(void)
395 return display_on;
398 void lcd_sleep(void)
400 if (power_on)
401 lcd_power_off();
403 /* Set standby mode */
404 /* BT2-0=000, DC2-0=000, AP2-0=000, SLP=0, STB=1 */
405 lcd_write_reg(R_POWER_CONTROL1, 0x0001);
408 /*** update functions ***/
410 /* Performance function that works with an external buffer
411 note that by and bheight are in 8-pixel units! */
412 void lcd_blit(const fb_data* data, int x, int by, int width,
413 int bheight, int stride)
415 /* TODO: Implement lcd_blit() */
416 (void)data;
417 (void)x;
418 (void)by;
419 (void)width;
420 (void)bheight;
421 (void)stride;
422 /*if(display_on)*/
425 /* Line write helper function for lcd_yuv_blit. Write two lines of yuv420.
426 * y should have two lines of Y back to back, 2nd line first.
427 * c should contain the Cb and Cr data for the two lines of Y back to back.
428 * Needs EMAC set to saturated, signed integer mode.
430 extern void lcd_write_yuv420_lines(const unsigned char *y,
431 const unsigned char *c, int width);
433 /* Performance function to blit a YUV bitmap directly to the LCD
434 * src_x, src_y, width and height should be even and within the LCD's
435 * boundaries.
437 void lcd_yuv_blit(unsigned char * const src[3],
438 int src_x, int src_y, int stride,
439 int x, int y, int width, int height)
441 /* IRAM Y, Cb/bu, guv and Cb/rv buffers. */
442 unsigned char y_ibuf[LCD_WIDTH*2];
443 unsigned char c_ibuf[LCD_WIDTH];
444 const unsigned char *ysrc, *usrc, *vsrc;
445 const unsigned char *ysrc_max;
447 if (!display_on)
448 return;
450 width &= ~1; /* stay on the safe side */
451 height &= ~1;
453 lcd_write_reg(R_ENTRY_MODE, R_ENTRY_MODE_DIT_HORZ);
454 /* Set start position and window */
455 lcd_write_reg(R_VERT_RAM_ADDR_POS, (LCD_WIDTH-1) << 8);
457 ysrc = src[0] + src_y * stride + src_x;
458 usrc = src[1] + (src_y * stride >> 2) + (src_x >> 1);
459 vsrc = src[2] + (src_y * stride >> 2) + (src_x >> 1);
460 ysrc_max = ysrc + height * stride;
462 coldfire_set_macsr(EMAC_SATURATE);
465 lcd_write_reg(R_HORIZ_RAM_ADDR_POS, ((y + y_offset + 1) << 8) | (y + y_offset));
466 lcd_write_reg(R_RAM_ADDR_SET, (x << 8) | (y + y_offset));
467 lcd_begin_write_gram();
469 memcpy(y_ibuf + width, ysrc, width);
470 memcpy(y_ibuf, ysrc + stride, width);
471 memcpy(c_ibuf, usrc, width >> 1);
472 memcpy(c_ibuf + (width >> 1), vsrc, width >> 1);
473 lcd_write_yuv420_lines(y_ibuf, c_ibuf, width >> 1);
475 y += 2;
476 ysrc += 2 * stride;
477 usrc += stride >> 1;
478 vsrc += stride >> 1;
480 while (ysrc < ysrc_max);
481 } /* lcd_yuv_blit */
484 /* Update the display.
485 This must be called after all other LCD functions that change the
486 lcd frame buffer. */
487 void lcd_update(void)
489 if (!display_on)
490 return;
492 lcd_write_reg(R_ENTRY_MODE, R_ENTRY_MODE_SOLID_VERT);
493 /* Set start position and window */
494 lcd_write_reg(R_HORIZ_RAM_ADDR_POS,
495 ((y_offset + LCD_HEIGHT-1) << 8) | y_offset);
496 lcd_write_reg(R_VERT_RAM_ADDR_POS, (LCD_WIDTH-1) << 8);
497 lcd_write_reg(R_RAM_ADDR_SET, y_offset);
499 lcd_begin_write_gram();
501 lcd_write_data((unsigned short *)lcd_framebuffer, LCD_WIDTH*LCD_HEIGHT);
502 } /* lcd_update */
504 /* Update a fraction of the display. */
505 void lcd_update_rect(int x, int y, int width, int height)
507 int ymax;
508 const unsigned short *ptr;
510 if (!display_on)
511 return;
513 if (x + width > LCD_WIDTH)
514 width = LCD_WIDTH - x; /* Clip right */
515 if (x < 0)
516 width += x, x = 0; /* Clip left */
517 if (width <= 0)
518 return; /* nothing left to do */
520 ymax = y + height;
521 if (ymax > LCD_HEIGHT)
522 ymax = LCD_HEIGHT; /* Clip bottom */
523 if (y < 0)
524 y = 0; /* Clip top */
525 if (y >= ymax)
526 return; /* nothing left to do */
528 lcd_write_reg(R_ENTRY_MODE, R_ENTRY_MODE_SOLID_VERT);
529 /* Set start position and window */
530 lcd_write_reg(R_HORIZ_RAM_ADDR_POS,
531 ((y_offset + LCD_HEIGHT-1) << 8) | y_offset);
532 lcd_write_reg(R_VERT_RAM_ADDR_POS, ((x + width - 1) << 8) | x);
533 lcd_write_reg(R_RAM_ADDR_SET, (x << 8) | (y + y_offset));
535 lcd_begin_write_gram();
537 ptr = (unsigned short *)&lcd_framebuffer[y][x];
541 lcd_write_data(ptr, width);
542 ptr += LCD_WIDTH;
544 while (++y < ymax);
545 } /* lcd_update_rect */