firmware/export/wm8751.h

   1 /***************************************************************************
   2  *             __________               __   ___.
   3  *   Open      \______   \ ____   ____ |  | _\_ |__   _______  ___
   4  *   Source     |       _//  _ \_/ ___\|  |/ /| __ \ /  _ \  \/  /
   5  *   Jukebox    |    |   (  <_> )  \___|    < | \_\ (  <_> > <  <
   6  *   Firmware   |____|_  /\____/ \___  >__|_ \|___  /\____/__/\_ \
   7  *                     \/            \/     \/    \/            \/
   8  * $Id$
   9  *
  10  * Copyright (C) 2005 by Dave Chapman
  11  *
  12  * This program is free software; you can redistribute it and/or
  13  * modify it under the terms of the GNU General Public License
  14  * as published by the Free Software Foundation; either version 2
  15  * of the License, or (at your option) any later version.
  16  *
  17  * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
  18  * KIND, either express or implied.
  19  *
  20  ****************************************************************************/
  21 #ifndef _WM8751_H
  22 #define _WM8751_H
  23
  24 /* volume/balance/treble/bass interdependency */
  25 #define VOLUME_MIN -730
  26 #define VOLUME_MAX  60
  27
  28 #define AUDIOHW_CAPS (BASS_CAP | TREBLE_CAP)
  29
  30 extern int tenthdb2master(int db);
  31
  32 extern void audiohw_preinit(void);
  33 extern void audiohw_set_master_vol(int vol_l, int vol_r);
  34 extern void audiohw_set_lineout_vol(int vol_l, int vol_r);
  35 extern void audiohw_set_bass(int value);
  36 extern void audiohw_set_treble(int value);
  37 extern void audiohw_set_frequency(int fsel);
  38
  39 /* Register addresses and bits */
  40 #define OUTPUT_MUTED                0x2f
  41 #define OUTPUT_0DB                  0x79
  42
  43 #define LOUT1                       0x02
  44 #define LOUT1_LOUT1VOL_MASK         (0x07f << 0)
  45 #define LOUT1_LOUT1VOL(x)           ((x) & 0x7f)
  46 #define LOUT1_LO1ZC                 (1 << 7)
  47 #define LOUT1_LO1VU                 (1 << 8)
  48
  49 #define ROUT1                       0x03
  50 #define ROUT1_ROUT1VOL(x)           ((x) & 0x7f)
  51 #define ROUT1_RO1ZC                 (1 << 7)
  52 #define ROUT1_RO1VU                 (1 << 8)
  53
  54 #define DACCTRL                     0x05
  55 #define DACCTRL_DEEMPH_NONE         (0 << 1)
  56 #define DACCTRL_DEEMPH_32           (1 << 1)
  57 #define DACCTRL_DEEMPH_44           (2 << 1)
  58 #define DACCTRL_DEEMPH_48           (3 << 1)
  59 #define DACCTRL_DEEMPH(x)           ((x) & (0x3 << 1))
  60 #define DACCTRL_DACMU               (1 << 3)
  61 #define DACCTRL_DAT                 (1 << 7)
  62
  63 #define AINTFCE                     0x07
  64 #define AINTFCE_FORMAT_RJUST        (0 << 0)
  65 #define AINTFCE_FORMAT_LJUST        (1 << 0)
  66 #define AINTFCE_FORMAT_I2S          (2 << 0)
  67 #define AINTFCE_FORMAT_DSP          (3 << 0)
  68 #define AINTFCE_FORMAT(x)           ((x) & 0x3)
  69 #define AINTFCE_WL_16               (0 << 2)
  70 #define AINTFCE_WL_20               (1 << 2)
  71 #define AINTFCE_WL_24               (2 << 2)
  72 #define AINTFCE_WL_32               (3 << 2)
  73 #define AINTFCE_WL(x)               ((x) & (0x3 << 2))
  74 #define AINTFCE_LRP                 (1 << 4)
  75 #define AINTFCE_LRSWAP              (1 << 5)
  76 #define AINTFCE_MS                  (1 << 6)
  77 #define AINTFCE_BCLKINV             (1 << 7)
  78
  79 #define CLOCKING                    0x08
  80 #define CLOCKING_SR_USB             (1 << 0)
  81 #define CLOCKING_SR(x)              ((x) & (0x1f << 1))
  82 #define CLOCKING_MCLK_DIV2          (1 << 6)
  83 #define CLOCKING_BCLK_DIV2          (1 << 7)
  84
  85 #define LEFTGAIN                    0x0a
  86 #define LEFTGAIN_LDACVOL(x)         ((x) & 0xff)
  87 #define LEFTGAIN_LDVU               (1 << 8)
  88
  89 #define RIGHTGAIN                   0x0b
  90 #define RIGHTGAIN_LDACVOL(x)        ((x) & 0xff)
  91 #define RIGHTGAIN_LDVU              (1 << 8)
  92
  93 #define BASSCTRL                    0x0c
  94 #define BASSCTRL_BASS(x)            ((x) & 0xf)
  95 #define BASSCTRL_BC                 (1 << 6)
  96 #define BASSCTRL_BB                 (1 << 7)
  97
  98 #define TREBCTRL                    0x0d
  99 #define TREBCTRL_TREB(x)            ((x) & 0xf)
 100 #define TREBCTRL_TC                 (1 << 6)
 101
 102 #define RESET                       0x0f
 103 #define RESET_RESET                 0x000
 104
 105 #define ADDITIONAL1                 0x17
 106 #define ADDITIONAL1_TOEN            (1 << 0)
 107 #define ADDITIONAL1_DACINV          (1 << 1)
 108 #define ADDITIONAL1_DMONOMIX_LLRR   (0 << 4)
 109 #define ADDITIONAL1_DMONOMIX_ML0R   (1 << 4)
 110 #define ADDITIONAL1_DMONOMIX_0LMR   (2 << 4)
 111 #define ADDITIONAL1_DMONOMIX_MLMR   (3 << 4)
 112 #define ADDITIONAL1_DMONOMIX(x)     ((x) & (0x03 << 4))
 113 #define ADDITIONAL1_VSEL_LOWEST     (0 << 6)
 114 #define ADDITIONAL1_VSEL_LOW        (1 << 6)
 115 #define ADDITIONAL1_VSEL_DEFAULT2   (2 << 6)
 116 #define ADDITIONAL1_VSEL_DEFAULT    (3 << 6)
 117 #define ADDITIONAL1_VSEL(x)         ((x) & (0x3 << 6))
 118 #define ADDITIONAL1_TSDEN           (1 << 8)
 119
 120 #define ADDITIONAL2                 0x18
 121 #define ADDITIONAL2_DACOSR          (1 << 0)
 122 #define ADDITIONAL2_HPSWZC          (1 << 3)
 123 #define ADDITIONAL2_ROUT2INV        (1 << 4)
 124 #define ADDITIONAL2_HPSWPOL         (1 << 5)
 125 #define ADDITIONAL2_HPSWEN          (1 << 6)
 126 #define ADDITIONAL2_OUT3SW_VREF     (0 << 7)
 127 #define ADDITIONAL2_OUT3SW_ROUT1    (1 << 7)
 128 #define ADDITIONAL2_OUT3SW_MONOOUT  (2 << 7)
 129 #define ADDITIONAL2_OUT3SW_R_MIX_OUT (3 << 7)
 130 #define ADDITIONAL2_OUT3SW(x)       ((x) & (0x3 << 7))
 131
 132 #define PWRMGMT1                    0x19
 133 #define PWRMGMT1_DIGENB             (1 << 0)
 134 #define PWRMGMT1_VREF               (1 << 6)
 135 #define PWRMGMT1_VMIDSEL_DISABLED   (0 << 7)
 136 #define PWRMGMT1_VMIDSEL_50K        (1 << 7)
 137 #define PWRMGMT1_VMIDSEL_500K       (2 << 7)
 138 #define PWRMGMT1_VMIDSEL_5K         (3 << 7)
 139 #define PWRMGMT1_VMIDSEL(x)         ((x) & (0x3 << 7))
 140
 141 #define PWRMGMT2                    0x1a
 142 #define PWRMGMT2_OUT3               (1 << 1)
 143 #define PWRMGMT2_MOUT               (1 << 2)
 144 #define PWRMGMT2_ROUT2              (1 << 3)
 145 #define PWRMGMT2_LOUT2              (1 << 4)
 146 #define PWRMGMT2_ROUT1              (1 << 5)
 147 #define PWRMGMT2_LOUT1              (1 << 6)
 148 #define PWRMGMT2_DACR               (1 << 7)
 149 #define PWRMGMT2_DACL               (1 << 8)
 150
 151 #define ADDITIONAL3                 0x1b
 152 #define ADDITIONAL3_ADCLRM          ((x) & (0x3 << 7))
 153 #define ADDITIONAL3_HPFLREN         (1 << 5)
 154 #define ADDITIONAL3_VROI            (1 << 6)
 155
 156 #define LEFTMIX1                    0x22
 157 #define LEFTMIX1_LI2LO_DEFAULT      (5 << 4)
 158 #define LEFTMIX1_LI2LOVOL(x)        ((x) & (0x7 << 4))
 159 #define LEFTMIX1_LI2LO              (1 << 7)
 160 #define LEFTMIX1_LD2LO              (1 << 8)
 161
 162 #define LEFTMIX2                    0x23
 163 #define LEFTMIX2_MI2LO_DEFAULT      (5 << 4)
 164 #define LEFTMIX2_MI2LOVOL(x)        ((x) & (0x7 << 4))
 165 #define LEFTMIX2_MI2LO              (1 << 7)
 166 #define LEFTMIX2_RD2LO              (1 << 8)
 167
 168 #define RIGHTMIX1                   0x24
 169 #define RIGHTMIX1_MI2RO_DEFAULT     (5 << 4)
 170 #define RIGHTMIX1_MI2ROVOL(x)       ((x) & (0x7 << 4))
 171 #define RIGHTMIX1_MI2RO             (1 << 7)
 172 #define RIGHTMIX1_LD2RO             (1 << 8)
 173
 174 #define RIGHTMIX2                   0x25
 175 #define RIGHTMIX2_RI2RO_DEFAULT     (5 << 4)
 176 #define RIGHTMIX2_RI2ROVOL(x)       ((x) & (0x7 << 4))
 177 #define RIGHTMIX2_RI2RO             (1 << 7)
 178 #define RIGHTMIX2_RD2RO             (1 << 8)
 179
 180 #define MONOMIX1                    0x26
 181 #define MONOMIX1_DMEN               (1 << 0)
 182 #define MONOMIX1_LI2MOVOL(x)        ((x) & (0x7 << 4))
 183 #define MONOMIX1_LI2MO              (1 << 7)
 184 #define MONOMIX1_LD2MO              (1 << 8)
 185
 186 #define MONOMIX2                    0x27
 187 #define MONOMIX2_RI2MOVOL(x)        ((x) & (0x7 << 4))
 188 #define MONOMIX2_RI2MO              (1 << 7)
 189 #define MONOMIX2_RD2MO              (1 << 8)
 190
 191 #define LOUT2                       0x28
 192 #define LOUT2_LOUT2VOL(x)           ((x) & 0x7f)
 193 #define LOUT2_LO2ZC                 (1 << 7)
 194 #define LOUT2_LO2VU                 (1 << 8)
 195
 196 #define ROUT2                       0x29
 197 #define ROUT2_ROUT2VOL(x)           ((x) & 0x7f)
 198 #define ROUT2_RO2ZC                 (1 << 7)
 199 #define ROUT2_RO2VU                 (1 << 8)
 200
 201 #define MONOOUT                     0x2a
 202 #define MONOOUT_MOZC                (1 << 7)
 203
 204 #endif /* _WM8751_H */