Colour targets: Revert an optimisation from almost 18 months ago that actually turned...
[Rockbox.git] / firmware / export / wm8721.h
blob9aab1b760afd8a3c8b7665c218c6400a0d618297
1 /***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
10 * Copyright (C) 2005 by Dave Chapman
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
17 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
18 * KIND, either express or implied.
20 ****************************************************************************/
22 #ifndef _WM8721_H
23 #define _WM8721_H
25 /* volume/balance/treble/bass interdependency */
26 #define VOLUME_MIN -730
27 #define VOLUME_MAX 60
29 extern int tenthdb2master(int db);
30 extern int tenthdb2mixer(int db);
32 extern void audiohw_set_master_vol(int vol_l, int vol_r);
33 extern void audiohw_set_nsorder(int order);
34 extern void audiohw_set_sample_rate(int sampling_control);
36 /* Register addresses and bits */
37 #define LOUTVOL 0x02
38 #define LOUTVOL_LHPVOL_MASK 0x7f
39 #define LOUTVOL_LZCEN (1 << 7)
40 #define LOUTVOL_LRHPBOTH (1 << 8)
42 #define ROUTVOL 0x03
43 #define ROUTVOL_RHPVOL_MASK 0x7f
44 #define ROUTVOL_RZCEN (1 << 7)
45 #define ROUTVOL_RLHPBOTH (1 << 8)
47 #define AAPCTRL 0x04 /* Analog audio path control */
48 #define AAPCTRL_DACSEL (1 << 4)
50 #define DAPCTRL 0x05 /* Digital audio path control */
51 #define DAPCTRL_DEEMP_DISABLE (0 << 2)
52 #define DAPCTRL_DEEMP_32KHz (1 << 2)
53 #define DAPCTRL_DEEMP_44KHz (2 << 2)
54 #define DAPCTRL_DEEMP_48KHz (3 << 2)
55 #define DAPCTRL_DEEMP_MASK (3 << 2)
56 #define DAPCTRL_DACMU (1 << 3)
58 #define PDCTRL 0x06
59 #define PDCTRL_DACPD (1 << 3)
60 #define PDCTRL_OUTPD (1 << 4)
61 #define PDCTRL_POWEROFF (1 << 7)
63 #define AINTFCE 0x07
64 #define AINTFCE_FORMAT_MSB_RJUST (0 << 0)
65 #define AINTFCE_FORMAT_MSB_LJUST (1 << 0)
66 #define AINTFCE_FORMAT_I2S (2 << 0)
67 #define AINTFCE_FORMAT_DSP (3 << 0)
68 #define AINTFCE_FORMAT_MASK (3 << 0)
69 #define AINTFCE_IWL_16BIT (0 << 2)
70 #define AINTFCE_IWL_20BIT (1 << 2)
71 #define AINTFCE_IWL_24BIT (2 << 2)
72 #define AINTFCE_IWL_32BIT (3 << 2)
73 #define AINTFCE_IWL_MASK (3 << 2)
74 #define AINTFCE_LRP_I2S_RLO (0 << 4)
75 #define AINTFCE_LRP_I2S_RHI (1 << 4)
76 #define AINTFCE_DSP_MODE_B (0 << 4)
77 #define AINTFCE_DSP_MODE_A (1 << 4)
78 #define AINTFCE_LRSWAP (1 << 5)
79 #define AINTFCE_MS (1 << 6)
80 #define AINTFCE_BCLKINV (1 << 7)
82 #define SAMPCTRL 0x08
83 #define SAMPCTRL_USB (1 << 0)
84 #define SAMPCTRL_BOSR_NOR_256fs (0 << 1)
85 #define SAMPCTRL_BOSR_NOR_384fs (1 << 1)
86 #define SAMPCTRL_BOSR_USB_250fs (0 << 1)
87 #define SAMPCTRL_BOSR_USB_272fs (1 << 1)
88 /* Bits 2-5:
89 * Sample rate setting are device-specific. See WM8721 datasheet
90 * for proper settings for the device's clocking */
91 #define SAMPCTRL_SR_MASK (0xf << 2)
92 #define SAMPCTRL_CLKIDIV2 (1 << 6)
94 #define ACTIVECTRL 0x09
95 #define ACTIVECTRL_ACTIVE (1 << 0)
97 #define RESET 0x0f
98 #define RESET_RESET 0x0
100 /* SAMPCTRL values for the supported samplerates (24MHz MCLK/USB): */
101 #define WM8721_USB24_8000HZ 0x4d
102 #define WM8721_USB24_32000HZ 0x59
103 #define WM8721_USB24_44100HZ 0x63
104 #define WM8721_USB24_48000HZ 0x41
105 #define WM8721_USB24_88200HZ 0x7f
106 #define WM8721_USB24_96000HZ 0x5d
108 #endif /* _WM8721_H */