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[Rockbox.git] / firmware / drivers / arcotg_udc.c
blobd39dbc39df71db77cbb8037839c788c4f52a9907
1 /***************************************************************************
2 * __________ __ ___.
3 * Open \______ \ ____ ____ | | _\_ |__ _______ ___
4 * Source | _// _ \_/ ___\| |/ /| __ \ / _ \ \/ /
5 * Jukebox | | ( <_> ) \___| < | \_\ ( <_> > < <
6 * Firmware |____|_ /\____/ \___ >__|_ \|___ /\____/__/\_ \
7 * \/ \/ \/ \/ \/
8 * $Id$
10 * Copyright (C) 2007 by Barry Wardell
12 * Based on code from the Linux Target Image Builder from Freescale
13 * available at http://www.bitshrine.org/ and
14 * http://www.bitshrine.org/gpp/linux-2.6.16-mx31-usb-2.patch
15 * Adapted for Rockbox in January 2007
16 * Original file: drivers/usb/gadget/arcotg_udc.c
18 * USB Device Controller Driver
19 * Driver for ARC OTG USB module in the i.MX31 platform, etc.
21 * Copyright 2004-2006 Freescale Semiconductor, Inc. All Rights Reserved.
23 * Based on mpc-udc.h
24 * Author: Li Yang (leoli@freescale.com)
25 * Jiang Bo (Tanya.jiang@freescale.com)
27 * All files in this archive are subject to the GNU General Public License.
28 * See the file COPYING in the source tree root for full license agreement.
30 * This software is distributed on an "AS IS" basis, WITHOUT WARRANTY OF ANY
31 * KIND, either express or implied.
33 ****************************************************************************/
34 #include "arcotg_udc.h"
35 #include "logf.h"
37 static int timeout;
39 /* @qh_addr is the aligned virt addr of ep QH addr
40 * it is used to set endpointlistaddr Reg */
41 /* was static int dr_controller_setup(void *qh_addr) */
42 int dr_controller_setup(void)
44 #if 0
45 struct arc_usb_config *config;
47 config = udc_controller->config;
49 /* before here, make sure usb_slave_regs has been initialized */
50 if (!qh_addr)
51 return -EINVAL;
52 #endif
54 /* Stop and reset the usb controller */
55 UDC_USBCMD &= ~USB_CMD_RUN_STOP;
57 UDC_USBCMD |= USB_CMD_CTRL_RESET;
59 /* Wait for reset to complete */
60 timeout = 10000000;
61 while ((UDC_USBCMD & USB_CMD_CTRL_RESET) &&
62 --timeout) {
63 continue;
65 if (timeout == 0) {
66 logf("%s: TIMEOUT", __FUNCTION__);
67 return -ETIMEDOUT;
70 /* Set the controller as device mode and disable setup lockout */
71 UDC_USBMODE |= (USB_MODE_CTRL_MODE_DEVICE | USB_MODE_SETUP_LOCK_OFF);
73 /* Clear the setup status */
74 UDC_USBSTS = 0;
75 #if 0
76 UDC_ENDPOINTLISTADDR = (unsigned int)qh_addr & USB_EP_LIST_ADDRESS_MASK;
78 VDBG("qh_addr=0x%x epla_reg=0x%8x", qh_addr, UOG_ASYNCLISTADDR);
79 #endif
80 UDC_PORTSC1 = (UDC_PORTSC1 & ~PORTSCX_PHY_TYPE_SEL) | PORTSCX_PTS_UTMI;
81 #if 0
82 if (config->set_vbus_power)
83 config->set_vbus_power(0);
84 #endif
86 return 0;
89 /* just Enable DR irq reg and Set Dr controller Run */
90 /* was static void dr_controller_run(struct arcotg_udc *udc) */
91 void dr_controller_run(void)
93 /*Enable DR irq reg */
94 UDC_USBINTR = USB_INTR_INT_EN | USB_INTR_ERR_INT_EN |
95 USB_INTR_PTC_DETECT_EN | USB_INTR_RESET_EN |
96 USB_INTR_DEVICE_SUSPEND | USB_INTR_SYS_ERR_EN;
97 #if 0
98 /* Clear stopped bit */
99 udc->stopped = 0;
100 #endif
101 /* Set the controller as device mode */
102 UDC_USBMODE |= USB_MODE_CTRL_MODE_DEVICE;
104 /* Set controller to Run */
105 UDC_USBCMD |= USB_CMD_RUN_STOP;
107 return;
110 /* just Enable DR irq reg and Set Dr controller Run */
111 /* was static void dr_controller_stop(struct arcotg_udc *udc) */
112 void dr_controller_stop(void)
114 #if 0
115 /* if we're in OTG mode, and the Host is currently using the port,
116 * stop now and don't rip the controller out from under the
117 * ehci driver
119 if (udc->gadget.is_otg) {
120 if (!(UDC_OTGSC & OTGSC_STS_USB_ID)) {
121 logf("Leaving early");
122 return;
125 #endif
127 /* disable all INTR */
128 UDC_USBINTR = 0;
129 #if 0
130 /* Set stopped bit */
131 udc->stopped = 1;
132 #endif
133 /* Set controller to Stop */
134 UDC_USBCMD &= ~USB_CMD_RUN_STOP;